Commit | Line | Data |
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1da177e4 LT |
1 | /* $Id: os_pri.c,v 1.32 2004/03/21 17:26:01 armin Exp $ */ |
2 | ||
3 | #include "platform.h" | |
4 | #include "debuglib.h" | |
5 | #include "cardtype.h" | |
6 | #include "pc.h" | |
7 | #include "pr_pc.h" | |
8 | #include "di_defs.h" | |
9 | #include "dsp_defs.h" | |
10 | #include "di.h" | |
11 | #include "io.h" | |
12 | ||
13 | #include "xdi_msg.h" | |
14 | #include "xdi_adapter.h" | |
15 | #include "os_pri.h" | |
16 | #include "diva_pci.h" | |
17 | #include "mi_pc.h" | |
18 | #include "pc_maint.h" | |
19 | #include "dsp_tst.h" | |
20 | #include "diva_dma.h" | |
21 | ||
22 | /* -------------------------------------------------------------------------- | |
23 | OS Dependent part of XDI driver for DIVA PRI Adapter | |
24 | ||
25 | DSP detection/validation by Anthony Booth (Eicon Networks, www.eicon.com) | |
26 | -------------------------------------------------------------------------- */ | |
27 | ||
28 | #define DIVA_PRI_NO_PCI_BIOS_WORKAROUND 1 | |
29 | ||
30 | extern int diva_card_read_xlog(diva_os_xdi_adapter_t * a); | |
31 | ||
32 | /* | |
33 | ** IMPORTS | |
34 | */ | |
35 | extern void prepare_pri_functions(PISDN_ADAPTER IoAdapter); | |
36 | extern void prepare_pri2_functions(PISDN_ADAPTER IoAdapter); | |
37 | extern void diva_xdi_display_adapter_features(int card); | |
38 | ||
39 | static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a); | |
40 | static int diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a, | |
41 | diva_xdi_um_cfg_cmd_t * cmd, int length); | |
42 | static int pri_get_serial_number(diva_os_xdi_adapter_t * a); | |
43 | static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a); | |
44 | static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a); | |
45 | ||
46 | /* | |
47 | ** Check card revision | |
48 | */ | |
49 | static int pri_is_rev_2_card(int card_ordinal) | |
50 | { | |
51 | switch (card_ordinal) { | |
52 | case CARDTYPE_DIVASRV_P_30M_V2_PCI: | |
53 | case CARDTYPE_DIVASRV_VOICE_P_30M_V2_PCI: | |
54 | return (1); | |
55 | } | |
56 | return (0); | |
57 | } | |
58 | ||
59 | static void diva_pri_set_addresses(diva_os_xdi_adapter_t * a) | |
60 | { | |
61 | a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 0; | |
62 | a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2; | |
63 | a->resources.pci.mem_type_id[MEM_TYPE_CONFIG] = 4; | |
64 | a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0; | |
65 | a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 2; | |
66 | a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 4; | |
67 | a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 3; | |
68 | ||
69 | a->xdi_adapter.Address = a->resources.pci.addr[0]; | |
70 | a->xdi_adapter.Control = a->resources.pci.addr[2]; | |
71 | a->xdi_adapter.Config = a->resources.pci.addr[4]; | |
72 | ||
73 | a->xdi_adapter.ram = a->resources.pci.addr[0]; | |
74 | a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET; | |
75 | ||
76 | a->xdi_adapter.reset = a->resources.pci.addr[2]; | |
77 | a->xdi_adapter.reset += MP_RESET; | |
78 | ||
79 | a->xdi_adapter.cfg = a->resources.pci.addr[4]; | |
80 | a->xdi_adapter.cfg += MP_IRQ_RESET; | |
81 | ||
82 | a->xdi_adapter.sdram_bar = a->resources.pci.bar[0]; | |
83 | ||
84 | a->xdi_adapter.prom = a->resources.pci.addr[3]; | |
85 | } | |
86 | ||
87 | /* | |
88 | ** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2 | |
89 | ** BAR1 - DEVICES, 0x1000 | |
90 | ** BAR2 - CONTROL (REG), 0x2000 | |
91 | ** BAR3 - FLASH (REG), 0x8000 | |
92 | ** BAR4 - CONFIG (CFG), 0x1000 | |
93 | */ | |
94 | int diva_pri_init_card(diva_os_xdi_adapter_t * a) | |
95 | { | |
96 | int bar = 0; | |
97 | int pri_rev_2; | |
98 | unsigned long bar_length[5] = { | |
99 | MP_MEMORY_SIZE, | |
100 | 0x1000, | |
101 | 0x2000, | |
102 | 0x8000, | |
103 | 0x1000 | |
104 | }; | |
105 | ||
106 | pri_rev_2 = pri_is_rev_2_card(a->CardOrdinal); | |
107 | ||
108 | if (pri_rev_2) { | |
109 | bar_length[0] = MP2_MEMORY_SIZE; | |
110 | } | |
111 | /* | |
112 | Set properties | |
113 | */ | |
114 | a->xdi_adapter.Properties = CardProperties[a->CardOrdinal]; | |
115 | DBG_LOG(("Load %s", a->xdi_adapter.Properties.Name)) | |
116 | ||
117 | /* | |
118 | First initialization step: get and check hardware resoures. | |
119 | Do not map resources and do not acecess card at this step | |
120 | */ | |
121 | for (bar = 0; bar < 5; bar++) { | |
122 | a->resources.pci.bar[bar] = | |
123 | divasa_get_pci_bar(a->resources.pci.bus, | |
124 | a->resources.pci.func, bar, | |
125 | a->resources.pci.hdev); | |
126 | if (!a->resources.pci.bar[bar] | |
127 | || (a->resources.pci.bar[bar] == 0xFFFFFFF0)) { | |
128 | DBG_ERR(("A: invalid bar[%d]=%08x", bar, | |
129 | a->resources.pci.bar[bar])) | |
130 | return (-1); | |
131 | } | |
132 | } | |
133 | a->resources.pci.irq = | |
134 | (byte) divasa_get_pci_irq(a->resources.pci.bus, | |
135 | a->resources.pci.func, | |
136 | a->resources.pci.hdev); | |
137 | if (!a->resources.pci.irq) { | |
138 | DBG_ERR(("A: invalid irq")); | |
139 | return (-1); | |
140 | } | |
141 | ||
142 | /* | |
143 | Map all BAR's | |
144 | */ | |
145 | for (bar = 0; bar < 5; bar++) { | |
146 | a->resources.pci.addr[bar] = | |
147 | divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar], | |
148 | bar_length[bar]); | |
149 | if (!a->resources.pci.addr[bar]) { | |
150 | DBG_ERR(("A: A(%d), can't map bar[%d]", | |
151 | a->controller, bar)) | |
152 | diva_pri_cleanup_adapter(a); | |
153 | return (-1); | |
154 | } | |
155 | } | |
156 | ||
157 | /* | |
158 | Set all memory areas | |
159 | */ | |
160 | diva_pri_set_addresses(a); | |
161 | ||
162 | /* | |
163 | Get Serial Number of this adapter | |
164 | */ | |
165 | if (pri_get_serial_number(a)) { | |
166 | dword serNo; | |
167 | serNo = a->resources.pci.bar[1] & 0xffff0000; | |
168 | serNo |= ((dword) a->resources.pci.bus) << 8; | |
169 | serNo += (a->resources.pci.func + a->controller + 1); | |
170 | a->xdi_adapter.serialNo = serNo & ~0xFF000000; | |
171 | DBG_ERR(("A: A(%d) can't get Serial Number, generated serNo=%ld", | |
172 | a->controller, a->xdi_adapter.serialNo)) | |
173 | } | |
174 | ||
175 | ||
176 | /* | |
177 | Initialize os objects | |
178 | */ | |
179 | if (diva_os_initialize_spin_lock(&a->xdi_adapter.isr_spin_lock, "isr")) { | |
180 | diva_pri_cleanup_adapter(a); | |
181 | return (-1); | |
182 | } | |
183 | if (diva_os_initialize_spin_lock | |
184 | (&a->xdi_adapter.data_spin_lock, "data")) { | |
185 | diva_pri_cleanup_adapter(a); | |
186 | return (-1); | |
187 | } | |
188 | ||
189 | strcpy(a->xdi_adapter.req_soft_isr.dpc_thread_name, "kdivasprid"); | |
190 | ||
191 | if (diva_os_initialize_soft_isr(&a->xdi_adapter.req_soft_isr, | |
192 | DIDpcRoutine, &a->xdi_adapter)) { | |
193 | diva_pri_cleanup_adapter(a); | |
194 | return (-1); | |
195 | } | |
196 | ||
197 | /* | |
198 | Do not initialize second DPC - only one thread will be created | |
199 | */ | |
200 | a->xdi_adapter.isr_soft_isr.object = | |
201 | a->xdi_adapter.req_soft_isr.object; | |
202 | ||
203 | /* | |
204 | Next step of card initialization: | |
205 | set up all interface pointers | |
206 | */ | |
207 | a->xdi_adapter.Channels = CardProperties[a->CardOrdinal].Channels; | |
208 | a->xdi_adapter.e_max = CardProperties[a->CardOrdinal].E_info; | |
209 | ||
210 | a->xdi_adapter.e_tbl = | |
211 | diva_os_malloc(0, a->xdi_adapter.e_max * sizeof(E_INFO)); | |
212 | if (!a->xdi_adapter.e_tbl) { | |
213 | diva_pri_cleanup_adapter(a); | |
214 | return (-1); | |
215 | } | |
216 | memset(a->xdi_adapter.e_tbl, 0x00, a->xdi_adapter.e_max * sizeof(E_INFO)); | |
217 | ||
218 | a->xdi_adapter.a.io = &a->xdi_adapter; | |
219 | a->xdi_adapter.DIRequest = request; | |
220 | a->interface.cleanup_adapter_proc = diva_pri_cleanup_adapter; | |
221 | a->interface.cmd_proc = diva_pri_cmd_card_proc; | |
222 | ||
223 | if (pri_rev_2) { | |
224 | prepare_pri2_functions(&a->xdi_adapter); | |
225 | } else { | |
226 | prepare_pri_functions(&a->xdi_adapter); | |
227 | } | |
228 | ||
229 | a->dsp_mask = diva_pri_detect_dsps(a); | |
230 | ||
231 | /* | |
232 | Allocate DMA map | |
233 | */ | |
234 | if (pri_rev_2) { | |
235 | diva_init_dma_map(a->resources.pci.hdev, | |
236 | (struct _diva_dma_map_entry **) &a->xdi_adapter.dma_map, 32); | |
237 | } | |
238 | ||
239 | /* | |
240 | Set IRQ handler | |
241 | */ | |
242 | a->xdi_adapter.irq_info.irq_nr = a->resources.pci.irq; | |
243 | sprintf(a->xdi_adapter.irq_info.irq_name, | |
244 | "DIVA PRI %ld", (long) a->xdi_adapter.serialNo); | |
245 | ||
246 | if (diva_os_register_irq(a, a->xdi_adapter.irq_info.irq_nr, | |
247 | a->xdi_adapter.irq_info.irq_name)) { | |
248 | diva_pri_cleanup_adapter(a); | |
249 | return (-1); | |
250 | } | |
251 | a->xdi_adapter.irq_info.registered = 1; | |
252 | ||
253 | diva_log_info("%s IRQ:%d SerNo:%d", a->xdi_adapter.Properties.Name, | |
254 | a->resources.pci.irq, a->xdi_adapter.serialNo); | |
255 | ||
256 | return (0); | |
257 | } | |
258 | ||
259 | static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a) | |
260 | { | |
261 | int bar = 0; | |
262 | ||
263 | /* | |
264 | Stop Adapter if adapter is running | |
265 | */ | |
266 | if (a->xdi_adapter.Initialized) { | |
267 | diva_pri_stop_adapter(a); | |
268 | } | |
269 | ||
270 | /* | |
271 | Remove ISR Handler | |
272 | */ | |
273 | if (a->xdi_adapter.irq_info.registered) { | |
274 | diva_os_remove_irq(a, a->xdi_adapter.irq_info.irq_nr); | |
275 | } | |
276 | a->xdi_adapter.irq_info.registered = 0; | |
277 | ||
278 | /* | |
279 | Step 1: unmap all BAR's, if any was mapped | |
280 | */ | |
281 | for (bar = 0; bar < 5; bar++) { | |
282 | if (a->resources.pci.bar[bar] | |
283 | && a->resources.pci.addr[bar]) { | |
284 | divasa_unmap_pci_bar(a->resources.pci.addr[bar]); | |
285 | a->resources.pci.bar[bar] = 0; | |
286 | a->resources.pci.addr[bar] = NULL; | |
287 | } | |
288 | } | |
289 | ||
290 | /* | |
291 | Free OS objects | |
292 | */ | |
293 | diva_os_cancel_soft_isr(&a->xdi_adapter.isr_soft_isr); | |
294 | diva_os_cancel_soft_isr(&a->xdi_adapter.req_soft_isr); | |
295 | ||
296 | diva_os_remove_soft_isr(&a->xdi_adapter.req_soft_isr); | |
297 | a->xdi_adapter.isr_soft_isr.object = NULL; | |
298 | ||
299 | diva_os_destroy_spin_lock(&a->xdi_adapter.isr_spin_lock, "rm"); | |
300 | diva_os_destroy_spin_lock(&a->xdi_adapter.data_spin_lock, "rm"); | |
301 | ||
302 | /* | |
303 | Free memory accupied by XDI adapter | |
304 | */ | |
305 | if (a->xdi_adapter.e_tbl) { | |
306 | diva_os_free(0, a->xdi_adapter.e_tbl); | |
307 | a->xdi_adapter.e_tbl = NULL; | |
308 | } | |
309 | a->xdi_adapter.Channels = 0; | |
310 | a->xdi_adapter.e_max = 0; | |
311 | ||
312 | ||
313 | /* | |
314 | Free adapter DMA map | |
315 | */ | |
316 | diva_free_dma_map(a->resources.pci.hdev, | |
317 | (struct _diva_dma_map_entry *) a->xdi_adapter. | |
318 | dma_map); | |
319 | a->xdi_adapter.dma_map = NULL; | |
320 | ||
321 | ||
322 | /* | |
323 | Detach this adapter from debug driver | |
324 | */ | |
325 | ||
326 | return (0); | |
327 | } | |
328 | ||
329 | /* | |
330 | ** Activate On Board Boot Loader | |
331 | */ | |
332 | static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter) | |
333 | { | |
334 | dword i; | |
335 | struct mp_load __iomem *boot; | |
336 | ||
337 | if (!IoAdapter->Address || !IoAdapter->reset) { | |
338 | return (-1); | |
339 | } | |
340 | if (IoAdapter->Initialized) { | |
341 | DBG_ERR(("A: A(%d) can't reset PRI adapter - please stop first", | |
342 | IoAdapter->ANum)) | |
343 | return (-1); | |
344 | } | |
345 | ||
346 | boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); | |
347 | WRITE_DWORD(&boot->err, 0); | |
348 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
349 | ||
350 | IoAdapter->rstFnc(IoAdapter); | |
351 | ||
352 | diva_os_wait(10); | |
353 | ||
354 | boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); | |
355 | i = READ_DWORD(&boot->live); | |
356 | ||
357 | diva_os_wait(10); | |
358 | if (i == READ_DWORD(&boot->live)) { | |
359 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
360 | DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!", | |
361 | IoAdapter->ANum, IoAdapter->serialNo)) | |
362 | return (-1); | |
363 | } | |
364 | if (READ_DWORD(&boot->err)) { | |
365 | DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx", | |
366 | IoAdapter->ANum, IoAdapter->serialNo, | |
367 | READ_DWORD(&boot->err))) | |
368 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
369 | return (-1); | |
370 | } | |
371 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
372 | ||
373 | /* | |
374 | Forget all outstanding entities | |
375 | */ | |
376 | IoAdapter->e_count = 0; | |
377 | if (IoAdapter->e_tbl) { | |
378 | memset(IoAdapter->e_tbl, 0x00, | |
379 | IoAdapter->e_max * sizeof(E_INFO)); | |
380 | } | |
381 | IoAdapter->head = 0; | |
382 | IoAdapter->tail = 0; | |
383 | IoAdapter->assign = 0; | |
384 | IoAdapter->trapped = 0; | |
385 | ||
386 | memset(&IoAdapter->a.IdTable[0], 0x00, | |
387 | sizeof(IoAdapter->a.IdTable)); | |
388 | memset(&IoAdapter->a.IdTypeTable[0], 0x00, | |
389 | sizeof(IoAdapter->a.IdTypeTable)); | |
390 | memset(&IoAdapter->a.FlowControlIdTable[0], 0x00, | |
391 | sizeof(IoAdapter->a.FlowControlIdTable)); | |
392 | memset(&IoAdapter->a.FlowControlSkipTable[0], 0x00, | |
393 | sizeof(IoAdapter->a.FlowControlSkipTable)); | |
394 | memset(&IoAdapter->a.misc_flags_table[0], 0x00, | |
395 | sizeof(IoAdapter->a.misc_flags_table)); | |
396 | memset(&IoAdapter->a.rx_stream[0], 0x00, | |
397 | sizeof(IoAdapter->a.rx_stream)); | |
398 | memset(&IoAdapter->a.tx_stream[0], 0x00, | |
399 | sizeof(IoAdapter->a.tx_stream)); | |
400 | memset(&IoAdapter->a.tx_pos[0], 0x00, sizeof(IoAdapter->a.tx_pos)); | |
401 | memset(&IoAdapter->a.rx_pos[0], 0x00, sizeof(IoAdapter->a.rx_pos)); | |
402 | ||
403 | return (0); | |
404 | } | |
405 | ||
406 | static int | |
407 | diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter, | |
408 | dword address, | |
409 | const byte * data, dword length, dword limit) | |
410 | { | |
411 | byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); | |
412 | byte __iomem *mem = p; | |
413 | ||
414 | if (((address + length) >= limit) || !mem) { | |
415 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p); | |
416 | DBG_ERR(("A: A(%d) write PRI address=0x%08lx", | |
417 | IoAdapter->ANum, address + length)) | |
418 | return (-1); | |
419 | } | |
420 | mem += address; | |
421 | ||
422 | /* memcpy_toio(), maybe? */ | |
423 | while (length--) { | |
424 | WRITE_BYTE(mem++, *data++); | |
425 | } | |
426 | ||
427 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p); | |
428 | return (0); | |
429 | } | |
430 | ||
431 | static int | |
432 | diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, | |
433 | dword start_address, dword features) | |
434 | { | |
435 | dword i; | |
436 | int started = 0; | |
437 | byte __iomem *p; | |
438 | struct mp_load __iomem *boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); | |
439 | ADAPTER *a = &IoAdapter->a; | |
440 | ||
441 | if (IoAdapter->Initialized) { | |
442 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
443 | DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running", | |
444 | IoAdapter->ANum)) | |
445 | return (-1); | |
446 | } | |
447 | if (!boot) { | |
448 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
449 | DBG_ERR(("A: PRI %ld can't start, adapter not mapped", | |
450 | IoAdapter->serialNo)) | |
451 | return (-1); | |
452 | } | |
453 | ||
454 | sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum); | |
455 | DBG_LOG(("A(%d) start PRI at 0x%08lx", IoAdapter->ANum, | |
456 | start_address)) | |
457 | ||
458 | WRITE_DWORD(&boot->addr, start_address); | |
459 | WRITE_DWORD(&boot->cmd, 3); | |
460 | ||
461 | for (i = 0; i < 300; ++i) { | |
462 | diva_os_wait(10); | |
463 | if ((READ_DWORD(&boot->signature) >> 16) == 0x4447) { | |
464 | DBG_LOG(("A(%d) Protocol startup time %d.%02d seconds", | |
465 | IoAdapter->ANum, (i / 100), (i % 100))) | |
466 | started = 1; | |
467 | break; | |
468 | } | |
469 | } | |
470 | ||
471 | if (!started) { | |
472 | byte __iomem *p = (byte __iomem *)boot; | |
473 | dword TrapId; | |
474 | dword debug; | |
475 | TrapId = READ_DWORD(&p[0x80]); | |
476 | debug = READ_DWORD(&p[0x1c]); | |
477 | DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx", | |
478 | IoAdapter->ANum, READ_DWORD(&boot->signature), | |
479 | TrapId, debug)) | |
480 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
481 | if (IoAdapter->trapFnc) { | |
482 | (*(IoAdapter->trapFnc)) (IoAdapter); | |
483 | } | |
484 | IoAdapter->stop(IoAdapter); | |
485 | return (-1); | |
486 | } | |
487 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | |
488 | ||
489 | IoAdapter->Initialized = TRUE; | |
490 | ||
491 | /* | |
492 | Check Interrupt | |
493 | */ | |
494 | IoAdapter->IrqCount = 0; | |
495 | p = DIVA_OS_MEM_ATTACH_CFG(IoAdapter); | |
496 | WRITE_DWORD(p, (dword) ~ 0x03E00000); | |
497 | DIVA_OS_MEM_DETACH_CFG(IoAdapter, p); | |
498 | a->ReadyInt = 1; | |
499 | a->ram_out(a, &PR_RAM->ReadyInt, 1); | |
500 | ||
501 | for (i = 100; !IoAdapter->IrqCount && (i-- > 0); diva_os_wait(10)); | |
502 | ||
503 | if (!IoAdapter->IrqCount) { | |
504 | DBG_ERR(("A: A(%d) interrupt test failed", | |
505 | IoAdapter->ANum)) | |
506 | IoAdapter->Initialized = FALSE; | |
507 | IoAdapter->stop(IoAdapter); | |
508 | return (-1); | |
509 | } | |
510 | ||
511 | IoAdapter->Properties.Features = (word) features; | |
512 | ||
513 | diva_xdi_display_adapter_features(IoAdapter->ANum); | |
514 | ||
515 | DBG_LOG(("A(%d) PRI adapter successfull started", IoAdapter->ANum)) | |
516 | /* | |
517 | Register with DIDD | |
518 | */ | |
519 | diva_xdi_didd_register_adapter(IoAdapter->ANum); | |
520 | ||
521 | return (0); | |
522 | } | |
523 | ||
524 | static void diva_pri_clear_interrupts(diva_os_xdi_adapter_t * a) | |
525 | { | |
526 | PISDN_ADAPTER IoAdapter = &a->xdi_adapter; | |
527 | ||
528 | /* | |
529 | clear any pending interrupt | |
530 | */ | |
531 | IoAdapter->disIrq(IoAdapter); | |
532 | ||
533 | IoAdapter->tst_irq(&IoAdapter->a); | |
534 | IoAdapter->clr_irq(&IoAdapter->a); | |
535 | IoAdapter->tst_irq(&IoAdapter->a); | |
536 | ||
537 | /* | |
538 | kill pending dpcs | |
539 | */ | |
540 | diva_os_cancel_soft_isr(&IoAdapter->req_soft_isr); | |
541 | diva_os_cancel_soft_isr(&IoAdapter->isr_soft_isr); | |
542 | } | |
543 | ||
544 | /* | |
545 | ** Stop Adapter, but do not unmap/unregister - adapter | |
546 | ** will be restarted later | |
547 | */ | |
548 | static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a) | |
549 | { | |
550 | PISDN_ADAPTER IoAdapter = &a->xdi_adapter; | |
551 | int i = 100; | |
552 | ||
553 | if (!IoAdapter->ram) { | |
554 | return (-1); | |
555 | } | |
556 | if (!IoAdapter->Initialized) { | |
557 | DBG_ERR(("A: A(%d) can't stop PRI adapter - not running", | |
558 | IoAdapter->ANum)) | |
559 | return (-1); /* nothing to stop */ | |
560 | } | |
561 | IoAdapter->Initialized = 0; | |
562 | ||
563 | /* | |
564 | Disconnect Adapter from DIDD | |
565 | */ | |
566 | diva_xdi_didd_remove_adapter(IoAdapter->ANum); | |
567 | ||
568 | /* | |
569 | Stop interrupts | |
570 | */ | |
571 | a->clear_interrupts_proc = diva_pri_clear_interrupts; | |
572 | IoAdapter->a.ReadyInt = 1; | |
573 | IoAdapter->a.ram_inc(&IoAdapter->a, &PR_RAM->ReadyInt); | |
574 | do { | |
575 | diva_os_sleep(10); | |
576 | } while (i-- && a->clear_interrupts_proc); | |
577 | ||
578 | if (a->clear_interrupts_proc) { | |
579 | diva_pri_clear_interrupts(a); | |
580 | a->clear_interrupts_proc = NULL; | |
581 | DBG_ERR(("A: A(%d) no final interrupt from PRI adapter", | |
582 | IoAdapter->ANum)) | |
583 | } | |
584 | IoAdapter->a.ReadyInt = 0; | |
585 | ||
586 | /* | |
587 | Stop and reset adapter | |
588 | */ | |
589 | IoAdapter->stop(IoAdapter); | |
590 | ||
591 | return (0); | |
592 | } | |
593 | ||
594 | /* | |
595 | ** Process commands form configuration/download framework and from | |
596 | ** user mode | |
597 | ** | |
598 | ** return 0 on success | |
599 | */ | |
600 | static int | |
601 | diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a, | |
602 | diva_xdi_um_cfg_cmd_t * cmd, int length) | |
603 | { | |
604 | int ret = -1; | |
605 | ||
606 | if (cmd->adapter != a->controller) { | |
607 | DBG_ERR(("A: pri_cmd, invalid controller=%d != %d", | |
608 | cmd->adapter, a->controller)) | |
609 | return (-1); | |
610 | } | |
611 | ||
612 | switch (cmd->command) { | |
613 | case DIVA_XDI_UM_CMD_GET_CARD_ORDINAL: | |
614 | a->xdi_mbox.data_length = sizeof(dword); | |
615 | a->xdi_mbox.data = | |
616 | diva_os_malloc(0, a->xdi_mbox.data_length); | |
617 | if (a->xdi_mbox.data) { | |
618 | *(dword *) a->xdi_mbox.data = | |
619 | (dword) a->CardOrdinal; | |
620 | a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY; | |
621 | ret = 0; | |
622 | } | |
623 | break; | |
624 | ||
625 | case DIVA_XDI_UM_CMD_GET_SERIAL_NR: | |
626 | a->xdi_mbox.data_length = sizeof(dword); | |
627 | a->xdi_mbox.data = | |
628 | diva_os_malloc(0, a->xdi_mbox.data_length); | |
629 | if (a->xdi_mbox.data) { | |
630 | *(dword *) a->xdi_mbox.data = | |
631 | (dword) a->xdi_adapter.serialNo; | |
632 | a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY; | |
633 | ret = 0; | |
634 | } | |
635 | break; | |
636 | ||
637 | case DIVA_XDI_UM_CMD_GET_PCI_HW_CONFIG: | |
638 | a->xdi_mbox.data_length = sizeof(dword) * 9; | |
639 | a->xdi_mbox.data = | |
640 | diva_os_malloc(0, a->xdi_mbox.data_length); | |
641 | if (a->xdi_mbox.data) { | |
642 | int i; | |
643 | dword *data = (dword *) a->xdi_mbox.data; | |
644 | ||
645 | for (i = 0; i < 8; i++) { | |
646 | *data++ = a->resources.pci.bar[i]; | |
647 | } | |
648 | *data++ = (dword) a->resources.pci.irq; | |
649 | a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY; | |
650 | ret = 0; | |
651 | } | |
652 | break; | |
653 | ||
654 | case DIVA_XDI_UM_CMD_RESET_ADAPTER: | |
655 | ret = diva_pri_reset_adapter(&a->xdi_adapter); | |
656 | break; | |
657 | ||
658 | case DIVA_XDI_UM_CMD_WRITE_SDRAM_BLOCK: | |
659 | ret = diva_pri_write_sdram_block(&a->xdi_adapter, | |
660 | cmd->command_data. | |
661 | write_sdram.offset, | |
662 | (byte *) & cmd[1], | |
663 | cmd->command_data. | |
664 | write_sdram.length, | |
665 | pri_is_rev_2_card(a-> | |
666 | CardOrdinal) | |
667 | ? MP2_MEMORY_SIZE : | |
668 | MP_MEMORY_SIZE); | |
669 | break; | |
670 | ||
671 | case DIVA_XDI_UM_CMD_STOP_ADAPTER: | |
672 | ret = diva_pri_stop_adapter(a); | |
673 | break; | |
674 | ||
675 | case DIVA_XDI_UM_CMD_START_ADAPTER: | |
676 | ret = diva_pri_start_adapter(&a->xdi_adapter, | |
677 | cmd->command_data.start. | |
678 | offset, | |
679 | cmd->command_data.start. | |
680 | features); | |
681 | break; | |
682 | ||
683 | case DIVA_XDI_UM_CMD_SET_PROTOCOL_FEATURES: | |
684 | a->xdi_adapter.features = | |
685 | cmd->command_data.features.features; | |
686 | a->xdi_adapter.a.protocol_capabilities = | |
687 | a->xdi_adapter.features; | |
688 | DBG_TRC(("Set raw protocol features (%08x)", | |
689 | a->xdi_adapter.features)) | |
690 | ret = 0; | |
691 | break; | |
692 | ||
693 | case DIVA_XDI_UM_CMD_GET_CARD_STATE: | |
694 | a->xdi_mbox.data_length = sizeof(dword); | |
695 | a->xdi_mbox.data = | |
696 | diva_os_malloc(0, a->xdi_mbox.data_length); | |
697 | if (a->xdi_mbox.data) { | |
698 | dword *data = (dword *) a->xdi_mbox.data; | |
699 | if (!a->xdi_adapter.ram || | |
700 | !a->xdi_adapter.reset || | |
701 | !a->xdi_adapter.cfg) { | |
702 | *data = 3; | |
703 | } else if (a->xdi_adapter.trapped) { | |
704 | *data = 2; | |
705 | } else if (a->xdi_adapter.Initialized) { | |
706 | *data = 1; | |
707 | } else { | |
708 | *data = 0; | |
709 | } | |
710 | a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY; | |
711 | ret = 0; | |
712 | } | |
713 | break; | |
714 | ||
715 | case DIVA_XDI_UM_CMD_READ_XLOG_ENTRY: | |
716 | ret = diva_card_read_xlog(a); | |
717 | break; | |
718 | ||
719 | case DIVA_XDI_UM_CMD_READ_SDRAM: | |
720 | if (a->xdi_adapter.Address) { | |
721 | if ( | |
722 | (a->xdi_mbox.data_length = | |
723 | cmd->command_data.read_sdram.length)) { | |
724 | if ( | |
725 | (a->xdi_mbox.data_length + | |
726 | cmd->command_data.read_sdram.offset) < | |
727 | a->xdi_adapter.MemorySize) { | |
728 | a->xdi_mbox.data = | |
729 | diva_os_malloc(0, | |
730 | a->xdi_mbox. | |
731 | data_length); | |
732 | if (a->xdi_mbox.data) { | |
733 | byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter); | |
734 | byte __iomem *src = p; | |
735 | byte *dst = a->xdi_mbox.data; | |
736 | dword len = a->xdi_mbox.data_length; | |
737 | ||
738 | src += cmd->command_data.read_sdram.offset; | |
739 | ||
740 | while (len--) { | |
741 | *dst++ = READ_BYTE(src++); | |
742 | } | |
743 | a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY; | |
744 | DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p); | |
745 | ret = 0; | |
746 | } | |
747 | } | |
748 | } | |
749 | } | |
750 | break; | |
751 | ||
752 | default: | |
753 | DBG_ERR(("A: A(%d) invalid cmd=%d", a->controller, | |
754 | cmd->command)) | |
755 | } | |
756 | ||
757 | return (ret); | |
758 | } | |
759 | ||
760 | /* | |
761 | ** Get Serial Number | |
762 | */ | |
763 | static int pri_get_serial_number(diva_os_xdi_adapter_t * a) | |
764 | { | |
765 | byte data[64]; | |
766 | int i; | |
767 | dword len = sizeof(data); | |
768 | volatile byte __iomem *config; | |
769 | volatile byte __iomem *flash; | |
770 | byte c; | |
771 | ||
772 | /* | |
773 | * First set some GT6401x config registers before accessing the BOOT-ROM | |
774 | */ | |
775 | config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); | |
776 | c = READ_BYTE(&config[0xc3c]); | |
777 | if (!(c & 0x08)) { | |
778 | WRITE_BYTE(&config[0xc3c], c); /* Base Address enable register */ | |
779 | } | |
780 | WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0x00); | |
781 | WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF); | |
782 | DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); | |
783 | /* | |
784 | * Read only the last 64 bytes of manufacturing data | |
785 | */ | |
786 | memset(data, '\0', len); | |
787 | flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter); | |
788 | for (i = 0; i < len; i++) { | |
789 | data[i] = READ_BYTE(&flash[0x8000 - len + i]); | |
790 | } | |
791 | DIVA_OS_MEM_DETACH_PROM(&a->xdi_adapter, flash); | |
792 | ||
793 | config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); | |
794 | WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0xFC); /* Disable FLASH EPROM access */ | |
795 | WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF); | |
796 | DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); | |
797 | ||
798 | if (memcmp(&data[48], "DIVAserverPR", 12)) { | |
799 | #if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */ | |
800 | word cmd = 0, cmd_org; | |
801 | void *addr; | |
802 | dword addr1, addr3, addr4; | |
803 | byte Bus, Slot; | |
804 | void *hdev; | |
805 | addr4 = a->resources.pci.bar[4]; | |
806 | addr3 = a->resources.pci.bar[3]; /* flash */ | |
807 | addr1 = a->resources.pci.bar[1]; /* unused */ | |
808 | ||
809 | DBG_ERR(("A: apply Compaq BIOS workaround")) | |
810 | DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x", | |
811 | data[0], data[1], data[2], data[3], | |
812 | data[4], data[5], data[6], data[7])) | |
813 | ||
814 | Bus = a->resources.pci.bus; | |
815 | Slot = a->resources.pci.func; | |
816 | hdev = a->resources.pci.hdev; | |
817 | PCIread(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev); | |
818 | PCIwrite(Bus, Slot, 0x04, &cmd, sizeof(cmd), hdev); | |
819 | ||
820 | PCIwrite(Bus, Slot, 0x14, &addr4, sizeof(addr4), hdev); | |
821 | PCIwrite(Bus, Slot, 0x20, &addr1, sizeof(addr1), hdev); | |
822 | ||
823 | PCIwrite(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev); | |
824 | ||
825 | addr = a->resources.pci.addr[1]; | |
826 | a->resources.pci.addr[1] = a->resources.pci.addr[4]; | |
827 | a->resources.pci.addr[4] = addr; | |
828 | ||
829 | addr1 = a->resources.pci.bar[1]; | |
830 | a->resources.pci.bar[1] = a->resources.pci.bar[4]; | |
831 | a->resources.pci.bar[4] = addr1; | |
832 | ||
833 | /* | |
834 | Try to read Flash again | |
835 | */ | |
836 | len = sizeof(data); | |
837 | ||
838 | config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); | |
839 | if (!(config[0xc3c] & 0x08)) { | |
840 | config[0xc3c] |= 0x08; /* Base Address enable register */ | |
841 | } | |
842 | config[LOW_BOOTCS_DREG] = 0x00; | |
843 | config[HI_BOOTCS_DREG] = 0xFF; | |
844 | DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); | |
845 | ||
846 | memset(data, '\0', len); | |
847 | flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter); | |
848 | for (i = 0; i < len; i++) { | |
849 | data[i] = flash[0x8000 - len + i]; | |
850 | } | |
851 | DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter, flash); | |
852 | config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); | |
853 | config[LOW_BOOTCS_DREG] = 0xFC; | |
854 | config[HI_BOOTCS_DREG] = 0xFF; | |
855 | DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); | |
856 | ||
857 | if (memcmp(&data[48], "DIVAserverPR", 12)) { | |
858 | DBG_ERR(("A: failed to read serial number")) | |
859 | DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x", | |
860 | data[0], data[1], data[2], data[3], | |
861 | data[4], data[5], data[6], data[7])) | |
862 | return (-1); | |
863 | } | |
864 | #else /* } { */ | |
865 | DBG_ERR(("A: failed to read DIVA signature word")) | |
866 | DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x", | |
867 | data[0], data[1], data[2], data[3], | |
868 | data[4], data[5], data[6], data[7])) | |
869 | DBG_LOG(("%02x:%02x:%02x:%02x", data[47], data[46], | |
870 | data[45], data[44])) | |
871 | #endif /* } */ | |
872 | } | |
873 | ||
874 | a->xdi_adapter.serialNo = | |
875 | (data[47] << 24) | (data[46] << 16) | (data[45] << 8) | | |
876 | data[44]; | |
877 | if (!a->xdi_adapter.serialNo | |
878 | || (a->xdi_adapter.serialNo == 0xffffffff)) { | |
879 | a->xdi_adapter.serialNo = 0; | |
880 | DBG_ERR(("A: failed to read serial number")) | |
881 | return (-1); | |
882 | } | |
883 | ||
884 | DBG_LOG(("Serial No. : %ld", a->xdi_adapter.serialNo)) | |
885 | DBG_TRC(("Board Revision : %d.%02d", (int) data[41], | |
886 | (int) data[40])) | |
887 | DBG_TRC(("PLD revision : %d.%02d", (int) data[33], | |
888 | (int) data[32])) | |
889 | DBG_TRC(("Boot loader version : %d.%02d", (int) data[37], | |
890 | (int) data[36])) | |
891 | ||
892 | DBG_TRC(("Manufacturing Date : %d/%02d/%02d (yyyy/mm/dd)", | |
893 | (int) ((data[28] > 90) ? 1900 : 2000) + | |
894 | (int) data[28], (int) data[29], (int) data[30])) | |
895 | ||
896 | return (0); | |
897 | } | |
898 | ||
899 | void diva_os_prepare_pri2_functions(PISDN_ADAPTER IoAdapter) | |
900 | { | |
901 | } | |
902 | ||
903 | void diva_os_prepare_pri_functions(PISDN_ADAPTER IoAdapter) | |
904 | { | |
905 | } | |
906 | ||
907 | /* | |
908 | ** Checks presence of DSP on board | |
909 | */ | |
910 | static int | |
911 | dsp_check_presence(volatile byte __iomem * addr, volatile byte __iomem * data, int dsp) | |
912 | { | |
913 | word pattern; | |
914 | ||
915 | WRITE_WORD(addr, 0x4000); | |
916 | WRITE_WORD(data, DSP_SIGNATURE_PROBE_WORD); | |
917 | ||
918 | WRITE_WORD(addr, 0x4000); | |
919 | pattern = READ_WORD(data); | |
920 | ||
921 | if (pattern != DSP_SIGNATURE_PROBE_WORD) { | |
922 | DBG_TRC(("W: DSP[%d] %04x(is) != %04x(should)", | |
923 | dsp, pattern, DSP_SIGNATURE_PROBE_WORD)) | |
924 | return (-1); | |
925 | } | |
926 | ||
927 | WRITE_WORD(addr, 0x4000); | |
928 | WRITE_WORD(data, ~DSP_SIGNATURE_PROBE_WORD); | |
929 | ||
930 | WRITE_WORD(addr, 0x4000); | |
931 | pattern = READ_WORD(data); | |
932 | ||
933 | if (pattern != (word) ~ DSP_SIGNATURE_PROBE_WORD) { | |
934 | DBG_ERR(("A: DSP[%d] %04x(is) != %04x(should)", | |
935 | dsp, pattern, (word) ~ DSP_SIGNATURE_PROBE_WORD)) | |
936 | return (-2); | |
937 | } | |
938 | ||
939 | DBG_TRC(("DSP[%d] present", dsp)) | |
940 | ||
941 | return (0); | |
942 | } | |
943 | ||
944 | ||
945 | /* | |
946 | ** Check if DSP's are present and operating | |
947 | ** Information about detected DSP's is returned as bit mask | |
948 | ** Bit 0 - DSP1 | |
949 | ** ... | |
950 | ** ... | |
951 | ** ... | |
952 | ** Bit 29 - DSP30 | |
953 | */ | |
954 | static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a) | |
955 | { | |
956 | byte __iomem *base; | |
957 | byte __iomem *p; | |
958 | dword ret = 0; | |
959 | dword row_offset[7] = { | |
960 | 0x00000000, | |
961 | 0x00000800, /* 1 - ROW 1 */ | |
962 | 0x00000840, /* 2 - ROW 2 */ | |
963 | 0x00001000, /* 3 - ROW 3 */ | |
964 | 0x00001040, /* 4 - ROW 4 */ | |
965 | 0x00000000 /* 5 - ROW 0 */ | |
966 | }; | |
967 | ||
968 | byte __iomem *dsp_addr_port; | |
969 | byte __iomem *dsp_data_port; | |
970 | byte row_state; | |
971 | int dsp_row = 0, dsp_index, dsp_num; | |
972 | ||
973 | if (!a->xdi_adapter.Control || !a->xdi_adapter.reset) { | |
974 | return (0); | |
975 | } | |
976 | ||
977 | p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter); | |
978 | WRITE_BYTE(p, _MP_RISC_RESET | _MP_DSP_RESET); | |
979 | DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p); | |
980 | diva_os_wait(5); | |
981 | ||
982 | base = DIVA_OS_MEM_ATTACH_CONTROL(&a->xdi_adapter); | |
983 | ||
984 | for (dsp_num = 0; dsp_num < 30; dsp_num++) { | |
985 | dsp_row = dsp_num / 7 + 1; | |
986 | dsp_index = dsp_num % 7; | |
987 | ||
988 | dsp_data_port = base; | |
989 | dsp_addr_port = base; | |
990 | ||
991 | dsp_data_port += row_offset[dsp_row]; | |
992 | dsp_addr_port += row_offset[dsp_row]; | |
993 | ||
994 | dsp_data_port += (dsp_index * 8); | |
995 | dsp_addr_port += (dsp_index * 8) + 0x80; | |
996 | ||
997 | if (!dsp_check_presence | |
998 | (dsp_addr_port, dsp_data_port, dsp_num + 1)) { | |
999 | ret |= (1 << dsp_num); | |
1000 | } | |
1001 | } | |
1002 | DIVA_OS_MEM_DETACH_CONTROL(&a->xdi_adapter, base); | |
1003 | ||
1004 | p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter); | |
1005 | WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2); | |
1006 | DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p); | |
1007 | diva_os_wait(5); | |
1008 | ||
1009 | /* | |
1010 | Verify modules | |
1011 | */ | |
1012 | for (dsp_row = 0; dsp_row < 4; dsp_row++) { | |
1013 | row_state = ((ret >> (dsp_row * 7)) & 0x7F); | |
1014 | if (row_state && (row_state != 0x7F)) { | |
1015 | for (dsp_index = 0; dsp_index < 7; dsp_index++) { | |
1016 | if (!(row_state & (1 << dsp_index))) { | |
1017 | DBG_ERR(("A: MODULE[%d]-DSP[%d] failed", | |
1018 | dsp_row + 1, | |
1019 | dsp_index + 1)) | |
1020 | } | |
1021 | } | |
1022 | } | |
1023 | } | |
1024 | ||
1025 | if (!(ret & 0x10000000)) { | |
1026 | DBG_ERR(("A: ON BOARD-DSP[1] failed")) | |
1027 | } | |
1028 | if (!(ret & 0x20000000)) { | |
1029 | DBG_ERR(("A: ON BOARD-DSP[2] failed")) | |
1030 | } | |
1031 | ||
1032 | /* | |
1033 | Print module population now | |
1034 | */ | |
1035 | DBG_LOG(("+-----------------------+")) | |
1036 | DBG_LOG(("| DSP MODULE POPULATION |")) | |
1037 | DBG_LOG(("+-----------------------+")) | |
1038 | DBG_LOG(("| 1 | 2 | 3 | 4 |")) | |
1039 | DBG_LOG(("+-----------------------+")) | |
1040 | DBG_LOG(("| %s | %s | %s | %s |", | |
1041 | ((ret >> (0 * 7)) & 0x7F) ? "Y" : "N", | |
1042 | ((ret >> (1 * 7)) & 0x7F) ? "Y" : "N", | |
1043 | ((ret >> (2 * 7)) & 0x7F) ? "Y" : "N", | |
1044 | ((ret >> (3 * 7)) & 0x7F) ? "Y" : "N")) | |
1045 | DBG_LOG(("+-----------------------+")) | |
1046 | ||
1047 | DBG_LOG(("DSP's(present-absent):%08x-%08x", ret, | |
1048 | ~ret & 0x3fffffff)) | |
1049 | ||
1050 | return (ret); | |
1051 | } |