KVM: Add statistic for remote tlb flushes
[deliverable/linux.git] / drivers / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
21#include "kvm.h"
34c16eec 22#include "x86.h"
e495606d 23
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
29
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30#include <asm/page.h>
31#include <asm/cmpxchg.h>
6aa8b732 32
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33#undef MMU_DEBUG
34
35#undef AUDIT
36
37#ifdef AUDIT
38static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
39#else
40static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
41#endif
42
43#ifdef MMU_DEBUG
44
45#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
46#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
47
48#else
49
50#define pgprintk(x...) do { } while (0)
51#define rmap_printk(x...) do { } while (0)
52
53#endif
54
55#if defined(MMU_DEBUG) || defined(AUDIT)
56static int dbg = 1;
57#endif
6aa8b732 58
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59#ifndef MMU_DEBUG
60#define ASSERT(x) do { } while (0)
61#else
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62#define ASSERT(x) \
63 if (!(x)) { \
64 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
65 __FILE__, __LINE__, #x); \
66 }
d6c69ee9 67#endif
6aa8b732 68
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69#define PT64_PT_BITS 9
70#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
71#define PT32_PT_BITS 10
72#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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73
74#define PT_WRITABLE_SHIFT 1
75
76#define PT_PRESENT_MASK (1ULL << 0)
77#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
78#define PT_USER_MASK (1ULL << 2)
79#define PT_PWT_MASK (1ULL << 3)
80#define PT_PCD_MASK (1ULL << 4)
81#define PT_ACCESSED_MASK (1ULL << 5)
82#define PT_DIRTY_MASK (1ULL << 6)
83#define PT_PAGE_SIZE_MASK (1ULL << 7)
84#define PT_PAT_MASK (1ULL << 7)
85#define PT_GLOBAL_MASK (1ULL << 8)
86#define PT64_NX_MASK (1ULL << 63)
87
88#define PT_PAT_SHIFT 7
89#define PT_DIR_PAT_SHIFT 12
90#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
91
92#define PT32_DIR_PSE36_SIZE 4
93#define PT32_DIR_PSE36_SHIFT 13
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94#define PT32_DIR_PSE36_MASK \
95 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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96
97
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98#define PT_FIRST_AVAIL_BITS_SHIFT 9
99#define PT64_SECOND_AVAIL_BITS_SHIFT 52
100
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101#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
102
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103#define VALID_PAGE(x) ((x) != INVALID_PAGE)
104
105#define PT64_LEVEL_BITS 9
106
107#define PT64_LEVEL_SHIFT(level) \
d77c26fc 108 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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109
110#define PT64_LEVEL_MASK(level) \
111 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
112
113#define PT64_INDEX(address, level)\
114 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
115
116
117#define PT32_LEVEL_BITS 10
118
119#define PT32_LEVEL_SHIFT(level) \
d77c26fc 120 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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121
122#define PT32_LEVEL_MASK(level) \
123 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
124
125#define PT32_INDEX(address, level)\
126 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
127
128
27aba766 129#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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130#define PT64_DIR_BASE_ADDR_MASK \
131 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
132
133#define PT32_BASE_ADDR_MASK PAGE_MASK
134#define PT32_DIR_BASE_ADDR_MASK \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136
137
138#define PFERR_PRESENT_MASK (1U << 0)
139#define PFERR_WRITE_MASK (1U << 1)
140#define PFERR_USER_MASK (1U << 2)
73b1087e 141#define PFERR_FETCH_MASK (1U << 4)
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142
143#define PT64_ROOT_LEVEL 4
144#define PT32_ROOT_LEVEL 2
145#define PT32E_ROOT_LEVEL 3
146
147#define PT_DIRECTORY_LEVEL 2
148#define PT_PAGE_TABLE_LEVEL 1
149
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150#define RMAP_EXT 4
151
152struct kvm_rmap_desc {
153 u64 *shadow_ptes[RMAP_EXT];
154 struct kvm_rmap_desc *more;
155};
156
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157static struct kmem_cache *pte_chain_cache;
158static struct kmem_cache *rmap_desc_cache;
d3d25b04 159static struct kmem_cache *mmu_page_header_cache;
b5a33a75 160
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161static u64 __read_mostly shadow_trap_nonpresent_pte;
162static u64 __read_mostly shadow_notrap_nonpresent_pte;
163
164void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
165{
166 shadow_trap_nonpresent_pte = trap_pte;
167 shadow_notrap_nonpresent_pte = notrap_pte;
168}
169EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
170
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171static int is_write_protection(struct kvm_vcpu *vcpu)
172{
707d92fa 173 return vcpu->cr0 & X86_CR0_WP;
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174}
175
176static int is_cpuid_PSE36(void)
177{
178 return 1;
179}
180
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181static int is_nx(struct kvm_vcpu *vcpu)
182{
183 return vcpu->shadow_efer & EFER_NX;
184}
185
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186static int is_present_pte(unsigned long pte)
187{
188 return pte & PT_PRESENT_MASK;
189}
190
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191static int is_shadow_present_pte(u64 pte)
192{
193 pte &= ~PT_SHADOW_IO_MARK;
194 return pte != shadow_trap_nonpresent_pte
195 && pte != shadow_notrap_nonpresent_pte;
196}
197
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198static int is_writeble_pte(unsigned long pte)
199{
200 return pte & PT_WRITABLE_MASK;
201}
202
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203static int is_dirty_pte(unsigned long pte)
204{
205 return pte & PT_DIRTY_MASK;
206}
207
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208static int is_io_pte(unsigned long pte)
209{
210 return pte & PT_SHADOW_IO_MARK;
211}
212
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213static int is_rmap_pte(u64 pte)
214{
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215 return pte != shadow_trap_nonpresent_pte
216 && pte != shadow_notrap_nonpresent_pte;
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217}
218
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219static void set_shadow_pte(u64 *sptep, u64 spte)
220{
221#ifdef CONFIG_X86_64
222 set_64bit((unsigned long *)sptep, spte);
223#else
224 set_64bit((unsigned long long *)sptep, spte);
225#endif
226}
227
e2dec939 228static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 229 struct kmem_cache *base_cache, int min)
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230{
231 void *obj;
232
233 if (cache->nobjs >= min)
e2dec939 234 return 0;
714b93da 235 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 236 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 237 if (!obj)
e2dec939 238 return -ENOMEM;
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239 cache->objects[cache->nobjs++] = obj;
240 }
e2dec939 241 return 0;
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242}
243
244static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
245{
246 while (mc->nobjs)
247 kfree(mc->objects[--mc->nobjs]);
248}
249
c1158e63 250static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 251 int min)
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252{
253 struct page *page;
254
255 if (cache->nobjs >= min)
256 return 0;
257 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 258 page = alloc_page(GFP_KERNEL);
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259 if (!page)
260 return -ENOMEM;
261 set_page_private(page, 0);
262 cache->objects[cache->nobjs++] = page_address(page);
263 }
264 return 0;
265}
266
267static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
268{
269 while (mc->nobjs)
c4d198d5 270 free_page((unsigned long)mc->objects[--mc->nobjs]);
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271}
272
2e3e5882 273static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 274{
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275 int r;
276
2e3e5882 277 kvm_mmu_free_some_pages(vcpu);
e2dec939 278 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
2e3e5882 279 pte_chain_cache, 4);
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280 if (r)
281 goto out;
282 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
2e3e5882 283 rmap_desc_cache, 1);
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284 if (r)
285 goto out;
290fc38d 286 r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
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287 if (r)
288 goto out;
289 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
2e3e5882 290 mmu_page_header_cache, 4);
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291out:
292 return r;
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293}
294
295static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
296{
297 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
298 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
c1158e63 299 mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
d3d25b04 300 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
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301}
302
303static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
304 size_t size)
305{
306 void *p;
307
308 BUG_ON(!mc->nobjs);
309 p = mc->objects[--mc->nobjs];
310 memset(p, 0, size);
311 return p;
312}
313
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314static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
315{
316 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
317 sizeof(struct kvm_pte_chain));
318}
319
90cb0529 320static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 321{
90cb0529 322 kfree(pc);
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323}
324
325static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
326{
327 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
328 sizeof(struct kvm_rmap_desc));
329}
330
90cb0529 331static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 332{
90cb0529 333 kfree(rd);
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334}
335
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336/*
337 * Take gfn and return the reverse mapping to it.
338 * Note: gfn must be unaliased before this function get called
339 */
340
341static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
342{
343 struct kvm_memory_slot *slot;
344
345 slot = gfn_to_memslot(kvm, gfn);
346 return &slot->rmap[gfn - slot->base_gfn];
347}
348
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349/*
350 * Reverse mapping data structures:
351 *
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352 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
353 * that points to page_address(page).
cd4a4e53 354 *
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355 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
356 * containing more mappings.
cd4a4e53 357 */
290fc38d 358static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 359{
290fc38d 360 struct kvm_mmu_page *page;
cd4a4e53 361 struct kvm_rmap_desc *desc;
290fc38d 362 unsigned long *rmapp;
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363 int i;
364
365 if (!is_rmap_pte(*spte))
366 return;
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IE
367 gfn = unalias_gfn(vcpu->kvm, gfn);
368 page = page_header(__pa(spte));
369 page->gfns[spte - page->spt] = gfn;
370 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
371 if (!*rmapp) {
cd4a4e53 372 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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IE
373 *rmapp = (unsigned long)spte;
374 } else if (!(*rmapp & 1)) {
cd4a4e53 375 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 376 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 377 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 378 desc->shadow_ptes[1] = spte;
290fc38d 379 *rmapp = (unsigned long)desc | 1;
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380 } else {
381 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 382 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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383 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
384 desc = desc->more;
385 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 386 desc->more = mmu_alloc_rmap_desc(vcpu);
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387 desc = desc->more;
388 }
389 for (i = 0; desc->shadow_ptes[i]; ++i)
390 ;
391 desc->shadow_ptes[i] = spte;
392 }
393}
394
290fc38d 395static void rmap_desc_remove_entry(unsigned long *rmapp,
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396 struct kvm_rmap_desc *desc,
397 int i,
398 struct kvm_rmap_desc *prev_desc)
399{
400 int j;
401
402 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
403 ;
404 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 405 desc->shadow_ptes[j] = NULL;
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406 if (j != 0)
407 return;
408 if (!prev_desc && !desc->more)
290fc38d 409 *rmapp = (unsigned long)desc->shadow_ptes[0];
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410 else
411 if (prev_desc)
412 prev_desc->more = desc->more;
413 else
290fc38d 414 *rmapp = (unsigned long)desc->more | 1;
90cb0529 415 mmu_free_rmap_desc(desc);
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416}
417
290fc38d 418static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 419{
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420 struct kvm_rmap_desc *desc;
421 struct kvm_rmap_desc *prev_desc;
290fc38d 422 struct kvm_mmu_page *page;
b4231d61 423 struct page *release_page;
290fc38d 424 unsigned long *rmapp;
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425 int i;
426
427 if (!is_rmap_pte(*spte))
428 return;
290fc38d 429 page = page_header(__pa(spte));
b4231d61
IE
430 release_page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
431 if (is_writeble_pte(*spte))
432 kvm_release_page_dirty(release_page);
433 else
434 kvm_release_page_clean(release_page);
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435 rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]);
436 if (!*rmapp) {
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437 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
438 BUG();
290fc38d 439 } else if (!(*rmapp & 1)) {
cd4a4e53 440 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 441 if ((u64 *)*rmapp != spte) {
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442 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
443 spte, *spte);
444 BUG();
445 }
290fc38d 446 *rmapp = 0;
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447 } else {
448 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 449 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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450 prev_desc = NULL;
451 while (desc) {
452 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
453 if (desc->shadow_ptes[i] == spte) {
290fc38d 454 rmap_desc_remove_entry(rmapp,
714b93da 455 desc, i,
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456 prev_desc);
457 return;
458 }
459 prev_desc = desc;
460 desc = desc->more;
461 }
462 BUG();
463 }
464}
465
98348e95 466static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 467{
374cbac0 468 struct kvm_rmap_desc *desc;
98348e95
IE
469 struct kvm_rmap_desc *prev_desc;
470 u64 *prev_spte;
471 int i;
472
473 if (!*rmapp)
474 return NULL;
475 else if (!(*rmapp & 1)) {
476 if (!spte)
477 return (u64 *)*rmapp;
478 return NULL;
479 }
480 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
481 prev_desc = NULL;
482 prev_spte = NULL;
483 while (desc) {
484 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
485 if (prev_spte == spte)
486 return desc->shadow_ptes[i];
487 prev_spte = desc->shadow_ptes[i];
488 }
489 desc = desc->more;
490 }
491 return NULL;
492}
493
494static void rmap_write_protect(struct kvm *kvm, u64 gfn)
495{
290fc38d 496 unsigned long *rmapp;
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497 u64 *spte;
498
4a4c9924
AL
499 gfn = unalias_gfn(kvm, gfn);
500 rmapp = gfn_to_rmap(kvm, gfn);
374cbac0 501
98348e95
IE
502 spte = rmap_next(kvm, rmapp, NULL);
503 while (spte) {
374cbac0 504 BUG_ON(!spte);
374cbac0 505 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 506 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
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507 if (is_writeble_pte(*spte))
508 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
4a4c9924 509 kvm_flush_remote_tlbs(kvm);
9647c14c 510 spte = rmap_next(kvm, rmapp, spte);
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511 }
512}
513
d6c69ee9 514#ifdef MMU_DEBUG
47ad8e68 515static int is_empty_shadow_page(u64 *spt)
6aa8b732 516{
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517 u64 *pos;
518 u64 *end;
519
47ad8e68 520 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
c7addb90 521 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
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522 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
523 pos, *pos);
6aa8b732 524 return 0;
139bdb2d 525 }
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526 return 1;
527}
d6c69ee9 528#endif
6aa8b732 529
90cb0529 530static void kvm_mmu_free_page(struct kvm *kvm,
4b02d6da 531 struct kvm_mmu_page *page_head)
260746c0 532{
47ad8e68 533 ASSERT(is_empty_shadow_page(page_head->spt));
d3d25b04 534 list_del(&page_head->link);
c1158e63 535 __free_page(virt_to_page(page_head->spt));
290fc38d 536 __free_page(virt_to_page(page_head->gfns));
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537 kfree(page_head);
538 ++kvm->n_free_mmu_pages;
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539}
540
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541static unsigned kvm_page_table_hashfn(gfn_t gfn)
542{
543 return gfn;
544}
545
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546static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
547 u64 *parent_pte)
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548{
549 struct kvm_mmu_page *page;
550
d3d25b04 551 if (!vcpu->kvm->n_free_mmu_pages)
25c0de2c 552 return NULL;
6aa8b732 553
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554 page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
555 sizeof *page);
556 page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
290fc38d 557 page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
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558 set_page_private(virt_to_page(page->spt), (unsigned long)page);
559 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
47ad8e68 560 ASSERT(is_empty_shadow_page(page->spt));
6aa8b732 561 page->slot_bitmap = 0;
cea0f0e7 562 page->multimapped = 0;
6aa8b732 563 page->parent_pte = parent_pte;
ebeace86 564 --vcpu->kvm->n_free_mmu_pages;
25c0de2c 565 return page;
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566}
567
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568static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
569 struct kvm_mmu_page *page, u64 *parent_pte)
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570{
571 struct kvm_pte_chain *pte_chain;
572 struct hlist_node *node;
573 int i;
574
575 if (!parent_pte)
576 return;
577 if (!page->multimapped) {
578 u64 *old = page->parent_pte;
579
580 if (!old) {
581 page->parent_pte = parent_pte;
582 return;
583 }
584 page->multimapped = 1;
714b93da 585 pte_chain = mmu_alloc_pte_chain(vcpu);
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586 INIT_HLIST_HEAD(&page->parent_ptes);
587 hlist_add_head(&pte_chain->link, &page->parent_ptes);
588 pte_chain->parent_ptes[0] = old;
589 }
590 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
591 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
592 continue;
593 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
594 if (!pte_chain->parent_ptes[i]) {
595 pte_chain->parent_ptes[i] = parent_pte;
596 return;
597 }
598 }
714b93da 599 pte_chain = mmu_alloc_pte_chain(vcpu);
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600 BUG_ON(!pte_chain);
601 hlist_add_head(&pte_chain->link, &page->parent_ptes);
602 pte_chain->parent_ptes[0] = parent_pte;
603}
604
90cb0529 605static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
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606 u64 *parent_pte)
607{
608 struct kvm_pte_chain *pte_chain;
609 struct hlist_node *node;
610 int i;
611
612 if (!page->multimapped) {
613 BUG_ON(page->parent_pte != parent_pte);
614 page->parent_pte = NULL;
615 return;
616 }
617 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
618 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
619 if (!pte_chain->parent_ptes[i])
620 break;
621 if (pte_chain->parent_ptes[i] != parent_pte)
622 continue;
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623 while (i + 1 < NR_PTE_CHAIN_ENTRIES
624 && pte_chain->parent_ptes[i + 1]) {
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625 pte_chain->parent_ptes[i]
626 = pte_chain->parent_ptes[i + 1];
627 ++i;
628 }
629 pte_chain->parent_ptes[i] = NULL;
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630 if (i == 0) {
631 hlist_del(&pte_chain->link);
90cb0529 632 mmu_free_pte_chain(pte_chain);
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633 if (hlist_empty(&page->parent_ptes)) {
634 page->multimapped = 0;
635 page->parent_pte = NULL;
636 }
637 }
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638 return;
639 }
640 BUG();
641}
642
f67a46f4 643static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm,
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644 gfn_t gfn)
645{
646 unsigned index;
647 struct hlist_head *bucket;
648 struct kvm_mmu_page *page;
649 struct hlist_node *node;
650
651 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
652 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 653 bucket = &kvm->mmu_page_hash[index];
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654 hlist_for_each_entry(page, node, bucket, hash_link)
655 if (page->gfn == gfn && !page->role.metaphysical) {
656 pgprintk("%s: found role %x\n",
657 __FUNCTION__, page->role.word);
658 return page;
659 }
660 return NULL;
661}
662
663static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
664 gfn_t gfn,
665 gva_t gaddr,
666 unsigned level,
667 int metaphysical,
d28c6cfb 668 unsigned hugepage_access,
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669 u64 *parent_pte)
670{
671 union kvm_mmu_page_role role;
672 unsigned index;
673 unsigned quadrant;
674 struct hlist_head *bucket;
675 struct kvm_mmu_page *page;
676 struct hlist_node *node;
677
678 role.word = 0;
679 role.glevels = vcpu->mmu.root_level;
680 role.level = level;
681 role.metaphysical = metaphysical;
d28c6cfb 682 role.hugepage_access = hugepage_access;
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683 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
684 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
685 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
686 role.quadrant = quadrant;
687 }
688 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
689 gfn, role.word);
690 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
691 bucket = &vcpu->kvm->mmu_page_hash[index];
692 hlist_for_each_entry(page, node, bucket, hash_link)
693 if (page->gfn == gfn && page->role.word == role.word) {
714b93da 694 mmu_page_add_parent_pte(vcpu, page, parent_pte);
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695 pgprintk("%s: found\n", __FUNCTION__);
696 return page;
697 }
698 page = kvm_mmu_alloc_page(vcpu, parent_pte);
699 if (!page)
700 return page;
701 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
702 page->gfn = gfn;
703 page->role = role;
704 hlist_add_head(&page->hash_link, bucket);
c7addb90 705 vcpu->mmu.prefetch_page(vcpu, page);
374cbac0 706 if (!metaphysical)
4a4c9924 707 rmap_write_protect(vcpu->kvm, gfn);
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708 return page;
709}
710
90cb0529 711static void kvm_mmu_page_unlink_children(struct kvm *kvm,
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712 struct kvm_mmu_page *page)
713{
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714 unsigned i;
715 u64 *pt;
716 u64 ent;
717
47ad8e68 718 pt = page->spt;
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719
720 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
721 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 722 if (is_shadow_present_pte(pt[i]))
290fc38d 723 rmap_remove(kvm, &pt[i]);
c7addb90 724 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 725 }
90cb0529 726 kvm_flush_remote_tlbs(kvm);
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727 return;
728 }
729
730 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
731 ent = pt[i];
732
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733 pt[i] = shadow_trap_nonpresent_pte;
734 if (!is_shadow_present_pte(ent))
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735 continue;
736 ent &= PT64_BASE_ADDR_MASK;
90cb0529 737 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 738 }
90cb0529 739 kvm_flush_remote_tlbs(kvm);
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740}
741
90cb0529 742static void kvm_mmu_put_page(struct kvm_mmu_page *page,
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743 u64 *parent_pte)
744{
90cb0529 745 mmu_page_remove_parent_pte(page, parent_pte);
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746}
747
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748static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
749{
750 int i;
751
752 for (i = 0; i < KVM_MAX_VCPUS; ++i)
753 if (kvm->vcpus[i])
754 kvm->vcpus[i]->last_pte_updated = NULL;
755}
756
90cb0529 757static void kvm_mmu_zap_page(struct kvm *kvm,
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758 struct kvm_mmu_page *page)
759{
760 u64 *parent_pte;
761
4cee5764 762 ++kvm->stat.mmu_shadow_zapped;
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763 while (page->multimapped || page->parent_pte) {
764 if (!page->multimapped)
765 parent_pte = page->parent_pte;
766 else {
767 struct kvm_pte_chain *chain;
768
769 chain = container_of(page->parent_ptes.first,
770 struct kvm_pte_chain, link);
771 parent_pte = chain->parent_ptes[0];
772 }
697fe2e2 773 BUG_ON(!parent_pte);
90cb0529 774 kvm_mmu_put_page(page, parent_pte);
c7addb90 775 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 776 }
90cb0529 777 kvm_mmu_page_unlink_children(kvm, page);
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778 if (!page->root_count) {
779 hlist_del(&page->hash_link);
90cb0529 780 kvm_mmu_free_page(kvm, page);
36868f7b 781 } else
90cb0529 782 list_move(&page->link, &kvm->active_mmu_pages);
12b7d28f 783 kvm_mmu_reset_last_pte_updated(kvm);
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784}
785
82ce2c96
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786/*
787 * Changing the number of mmu pages allocated to the vm
788 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
789 */
790void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
791{
792 /*
793 * If we set the number of mmu pages to be smaller be than the
794 * number of actived pages , we must to free some mmu pages before we
795 * change the value
796 */
797
798 if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
799 kvm_nr_mmu_pages) {
800 int n_used_mmu_pages = kvm->n_alloc_mmu_pages
801 - kvm->n_free_mmu_pages;
802
803 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
804 struct kvm_mmu_page *page;
805
806 page = container_of(kvm->active_mmu_pages.prev,
807 struct kvm_mmu_page, link);
808 kvm_mmu_zap_page(kvm, page);
809 n_used_mmu_pages--;
810 }
811 kvm->n_free_mmu_pages = 0;
812 }
813 else
814 kvm->n_free_mmu_pages += kvm_nr_mmu_pages
815 - kvm->n_alloc_mmu_pages;
816
817 kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
818}
819
f67a46f4 820static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
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821{
822 unsigned index;
823 struct hlist_head *bucket;
824 struct kvm_mmu_page *page;
825 struct hlist_node *node, *n;
826 int r;
827
828 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
829 r = 0;
830 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 831 bucket = &kvm->mmu_page_hash[index];
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832 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
833 if (page->gfn == gfn && !page->role.metaphysical) {
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834 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
835 page->role.word);
f67a46f4 836 kvm_mmu_zap_page(kvm, page);
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837 r = 1;
838 }
839 return r;
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840}
841
f67a46f4 842static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
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843{
844 struct kvm_mmu_page *page;
845
f67a46f4 846 while ((page = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
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847 pgprintk("%s: zap %lx %x\n",
848 __FUNCTION__, gfn, page->role.word);
f67a46f4 849 kvm_mmu_zap_page(kvm, page);
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850 }
851}
852
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853static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
854{
855 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
856 struct kvm_mmu_page *page_head = page_header(__pa(pte));
857
858 __set_bit(slot, &page_head->slot_bitmap);
859}
860
4a4c9924 861hpa_t gpa_to_hpa(struct kvm *kvm, gpa_t gpa)
6aa8b732 862{
6aa8b732 863 struct page *page;
cea7bb21 864 hpa_t hpa;
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865
866 ASSERT((gpa & HPA_ERR_MASK) == 0);
4a4c9924 867 page = gfn_to_page(kvm, gpa >> PAGE_SHIFT);
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868 hpa = ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | (gpa & (PAGE_SIZE-1));
869 if (is_error_page(page))
870 return hpa | HPA_ERR_MASK;
871 return hpa;
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872}
873
874hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
875{
876 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
877
878 if (gpa == UNMAPPED_GVA)
879 return UNMAPPED_GVA;
4a4c9924 880 return gpa_to_hpa(vcpu->kvm, gpa);
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881}
882
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883struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
884{
885 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
886
887 if (gpa == UNMAPPED_GVA)
888 return NULL;
4a4c9924 889 return pfn_to_page(gpa_to_hpa(vcpu->kvm, gpa) >> PAGE_SHIFT);
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890}
891
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892static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
893{
894}
895
896static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
897{
898 int level = PT32E_ROOT_LEVEL;
899 hpa_t table_addr = vcpu->mmu.root_hpa;
b4231d61 900 struct page *page;
6aa8b732 901
b4231d61 902 page = pfn_to_page(p >> PAGE_SHIFT);
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903 for (; ; level--) {
904 u32 index = PT64_INDEX(v, level);
905 u64 *table;
cea0f0e7 906 u64 pte;
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907
908 ASSERT(VALID_PAGE(table_addr));
909 table = __va(table_addr);
910
911 if (level == 1) {
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912 int was_rmapped;
913
cea0f0e7 914 pte = table[index];
9647c14c 915 was_rmapped = is_rmap_pte(pte);
2065b372 916 if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) {
b4231d61 917 kvm_release_page_clean(page);
cea0f0e7 918 return 0;
2065b372 919 }
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920 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
921 page_header_update_slot(vcpu->kvm, table, v);
922 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
923 PT_USER_MASK;
9647c14c
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924 if (!was_rmapped)
925 rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
8a7ae055 926 else
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927 kvm_release_page_clean(page);
928
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929 return 0;
930 }
931
c7addb90 932 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 933 struct kvm_mmu_page *new_table;
cea0f0e7 934 gfn_t pseudo_gfn;
6aa8b732 935
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936 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
937 >> PAGE_SHIFT;
938 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
939 v, level - 1,
6bfccdc9 940 1, 3, &table[index]);
25c0de2c 941 if (!new_table) {
6aa8b732 942 pgprintk("nonpaging_map: ENOMEM\n");
b4231d61 943 kvm_release_page_clean(page);
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944 return -ENOMEM;
945 }
946
47ad8e68 947 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 948 | PT_WRITABLE_MASK | PT_USER_MASK;
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949 }
950 table_addr = table[index] & PT64_BASE_ADDR_MASK;
951 }
952}
953
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954static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
955 struct kvm_mmu_page *sp)
956{
957 int i;
958
959 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
960 sp->spt[i] = shadow_trap_nonpresent_pte;
961}
962
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963static void mmu_free_roots(struct kvm_vcpu *vcpu)
964{
965 int i;
3bb65a22 966 struct kvm_mmu_page *page;
17ac10ad 967
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968 if (!VALID_PAGE(vcpu->mmu.root_hpa))
969 return;
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970#ifdef CONFIG_X86_64
971 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
972 hpa_t root = vcpu->mmu.root_hpa;
973
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974 page = page_header(root);
975 --page->root_count;
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976 vcpu->mmu.root_hpa = INVALID_PAGE;
977 return;
978 }
979#endif
980 for (i = 0; i < 4; ++i) {
981 hpa_t root = vcpu->mmu.pae_root[i];
982
417726a3 983 if (root) {
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984 root &= PT64_BASE_ADDR_MASK;
985 page = page_header(root);
986 --page->root_count;
987 }
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988 vcpu->mmu.pae_root[i] = INVALID_PAGE;
989 }
990 vcpu->mmu.root_hpa = INVALID_PAGE;
991}
992
993static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
994{
995 int i;
cea0f0e7 996 gfn_t root_gfn;
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997 struct kvm_mmu_page *page;
998
cea0f0e7 999 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
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1000
1001#ifdef CONFIG_X86_64
1002 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1003 hpa_t root = vcpu->mmu.root_hpa;
1004
1005 ASSERT(!VALID_PAGE(root));
68a99f6d 1006 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
d28c6cfb 1007 PT64_ROOT_LEVEL, 0, 0, NULL);
47ad8e68 1008 root = __pa(page->spt);
3bb65a22 1009 ++page->root_count;
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1010 vcpu->mmu.root_hpa = root;
1011 return;
1012 }
1013#endif
1014 for (i = 0; i < 4; ++i) {
1015 hpa_t root = vcpu->mmu.pae_root[i];
1016
1017 ASSERT(!VALID_PAGE(root));
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1018 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
1019 if (!is_present_pte(vcpu->pdptrs[i])) {
1020 vcpu->mmu.pae_root[i] = 0;
1021 continue;
1022 }
cea0f0e7 1023 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
417726a3 1024 } else if (vcpu->mmu.root_level == 0)
cea0f0e7 1025 root_gfn = 0;
68a99f6d 1026 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
cea0f0e7 1027 PT32_ROOT_LEVEL, !is_paging(vcpu),
d28c6cfb 1028 0, NULL);
47ad8e68 1029 root = __pa(page->spt);
3bb65a22 1030 ++page->root_count;
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1031 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
1032 }
1033 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
1034}
1035
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1036static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1037{
1038 return vaddr;
1039}
1040
1041static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
1042 u32 error_code)
1043{
6aa8b732 1044 gpa_t addr = gva;
ebeace86 1045 hpa_t paddr;
e2dec939 1046 int r;
6aa8b732 1047
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1048 r = mmu_topup_memory_caches(vcpu);
1049 if (r)
1050 return r;
714b93da 1051
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1052 ASSERT(vcpu);
1053 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
1054
6aa8b732 1055
4a4c9924 1056 paddr = gpa_to_hpa(vcpu->kvm, addr & PT64_BASE_ADDR_MASK);
6aa8b732 1057
8a7ae055 1058 if (is_error_hpa(paddr)) {
b4231d61
IE
1059 kvm_release_page_clean(pfn_to_page((paddr & PT64_BASE_ADDR_MASK)
1060 >> PAGE_SHIFT));
ebeace86 1061 return 1;
8a7ae055 1062 }
6aa8b732 1063
ebeace86 1064 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
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1065}
1066
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1067static void nonpaging_free(struct kvm_vcpu *vcpu)
1068{
17ac10ad 1069 mmu_free_roots(vcpu);
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1070}
1071
1072static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1073{
1074 struct kvm_mmu *context = &vcpu->mmu;
1075
1076 context->new_cr3 = nonpaging_new_cr3;
1077 context->page_fault = nonpaging_page_fault;
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1078 context->gva_to_gpa = nonpaging_gva_to_gpa;
1079 context->free = nonpaging_free;
c7addb90 1080 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1081 context->root_level = 0;
6aa8b732 1082 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1083 context->root_hpa = INVALID_PAGE;
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1084 return 0;
1085}
1086
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1087static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
1088{
1165f5fe 1089 ++vcpu->stat.tlb_flush;
cbdd1bea 1090 kvm_x86_ops->tlb_flush(vcpu);
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1091}
1092
1093static void paging_new_cr3(struct kvm_vcpu *vcpu)
1094{
374cbac0 1095 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7 1096 mmu_free_roots(vcpu);
6aa8b732
AK
1097}
1098
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1099static void inject_page_fault(struct kvm_vcpu *vcpu,
1100 u64 addr,
1101 u32 err_code)
1102{
cbdd1bea 1103 kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1104}
1105
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1106static void paging_free(struct kvm_vcpu *vcpu)
1107{
1108 nonpaging_free(vcpu);
1109}
1110
1111#define PTTYPE 64
1112#include "paging_tmpl.h"
1113#undef PTTYPE
1114
1115#define PTTYPE 32
1116#include "paging_tmpl.h"
1117#undef PTTYPE
1118
17ac10ad 1119static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732
AK
1120{
1121 struct kvm_mmu *context = &vcpu->mmu;
1122
1123 ASSERT(is_pae(vcpu));
1124 context->new_cr3 = paging_new_cr3;
1125 context->page_fault = paging64_page_fault;
6aa8b732 1126 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1127 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1128 context->free = paging_free;
17ac10ad
AK
1129 context->root_level = level;
1130 context->shadow_root_level = level;
17c3ba9d 1131 context->root_hpa = INVALID_PAGE;
6aa8b732
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1132 return 0;
1133}
1134
17ac10ad
AK
1135static int paging64_init_context(struct kvm_vcpu *vcpu)
1136{
1137 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1138}
1139
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1140static int paging32_init_context(struct kvm_vcpu *vcpu)
1141{
1142 struct kvm_mmu *context = &vcpu->mmu;
1143
1144 context->new_cr3 = paging_new_cr3;
1145 context->page_fault = paging32_page_fault;
6aa8b732
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1146 context->gva_to_gpa = paging32_gva_to_gpa;
1147 context->free = paging_free;
c7addb90 1148 context->prefetch_page = paging32_prefetch_page;
6aa8b732
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1149 context->root_level = PT32_ROOT_LEVEL;
1150 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1151 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1152 return 0;
1153}
1154
1155static int paging32E_init_context(struct kvm_vcpu *vcpu)
1156{
17ac10ad 1157 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1158}
1159
1160static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1161{
1162 ASSERT(vcpu);
1163 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1164
1165 if (!is_paging(vcpu))
1166 return nonpaging_init_context(vcpu);
a9058ecd 1167 else if (is_long_mode(vcpu))
6aa8b732
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1168 return paging64_init_context(vcpu);
1169 else if (is_pae(vcpu))
1170 return paging32E_init_context(vcpu);
1171 else
1172 return paging32_init_context(vcpu);
1173}
1174
1175static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1176{
1177 ASSERT(vcpu);
1178 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1179 vcpu->mmu.free(vcpu);
1180 vcpu->mmu.root_hpa = INVALID_PAGE;
1181 }
1182}
1183
1184int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1185{
1186 destroy_kvm_mmu(vcpu);
1187 return init_kvm_mmu(vcpu);
1188}
8668a3c4 1189EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1190
1191int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1192{
714b93da
AK
1193 int r;
1194
11ec2804 1195 mutex_lock(&vcpu->kvm->lock);
e2dec939 1196 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1197 if (r)
1198 goto out;
1199 mmu_alloc_roots(vcpu);
cbdd1bea 1200 kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
17c3ba9d 1201 kvm_mmu_flush_tlb(vcpu);
714b93da 1202out:
11ec2804 1203 mutex_unlock(&vcpu->kvm->lock);
714b93da 1204 return r;
6aa8b732 1205}
17c3ba9d
AK
1206EXPORT_SYMBOL_GPL(kvm_mmu_load);
1207
1208void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1209{
1210 mmu_free_roots(vcpu);
1211}
6aa8b732 1212
09072daf 1213static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
ac1b714e
AK
1214 struct kvm_mmu_page *page,
1215 u64 *spte)
1216{
1217 u64 pte;
1218 struct kvm_mmu_page *child;
1219
1220 pte = *spte;
c7addb90 1221 if (is_shadow_present_pte(pte)) {
ac1b714e 1222 if (page->role.level == PT_PAGE_TABLE_LEVEL)
290fc38d 1223 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1224 else {
1225 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1226 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1227 }
1228 }
c7addb90 1229 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
d9e368d6 1230 kvm_flush_remote_tlbs(vcpu->kvm);
ac1b714e
AK
1231}
1232
0028425f
AK
1233static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1234 struct kvm_mmu_page *page,
1235 u64 *spte,
c7addb90
AK
1236 const void *new, int bytes,
1237 int offset_in_pte)
0028425f 1238{
4cee5764
AK
1239 if (page->role.level != PT_PAGE_TABLE_LEVEL) {
1240 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1241 return;
4cee5764 1242 }
0028425f 1243
4cee5764 1244 ++vcpu->kvm->stat.mmu_pte_updated;
0028425f 1245 if (page->role.glevels == PT32_ROOT_LEVEL)
c7addb90
AK
1246 paging32_update_pte(vcpu, page, spte, new, bytes,
1247 offset_in_pte);
0028425f 1248 else
c7addb90
AK
1249 paging64_update_pte(vcpu, page, spte, new, bytes,
1250 offset_in_pte);
0028425f
AK
1251}
1252
12b7d28f
AK
1253static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1254{
1255 u64 *spte = vcpu->last_pte_updated;
1256
1257 return !!(spte && (*spte & PT_ACCESSED_MASK));
1258}
1259
09072daf 1260void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1261 const u8 *new, int bytes)
da4a00f0 1262{
9b7a0325
AK
1263 gfn_t gfn = gpa >> PAGE_SHIFT;
1264 struct kvm_mmu_page *page;
0e7bc4b9 1265 struct hlist_node *node, *n;
9b7a0325
AK
1266 struct hlist_head *bucket;
1267 unsigned index;
1268 u64 *spte;
9b7a0325 1269 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1270 unsigned pte_size;
9b7a0325 1271 unsigned page_offset;
0e7bc4b9 1272 unsigned misaligned;
fce0657f 1273 unsigned quadrant;
9b7a0325 1274 int level;
86a5ba02 1275 int flooded = 0;
ac1b714e 1276 int npte;
9b7a0325 1277
da4a00f0 1278 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
4cee5764 1279 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1280 kvm_mmu_audit(vcpu, "pre pte write");
12b7d28f
AK
1281 if (gfn == vcpu->last_pt_write_gfn
1282 && !last_updated_pte_accessed(vcpu)) {
86a5ba02
AK
1283 ++vcpu->last_pt_write_count;
1284 if (vcpu->last_pt_write_count >= 3)
1285 flooded = 1;
1286 } else {
1287 vcpu->last_pt_write_gfn = gfn;
1288 vcpu->last_pt_write_count = 1;
12b7d28f 1289 vcpu->last_pte_updated = NULL;
86a5ba02 1290 }
9b7a0325
AK
1291 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1292 bucket = &vcpu->kvm->mmu_page_hash[index];
0e7bc4b9 1293 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
9b7a0325
AK
1294 if (page->gfn != gfn || page->role.metaphysical)
1295 continue;
0e7bc4b9
AK
1296 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1297 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1298 misaligned |= bytes < 4;
86a5ba02 1299 if (misaligned || flooded) {
0e7bc4b9
AK
1300 /*
1301 * Misaligned accesses are too much trouble to fix
1302 * up; also, they usually indicate a page is not used
1303 * as a page table.
86a5ba02
AK
1304 *
1305 * If we're seeing too many writes to a page,
1306 * it may no longer be a page table, or we may be
1307 * forking, in which case it is better to unmap the
1308 * page.
0e7bc4b9
AK
1309 */
1310 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1311 gpa, bytes, page->role.word);
90cb0529 1312 kvm_mmu_zap_page(vcpu->kvm, page);
4cee5764 1313 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1314 continue;
1315 }
9b7a0325
AK
1316 page_offset = offset;
1317 level = page->role.level;
ac1b714e 1318 npte = 1;
9b7a0325 1319 if (page->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1320 page_offset <<= 1; /* 32->64 */
1321 /*
1322 * A 32-bit pde maps 4MB while the shadow pdes map
1323 * only 2MB. So we need to double the offset again
1324 * and zap two pdes instead of one.
1325 */
1326 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1327 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1328 page_offset <<= 1;
1329 npte = 2;
1330 }
fce0657f 1331 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1332 page_offset &= ~PAGE_MASK;
fce0657f
AK
1333 if (quadrant != page->role.quadrant)
1334 continue;
9b7a0325 1335 }
47ad8e68 1336 spte = &page->spt[page_offset / sizeof(*spte)];
ac1b714e 1337 while (npte--) {
09072daf 1338 mmu_pte_write_zap_pte(vcpu, page, spte);
c7addb90
AK
1339 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
1340 page_offset & (pte_size - 1));
ac1b714e 1341 ++spte;
9b7a0325 1342 }
9b7a0325 1343 }
c7addb90 1344 kvm_mmu_audit(vcpu, "post pte write");
da4a00f0
AK
1345}
1346
a436036b
AK
1347int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1348{
1349 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1350
f67a46f4 1351 return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
a436036b
AK
1352}
1353
22d95b12 1354void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86
AK
1355{
1356 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1357 struct kvm_mmu_page *page;
1358
1359 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1360 struct kvm_mmu_page, link);
90cb0529 1361 kvm_mmu_zap_page(vcpu->kvm, page);
4cee5764 1362 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1363 }
1364}
ebeace86 1365
3067714c
AK
1366int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1367{
1368 int r;
1369 enum emulation_result er;
1370
1371 mutex_lock(&vcpu->kvm->lock);
1372 r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
1373 if (r < 0)
1374 goto out;
1375
1376 if (!r) {
1377 r = 1;
1378 goto out;
1379 }
1380
b733bfb5
AK
1381 r = mmu_topup_memory_caches(vcpu);
1382 if (r)
1383 goto out;
1384
3067714c
AK
1385 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1386 mutex_unlock(&vcpu->kvm->lock);
1387
1388 switch (er) {
1389 case EMULATE_DONE:
1390 return 1;
1391 case EMULATE_DO_MMIO:
1392 ++vcpu->stat.mmio_exits;
1393 return 0;
1394 case EMULATE_FAIL:
1395 kvm_report_emulation_failure(vcpu, "pagetable");
1396 return 1;
1397 default:
1398 BUG();
1399 }
1400out:
1401 mutex_unlock(&vcpu->kvm->lock);
1402 return r;
1403}
1404EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1405
6aa8b732
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1406static void free_mmu_pages(struct kvm_vcpu *vcpu)
1407{
f51234c2 1408 struct kvm_mmu_page *page;
6aa8b732 1409
f51234c2
AK
1410 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1411 page = container_of(vcpu->kvm->active_mmu_pages.next,
1412 struct kvm_mmu_page, link);
90cb0529 1413 kvm_mmu_zap_page(vcpu->kvm, page);
f51234c2 1414 }
17ac10ad 1415 free_page((unsigned long)vcpu->mmu.pae_root);
6aa8b732
AK
1416}
1417
1418static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1419{
17ac10ad 1420 struct page *page;
6aa8b732
AK
1421 int i;
1422
1423 ASSERT(vcpu);
1424
82ce2c96
IE
1425 if (vcpu->kvm->n_requested_mmu_pages)
1426 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
1427 else
1428 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
17ac10ad
AK
1429 /*
1430 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1431 * Therefore we need to allocate shadow page tables in the first
1432 * 4GB of memory, which happens to fit the DMA32 zone.
1433 */
1434 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1435 if (!page)
1436 goto error_1;
1437 vcpu->mmu.pae_root = page_address(page);
1438 for (i = 0; i < 4; ++i)
1439 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1440
6aa8b732
AK
1441 return 0;
1442
1443error_1:
1444 free_mmu_pages(vcpu);
1445 return -ENOMEM;
1446}
1447
8018c27b 1448int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1449{
6aa8b732
AK
1450 ASSERT(vcpu);
1451 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
6aa8b732 1452
8018c27b
IM
1453 return alloc_mmu_pages(vcpu);
1454}
6aa8b732 1455
8018c27b
IM
1456int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1457{
1458 ASSERT(vcpu);
1459 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
2c264957 1460
8018c27b 1461 return init_kvm_mmu(vcpu);
6aa8b732
AK
1462}
1463
1464void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1465{
1466 ASSERT(vcpu);
1467
1468 destroy_kvm_mmu(vcpu);
1469 free_mmu_pages(vcpu);
714b93da 1470 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1471}
1472
90cb0529 1473void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732
AK
1474{
1475 struct kvm_mmu_page *page;
1476
1477 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1478 int i;
1479 u64 *pt;
1480
1481 if (!test_bit(slot, &page->slot_bitmap))
1482 continue;
1483
47ad8e68 1484 pt = page->spt;
6aa8b732
AK
1485 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1486 /* avoid RMW */
9647c14c 1487 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1488 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1489 }
1490}
37a7d8b0 1491
90cb0529 1492void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1493{
90cb0529 1494 struct kvm_mmu_page *page, *node;
e0fa826f 1495
90cb0529
AK
1496 list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
1497 kvm_mmu_zap_page(kvm, page);
e0fa826f 1498
90cb0529 1499 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1500}
1501
b5a33a75
AK
1502void kvm_mmu_module_exit(void)
1503{
1504 if (pte_chain_cache)
1505 kmem_cache_destroy(pte_chain_cache);
1506 if (rmap_desc_cache)
1507 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1508 if (mmu_page_header_cache)
1509 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1510}
1511
1512int kvm_mmu_module_init(void)
1513{
1514 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1515 sizeof(struct kvm_pte_chain),
20c2df83 1516 0, 0, NULL);
b5a33a75
AK
1517 if (!pte_chain_cache)
1518 goto nomem;
1519 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1520 sizeof(struct kvm_rmap_desc),
20c2df83 1521 0, 0, NULL);
b5a33a75
AK
1522 if (!rmap_desc_cache)
1523 goto nomem;
1524
d3d25b04
AK
1525 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1526 sizeof(struct kvm_mmu_page),
20c2df83 1527 0, 0, NULL);
d3d25b04
AK
1528 if (!mmu_page_header_cache)
1529 goto nomem;
1530
b5a33a75
AK
1531 return 0;
1532
1533nomem:
1534 kvm_mmu_module_exit();
1535 return -ENOMEM;
1536}
1537
3ad82a7e
ZX
1538/*
1539 * Caculate mmu pages needed for kvm.
1540 */
1541unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1542{
1543 int i;
1544 unsigned int nr_mmu_pages;
1545 unsigned int nr_pages = 0;
1546
1547 for (i = 0; i < kvm->nmemslots; i++)
1548 nr_pages += kvm->memslots[i].npages;
1549
1550 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1551 nr_mmu_pages = max(nr_mmu_pages,
1552 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1553
1554 return nr_mmu_pages;
1555}
1556
37a7d8b0
AK
1557#ifdef AUDIT
1558
1559static const char *audit_msg;
1560
1561static gva_t canonicalize(gva_t gva)
1562{
1563#ifdef CONFIG_X86_64
1564 gva = (long long)(gva << 16) >> 16;
1565#endif
1566 return gva;
1567}
1568
1569static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1570 gva_t va, int level)
1571{
1572 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1573 int i;
1574 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1575
1576 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1577 u64 ent = pt[i];
1578
c7addb90 1579 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
1580 continue;
1581
1582 va = canonicalize(va);
c7addb90
AK
1583 if (level > 1) {
1584 if (ent == shadow_notrap_nonpresent_pte)
1585 printk(KERN_ERR "audit: (%s) nontrapping pte"
1586 " in nonleaf level: levels %d gva %lx"
1587 " level %d pte %llx\n", audit_msg,
1588 vcpu->mmu.root_level, va, level, ent);
1589
37a7d8b0 1590 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 1591 } else {
37a7d8b0
AK
1592 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1593 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
8a7ae055 1594 struct page *page;
37a7d8b0 1595
c7addb90 1596 if (is_shadow_present_pte(ent)
37a7d8b0 1597 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
1598 printk(KERN_ERR "xx audit error: (%s) levels %d"
1599 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
37a7d8b0 1600 audit_msg, vcpu->mmu.root_level,
d77c26fc
MD
1601 va, gpa, hpa, ent,
1602 is_shadow_present_pte(ent));
c7addb90
AK
1603 else if (ent == shadow_notrap_nonpresent_pte
1604 && !is_error_hpa(hpa))
1605 printk(KERN_ERR "audit: (%s) notrap shadow,"
1606 " valid guest gva %lx\n", audit_msg, va);
8a7ae055
IE
1607 page = pfn_to_page((gpa & PT64_BASE_ADDR_MASK)
1608 >> PAGE_SHIFT);
b4231d61 1609 kvm_release_page_clean(page);
c7addb90 1610
37a7d8b0
AK
1611 }
1612 }
1613}
1614
1615static void audit_mappings(struct kvm_vcpu *vcpu)
1616{
1ea252af 1617 unsigned i;
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1618
1619 if (vcpu->mmu.root_level == 4)
1620 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1621 else
1622 for (i = 0; i < 4; ++i)
1623 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1624 audit_mappings_page(vcpu,
1625 vcpu->mmu.pae_root[i],
1626 i << 30,
1627 2);
1628}
1629
1630static int count_rmaps(struct kvm_vcpu *vcpu)
1631{
1632 int nmaps = 0;
1633 int i, j, k;
1634
1635 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1636 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1637 struct kvm_rmap_desc *d;
1638
1639 for (j = 0; j < m->npages; ++j) {
290fc38d 1640 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 1641
290fc38d 1642 if (!*rmapp)
37a7d8b0 1643 continue;
290fc38d 1644 if (!(*rmapp & 1)) {
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1645 ++nmaps;
1646 continue;
1647 }
290fc38d 1648 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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1649 while (d) {
1650 for (k = 0; k < RMAP_EXT; ++k)
1651 if (d->shadow_ptes[k])
1652 ++nmaps;
1653 else
1654 break;
1655 d = d->more;
1656 }
1657 }
1658 }
1659 return nmaps;
1660}
1661
1662static int count_writable_mappings(struct kvm_vcpu *vcpu)
1663{
1664 int nmaps = 0;
1665 struct kvm_mmu_page *page;
1666 int i;
1667
1668 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
47ad8e68 1669 u64 *pt = page->spt;
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1670
1671 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1672 continue;
1673
1674 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1675 u64 ent = pt[i];
1676
1677 if (!(ent & PT_PRESENT_MASK))
1678 continue;
1679 if (!(ent & PT_WRITABLE_MASK))
1680 continue;
1681 ++nmaps;
1682 }
1683 }
1684 return nmaps;
1685}
1686
1687static void audit_rmap(struct kvm_vcpu *vcpu)
1688{
1689 int n_rmap = count_rmaps(vcpu);
1690 int n_actual = count_writable_mappings(vcpu);
1691
1692 if (n_rmap != n_actual)
1693 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1694 __FUNCTION__, audit_msg, n_rmap, n_actual);
1695}
1696
1697static void audit_write_protection(struct kvm_vcpu *vcpu)
1698{
1699 struct kvm_mmu_page *page;
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1700 struct kvm_memory_slot *slot;
1701 unsigned long *rmapp;
1702 gfn_t gfn;
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1703
1704 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
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1705 if (page->role.metaphysical)
1706 continue;
1707
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1708 slot = gfn_to_memslot(vcpu->kvm, page->gfn);
1709 gfn = unalias_gfn(vcpu->kvm, page->gfn);
1710 rmapp = &slot->rmap[gfn - slot->base_gfn];
1711 if (*rmapp)
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1712 printk(KERN_ERR "%s: (%s) shadow page has writable"
1713 " mappings: gfn %lx role %x\n",
1714 __FUNCTION__, audit_msg, page->gfn,
1715 page->role.word);
1716 }
1717}
1718
1719static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1720{
1721 int olddbg = dbg;
1722
1723 dbg = 0;
1724 audit_msg = msg;
1725 audit_rmap(vcpu);
1726 audit_write_protection(vcpu);
1727 audit_mappings(vcpu);
1728 dbg = olddbg;
1729}
1730
1731#endif
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