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KVM: MMU: Add some mmu statistics
[deliverable/linux.git] / drivers / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
313a3dc7 17#include "kvm.h"
043405e1 18#include "x86.h"
d825ed0a 19#include "x86_emulate.h"
5fb76f9b 20#include "segment_descriptor.h"
313a3dc7
CO		 21#include "irq.h"
22
23#include <linux/kvm.h>
24#include <linux/fs.h>
25#include <linux/vmalloc.h>
5fb76f9b 26#include <linux/module.h>
043405e1
CO		 27
28#include <asm/uaccess.h>
d825ed0a 29#include <asm/msr.h>
043405e1 30
313a3dc7 31#define MAX_IO_MSRS 256
a03490ed
CO		 32#define CR0_RESERVED_BITS \
33 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
34 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
35 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
36#define CR4_RESERVED_BITS \
37 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
38 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
39 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
40 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
41
42#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 43#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 44
ba1389b7
AK		 45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 47
97896d04
ZX		 48struct kvm_x86_ops *kvm_x86_ops;
49
417bc304 50struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 51 { "pf_fixed", VCPU_STAT(pf_fixed) },
52 { "pf_guest", VCPU_STAT(pf_guest) },
53 { "tlb_flush", VCPU_STAT(tlb_flush) },
54 { "invlpg", VCPU_STAT(invlpg) },
55 { "exits", VCPU_STAT(exits) },
56 { "io_exits", VCPU_STAT(io_exits) },
57 { "mmio_exits", VCPU_STAT(mmio_exits) },
58 { "signal_exits", VCPU_STAT(signal_exits) },
59 { "irq_window", VCPU_STAT(irq_window_exits) },
60 { "halt_exits", VCPU_STAT(halt_exits) },
61 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
62 { "request_irq", VCPU_STAT(request_irq_exits) },
63 { "irq_exits", VCPU_STAT(irq_exits) },
64 { "host_state_reload", VCPU_STAT(host_state_reload) },
65 { "efer_reload", VCPU_STAT(efer_reload) },
66 { "fpu_reload", VCPU_STAT(fpu_reload) },
67 { "insn_emulation", VCPU_STAT(insn_emulation) },
68 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 69 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
70 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
71 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
72 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
73 { "mmu_flooded", VM_STAT(mmu_flooded) },
74 { "mmu_recycled", VM_STAT(mmu_recycled) },
417bc304
HB		 75 { NULL }
76};
77
78
5fb76f9b
CO		 79unsigned long segment_base(u16 selector)
80{
81 struct descriptor_table gdt;
82 struct segment_descriptor *d;
83 unsigned long table_base;
84 unsigned long v;
85
86 if (selector == 0)
87 return 0;
88
89 asm("sgdt %0" : "=m"(gdt));
90 table_base = gdt.base;
91
92 if (selector & 4) { /* from ldt */
93 u16 ldt_selector;
94
95 asm("sldt %0" : "=g"(ldt_selector));
96 table_base = segment_base(ldt_selector);
97 }
98 d = (struct segment_descriptor *)(table_base + (selector & ~7));
99 v = d->base_low | ((unsigned long)d->base_mid << 16) |
100 ((unsigned long)d->base_high << 24);
101#ifdef CONFIG_X86_64
102 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
103 v |= ((unsigned long) \
104 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
105#endif
106 return v;
107}
108EXPORT_SYMBOL_GPL(segment_base);
109
6866b83e
CO		 110u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
111{
112 if (irqchip_in_kernel(vcpu->kvm))
113 return vcpu->apic_base;
114 else
115 return vcpu->apic_base;
116}
117EXPORT_SYMBOL_GPL(kvm_get_apic_base);
118
119void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
120{
121 /* TODO: reserve bits check */
122 if (irqchip_in_kernel(vcpu->kvm))
123 kvm_lapic_set_base(vcpu, data);
124 else
125 vcpu->apic_base = data;
126}
127EXPORT_SYMBOL_GPL(kvm_set_apic_base);
128
a03490ed
CO		 129static void inject_gp(struct kvm_vcpu *vcpu)
130{
131 kvm_x86_ops->inject_gp(vcpu, 0);
132}
133
134/*
135 * Load the pae pdptrs. Return true is they are all valid.
136 */
137int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
138{
139 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
140 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
141 int i;
142 int ret;
143 u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
144
145 mutex_lock(&vcpu->kvm->lock);
146 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
147 offset * sizeof(u64), sizeof(pdpte));
148 if (ret < 0) {
149 ret = 0;
150 goto out;
151 }
152 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
153 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
154 ret = 0;
155 goto out;
156 }
157 }
158 ret = 1;
159
160 memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
161out:
162 mutex_unlock(&vcpu->kvm->lock);
163
164 return ret;
165}
166
167void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
168{
169 if (cr0 & CR0_RESERVED_BITS) {
170 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
171 cr0, vcpu->cr0);
172 inject_gp(vcpu);
173 return;
174 }
175
176 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
177 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
178 inject_gp(vcpu);
179 return;
180 }
181
182 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
183 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
184 "and a clear PE flag\n");
185 inject_gp(vcpu);
186 return;
187 }
188
189 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
190#ifdef CONFIG_X86_64
191 if ((vcpu->shadow_efer & EFER_LME)) {
192 int cs_db, cs_l;
193
194 if (!is_pae(vcpu)) {
195 printk(KERN_DEBUG "set_cr0: #GP, start paging "
196 "in long mode while PAE is disabled\n");
197 inject_gp(vcpu);
198 return;
199 }
200 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
201 if (cs_l) {
202 printk(KERN_DEBUG "set_cr0: #GP, start paging "
203 "in long mode while CS.L == 1\n");
204 inject_gp(vcpu);
205 return;
206
207 }
208 } else
209#endif
210 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
211 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
212 "reserved bits\n");
213 inject_gp(vcpu);
214 return;
215 }
216
217 }
218
219 kvm_x86_ops->set_cr0(vcpu, cr0);
220 vcpu->cr0 = cr0;
221
222 mutex_lock(&vcpu->kvm->lock);
223 kvm_mmu_reset_context(vcpu);
224 mutex_unlock(&vcpu->kvm->lock);
225 return;
226}
227EXPORT_SYMBOL_GPL(set_cr0);
228
229void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
230{
231 set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
232}
233EXPORT_SYMBOL_GPL(lmsw);
234
235void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
236{
237 if (cr4 & CR4_RESERVED_BITS) {
238 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
239 inject_gp(vcpu);
240 return;
241 }
242
243 if (is_long_mode(vcpu)) {
244 if (!(cr4 & X86_CR4_PAE)) {
245 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
246 "in long mode\n");
247 inject_gp(vcpu);
248 return;
249 }
250 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
251 && !load_pdptrs(vcpu, vcpu->cr3)) {
252 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
253 inject_gp(vcpu);
254 return;
255 }
256
257 if (cr4 & X86_CR4_VMXE) {
258 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
259 inject_gp(vcpu);
260 return;
261 }
262 kvm_x86_ops->set_cr4(vcpu, cr4);
263 vcpu->cr4 = cr4;
264 mutex_lock(&vcpu->kvm->lock);
265 kvm_mmu_reset_context(vcpu);
266 mutex_unlock(&vcpu->kvm->lock);
267}
268EXPORT_SYMBOL_GPL(set_cr4);
269
270void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
271{
272 if (is_long_mode(vcpu)) {
273 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
274 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
275 inject_gp(vcpu);
276 return;
277 }
278 } else {
279 if (is_pae(vcpu)) {
280 if (cr3 & CR3_PAE_RESERVED_BITS) {
281 printk(KERN_DEBUG
282 "set_cr3: #GP, reserved bits\n");
283 inject_gp(vcpu);
284 return;
285 }
286 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
287 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
288 "reserved bits\n");
289 inject_gp(vcpu);
290 return;
291 }
292 }
293 /*
294 * We don't check reserved bits in nonpae mode, because
295 * this isn't enforced, and VMware depends on this.
296 */
297 }
298
299 mutex_lock(&vcpu->kvm->lock);
300 /*
301 * Does the new cr3 value map to physical memory? (Note, we
302 * catch an invalid cr3 even in real-mode, because it would
303 * cause trouble later on when we turn on paging anyway.)
304 *
305 * A real CPU would silently accept an invalid cr3 and would
306 * attempt to use it - with largely undefined (and often hard
307 * to debug) behavior on the guest side.
308 */
309 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
310 inject_gp(vcpu);
311 else {
312 vcpu->cr3 = cr3;
313 vcpu->mmu.new_cr3(vcpu);
314 }
315 mutex_unlock(&vcpu->kvm->lock);
316}
317EXPORT_SYMBOL_GPL(set_cr3);
318
319void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
320{
321 if (cr8 & CR8_RESERVED_BITS) {
322 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
323 inject_gp(vcpu);
324 return;
325 }
326 if (irqchip_in_kernel(vcpu->kvm))
327 kvm_lapic_set_tpr(vcpu, cr8);
328 else
329 vcpu->cr8 = cr8;
330}
331EXPORT_SYMBOL_GPL(set_cr8);
332
333unsigned long get_cr8(struct kvm_vcpu *vcpu)
334{
335 if (irqchip_in_kernel(vcpu->kvm))
336 return kvm_lapic_get_cr8(vcpu);
337 else
338 return vcpu->cr8;
339}
340EXPORT_SYMBOL_GPL(get_cr8);
341
043405e1
CO		 342/*
343 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
344 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
345 *
346 * This list is modified at module load time to reflect the
347 * capabilities of the host cpu.
348 */
349static u32 msrs_to_save[] = {
350 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
351 MSR_K6_STAR,
352#ifdef CONFIG_X86_64
353 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
354#endif
355 MSR_IA32_TIME_STAMP_COUNTER,
356};
357
358static unsigned num_msrs_to_save;
359
360static u32 emulated_msrs[] = {
361 MSR_IA32_MISC_ENABLE,
362};
363
15c4a640
CO		 364#ifdef CONFIG_X86_64
365
366static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
367{
368 if (efer & EFER_RESERVED_BITS) {
369 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
370 efer);
371 inject_gp(vcpu);
372 return;
373 }
374
375 if (is_paging(vcpu)
376 && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
377 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
378 inject_gp(vcpu);
379 return;
380 }
381
382 kvm_x86_ops->set_efer(vcpu, efer);
383
384 efer &= ~EFER_LMA;
385 efer |= vcpu->shadow_efer & EFER_LMA;
386
387 vcpu->shadow_efer = efer;
388}
389
390#endif
391
392/*
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
396 */
397int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
398{
399 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
400}
401
313a3dc7
CO		 402/*
403 * Adapt set_msr() to msr_io()'s calling convention
404 */
405static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
406{
407 return kvm_set_msr(vcpu, index, *data);
408}
409
15c4a640
CO		 410
411int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
412{
413 switch (msr) {
414#ifdef CONFIG_X86_64
415 case MSR_EFER:
416 set_efer(vcpu, data);
417 break;
418#endif
419 case MSR_IA32_MC0_STATUS:
420 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
421 __FUNCTION__, data);
422 break;
423 case MSR_IA32_MCG_STATUS:
424 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
425 __FUNCTION__, data);
426 break;
427 case MSR_IA32_UCODE_REV:
428 case MSR_IA32_UCODE_WRITE:
429 case 0x200 ... 0x2ff: /* MTRRs */
430 break;
431 case MSR_IA32_APICBASE:
432 kvm_set_apic_base(vcpu, data);
433 break;
434 case MSR_IA32_MISC_ENABLE:
435 vcpu->ia32_misc_enable_msr = data;
436 break;
437 default:
438 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
439 return 1;
440 }
441 return 0;
442}
443EXPORT_SYMBOL_GPL(kvm_set_msr_common);
444
445
446/*
447 * Reads an msr value (of 'msr_index') into 'pdata'.
448 * Returns 0 on success, non-0 otherwise.
449 * Assumes vcpu_load() was already called.
450 */
451int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
452{
453 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
454}
455
456int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
457{
458 u64 data;
459
460 switch (msr) {
461 case 0xc0010010: /* SYSCFG */
462 case 0xc0010015: /* HWCR */
463 case MSR_IA32_PLATFORM_ID:
464 case MSR_IA32_P5_MC_ADDR:
465 case MSR_IA32_P5_MC_TYPE:
466 case MSR_IA32_MC0_CTL:
467 case MSR_IA32_MCG_STATUS:
468 case MSR_IA32_MCG_CAP:
469 case MSR_IA32_MC0_MISC:
470 case MSR_IA32_MC0_MISC+4:
471 case MSR_IA32_MC0_MISC+8:
472 case MSR_IA32_MC0_MISC+12:
473 case MSR_IA32_MC0_MISC+16:
474 case MSR_IA32_UCODE_REV:
475 case MSR_IA32_PERF_STATUS:
476 case MSR_IA32_EBL_CR_POWERON:
477 /* MTRR registers */
478 case 0xfe:
479 case 0x200 ... 0x2ff:
480 data = 0;
481 break;
482 case 0xcd: /* fsb frequency */
483 data = 3;
484 break;
485 case MSR_IA32_APICBASE:
486 data = kvm_get_apic_base(vcpu);
487 break;
488 case MSR_IA32_MISC_ENABLE:
489 data = vcpu->ia32_misc_enable_msr;
490 break;
491#ifdef CONFIG_X86_64
492 case MSR_EFER:
493 data = vcpu->shadow_efer;
494 break;
495#endif
496 default:
497 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
498 return 1;
499 }
500 *pdata = data;
501 return 0;
502}
503EXPORT_SYMBOL_GPL(kvm_get_msr_common);
504
313a3dc7
CO		 505/*
506 * Read or write a bunch of msrs. All parameters are kernel addresses.
507 *
508 * @return number of msrs set successfully.
509 */
510static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
511 struct kvm_msr_entry *entries,
512 int (*do_msr)(struct kvm_vcpu *vcpu,
513 unsigned index, u64 *data))
514{
515 int i;
516
517 vcpu_load(vcpu);
518
519 for (i = 0; i < msrs->nmsrs; ++i)
520 if (do_msr(vcpu, entries[i].index, &entries[i].data))
521 break;
522
523 vcpu_put(vcpu);
524
525 return i;
526}
527
528/*
529 * Read or write a bunch of msrs. Parameters are user addresses.
530 *
531 * @return number of msrs set successfully.
532 */
533static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
534 int (*do_msr)(struct kvm_vcpu *vcpu,
535 unsigned index, u64 *data),
536 int writeback)
537{
538 struct kvm_msrs msrs;
539 struct kvm_msr_entry *entries;
540 int r, n;
541 unsigned size;
542
543 r = -EFAULT;
544 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
545 goto out;
546
547 r = -E2BIG;
548 if (msrs.nmsrs >= MAX_IO_MSRS)
549 goto out;
550
551 r = -ENOMEM;
552 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
553 entries = vmalloc(size);
554 if (!entries)
555 goto out;
556
557 r = -EFAULT;
558 if (copy_from_user(entries, user_msrs->entries, size))
559 goto out_free;
560
561 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
562 if (r < 0)
563 goto out_free;
564
565 r = -EFAULT;
566 if (writeback && copy_to_user(user_msrs->entries, entries, size))
567 goto out_free;
568
569 r = n;
570
571out_free:
572 vfree(entries);
573out:
574 return r;
575}
576
e9b11c17
ZX		 577/*
578 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
579 * cached on it.
580 */
581void decache_vcpus_on_cpu(int cpu)
582{
583 struct kvm *vm;
584 struct kvm_vcpu *vcpu;
585 int i;
586
587 spin_lock(&kvm_lock);
588 list_for_each_entry(vm, &vm_list, vm_list)
589 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
590 vcpu = vm->vcpus[i];
591 if (!vcpu)
592 continue;
593 /*
594 * If the vcpu is locked, then it is running on some
595 * other cpu and therefore it is not cached on the
596 * cpu in question.
597 *
598 * If it's not locked, check the last cpu it executed
599 * on.
600 */
601 if (mutex_trylock(&vcpu->mutex)) {
602 if (vcpu->cpu == cpu) {
603 kvm_x86_ops->vcpu_decache(vcpu);
604 vcpu->cpu = -1;
605 }
606 mutex_unlock(&vcpu->mutex);
607 }
608 }
609 spin_unlock(&kvm_lock);
610}
611
018d00d2
ZX		 612int kvm_dev_ioctl_check_extension(long ext)
613{
614 int r;
615
616 switch (ext) {
617 case KVM_CAP_IRQCHIP:
618 case KVM_CAP_HLT:
619 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
620 case KVM_CAP_USER_MEMORY:
621 case KVM_CAP_SET_TSS_ADDR:
622 r = 1;
623 break;
624 default:
625 r = 0;
626 break;
627 }
628 return r;
629
630}
631
043405e1
CO		 632long kvm_arch_dev_ioctl(struct file *filp,
633 unsigned int ioctl, unsigned long arg)
634{
635 void __user *argp = (void __user *)arg;
636 long r;
637
638 switch (ioctl) {
639 case KVM_GET_MSR_INDEX_LIST: {
640 struct kvm_msr_list __user *user_msr_list = argp;
641 struct kvm_msr_list msr_list;
642 unsigned n;
643
644 r = -EFAULT;
645 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
646 goto out;
647 n = msr_list.nmsrs;
648 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
649 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
650 goto out;
651 r = -E2BIG;
652 if (n < num_msrs_to_save)
653 goto out;
654 r = -EFAULT;
655 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
656 num_msrs_to_save * sizeof(u32)))
657 goto out;
658 if (copy_to_user(user_msr_list->indices
659 + num_msrs_to_save * sizeof(u32),
660 &emulated_msrs,
661 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
662 goto out;
663 r = 0;
664 break;
665 }
666 default:
667 r = -EINVAL;
668 }
669out:
670 return r;
671}
672
313a3dc7
CO		 673void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
674{
675 kvm_x86_ops->vcpu_load(vcpu, cpu);
676}
677
678void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
679{
680 kvm_x86_ops->vcpu_put(vcpu);
681}
682
683static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
684{
685 u64 efer;
686 int i;
687 struct kvm_cpuid_entry *e, *entry;
688
689 rdmsrl(MSR_EFER, efer);
690 entry = NULL;
691 for (i = 0; i < vcpu->cpuid_nent; ++i) {
692 e = &vcpu->cpuid_entries[i];
693 if (e->function == 0x80000001) {
694 entry = e;
695 break;
696 }
697 }
698 if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
699 entry->edx &= ~(1 << 20);
700 printk(KERN_INFO "kvm: guest NX capability removed\n");
701 }
702}
703
704static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
705 struct kvm_cpuid *cpuid,
706 struct kvm_cpuid_entry __user *entries)
707{
708 int r;
709
710 r = -E2BIG;
711 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
712 goto out;
713 r = -EFAULT;
714 if (copy_from_user(&vcpu->cpuid_entries, entries,
715 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
716 goto out;
717 vcpu->cpuid_nent = cpuid->nent;
718 cpuid_fix_nx_cap(vcpu);
719 return 0;
720
721out:
722 return r;
723}
724
725static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
726 struct kvm_lapic_state *s)
727{
728 vcpu_load(vcpu);
729 memcpy(s->regs, vcpu->apic->regs, sizeof *s);
730 vcpu_put(vcpu);
731
732 return 0;
733}
734
735static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
736 struct kvm_lapic_state *s)
737{
738 vcpu_load(vcpu);
739 memcpy(vcpu->apic->regs, s->regs, sizeof *s);
740 kvm_apic_post_state_restore(vcpu);
741 vcpu_put(vcpu);
742
743 return 0;
744}
745
746long kvm_arch_vcpu_ioctl(struct file *filp,
747 unsigned int ioctl, unsigned long arg)
748{
749 struct kvm_vcpu *vcpu = filp->private_data;
750 void __user *argp = (void __user *)arg;
751 int r;
752
753 switch (ioctl) {
754 case KVM_GET_LAPIC: {
755 struct kvm_lapic_state lapic;
756
757 memset(&lapic, 0, sizeof lapic);
758 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
759 if (r)
760 goto out;
761 r = -EFAULT;
762 if (copy_to_user(argp, &lapic, sizeof lapic))
763 goto out;
764 r = 0;
765 break;
766 }
767 case KVM_SET_LAPIC: {
768 struct kvm_lapic_state lapic;
769
770 r = -EFAULT;
771 if (copy_from_user(&lapic, argp, sizeof lapic))
772 goto out;
773 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
774 if (r)
775 goto out;
776 r = 0;
777 break;
778 }
779 case KVM_SET_CPUID: {
780 struct kvm_cpuid __user *cpuid_arg = argp;
781 struct kvm_cpuid cpuid;
782
783 r = -EFAULT;
784 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
785 goto out;
786 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
787 if (r)
788 goto out;
789 break;
790 }
791 case KVM_GET_MSRS:
792 r = msr_io(vcpu, argp, kvm_get_msr, 1);
793 break;
794 case KVM_SET_MSRS:
795 r = msr_io(vcpu, argp, do_set_msr, 0);
796 break;
797 default:
798 r = -EINVAL;
799 }
800out:
801 return r;
802}
803
1fe779f8
CO		 804static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
805{
806 int ret;
807
808 if (addr > (unsigned int)(-3 * PAGE_SIZE))
809 return -1;
810 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
811 return ret;
812}
813
814static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
815 u32 kvm_nr_mmu_pages)
816{
817 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
818 return -EINVAL;
819
820 mutex_lock(&kvm->lock);
821
822 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
823 kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
824
825 mutex_unlock(&kvm->lock);
826 return 0;
827}
828
829static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
830{
831 return kvm->n_alloc_mmu_pages;
832}
833
834/*
835 * Set a new alias region. Aliases map a portion of physical memory into
836 * another portion. This is useful for memory windows, for example the PC
837 * VGA region.
838 */
839static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
840 struct kvm_memory_alias *alias)
841{
842 int r, n;
843 struct kvm_mem_alias *p;
844
845 r = -EINVAL;
846 /* General sanity checks */
847 if (alias->memory_size & (PAGE_SIZE - 1))
848 goto out;
849 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
850 goto out;
851 if (alias->slot >= KVM_ALIAS_SLOTS)
852 goto out;
853 if (alias->guest_phys_addr + alias->memory_size
854 < alias->guest_phys_addr)
855 goto out;
856 if (alias->target_phys_addr + alias->memory_size
857 < alias->target_phys_addr)
858 goto out;
859
860 mutex_lock(&kvm->lock);
861
862 p = &kvm->aliases[alias->slot];
863 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
864 p->npages = alias->memory_size >> PAGE_SHIFT;
865 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
866
867 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
868 if (kvm->aliases[n - 1].npages)
869 break;
870 kvm->naliases = n;
871
872 kvm_mmu_zap_all(kvm);
873
874 mutex_unlock(&kvm->lock);
875
876 return 0;
877
878out:
879 return r;
880}
881
882static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
883{
884 int r;
885
886 r = 0;
887 switch (chip->chip_id) {
888 case KVM_IRQCHIP_PIC_MASTER:
889 memcpy(&chip->chip.pic,
890 &pic_irqchip(kvm)->pics[0],
891 sizeof(struct kvm_pic_state));
892 break;
893 case KVM_IRQCHIP_PIC_SLAVE:
894 memcpy(&chip->chip.pic,
895 &pic_irqchip(kvm)->pics[1],
896 sizeof(struct kvm_pic_state));
897 break;
898 case KVM_IRQCHIP_IOAPIC:
899 memcpy(&chip->chip.ioapic,
900 ioapic_irqchip(kvm),
901 sizeof(struct kvm_ioapic_state));
902 break;
903 default:
904 r = -EINVAL;
905 break;
906 }
907 return r;
908}
909
910static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
911{
912 int r;
913
914 r = 0;
915 switch (chip->chip_id) {
916 case KVM_IRQCHIP_PIC_MASTER:
917 memcpy(&pic_irqchip(kvm)->pics[0],
918 &chip->chip.pic,
919 sizeof(struct kvm_pic_state));
920 break;
921 case KVM_IRQCHIP_PIC_SLAVE:
922 memcpy(&pic_irqchip(kvm)->pics[1],
923 &chip->chip.pic,
924 sizeof(struct kvm_pic_state));
925 break;
926 case KVM_IRQCHIP_IOAPIC:
927 memcpy(ioapic_irqchip(kvm),
928 &chip->chip.ioapic,
929 sizeof(struct kvm_ioapic_state));
930 break;
931 default:
932 r = -EINVAL;
933 break;
934 }
935 kvm_pic_update_irq(pic_irqchip(kvm));
936 return r;
937}
938
939long kvm_arch_vm_ioctl(struct file *filp,
940 unsigned int ioctl, unsigned long arg)
941{
942 struct kvm *kvm = filp->private_data;
943 void __user *argp = (void __user *)arg;
944 int r = -EINVAL;
945
946 switch (ioctl) {
947 case KVM_SET_TSS_ADDR:
948 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
949 if (r < 0)
950 goto out;
951 break;
952 case KVM_SET_MEMORY_REGION: {
953 struct kvm_memory_region kvm_mem;
954 struct kvm_userspace_memory_region kvm_userspace_mem;
955
956 r = -EFAULT;
957 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
958 goto out;
959 kvm_userspace_mem.slot = kvm_mem.slot;
960 kvm_userspace_mem.flags = kvm_mem.flags;
961 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
962 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
963 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
964 if (r)
965 goto out;
966 break;
967 }
968 case KVM_SET_NR_MMU_PAGES:
969 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
970 if (r)
971 goto out;
972 break;
973 case KVM_GET_NR_MMU_PAGES:
974 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
975 break;
976 case KVM_SET_MEMORY_ALIAS: {
977 struct kvm_memory_alias alias;
978
979 r = -EFAULT;
980 if (copy_from_user(&alias, argp, sizeof alias))
981 goto out;
982 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
983 if (r)
984 goto out;
985 break;
986 }
987 case KVM_CREATE_IRQCHIP:
988 r = -ENOMEM;
989 kvm->vpic = kvm_create_pic(kvm);
990 if (kvm->vpic) {
991 r = kvm_ioapic_init(kvm);
992 if (r) {
993 kfree(kvm->vpic);
994 kvm->vpic = NULL;
995 goto out;
996 }
997 } else
998 goto out;
999 break;
1000 case KVM_IRQ_LINE: {
1001 struct kvm_irq_level irq_event;
1002
1003 r = -EFAULT;
1004 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1005 goto out;
1006 if (irqchip_in_kernel(kvm)) {
1007 mutex_lock(&kvm->lock);
1008 if (irq_event.irq < 16)
1009 kvm_pic_set_irq(pic_irqchip(kvm),
1010 irq_event.irq,
1011 irq_event.level);
1012 kvm_ioapic_set_irq(kvm->vioapic,
1013 irq_event.irq,
1014 irq_event.level);
1015 mutex_unlock(&kvm->lock);
1016 r = 0;
1017 }
1018 break;
1019 }
1020 case KVM_GET_IRQCHIP: {
1021 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1022 struct kvm_irqchip chip;
1023
1024 r = -EFAULT;
1025 if (copy_from_user(&chip, argp, sizeof chip))
1026 goto out;
1027 r = -ENXIO;
1028 if (!irqchip_in_kernel(kvm))
1029 goto out;
1030 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1031 if (r)
1032 goto out;
1033 r = -EFAULT;
1034 if (copy_to_user(argp, &chip, sizeof chip))
1035 goto out;
1036 r = 0;
1037 break;
1038 }
1039 case KVM_SET_IRQCHIP: {
1040 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1041 struct kvm_irqchip chip;
1042
1043 r = -EFAULT;
1044 if (copy_from_user(&chip, argp, sizeof chip))
1045 goto out;
1046 r = -ENXIO;
1047 if (!irqchip_in_kernel(kvm))
1048 goto out;
1049 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1050 if (r)
1051 goto out;
1052 r = 0;
1053 break;
1054 }
1055 default:
1056 ;
1057 }
1058out:
1059 return r;
1060}
1061
a16b043c 1062static void kvm_init_msr_list(void)
043405e1
CO		 1063{
1064 u32 dummy[2];
1065 unsigned i, j;
1066
1067 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1068 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1069 continue;
1070 if (j < i)
1071 msrs_to_save[j] = msrs_to_save[i];
1072 j++;
1073 }
1074 num_msrs_to_save = j;
1075}
1076
bbd9b64e
CO		 1077/*
1078 * Only apic need an MMIO device hook, so shortcut now..
1079 */
1080static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1081 gpa_t addr)
1082{
1083 struct kvm_io_device *dev;
1084
1085 if (vcpu->apic) {
1086 dev = &vcpu->apic->dev;
1087 if (dev->in_range(dev, addr))
1088 return dev;
1089 }
1090 return NULL;
1091}
1092
1093
1094static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1095 gpa_t addr)
1096{
1097 struct kvm_io_device *dev;
1098
1099 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1100 if (dev == NULL)
1101 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1102 return dev;
1103}
1104
1105int emulator_read_std(unsigned long addr,
1106 void *val,
1107 unsigned int bytes,
1108 struct kvm_vcpu *vcpu)
1109{
1110 void *data = val;
1111
1112 while (bytes) {
1113 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1114 unsigned offset = addr & (PAGE_SIZE-1);
1115 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1116 int ret;
1117
1118 if (gpa == UNMAPPED_GVA)
1119 return X86EMUL_PROPAGATE_FAULT;
1120 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1121 if (ret < 0)
1122 return X86EMUL_UNHANDLEABLE;
1123
1124 bytes -= tocopy;
1125 data += tocopy;
1126 addr += tocopy;
1127 }
1128
1129 return X86EMUL_CONTINUE;
1130}
1131EXPORT_SYMBOL_GPL(emulator_read_std);
1132
1133static int emulator_write_std(unsigned long addr,
1134 const void *val,
1135 unsigned int bytes,
1136 struct kvm_vcpu *vcpu)
1137{
1138 pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
1139 return X86EMUL_UNHANDLEABLE;
1140}
1141
1142static int emulator_read_emulated(unsigned long addr,
1143 void *val,
1144 unsigned int bytes,
1145 struct kvm_vcpu *vcpu)
1146{
1147 struct kvm_io_device *mmio_dev;
1148 gpa_t gpa;
1149
1150 if (vcpu->mmio_read_completed) {
1151 memcpy(val, vcpu->mmio_data, bytes);
1152 vcpu->mmio_read_completed = 0;
1153 return X86EMUL_CONTINUE;
1154 }
1155
1156 gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1157
1158 /* For APIC access vmexit */
1159 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1160 goto mmio;
1161
1162 if (emulator_read_std(addr, val, bytes, vcpu)
1163 == X86EMUL_CONTINUE)
1164 return X86EMUL_CONTINUE;
1165 if (gpa == UNMAPPED_GVA)
1166 return X86EMUL_PROPAGATE_FAULT;
1167
1168mmio:
1169 /*
1170 * Is this MMIO handled locally?
1171 */
1172 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1173 if (mmio_dev) {
1174 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1175 return X86EMUL_CONTINUE;
1176 }
1177
1178 vcpu->mmio_needed = 1;
1179 vcpu->mmio_phys_addr = gpa;
1180 vcpu->mmio_size = bytes;
1181 vcpu->mmio_is_write = 0;
1182
1183 return X86EMUL_UNHANDLEABLE;
1184}
1185
1186static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1187 const void *val, int bytes)
1188{
1189 int ret;
1190
1191 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1192 if (ret < 0)
1193 return 0;
1194 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1195 return 1;
1196}
1197
1198static int emulator_write_emulated_onepage(unsigned long addr,
1199 const void *val,
1200 unsigned int bytes,
1201 struct kvm_vcpu *vcpu)
1202{
1203 struct kvm_io_device *mmio_dev;
1204 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
1205
1206 if (gpa == UNMAPPED_GVA) {
1207 kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
1208 return X86EMUL_PROPAGATE_FAULT;
1209 }
1210
1211 /* For APIC access vmexit */
1212 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1213 goto mmio;
1214
1215 if (emulator_write_phys(vcpu, gpa, val, bytes))
1216 return X86EMUL_CONTINUE;
1217
1218mmio:
1219 /*
1220 * Is this MMIO handled locally?
1221 */
1222 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1223 if (mmio_dev) {
1224 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1225 return X86EMUL_CONTINUE;
1226 }
1227
1228 vcpu->mmio_needed = 1;
1229 vcpu->mmio_phys_addr = gpa;
1230 vcpu->mmio_size = bytes;
1231 vcpu->mmio_is_write = 1;
1232 memcpy(vcpu->mmio_data, val, bytes);
1233
1234 return X86EMUL_CONTINUE;
1235}
1236
1237int emulator_write_emulated(unsigned long addr,
1238 const void *val,
1239 unsigned int bytes,
1240 struct kvm_vcpu *vcpu)
1241{
1242 /* Crossing a page boundary? */
1243 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1244 int rc, now;
1245
1246 now = -addr & ~PAGE_MASK;
1247 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1248 if (rc != X86EMUL_CONTINUE)
1249 return rc;
1250 addr += now;
1251 val += now;
1252 bytes -= now;
1253 }
1254 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1255}
1256EXPORT_SYMBOL_GPL(emulator_write_emulated);
1257
1258static int emulator_cmpxchg_emulated(unsigned long addr,
1259 const void *old,
1260 const void *new,
1261 unsigned int bytes,
1262 struct kvm_vcpu *vcpu)
1263{
1264 static int reported;
1265
1266 if (!reported) {
1267 reported = 1;
1268 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1269 }
1270 return emulator_write_emulated(addr, new, bytes, vcpu);
1271}
1272
1273static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1274{
1275 return kvm_x86_ops->get_segment_base(vcpu, seg);
1276}
1277
1278int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1279{
1280 return X86EMUL_CONTINUE;
1281}
1282
1283int emulate_clts(struct kvm_vcpu *vcpu)
1284{
1285 kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
1286 return X86EMUL_CONTINUE;
1287}
1288
1289int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1290{
1291 struct kvm_vcpu *vcpu = ctxt->vcpu;
1292
1293 switch (dr) {
1294 case 0 ... 3:
1295 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1296 return X86EMUL_CONTINUE;
1297 default:
1298 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1299 return X86EMUL_UNHANDLEABLE;
1300 }
1301}
1302
1303int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1304{
1305 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1306 int exception;
1307
1308 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1309 if (exception) {
1310 /* FIXME: better handling */
1311 return X86EMUL_UNHANDLEABLE;
1312 }
1313 return X86EMUL_CONTINUE;
1314}
1315
1316void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1317{
1318 static int reported;
1319 u8 opcodes[4];
1320 unsigned long rip = vcpu->rip;
1321 unsigned long rip_linear;
1322
1323 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1324
1325 if (reported)
1326 return;
1327
1328 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1329
1330 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1331 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1332 reported = 1;
1333}
1334EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1335
1336struct x86_emulate_ops emulate_ops = {
1337 .read_std = emulator_read_std,
1338 .write_std = emulator_write_std,
1339 .read_emulated = emulator_read_emulated,
1340 .write_emulated = emulator_write_emulated,
1341 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1342};
1343
1344int emulate_instruction(struct kvm_vcpu *vcpu,
1345 struct kvm_run *run,
1346 unsigned long cr2,
1347 u16 error_code,
1348 int no_decode)
1349{
1350 int r;
1351
1352 vcpu->mmio_fault_cr2 = cr2;
1353 kvm_x86_ops->cache_regs(vcpu);
1354
1355 vcpu->mmio_is_write = 0;
1356 vcpu->pio.string = 0;
1357
1358 if (!no_decode) {
1359 int cs_db, cs_l;
1360 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1361
1362 vcpu->emulate_ctxt.vcpu = vcpu;
1363 vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1364 vcpu->emulate_ctxt.cr2 = cr2;
1365 vcpu->emulate_ctxt.mode =
1366 (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
1367 ? X86EMUL_MODE_REAL : cs_l
1368 ? X86EMUL_MODE_PROT64 : cs_db
1369 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1370
1371 if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1372 vcpu->emulate_ctxt.cs_base = 0;
1373 vcpu->emulate_ctxt.ds_base = 0;
1374 vcpu->emulate_ctxt.es_base = 0;
1375 vcpu->emulate_ctxt.ss_base = 0;
1376 } else {
1377 vcpu->emulate_ctxt.cs_base =
1378 get_segment_base(vcpu, VCPU_SREG_CS);
1379 vcpu->emulate_ctxt.ds_base =
1380 get_segment_base(vcpu, VCPU_SREG_DS);
1381 vcpu->emulate_ctxt.es_base =
1382 get_segment_base(vcpu, VCPU_SREG_ES);
1383 vcpu->emulate_ctxt.ss_base =
1384 get_segment_base(vcpu, VCPU_SREG_SS);
1385 }
1386
1387 vcpu->emulate_ctxt.gs_base =
1388 get_segment_base(vcpu, VCPU_SREG_GS);
1389 vcpu->emulate_ctxt.fs_base =
1390 get_segment_base(vcpu, VCPU_SREG_FS);
1391
1392 r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
f2b5756b 1393 ++vcpu->stat.insn_emulation;
bbd9b64e 1394 if (r) {
f2b5756b 1395 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1396 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1397 return EMULATE_DONE;
1398 return EMULATE_FAIL;
1399 }
1400 }
1401
1402 r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
1403
1404 if (vcpu->pio.string)
1405 return EMULATE_DO_MMIO;
1406
1407 if ((r || vcpu->mmio_is_write) && run) {
1408 run->exit_reason = KVM_EXIT_MMIO;
1409 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1410 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1411 run->mmio.len = vcpu->mmio_size;
1412 run->mmio.is_write = vcpu->mmio_is_write;
1413 }
1414
1415 if (r) {
1416 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1417 return EMULATE_DONE;
1418 if (!vcpu->mmio_needed) {
1419 kvm_report_emulation_failure(vcpu, "mmio");
1420 return EMULATE_FAIL;
1421 }
1422 return EMULATE_DO_MMIO;
1423 }
1424
1425 kvm_x86_ops->decache_regs(vcpu);
1426 kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
1427
1428 if (vcpu->mmio_is_write) {
1429 vcpu->mmio_needed = 0;
1430 return EMULATE_DO_MMIO;
1431 }
1432
1433 return EMULATE_DONE;
1434}
1435EXPORT_SYMBOL_GPL(emulate_instruction);
1436
de7d789a
CO		 1437static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1438{
1439 int i;
1440
1441 for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
1442 if (vcpu->pio.guest_pages[i]) {
1443 kvm_release_page(vcpu->pio.guest_pages[i]);
1444 vcpu->pio.guest_pages[i] = NULL;
1445 }
1446}
1447
1448static int pio_copy_data(struct kvm_vcpu *vcpu)
1449{
1450 void *p = vcpu->pio_data;
1451 void *q;
1452 unsigned bytes;
1453 int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
1454
1455 q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
1456 PAGE_KERNEL);
1457 if (!q) {
1458 free_pio_guest_pages(vcpu);
1459 return -ENOMEM;
1460 }
1461 q += vcpu->pio.guest_page_offset;
1462 bytes = vcpu->pio.size * vcpu->pio.cur_count;
1463 if (vcpu->pio.in)
1464 memcpy(q, p, bytes);
1465 else
1466 memcpy(p, q, bytes);
1467 q -= vcpu->pio.guest_page_offset;
1468 vunmap(q);
1469 free_pio_guest_pages(vcpu);
1470 return 0;
1471}
1472
1473int complete_pio(struct kvm_vcpu *vcpu)
1474{
1475 struct kvm_pio_request *io = &vcpu->pio;
1476 long delta;
1477 int r;
1478
1479 kvm_x86_ops->cache_regs(vcpu);
1480
1481 if (!io->string) {
1482 if (io->in)
1483 memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
1484 io->size);
1485 } else {
1486 if (io->in) {
1487 r = pio_copy_data(vcpu);
1488 if (r) {
1489 kvm_x86_ops->cache_regs(vcpu);
1490 return r;
1491 }
1492 }
1493
1494 delta = 1;
1495 if (io->rep) {
1496 delta *= io->cur_count;
1497 /*
1498 * The size of the register should really depend on
1499 * current address size.
1500 */
1501 vcpu->regs[VCPU_REGS_RCX] -= delta;
1502 }
1503 if (io->down)
1504 delta = -delta;
1505 delta *= io->size;
1506 if (io->in)
1507 vcpu->regs[VCPU_REGS_RDI] += delta;
1508 else
1509 vcpu->regs[VCPU_REGS_RSI] += delta;
1510 }
1511
1512 kvm_x86_ops->decache_regs(vcpu);
1513
1514 io->count -= io->cur_count;
1515 io->cur_count = 0;
1516
1517 return 0;
1518}
1519
1520static void kernel_pio(struct kvm_io_device *pio_dev,
1521 struct kvm_vcpu *vcpu,
1522 void *pd)
1523{
1524 /* TODO: String I/O for in kernel device */
1525
1526 mutex_lock(&vcpu->kvm->lock);
1527 if (vcpu->pio.in)
1528 kvm_iodevice_read(pio_dev, vcpu->pio.port,
1529 vcpu->pio.size,
1530 pd);
1531 else
1532 kvm_iodevice_write(pio_dev, vcpu->pio.port,
1533 vcpu->pio.size,
1534 pd);
1535 mutex_unlock(&vcpu->kvm->lock);
1536}
1537
1538static void pio_string_write(struct kvm_io_device *pio_dev,
1539 struct kvm_vcpu *vcpu)
1540{
1541 struct kvm_pio_request *io = &vcpu->pio;
1542 void *pd = vcpu->pio_data;
1543 int i;
1544
1545 mutex_lock(&vcpu->kvm->lock);
1546 for (i = 0; i < io->cur_count; i++) {
1547 kvm_iodevice_write(pio_dev, io->port,
1548 io->size,
1549 pd);
1550 pd += io->size;
1551 }
1552 mutex_unlock(&vcpu->kvm->lock);
1553}
1554
1555static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
1556 gpa_t addr)
1557{
1558 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
1559}
1560
1561int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1562 int size, unsigned port)
1563{
1564 struct kvm_io_device *pio_dev;
1565
1566 vcpu->run->exit_reason = KVM_EXIT_IO;
1567 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1568 vcpu->run->io.size = vcpu->pio.size = size;
1569 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1570 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
1571 vcpu->run->io.port = vcpu->pio.port = port;
1572 vcpu->pio.in = in;
1573 vcpu->pio.string = 0;
1574 vcpu->pio.down = 0;
1575 vcpu->pio.guest_page_offset = 0;
1576 vcpu->pio.rep = 0;
1577
1578 kvm_x86_ops->cache_regs(vcpu);
1579 memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
1580 kvm_x86_ops->decache_regs(vcpu);
1581
1582 kvm_x86_ops->skip_emulated_instruction(vcpu);
1583
1584 pio_dev = vcpu_find_pio_dev(vcpu, port);
1585 if (pio_dev) {
1586 kernel_pio(pio_dev, vcpu, vcpu->pio_data);
1587 complete_pio(vcpu);
1588 return 1;
1589 }
1590 return 0;
1591}
1592EXPORT_SYMBOL_GPL(kvm_emulate_pio);
1593
1594int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
1595 int size, unsigned long count, int down,
1596 gva_t address, int rep, unsigned port)
1597{
1598 unsigned now, in_page;
1599 int i, ret = 0;
1600 int nr_pages = 1;
1601 struct page *page;
1602 struct kvm_io_device *pio_dev;
1603
1604 vcpu->run->exit_reason = KVM_EXIT_IO;
1605 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1606 vcpu->run->io.size = vcpu->pio.size = size;
1607 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
1608 vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
1609 vcpu->run->io.port = vcpu->pio.port = port;
1610 vcpu->pio.in = in;
1611 vcpu->pio.string = 1;
1612 vcpu->pio.down = down;
1613 vcpu->pio.guest_page_offset = offset_in_page(address);
1614 vcpu->pio.rep = rep;
1615
1616 if (!count) {
1617 kvm_x86_ops->skip_emulated_instruction(vcpu);
1618 return 1;
1619 }
1620
1621 if (!down)
1622 in_page = PAGE_SIZE - offset_in_page(address);
1623 else
1624 in_page = offset_in_page(address) + size;
1625 now = min(count, (unsigned long)in_page / size);
1626 if (!now) {
1627 /*
1628 * String I/O straddles page boundary. Pin two guest pages
1629 * so that we satisfy atomicity constraints. Do just one
1630 * transaction to avoid complexity.
1631 */
1632 nr_pages = 2;
1633 now = 1;
1634 }
1635 if (down) {
1636 /*
1637 * String I/O in reverse. Yuck. Kill the guest, fix later.
1638 */
1639 pr_unimpl(vcpu, "guest string pio down\n");
1640 inject_gp(vcpu);
1641 return 1;
1642 }
1643 vcpu->run->io.count = now;
1644 vcpu->pio.cur_count = now;
1645
1646 if (vcpu->pio.cur_count == vcpu->pio.count)
1647 kvm_x86_ops->skip_emulated_instruction(vcpu);
1648
1649 for (i = 0; i < nr_pages; ++i) {
1650 mutex_lock(&vcpu->kvm->lock);
1651 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
1652 vcpu->pio.guest_pages[i] = page;
1653 mutex_unlock(&vcpu->kvm->lock);
1654 if (!page) {
1655 inject_gp(vcpu);
1656 free_pio_guest_pages(vcpu);
1657 return 1;
1658 }
1659 }
1660
1661 pio_dev = vcpu_find_pio_dev(vcpu, port);
1662 if (!vcpu->pio.in) {
1663 /* string PIO write */
1664 ret = pio_copy_data(vcpu);
1665 if (ret >= 0 && pio_dev) {
1666 pio_string_write(pio_dev, vcpu);
1667 complete_pio(vcpu);
1668 if (vcpu->pio.count == 0)
1669 ret = 1;
1670 }
1671 } else if (pio_dev)
1672 pr_unimpl(vcpu, "no string pio read support yet, "
1673 "port %x size %d count %ld\n",
1674 port, size, count);
1675
1676 return ret;
1677}
1678EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
1679
f8c16bba 1680int kvm_arch_init(void *opaque)
043405e1 1681{
f8c16bba
ZX		 1682 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
1683
043405e1 1684 kvm_init_msr_list();
f8c16bba
ZX		 1685
1686 if (kvm_x86_ops) {
1687 printk(KERN_ERR "kvm: already loaded the other module\n");
1688 return -EEXIST;
1689 }
1690
1691 if (!ops->cpu_has_kvm_support()) {
1692 printk(KERN_ERR "kvm: no hardware support\n");
1693 return -EOPNOTSUPP;
1694 }
1695 if (ops->disabled_by_bios()) {
1696 printk(KERN_ERR "kvm: disabled by bios\n");
1697 return -EOPNOTSUPP;
1698 }
1699
1700 kvm_x86_ops = ops;
1701
1702 return 0;
043405e1 1703}
8776e519 1704
f8c16bba
ZX		 1705void kvm_arch_exit(void)
1706{
1707 kvm_x86_ops = NULL;
1708 }
1709
8776e519
HB		 1710int kvm_emulate_halt(struct kvm_vcpu *vcpu)
1711{
1712 ++vcpu->stat.halt_exits;
1713 if (irqchip_in_kernel(vcpu->kvm)) {
1714 vcpu->mp_state = VCPU_MP_STATE_HALTED;
1715 kvm_vcpu_block(vcpu);
1716 if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
1717 return -EINTR;
1718 return 1;
1719 } else {
1720 vcpu->run->exit_reason = KVM_EXIT_HLT;
1721 return 0;
1722 }
1723}
1724EXPORT_SYMBOL_GPL(kvm_emulate_halt);
1725
1726int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
1727{
1728 unsigned long nr, a0, a1, a2, a3, ret;
1729
1730 kvm_x86_ops->cache_regs(vcpu);
1731
1732 nr = vcpu->regs[VCPU_REGS_RAX];
1733 a0 = vcpu->regs[VCPU_REGS_RBX];
1734 a1 = vcpu->regs[VCPU_REGS_RCX];
1735 a2 = vcpu->regs[VCPU_REGS_RDX];
1736 a3 = vcpu->regs[VCPU_REGS_RSI];
1737
1738 if (!is_long_mode(vcpu)) {
1739 nr &= 0xFFFFFFFF;
1740 a0 &= 0xFFFFFFFF;
1741 a1 &= 0xFFFFFFFF;
1742 a2 &= 0xFFFFFFFF;
1743 a3 &= 0xFFFFFFFF;
1744 }
1745
1746 switch (nr) {
1747 default:
1748 ret = -KVM_ENOSYS;
1749 break;
1750 }
1751 vcpu->regs[VCPU_REGS_RAX] = ret;
1752 kvm_x86_ops->decache_regs(vcpu);
1753 return 0;
1754}
1755EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
1756
1757int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
1758{
1759 char instruction[3];
1760 int ret = 0;
1761
1762 mutex_lock(&vcpu->kvm->lock);
1763
1764 /*
1765 * Blow out the MMU to ensure that no other VCPU has an active mapping
1766 * to ensure that the updated hypercall appears atomically across all
1767 * VCPUs.
1768 */
1769 kvm_mmu_zap_all(vcpu->kvm);
1770
1771 kvm_x86_ops->cache_regs(vcpu);
1772 kvm_x86_ops->patch_hypercall(vcpu, instruction);
1773 if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
1774 != X86EMUL_CONTINUE)
1775 ret = -EFAULT;
1776
1777 mutex_unlock(&vcpu->kvm->lock);
1778
1779 return ret;
1780}
1781
1782static u64 mk_cr_64(u64 curr_cr, u32 new_val)
1783{
1784 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
1785}
1786
1787void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1788{
1789 struct descriptor_table dt = { limit, base };
1790
1791 kvm_x86_ops->set_gdt(vcpu, &dt);
1792}
1793
1794void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
1795{
1796 struct descriptor_table dt = { limit, base };
1797
1798 kvm_x86_ops->set_idt(vcpu, &dt);
1799}
1800
1801void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
1802 unsigned long *rflags)
1803{
1804 lmsw(vcpu, msw);
1805 *rflags = kvm_x86_ops->get_rflags(vcpu);
1806}
1807
1808unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
1809{
1810 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
1811 switch (cr) {
1812 case 0:
1813 return vcpu->cr0;
1814 case 2:
1815 return vcpu->cr2;
1816 case 3:
1817 return vcpu->cr3;
1818 case 4:
1819 return vcpu->cr4;
1820 default:
1821 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1822 return 0;
1823 }
1824}
1825
1826void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
1827 unsigned long *rflags)
1828{
1829 switch (cr) {
1830 case 0:
1831 set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
1832 *rflags = kvm_x86_ops->get_rflags(vcpu);
1833 break;
1834 case 2:
1835 vcpu->cr2 = val;
1836 break;
1837 case 3:
1838 set_cr3(vcpu, val);
1839 break;
1840 case 4:
1841 set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
1842 break;
1843 default:
1844 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
1845 }
1846}
1847
1848void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1849{
1850 int i;
1851 u32 function;
1852 struct kvm_cpuid_entry *e, *best;
1853
1854 kvm_x86_ops->cache_regs(vcpu);
1855 function = vcpu->regs[VCPU_REGS_RAX];
1856 vcpu->regs[VCPU_REGS_RAX] = 0;
1857 vcpu->regs[VCPU_REGS_RBX] = 0;
1858 vcpu->regs[VCPU_REGS_RCX] = 0;
1859 vcpu->regs[VCPU_REGS_RDX] = 0;
1860 best = NULL;
1861 for (i = 0; i < vcpu->cpuid_nent; ++i) {
1862 e = &vcpu->cpuid_entries[i];
1863 if (e->function == function) {
1864 best = e;
1865 break;
1866 }
1867 /*
1868 * Both basic or both extended?
1869 */
1870 if (((e->function ^ function) & 0x80000000) == 0)
1871 if (!best || e->function > best->function)
1872 best = e;
1873 }
1874 if (best) {
1875 vcpu->regs[VCPU_REGS_RAX] = best->eax;
1876 vcpu->regs[VCPU_REGS_RBX] = best->ebx;
1877 vcpu->regs[VCPU_REGS_RCX] = best->ecx;
1878 vcpu->regs[VCPU_REGS_RDX] = best->edx;
1879 }
1880 kvm_x86_ops->decache_regs(vcpu);
1881 kvm_x86_ops->skip_emulated_instruction(vcpu);
1882}
1883EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 1884
b6c7a5dc
HB		 1885/*
1886 * Check if userspace requested an interrupt window, and that the
1887 * interrupt window is open.
1888 *
1889 * No need to exit to userspace if we already have an interrupt queued.
1890 */
1891static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1892 struct kvm_run *kvm_run)
1893{
1894 return (!vcpu->irq_summary &&
1895 kvm_run->request_interrupt_window &&
1896 vcpu->interrupt_window_open &&
1897 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
1898}
1899
1900static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1901 struct kvm_run *kvm_run)
1902{
1903 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
1904 kvm_run->cr8 = get_cr8(vcpu);
1905 kvm_run->apic_base = kvm_get_apic_base(vcpu);
1906 if (irqchip_in_kernel(vcpu->kvm))
1907 kvm_run->ready_for_interrupt_injection = 1;
1908 else
1909 kvm_run->ready_for_interrupt_injection =
1910 (vcpu->interrupt_window_open &&
1911 vcpu->irq_summary == 0);
1912}
1913
1914static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1915{
1916 int r;
1917
1918 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
1919 pr_debug("vcpu %d received sipi with vector # %x\n",
1920 vcpu->vcpu_id, vcpu->sipi_vector);
1921 kvm_lapic_reset(vcpu);
1922 r = kvm_x86_ops->vcpu_reset(vcpu);
1923 if (r)
1924 return r;
1925 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
1926 }
1927
1928preempted:
1929 if (vcpu->guest_debug.enabled)
1930 kvm_x86_ops->guest_debug_pre(vcpu);
1931
1932again:
1933 r = kvm_mmu_reload(vcpu);
1934 if (unlikely(r))
1935 goto out;
1936
1937 kvm_inject_pending_timer_irqs(vcpu);
1938
1939 preempt_disable();
1940
1941 kvm_x86_ops->prepare_guest_switch(vcpu);
1942 kvm_load_guest_fpu(vcpu);
1943
1944 local_irq_disable();
1945
1946 if (signal_pending(current)) {
1947 local_irq_enable();
1948 preempt_enable();
1949 r = -EINTR;
1950 kvm_run->exit_reason = KVM_EXIT_INTR;
1951 ++vcpu->stat.signal_exits;
1952 goto out;
1953 }
1954
1955 if (irqchip_in_kernel(vcpu->kvm))
1956 kvm_x86_ops->inject_pending_irq(vcpu);
1957 else if (!vcpu->mmio_read_completed)
1958 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
1959
1960 vcpu->guest_mode = 1;
1961 kvm_guest_enter();
1962
1963 if (vcpu->requests)
1964 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
1965 kvm_x86_ops->tlb_flush(vcpu);
1966
1967 kvm_x86_ops->run(vcpu, kvm_run);
1968
1969 vcpu->guest_mode = 0;
1970 local_irq_enable();
1971
1972 ++vcpu->stat.exits;
1973
1974 /*
1975 * We must have an instruction between local_irq_enable() and
1976 * kvm_guest_exit(), so the timer interrupt isn't delayed by
1977 * the interrupt shadow. The stat.exits increment will do nicely.
1978 * But we need to prevent reordering, hence this barrier():
1979 */
1980 barrier();
1981
1982 kvm_guest_exit();
1983
1984 preempt_enable();
1985
1986 /*
1987 * Profile KVM exit RIPs:
1988 */
1989 if (unlikely(prof_on == KVM_PROFILING)) {
1990 kvm_x86_ops->cache_regs(vcpu);
1991 profile_hit(KVM_PROFILING, (void *)vcpu->rip);
1992 }
1993
1994 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
1995
1996 if (r > 0) {
1997 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1998 r = -EINTR;
1999 kvm_run->exit_reason = KVM_EXIT_INTR;
2000 ++vcpu->stat.request_irq_exits;
2001 goto out;
2002 }
e1beb1d3 2003 if (!need_resched())
b6c7a5dc 2004 goto again;
b6c7a5dc
HB		 2005 }
2006
2007out:
2008 if (r > 0) {
2009 kvm_resched(vcpu);
2010 goto preempted;
2011 }
2012
2013 post_kvm_run_save(vcpu, kvm_run);
2014
2015 return r;
2016}
2017
2018int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2019{
2020 int r;
2021 sigset_t sigsaved;
2022
2023 vcpu_load(vcpu);
2024
2025 if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
2026 kvm_vcpu_block(vcpu);
2027 vcpu_put(vcpu);
2028 return -EAGAIN;
2029 }
2030
2031 if (vcpu->sigset_active)
2032 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2033
2034 /* re-sync apic's tpr */
2035 if (!irqchip_in_kernel(vcpu->kvm))
2036 set_cr8(vcpu, kvm_run->cr8);
2037
2038 if (vcpu->pio.cur_count) {
2039 r = complete_pio(vcpu);
2040 if (r)
2041 goto out;
2042 }
2043#if CONFIG_HAS_IOMEM
2044 if (vcpu->mmio_needed) {
2045 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2046 vcpu->mmio_read_completed = 1;
2047 vcpu->mmio_needed = 0;
2048 r = emulate_instruction(vcpu, kvm_run,
2049 vcpu->mmio_fault_cr2, 0, 1);
2050 if (r == EMULATE_DO_MMIO) {
2051 /*
2052 * Read-modify-write. Back to userspace.
2053 */
2054 r = 0;
2055 goto out;
2056 }
2057 }
2058#endif
2059 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2060 kvm_x86_ops->cache_regs(vcpu);
2061 vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
2062 kvm_x86_ops->decache_regs(vcpu);
2063 }
2064
2065 r = __vcpu_run(vcpu, kvm_run);
2066
2067out:
2068 if (vcpu->sigset_active)
2069 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2070
2071 vcpu_put(vcpu);
2072 return r;
2073}
2074
2075int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2076{
2077 vcpu_load(vcpu);
2078
2079 kvm_x86_ops->cache_regs(vcpu);
2080
2081 regs->rax = vcpu->regs[VCPU_REGS_RAX];
2082 regs->rbx = vcpu->regs[VCPU_REGS_RBX];
2083 regs->rcx = vcpu->regs[VCPU_REGS_RCX];
2084 regs->rdx = vcpu->regs[VCPU_REGS_RDX];
2085 regs->rsi = vcpu->regs[VCPU_REGS_RSI];
2086 regs->rdi = vcpu->regs[VCPU_REGS_RDI];
2087 regs->rsp = vcpu->regs[VCPU_REGS_RSP];
2088 regs->rbp = vcpu->regs[VCPU_REGS_RBP];
2089#ifdef CONFIG_X86_64
2090 regs->r8 = vcpu->regs[VCPU_REGS_R8];
2091 regs->r9 = vcpu->regs[VCPU_REGS_R9];
2092 regs->r10 = vcpu->regs[VCPU_REGS_R10];
2093 regs->r11 = vcpu->regs[VCPU_REGS_R11];
2094 regs->r12 = vcpu->regs[VCPU_REGS_R12];
2095 regs->r13 = vcpu->regs[VCPU_REGS_R13];
2096 regs->r14 = vcpu->regs[VCPU_REGS_R14];
2097 regs->r15 = vcpu->regs[VCPU_REGS_R15];
2098#endif
2099
2100 regs->rip = vcpu->rip;
2101 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2102
2103 /*
2104 * Don't leak debug flags in case they were set for guest debugging
2105 */
2106 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2107 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2108
2109 vcpu_put(vcpu);
2110
2111 return 0;
2112}
2113
2114int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2115{
2116 vcpu_load(vcpu);
2117
2118 vcpu->regs[VCPU_REGS_RAX] = regs->rax;
2119 vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
2120 vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
2121 vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
2122 vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
2123 vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
2124 vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
2125 vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
2126#ifdef CONFIG_X86_64
2127 vcpu->regs[VCPU_REGS_R8] = regs->r8;
2128 vcpu->regs[VCPU_REGS_R9] = regs->r9;
2129 vcpu->regs[VCPU_REGS_R10] = regs->r10;
2130 vcpu->regs[VCPU_REGS_R11] = regs->r11;
2131 vcpu->regs[VCPU_REGS_R12] = regs->r12;
2132 vcpu->regs[VCPU_REGS_R13] = regs->r13;
2133 vcpu->regs[VCPU_REGS_R14] = regs->r14;
2134 vcpu->regs[VCPU_REGS_R15] = regs->r15;
2135#endif
2136
2137 vcpu->rip = regs->rip;
2138 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2139
2140 kvm_x86_ops->decache_regs(vcpu);
2141
2142 vcpu_put(vcpu);
2143
2144 return 0;
2145}
2146
2147static void get_segment(struct kvm_vcpu *vcpu,
2148 struct kvm_segment *var, int seg)
2149{
2150 return kvm_x86_ops->get_segment(vcpu, var, seg);
2151}
2152
2153void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2154{
2155 struct kvm_segment cs;
2156
2157 get_segment(vcpu, &cs, VCPU_SREG_CS);
2158 *db = cs.db;
2159 *l = cs.l;
2160}
2161EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2162
2163int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2164 struct kvm_sregs *sregs)
2165{
2166 struct descriptor_table dt;
2167 int pending_vec;
2168
2169 vcpu_load(vcpu);
2170
2171 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2172 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2173 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2174 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2175 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2176 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2177
2178 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2179 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2180
2181 kvm_x86_ops->get_idt(vcpu, &dt);
2182 sregs->idt.limit = dt.limit;
2183 sregs->idt.base = dt.base;
2184 kvm_x86_ops->get_gdt(vcpu, &dt);
2185 sregs->gdt.limit = dt.limit;
2186 sregs->gdt.base = dt.base;
2187
2188 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2189 sregs->cr0 = vcpu->cr0;
2190 sregs->cr2 = vcpu->cr2;
2191 sregs->cr3 = vcpu->cr3;
2192 sregs->cr4 = vcpu->cr4;
2193 sregs->cr8 = get_cr8(vcpu);
2194 sregs->efer = vcpu->shadow_efer;
2195 sregs->apic_base = kvm_get_apic_base(vcpu);
2196
2197 if (irqchip_in_kernel(vcpu->kvm)) {
2198 memset(sregs->interrupt_bitmap, 0,
2199 sizeof sregs->interrupt_bitmap);
2200 pending_vec = kvm_x86_ops->get_irq(vcpu);
2201 if (pending_vec >= 0)
2202 set_bit(pending_vec,
2203 (unsigned long *)sregs->interrupt_bitmap);
2204 } else
2205 memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
2206 sizeof sregs->interrupt_bitmap);
2207
2208 vcpu_put(vcpu);
2209
2210 return 0;
2211}
2212
2213static void set_segment(struct kvm_vcpu *vcpu,
2214 struct kvm_segment *var, int seg)
2215{
2216 return kvm_x86_ops->set_segment(vcpu, var, seg);
2217}
2218
2219int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2220 struct kvm_sregs *sregs)
2221{
2222 int mmu_reset_needed = 0;
2223 int i, pending_vec, max_bits;
2224 struct descriptor_table dt;
2225
2226 vcpu_load(vcpu);
2227
2228 dt.limit = sregs->idt.limit;
2229 dt.base = sregs->idt.base;
2230 kvm_x86_ops->set_idt(vcpu, &dt);
2231 dt.limit = sregs->gdt.limit;
2232 dt.base = sregs->gdt.base;
2233 kvm_x86_ops->set_gdt(vcpu, &dt);
2234
2235 vcpu->cr2 = sregs->cr2;
2236 mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
2237 vcpu->cr3 = sregs->cr3;
2238
2239 set_cr8(vcpu, sregs->cr8);
2240
2241 mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
2242#ifdef CONFIG_X86_64
2243 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2244#endif
2245 kvm_set_apic_base(vcpu, sregs->apic_base);
2246
2247 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2248
2249 mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
2250 vcpu->cr0 = sregs->cr0;
2251 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
2252
2253 mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
2254 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2255 if (!is_long_mode(vcpu) && is_pae(vcpu))
2256 load_pdptrs(vcpu, vcpu->cr3);
2257
2258 if (mmu_reset_needed)
2259 kvm_mmu_reset_context(vcpu);
2260
2261 if (!irqchip_in_kernel(vcpu->kvm)) {
2262 memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
2263 sizeof vcpu->irq_pending);
2264 vcpu->irq_summary = 0;
2265 for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
2266 if (vcpu->irq_pending[i])
2267 __set_bit(i, &vcpu->irq_summary);
2268 } else {
2269 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2270 pending_vec = find_first_bit(
2271 (const unsigned long *)sregs->interrupt_bitmap,
2272 max_bits);
2273 /* Only pending external irq is handled here */
2274 if (pending_vec < max_bits) {
2275 kvm_x86_ops->set_irq(vcpu, pending_vec);
2276 pr_debug("Set back pending irq %d\n",
2277 pending_vec);
2278 }
2279 }
2280
2281 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2282 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2283 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2284 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2285 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2286 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2287
2288 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2289 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2290
2291 vcpu_put(vcpu);
2292
2293 return 0;
2294}
2295
2296int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2297 struct kvm_debug_guest *dbg)
2298{
2299 int r;
2300
2301 vcpu_load(vcpu);
2302
2303 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2304
2305 vcpu_put(vcpu);
2306
2307 return r;
2308}
2309
d0752060
HB		 2310/*
2311 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2312 * we have asm/x86/processor.h
2313 */
2314struct fxsave {
2315 u16 cwd;
2316 u16 swd;
2317 u16 twd;
2318 u16 fop;
2319 u64 rip;
2320 u64 rdp;
2321 u32 mxcsr;
2322 u32 mxcsr_mask;
2323 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2324#ifdef CONFIG_X86_64
2325 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2326#else
2327 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2328#endif
2329};
2330
8b006791
ZX		 2331/*
2332 * Translate a guest virtual address to a guest physical address.
2333 */
2334int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2335 struct kvm_translation *tr)
2336{
2337 unsigned long vaddr = tr->linear_address;
2338 gpa_t gpa;
2339
2340 vcpu_load(vcpu);
2341 mutex_lock(&vcpu->kvm->lock);
2342 gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr);
2343 tr->physical_address = gpa;
2344 tr->valid = gpa != UNMAPPED_GVA;
2345 tr->writeable = 1;
2346 tr->usermode = 0;
2347 mutex_unlock(&vcpu->kvm->lock);
2348 vcpu_put(vcpu);
2349
2350 return 0;
2351}
2352
d0752060
HB		 2353int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2354{
2355 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2356
2357 vcpu_load(vcpu);
2358
2359 memcpy(fpu->fpr, fxsave->st_space, 128);
2360 fpu->fcw = fxsave->cwd;
2361 fpu->fsw = fxsave->swd;
2362 fpu->ftwx = fxsave->twd;
2363 fpu->last_opcode = fxsave->fop;
2364 fpu->last_ip = fxsave->rip;
2365 fpu->last_dp = fxsave->rdp;
2366 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2367
2368 vcpu_put(vcpu);
2369
2370 return 0;
2371}
2372
2373int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2374{
2375 struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
2376
2377 vcpu_load(vcpu);
2378
2379 memcpy(fxsave->st_space, fpu->fpr, 128);
2380 fxsave->cwd = fpu->fcw;
2381 fxsave->swd = fpu->fsw;
2382 fxsave->twd = fpu->ftwx;
2383 fxsave->fop = fpu->last_opcode;
2384 fxsave->rip = fpu->last_ip;
2385 fxsave->rdp = fpu->last_dp;
2386 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
2387
2388 vcpu_put(vcpu);
2389
2390 return 0;
2391}
2392
2393void fx_init(struct kvm_vcpu *vcpu)
2394{
2395 unsigned after_mxcsr_mask;
2396
2397 /* Initialize guest FPU by resetting ours and saving into guest's */
2398 preempt_disable();
2399 fx_save(&vcpu->host_fx_image);
2400 fpu_init();
2401 fx_save(&vcpu->guest_fx_image);
2402 fx_restore(&vcpu->host_fx_image);
2403 preempt_enable();
2404
2405 vcpu->cr0 |= X86_CR0_ET;
2406 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
2407 vcpu->guest_fx_image.mxcsr = 0x1f80;
2408 memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
2409 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
2410}
2411EXPORT_SYMBOL_GPL(fx_init);
2412
2413void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
2414{
2415 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
2416 return;
2417
2418 vcpu->guest_fpu_loaded = 1;
2419 fx_save(&vcpu->host_fx_image);
2420 fx_restore(&vcpu->guest_fx_image);
2421}
2422EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
2423
2424void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
2425{
2426 if (!vcpu->guest_fpu_loaded)
2427 return;
2428
2429 vcpu->guest_fpu_loaded = 0;
2430 fx_save(&vcpu->guest_fx_image);
2431 fx_restore(&vcpu->host_fx_image);
f096ed85 2432 ++vcpu->stat.fpu_reload;
d0752060
HB		 2433}
2434EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 2435
2436void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
2437{
2438 kvm_x86_ops->vcpu_free(vcpu);
2439}
2440
2441struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
2442 unsigned int id)
2443{
2444 int r;
2445 struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id);
2446
2447 if (IS_ERR(vcpu)) {
2448 r = -ENOMEM;
2449 goto fail;
2450 }
2451
2452 /* We do fxsave: this must be aligned. */
2453 BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
2454
2455 vcpu_load(vcpu);
2456 r = kvm_arch_vcpu_reset(vcpu);
2457 if (r == 0)
2458 r = kvm_mmu_setup(vcpu);
2459 vcpu_put(vcpu);
2460 if (r < 0)
2461 goto free_vcpu;
2462
2463 return vcpu;
2464free_vcpu:
2465 kvm_x86_ops->vcpu_free(vcpu);
2466fail:
2467 return ERR_PTR(r);
2468}
2469
2470void kvm_arch_vcpu_destory(struct kvm_vcpu *vcpu)
2471{
2472 vcpu_load(vcpu);
2473 kvm_mmu_unload(vcpu);
2474 vcpu_put(vcpu);
2475
2476 kvm_x86_ops->vcpu_free(vcpu);
2477}
2478
2479int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
2480{
2481 return kvm_x86_ops->vcpu_reset(vcpu);
2482}
2483
2484void kvm_arch_hardware_enable(void *garbage)
2485{
2486 kvm_x86_ops->hardware_enable(garbage);
2487}
2488
2489void kvm_arch_hardware_disable(void *garbage)
2490{
2491 kvm_x86_ops->hardware_disable(garbage);
2492}
2493
2494int kvm_arch_hardware_setup(void)
2495{
2496 return kvm_x86_ops->hardware_setup();
2497}
2498
2499void kvm_arch_hardware_unsetup(void)
2500{
2501 kvm_x86_ops->hardware_unsetup();
2502}
2503
2504void kvm_arch_check_processor_compat(void *rtn)
2505{
2506 kvm_x86_ops->check_processor_compatibility(rtn);
2507}
2508
2509int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
2510{
2511 struct page *page;
2512 struct kvm *kvm;
2513 int r;
2514
2515 BUG_ON(vcpu->kvm == NULL);
2516 kvm = vcpu->kvm;
2517
2518 vcpu->mmu.root_hpa = INVALID_PAGE;
2519 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
2520 vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
2521 else
2522 vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
2523
2524 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
2525 if (!page) {
2526 r = -ENOMEM;
2527 goto fail;
2528 }
2529 vcpu->pio_data = page_address(page);
2530
2531 r = kvm_mmu_create(vcpu);
2532 if (r < 0)
2533 goto fail_free_pio_data;
2534
2535 if (irqchip_in_kernel(kvm)) {
2536 r = kvm_create_lapic(vcpu);
2537 if (r < 0)
2538 goto fail_mmu_destroy;
2539 }
2540
2541 return 0;
2542
2543fail_mmu_destroy:
2544 kvm_mmu_destroy(vcpu);
2545fail_free_pio_data:
2546 free_page((unsigned long)vcpu->pio_data);
2547fail:
2548 return r;
2549}
2550
2551void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
2552{
2553 kvm_free_lapic(vcpu);
2554 kvm_mmu_destroy(vcpu);
2555 free_page((unsigned long)vcpu->pio_data);
2556}
d19a9cd2
ZX		 2557
2558struct kvm *kvm_arch_create_vm(void)
2559{
2560 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
2561
2562 if (!kvm)
2563 return ERR_PTR(-ENOMEM);
2564
2565 INIT_LIST_HEAD(&kvm->active_mmu_pages);
2566
2567 return kvm;
2568}
2569
2570static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
2571{
2572 vcpu_load(vcpu);
2573 kvm_mmu_unload(vcpu);
2574 vcpu_put(vcpu);
2575}
2576
2577static void kvm_free_vcpus(struct kvm *kvm)
2578{
2579 unsigned int i;
2580
2581 /*
2582 * Unpin any mmu pages first.
2583 */
2584 for (i = 0; i < KVM_MAX_VCPUS; ++i)
2585 if (kvm->vcpus[i])
2586 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
2587 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2588 if (kvm->vcpus[i]) {
2589 kvm_arch_vcpu_free(kvm->vcpus[i]);
2590 kvm->vcpus[i] = NULL;
2591 }
2592 }
2593
2594}
2595
2596void kvm_arch_destroy_vm(struct kvm *kvm)
2597{
2598 kfree(kvm->vpic);
2599 kfree(kvm->vioapic);
2600 kvm_free_vcpus(kvm);
2601 kvm_free_physmem(kvm);
2602 kfree(kvm);
2603}
Linux kernel - Deliverables
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