Commit | Line | Data |
---|---|---|
043405e1 CO |
1 | #/* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
11 | #ifndef KVM_X86_H | |
12 | #define KVM_X86_H | |
13 | ||
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
16 | ||
17 | #include <linux/kvm.h> | |
18 | #include <linux/kvm_para.h> | |
19 | ||
e01a1b57 HB |
20 | #include <asm/desc.h> |
21 | ||
d657a98e ZX |
22 | #include "types.h" |
23 | ||
cd6e8f87 ZX |
24 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
25 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
26 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL) | |
27 | ||
28 | #define KVM_GUEST_CR0_MASK \ | |
29 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ | |
30 | | X86_CR0_NW | X86_CR0_CD) | |
31 | #define KVM_VM_CR0_ALWAYS_ON \ | |
32 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ | |
33 | | X86_CR0_MP) | |
34 | #define KVM_GUEST_CR4_MASK \ | |
35 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) | |
36 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | |
37 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | |
38 | ||
39 | #define INVALID_PAGE (~(hpa_t)0) | |
40 | #define UNMAPPED_GVA (~(gpa_t)0) | |
41 | ||
42 | #define DE_VECTOR 0 | |
43 | #define UD_VECTOR 6 | |
44 | #define NM_VECTOR 7 | |
45 | #define DF_VECTOR 8 | |
46 | #define TS_VECTOR 10 | |
47 | #define NP_VECTOR 11 | |
48 | #define SS_VECTOR 12 | |
49 | #define GP_VECTOR 13 | |
50 | #define PF_VECTOR 14 | |
51 | ||
52 | #define SELECTOR_TI_MASK (1 << 2) | |
53 | #define SELECTOR_RPL_MASK 0x03 | |
54 | ||
55 | #define IOPL_SHIFT 12 | |
56 | ||
d657a98e ZX |
57 | #define KVM_PERMILLE_MMU_PAGES 20 |
58 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
59 | #define KVM_NUM_MMU_PAGES 1024 | |
60 | #define KVM_MIN_FREE_MMU_PAGES 5 | |
61 | #define KVM_REFILL_PAGES 25 | |
62 | #define KVM_MAX_CPUID_ENTRIES 40 | |
63 | ||
e9b11c17 ZX |
64 | extern spinlock_t kvm_lock; |
65 | extern struct list_head vm_list; | |
66 | ||
d657a98e ZX |
67 | struct kvm_vcpu; |
68 | struct kvm; | |
69 | ||
2b3ccfa0 ZX |
70 | enum { |
71 | VCPU_REGS_RAX = 0, | |
72 | VCPU_REGS_RCX = 1, | |
73 | VCPU_REGS_RDX = 2, | |
74 | VCPU_REGS_RBX = 3, | |
75 | VCPU_REGS_RSP = 4, | |
76 | VCPU_REGS_RBP = 5, | |
77 | VCPU_REGS_RSI = 6, | |
78 | VCPU_REGS_RDI = 7, | |
79 | #ifdef CONFIG_X86_64 | |
80 | VCPU_REGS_R8 = 8, | |
81 | VCPU_REGS_R9 = 9, | |
82 | VCPU_REGS_R10 = 10, | |
83 | VCPU_REGS_R11 = 11, | |
84 | VCPU_REGS_R12 = 12, | |
85 | VCPU_REGS_R13 = 13, | |
86 | VCPU_REGS_R14 = 14, | |
87 | VCPU_REGS_R15 = 15, | |
88 | #endif | |
89 | NR_VCPU_REGS | |
90 | }; | |
91 | ||
92 | enum { | |
93 | VCPU_SREG_CS, | |
94 | VCPU_SREG_DS, | |
95 | VCPU_SREG_ES, | |
96 | VCPU_SREG_FS, | |
97 | VCPU_SREG_GS, | |
98 | VCPU_SREG_SS, | |
99 | VCPU_SREG_TR, | |
100 | VCPU_SREG_LDTR, | |
101 | }; | |
102 | ||
103 | #include "x86_emulate.h" | |
104 | ||
d657a98e ZX |
105 | #define KVM_NR_MEM_OBJS 40 |
106 | ||
107 | /* | |
108 | * We don't want allocation failures within the mmu code, so we preallocate | |
109 | * enough memory for a single page fault in a cache. | |
110 | */ | |
111 | struct kvm_mmu_memory_cache { | |
112 | int nobjs; | |
113 | void *objects[KVM_NR_MEM_OBJS]; | |
114 | }; | |
115 | ||
116 | #define NR_PTE_CHAIN_ENTRIES 5 | |
117 | ||
118 | struct kvm_pte_chain { | |
119 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
120 | struct hlist_node link; | |
121 | }; | |
122 | ||
123 | /* | |
124 | * kvm_mmu_page_role, below, is defined as: | |
125 | * | |
126 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
127 | * bits 4:7 - page table level for this shadow (1-4) | |
128 | * bits 8:9 - page table quadrant for 2-level guests | |
129 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | |
130 | * bits 17:19 - common access permissions for all ptes in this shadow page | |
131 | */ | |
132 | union kvm_mmu_page_role { | |
133 | unsigned word; | |
134 | struct { | |
135 | unsigned glevels : 4; | |
136 | unsigned level : 4; | |
137 | unsigned quadrant : 2; | |
138 | unsigned pad_for_nice_hex_output : 6; | |
139 | unsigned metaphysical : 1; | |
140 | unsigned access : 3; | |
141 | }; | |
142 | }; | |
143 | ||
144 | struct kvm_mmu_page { | |
145 | struct list_head link; | |
146 | struct hlist_node hash_link; | |
147 | ||
148 | /* | |
149 | * The following two entries are used to key the shadow page in the | |
150 | * hash table. | |
151 | */ | |
152 | gfn_t gfn; | |
153 | union kvm_mmu_page_role role; | |
154 | ||
155 | u64 *spt; | |
156 | /* hold the gfn of each spte inside spt */ | |
157 | gfn_t *gfns; | |
158 | unsigned long slot_bitmap; /* One bit set per slot which has memory | |
159 | * in this shadow page. | |
160 | */ | |
161 | int multimapped; /* More than one parent_pte? */ | |
162 | int root_count; /* Currently serving as active root */ | |
163 | union { | |
164 | u64 *parent_pte; /* !multimapped */ | |
165 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
166 | }; | |
167 | }; | |
168 | ||
169 | /* | |
170 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
171 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
172 | * mode. | |
173 | */ | |
174 | struct kvm_mmu { | |
175 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
176 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
177 | void (*free)(struct kvm_vcpu *vcpu); | |
178 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
179 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
180 | struct kvm_mmu_page *page); | |
181 | hpa_t root_hpa; | |
182 | int root_level; | |
183 | int shadow_root_level; | |
184 | ||
185 | u64 *pae_root; | |
186 | }; | |
187 | ||
ad312c7c | 188 | struct kvm_vcpu_arch { |
34c16eec ZX |
189 | u64 host_tsc; |
190 | int interrupt_window_open; | |
191 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ | |
192 | DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); | |
193 | unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */ | |
194 | unsigned long rip; /* needs vcpu_load_rsp_rip() */ | |
195 | ||
196 | unsigned long cr0; | |
197 | unsigned long cr2; | |
198 | unsigned long cr3; | |
199 | unsigned long cr4; | |
200 | unsigned long cr8; | |
201 | u64 pdptrs[4]; /* pae */ | |
202 | u64 shadow_efer; | |
203 | u64 apic_base; | |
204 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
205 | #define VCPU_MP_STATE_RUNNABLE 0 | |
206 | #define VCPU_MP_STATE_UNINITIALIZED 1 | |
207 | #define VCPU_MP_STATE_INIT_RECEIVED 2 | |
208 | #define VCPU_MP_STATE_SIPI_RECEIVED 3 | |
209 | #define VCPU_MP_STATE_HALTED 4 | |
210 | int mp_state; | |
211 | int sipi_vector; | |
212 | u64 ia32_misc_enable_msr; | |
213 | ||
214 | struct kvm_mmu mmu; | |
215 | ||
216 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
217 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
218 | struct kvm_mmu_memory_cache mmu_page_cache; | |
219 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
220 | ||
221 | gfn_t last_pt_write_gfn; | |
222 | int last_pt_write_count; | |
223 | u64 *last_pte_updated; | |
224 | ||
34c16eec ZX |
225 | struct i387_fxsave_struct host_fx_image; |
226 | struct i387_fxsave_struct guest_fx_image; | |
227 | ||
228 | gva_t mmio_fault_cr2; | |
229 | struct kvm_pio_request pio; | |
230 | void *pio_data; | |
231 | ||
298101da AK |
232 | struct kvm_queued_exception { |
233 | bool pending; | |
234 | bool has_error_code; | |
235 | u8 nr; | |
236 | u32 error_code; | |
237 | } exception; | |
238 | ||
34c16eec ZX |
239 | struct { |
240 | int active; | |
241 | u8 save_iopl; | |
242 | struct kvm_save_segment { | |
243 | u16 selector; | |
244 | unsigned long base; | |
245 | u32 limit; | |
246 | u32 ar; | |
247 | } tr, es, ds, fs, gs; | |
248 | } rmode; | |
249 | int halt_request; /* real mode on Intel only */ | |
250 | ||
251 | int cpuid_nent; | |
07716717 | 252 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
253 | /* emulate context */ |
254 | ||
255 | struct x86_emulate_ctxt emulate_ctxt; | |
256 | }; | |
257 | ||
ad312c7c | 258 | |
e01a1b57 HB |
259 | struct descriptor_table { |
260 | u16 limit; | |
261 | unsigned long base; | |
262 | } __attribute__((packed)); | |
263 | ||
ea4a5ff8 ZX |
264 | struct kvm_x86_ops { |
265 | int (*cpu_has_kvm_support)(void); /* __init */ | |
266 | int (*disabled_by_bios)(void); /* __init */ | |
267 | void (*hardware_enable)(void *dummy); /* __init */ | |
268 | void (*hardware_disable)(void *dummy); | |
269 | void (*check_processor_compatibility)(void *rtn); | |
270 | int (*hardware_setup)(void); /* __init */ | |
271 | void (*hardware_unsetup)(void); /* __exit */ | |
272 | ||
273 | /* Create, but do not attach this VCPU */ | |
274 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
275 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
276 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
277 | ||
278 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
279 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
280 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
281 | void (*vcpu_decache)(struct kvm_vcpu *vcpu); | |
282 | ||
283 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
284 | struct kvm_debug_guest *dbg); | |
285 | void (*guest_debug_pre)(struct kvm_vcpu *vcpu); | |
286 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
287 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
288 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
289 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
290 | struct kvm_segment *var, int seg); | |
291 | void (*set_segment)(struct kvm_vcpu *vcpu, | |
292 | struct kvm_segment *var, int seg); | |
293 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
294 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
295 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
296 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
297 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
298 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
299 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
300 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
301 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
302 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
303 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
304 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
305 | int *exception); | |
306 | void (*cache_regs)(struct kvm_vcpu *vcpu); | |
307 | void (*decache_regs)(struct kvm_vcpu *vcpu); | |
308 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); | |
309 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
310 | ||
311 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 312 | |
ea4a5ff8 ZX |
313 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); |
314 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | |
315 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
316 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | |
317 | unsigned char *hypercall_addr); | |
318 | int (*get_irq)(struct kvm_vcpu *vcpu); | |
319 | void (*set_irq)(struct kvm_vcpu *vcpu, int vec); | |
298101da AK |
320 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
321 | bool has_error_code, u32 error_code); | |
322 | bool (*exception_injected)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
323 | void (*inject_pending_irq)(struct kvm_vcpu *vcpu); |
324 | void (*inject_pending_vectors)(struct kvm_vcpu *vcpu, | |
325 | struct kvm_run *run); | |
326 | ||
327 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | |
328 | }; | |
329 | ||
97896d04 ZX |
330 | extern struct kvm_x86_ops *kvm_x86_ops; |
331 | ||
54f1585a ZX |
332 | int kvm_mmu_module_init(void); |
333 | void kvm_mmu_module_exit(void); | |
334 | ||
335 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
336 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
337 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
338 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
339 | ||
340 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
341 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
342 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 343 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
344 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
345 | ||
346 | enum emulation_result { | |
347 | EMULATE_DONE, /* no further processing */ | |
348 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
349 | EMULATE_FAIL, /* can't emulate this instruction */ | |
350 | }; | |
351 | ||
352 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, | |
353 | unsigned long cr2, u16 error_code, int no_decode); | |
354 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); | |
355 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
356 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
357 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
358 | unsigned long *rflags); | |
359 | ||
360 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
361 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
362 | unsigned long *rflags); | |
363 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); | |
364 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
365 | ||
366 | struct x86_emulate_ctxt; | |
367 | ||
368 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
369 | int size, unsigned port); | |
370 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
371 | int size, unsigned long count, int down, | |
372 | gva_t address, int rep, unsigned port); | |
373 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
374 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
375 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
376 | int emulate_clts(struct kvm_vcpu *vcpu); | |
377 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
378 | unsigned long *dest); | |
379 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
380 | unsigned long value); | |
381 | ||
382 | void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); | |
383 | void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0); | |
384 | void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0); | |
385 | void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0); | |
386 | unsigned long get_cr8(struct kvm_vcpu *vcpu); | |
387 | void lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
388 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); | |
389 | ||
390 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
391 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
392 | ||
298101da AK |
393 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
394 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
395 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
396 | u32 error_code); | |
298101da | 397 | |
54f1585a ZX |
398 | void fx_init(struct kvm_vcpu *vcpu); |
399 | ||
400 | int emulator_read_std(unsigned long addr, | |
401 | void *val, | |
402 | unsigned int bytes, | |
403 | struct kvm_vcpu *vcpu); | |
404 | int emulator_write_emulated(unsigned long addr, | |
405 | const void *val, | |
406 | unsigned int bytes, | |
407 | struct kvm_vcpu *vcpu); | |
408 | ||
409 | unsigned long segment_base(u16 selector); | |
410 | ||
d835dfec | 411 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a ZX |
412 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
413 | const u8 *new, int bytes); | |
414 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); | |
415 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
416 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
417 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
418 | ||
419 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
420 | ||
421 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
422 | ||
3067714c | 423 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
34c16eec | 424 | |
a03490ed | 425 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 426 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d ZX |
427 | |
428 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
429 | { | |
430 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
431 | ||
432 | return (struct kvm_mmu_page *)page_private(page); | |
433 | } | |
434 | ||
435 | static inline u16 read_fs(void) | |
436 | { | |
437 | u16 seg; | |
438 | asm("mov %%fs, %0" : "=g"(seg)); | |
439 | return seg; | |
440 | } | |
441 | ||
442 | static inline u16 read_gs(void) | |
443 | { | |
444 | u16 seg; | |
445 | asm("mov %%gs, %0" : "=g"(seg)); | |
446 | return seg; | |
447 | } | |
448 | ||
449 | static inline u16 read_ldt(void) | |
450 | { | |
451 | u16 ldt; | |
452 | asm("sldt %0" : "=g"(ldt)); | |
453 | return ldt; | |
454 | } | |
455 | ||
456 | static inline void load_fs(u16 sel) | |
457 | { | |
458 | asm("mov %0, %%fs" : : "rm"(sel)); | |
459 | } | |
460 | ||
461 | static inline void load_gs(u16 sel) | |
462 | { | |
463 | asm("mov %0, %%gs" : : "rm"(sel)); | |
464 | } | |
465 | ||
466 | #ifndef load_ldt | |
467 | static inline void load_ldt(u16 sel) | |
468 | { | |
469 | asm("lldt %0" : : "rm"(sel)); | |
470 | } | |
471 | #endif | |
472 | ||
473 | static inline void get_idt(struct descriptor_table *table) | |
474 | { | |
475 | asm("sidt %0" : "=m"(*table)); | |
476 | } | |
477 | ||
478 | static inline void get_gdt(struct descriptor_table *table) | |
479 | { | |
480 | asm("sgdt %0" : "=m"(*table)); | |
481 | } | |
482 | ||
483 | static inline unsigned long read_tr_base(void) | |
484 | { | |
485 | u16 tr; | |
486 | asm("str %0" : "=g"(tr)); | |
487 | return segment_base(tr); | |
488 | } | |
489 | ||
490 | #ifdef CONFIG_X86_64 | |
491 | static inline unsigned long read_msr(unsigned long msr) | |
492 | { | |
493 | u64 value; | |
494 | ||
495 | rdmsrl(msr, value); | |
496 | return value; | |
497 | } | |
498 | #endif | |
499 | ||
500 | static inline void fx_save(struct i387_fxsave_struct *image) | |
501 | { | |
502 | asm("fxsave (%0)":: "r" (image)); | |
503 | } | |
504 | ||
505 | static inline void fx_restore(struct i387_fxsave_struct *image) | |
506 | { | |
507 | asm("fxrstor (%0)":: "r" (image)); | |
508 | } | |
509 | ||
510 | static inline void fpu_init(void) | |
511 | { | |
512 | asm("finit"); | |
513 | } | |
514 | ||
515 | static inline u32 get_rdx_init_val(void) | |
516 | { | |
517 | return 0x600; /* P6 family */ | |
518 | } | |
519 | ||
c1a5d4f9 AK |
520 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
521 | { | |
522 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
523 | } | |
524 | ||
ec6d273d ZX |
525 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" |
526 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | |
527 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | |
528 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | |
529 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | |
530 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | |
531 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | |
532 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | |
533 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | |
534 | ||
535 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | |
536 | ||
537 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
538 | #define TSS_BASE_SIZE 0x68 | |
539 | #define TSS_IOPB_SIZE (65536 / 8) | |
540 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
541 | #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 542 | |
043405e1 | 543 | #endif |