[deliverable/linux.git] / drivers / leds / leds-lp5521.c

/*
 * LP5521 LED chip driver.
 *
 * Copyright (C) 2010 Nokia Corporation
 * Copyright (C) 2012 Texas Instruments
 *
 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
 *          Milo(Woogyom) Kim <milo.kim@ti.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 */

#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/leds.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_data/leds-lp55xx.h>
#include <linux/slab.h>
#include <linux/of.h>

#include "leds-lp55xx-common.h"

#define LP5521_PROGRAM_LENGTH		32
#define LP5521_MAX_LEDS			3
#define LP5521_CMD_DIRECT		0x3F

/* Registers */
#define LP5521_REG_ENABLE		0x00
#define LP5521_REG_OP_MODE		0x01
#define LP5521_REG_R_PWM		0x02
#define LP5521_REG_G_PWM		0x03
#define LP5521_REG_B_PWM		0x04
#define LP5521_REG_R_CURRENT		0x05
#define LP5521_REG_G_CURRENT		0x06
#define LP5521_REG_B_CURRENT		0x07
#define LP5521_REG_CONFIG		0x08
#define LP5521_REG_STATUS		0x0C
#define LP5521_REG_RESET		0x0D
#define LP5521_REG_R_PROG_MEM		0x10
#define LP5521_REG_G_PROG_MEM		0x30
#define LP5521_REG_B_PROG_MEM		0x50

/* Base register to set LED current */
#define LP5521_REG_LED_CURRENT_BASE	LP5521_REG_R_CURRENT
/* Base register to set the brightness */
#define LP5521_REG_LED_PWM_BASE		LP5521_REG_R_PWM

/* Bits in ENABLE register */
#define LP5521_MASTER_ENABLE		0x40	/* Chip master enable */
#define LP5521_LOGARITHMIC_PWM		0x80	/* Logarithmic PWM adjustment */
#define LP5521_EXEC_RUN			0x2A
#define LP5521_ENABLE_DEFAULT	\
	(LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
#define LP5521_ENABLE_RUN_PROGRAM	\
	(LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)

/* CONFIG register */
#define LP5521_PWM_HF			0x40	/* PWM: 0 = 256Hz, 1 = 558Hz */
#define LP5521_PWRSAVE_EN		0x20	/* 1 = Power save mode */
#define LP5521_CP_MODE_OFF		0	/* Charge pump (CP) off */
#define LP5521_CP_MODE_BYPASS		8	/* CP forced to bypass mode */
#define LP5521_CP_MODE_1X5		0x10	/* CP forced to 1.5x mode */
#define LP5521_CP_MODE_AUTO		0x18	/* Automatic mode selection */
#define LP5521_R_TO_BATT		0x04	/* R out: 0 = CP, 1 = Vbat */
#define LP5521_CLK_INT			0x01	/* Internal clock */
#define LP5521_DEFAULT_CFG		\
	(LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO)

/* Status */
#define LP5521_EXT_CLK_USED		0x08

/* default R channel current register value */
#define LP5521_REG_R_CURR_DEFAULT	0xAF

/* Reset register value */
#define LP5521_RESET			0xFF

/* Program Memory Operations */
#define LP5521_MODE_R_M			0x30	/* Operation Mode Register */
#define LP5521_MODE_G_M			0x0C
#define LP5521_MODE_B_M			0x03
#define LP5521_LOAD_R			0x10
#define LP5521_LOAD_G			0x04
#define LP5521_LOAD_B			0x01

#define LP5521_R_IS_LOADING(mode)	\
	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
#define LP5521_G_IS_LOADING(mode)	\
	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
#define LP5521_B_IS_LOADING(mode)	\
	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)

#define LP5521_EXEC_R_M			0x30	/* Enable Register */
#define LP5521_EXEC_G_M			0x0C
#define LP5521_EXEC_B_M			0x03
#define LP5521_EXEC_M			0x3F
#define LP5521_RUN_R			0x20
#define LP5521_RUN_G			0x08
#define LP5521_RUN_B			0x02

static inline void lp5521_wait_opmode_done(void)
{
	/* operation mode change needs to be longer than 153 us */
	usleep_range(200, 300);
}

static inline void lp5521_wait_enable_done(void)
{
	/* it takes more 488 us to update ENABLE register */
	usleep_range(500, 600);
}

static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
{
	led->led_current = led_current;
	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
		led_current);
}

static void lp5521_load_engine(struct lp55xx_chip *chip)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	u8 mask[] = {
		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	};

	u8 val[] = {
		[LP55XX_ENGINE_1] = LP5521_LOAD_R,
		[LP55XX_ENGINE_2] = LP5521_LOAD_G,
		[LP55XX_ENGINE_3] = LP5521_LOAD_B,
	};

	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);

	lp5521_wait_opmode_done();
}

static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
{
	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
	lp5521_wait_opmode_done();
}

static void lp5521_stop_engine(struct lp55xx_chip *chip)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	u8 mask[] = {
		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	};

	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);

	lp5521_wait_opmode_done();
}

static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
{
	int ret;
	u8 mode;
	u8 exec;

	/* stop engine */
	if (!start) {
		lp5521_stop_engine(chip);
		lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
		lp5521_wait_opmode_done();
		return;
	}

	/*
	 * To run the engine,
	 * operation mode and enable register should updated at the same time
	 */

	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
	if (ret)
		return;

	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
	if (ret)
		return;

	/* change operation mode to RUN only when each engine is loading */
	if (LP5521_R_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
		exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
	}

	if (LP5521_G_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
		exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
	}

	if (LP5521_B_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
		exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
	}

	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
	lp5521_wait_opmode_done();

	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
	lp5521_wait_enable_done();
}

static int lp5521_update_program_memory(struct lp55xx_chip *chip,
					const u8 *data, size_t size)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
	u8 addr[] = {
		[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
		[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
		[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
	};
	unsigned cmd;
	char c[3];
	int nrchars;
	int ret;
	int offset = 0;
	int i = 0;

	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
		/* separate sscanfs because length is working only for %s */
		ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
		if (ret != 1)
			goto err;

		ret = sscanf(c, "%2x", &cmd);
		if (ret != 1)
			goto err;

		pattern[i] = (u8)cmd;
		offset += nrchars;
		i++;
	}

	/* Each instruction is 16bit long. Check that length is even */
	if (i % 2)
		goto err;

	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
		ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
		if (ret)
			return -EINVAL;
	}

	return size;

err:
	dev_err(&chip->cl->dev, "wrong pattern format\n");
	return -EINVAL;
}

static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
{
	const struct firmware *fw = chip->fw;

	if (fw->size > LP5521_PROGRAM_LENGTH) {
		dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
			fw->size);
		return;
	}

	/*
	 * Program momery sequence
	 *  1) set engine mode to "LOAD"
	 *  2) write firmware data into program memory
	 */

	lp5521_load_engine(chip);
	lp5521_update_program_memory(chip, fw->data, fw->size);
}

static int lp5521_post_init_device(struct lp55xx_chip *chip)
{
	int ret;
	u8 val;

	/*
	 * Make sure that the chip is reset by reading back the r channel
	 * current reg. This is dummy read is required on some platforms -
	 * otherwise further access to the R G B channels in the
	 * LP5521_REG_ENABLE register will not have any effect - strange!
	 */
	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
	if (ret) {
		dev_err(&chip->cl->dev, "error in resetting chip\n");
		return ret;
	}
	if (val != LP5521_REG_R_CURR_DEFAULT) {
		dev_err(&chip->cl->dev,
			"unexpected data in register (expected 0x%x got 0x%x)\n",
			LP5521_REG_R_CURR_DEFAULT, val);
		ret = -EINVAL;
		return ret;
	}
	usleep_range(10000, 20000);

	/* Set all PWMs to direct control mode */
	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);

	/* Update configuration for the clock setting */
	val = LP5521_DEFAULT_CFG;
	if (!lp55xx_is_extclk_used(chip))
		val |= LP5521_CLK_INT;

	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
	if (ret)
		return ret;

	/* Initialize all channels PWM to zero -> leds off */
	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
	lp55xx_write(chip, LP5521_REG_B_PWM, 0);

	/* Set engines are set to run state when OP_MODE enables engines */
	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
	if (ret)
		return ret;

	lp5521_wait_enable_done();

	return 0;
}

static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
{
	struct lp55xx_platform_data *pdata = chip->pdata;
	int ret;
	u8 status;

	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
	if (ret < 0)
		return ret;

	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
		return 0;

	/* Check that ext clock is really in use if requested */
	if  ((status & LP5521_EXT_CLK_USED) == 0)
		return -EIO;

	return 0;
}

static void lp5521_led_brightness_work(struct work_struct *work)
{
	struct lp55xx_led *led = container_of(work, struct lp55xx_led,
					      brightness_work);
	struct lp55xx_chip *chip = led->chip;

	mutex_lock(&chip->lock);
	lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
		led->brightness);
	mutex_unlock(&chip->lock);
}

static ssize_t show_engine_mode(struct device *dev,
				struct device_attribute *attr,
				char *buf, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;

	switch (mode) {
	case LP55XX_ENGINE_RUN:
		return sprintf(buf, "run\n");
	case LP55XX_ENGINE_LOAD:
		return sprintf(buf, "load\n");
	case LP55XX_ENGINE_DISABLED:
	default:
		return sprintf(buf, "disabled\n");
	}
}
show_mode(1)
show_mode(2)
show_mode(3)

static ssize_t store_engine_mode(struct device *dev,
				 struct device_attribute *attr,
				 const char *buf, size_t len, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	struct lp55xx_engine *engine = &chip->engines[nr - 1];

	mutex_lock(&chip->lock);

	chip->engine_idx = nr;

	if (!strncmp(buf, "run", 3)) {
		lp5521_run_engine(chip, true);
		engine->mode = LP55XX_ENGINE_RUN;
	} else if (!strncmp(buf, "load", 4)) {
		lp5521_stop_engine(chip);
		lp5521_load_engine(chip);
		engine->mode = LP55XX_ENGINE_LOAD;
	} else if (!strncmp(buf, "disabled", 8)) {
		lp5521_stop_engine(chip);
		engine->mode = LP55XX_ENGINE_DISABLED;
	}

	mutex_unlock(&chip->lock);

	return len;
}
store_mode(1)
store_mode(2)
store_mode(3)

static ssize_t store_engine_load(struct device *dev,
			     struct device_attribute *attr,
			     const char *buf, size_t len, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	int ret;

	mutex_lock(&chip->lock);

	chip->engine_idx = nr;
	lp5521_load_engine(chip);
	ret = lp5521_update_program_memory(chip, buf, len);

	mutex_unlock(&chip->lock);

	return ret;
}
store_load(1)
store_load(2)
store_load(3)

static ssize_t lp5521_selftest(struct device *dev,
			       struct device_attribute *attr,
			       char *buf)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	int ret;

	mutex_lock(&chip->lock);
	ret = lp5521_run_selftest(chip, buf);
	mutex_unlock(&chip->lock);

	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
}

/* device attributes */
static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);

static struct attribute *lp5521_attributes[] = {
	&dev_attr_engine1_mode.attr,
	&dev_attr_engine2_mode.attr,
	&dev_attr_engine3_mode.attr,
	&dev_attr_engine1_load.attr,
	&dev_attr_engine2_load.attr,
	&dev_attr_engine3_load.attr,
	&dev_attr_selftest.attr,
	NULL
};

static const struct attribute_group lp5521_group = {
	.attrs = lp5521_attributes,
};

/* Chip specific configurations */
static struct lp55xx_device_config lp5521_cfg = {
	.reset = {
		.addr = LP5521_REG_RESET,
		.val  = LP5521_RESET,
	},
	.enable = {
		.addr = LP5521_REG_ENABLE,
		.val  = LP5521_ENABLE_DEFAULT,
	},
	.max_channel  = LP5521_MAX_LEDS,
	.post_init_device   = lp5521_post_init_device,
	.brightness_work_fn = lp5521_led_brightness_work,
	.set_led_current    = lp5521_set_led_current,
	.firmware_cb        = lp5521_firmware_loaded,
	.run_engine         = lp5521_run_engine,
	.dev_attr_group     = &lp5521_group,
};

static int lp5521_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	int ret;
	struct lp55xx_chip *chip;
	struct lp55xx_led *led;
	struct lp55xx_platform_data *pdata;
	struct device_node *np = client->dev.of_node;

	if (!dev_get_platdata(&client->dev)) {
		if (np) {
			ret = lp55xx_of_populate_pdata(&client->dev, np);
			if (ret < 0)
				return ret;
		} else {
			dev_err(&client->dev, "no platform data\n");
			return -EINVAL;
		}
	}
	pdata = dev_get_platdata(&client->dev);

	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	led = devm_kzalloc(&client->dev,
			sizeof(*led) * pdata->num_channels, GFP_KERNEL);
	if (!led)
		return -ENOMEM;

	chip->cl = client;
	chip->pdata = pdata;
	chip->cfg = &lp5521_cfg;

	mutex_init(&chip->lock);

	i2c_set_clientdata(client, led);

	ret = lp55xx_init_device(chip);
	if (ret)
		goto err_init;

	dev_info(&client->dev, "%s programmable led chip found\n", id->name);

	ret = lp55xx_register_leds(led, chip);
	if (ret)
		goto err_register_leds;

	ret = lp55xx_register_sysfs(chip);
	if (ret) {
		dev_err(&client->dev, "registering sysfs failed\n");
		goto err_register_sysfs;
	}

	return 0;

err_register_sysfs:
	lp55xx_unregister_leds(led, chip);
err_register_leds:
	lp55xx_deinit_device(chip);
err_init:
	return ret;
}

static int lp5521_remove(struct i2c_client *client)
{
	struct lp55xx_led *led = i2c_get_clientdata(client);
	struct lp55xx_chip *chip = led->chip;

	lp5521_stop_all_engines(chip);
	lp55xx_unregister_sysfs(chip);
	lp55xx_unregister_leds(led, chip);
	lp55xx_deinit_device(chip);

	return 0;
}

static const struct i2c_device_id lp5521_id[] = {
	{ "lp5521", 0 }, /* Three channel chip */
	{ }
};
MODULE_DEVICE_TABLE(i2c, lp5521_id);

#ifdef CONFIG_OF
static const struct of_device_id of_lp5521_leds_match[] = {
	{ .compatible = "national,lp5521", },
	{},
};

MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
#endif
static struct i2c_driver lp5521_driver = {
	.driver = {
		.name	= "lp5521",
		.of_match_table = of_match_ptr(of_lp5521_leds_match),
	},
	.probe		= lp5521_probe,
	.remove		= lp5521_remove,
	.id_table	= lp5521_id,
};

module_i2c_driver(lp5521_driver);

MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
MODULE_DESCRIPTION("LP5521 LED engine");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
500fe141 SO	1	/*
	2	* LP5521 LED chip driver.
	3	*
	4	* Copyright (C) 2010 Nokia Corporation
a2387cb9	5	* Copyright (C) 2012 Texas Instruments
500fe141 SO	6	*
500fe141 SO	7	* Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
a2387cb9	8	* Milo(Woogyom) Kim <milo.kim@ti.com>
500fe141 SO	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* version 2 as published by the Free Software Foundation.
	13	*
	14	* This program is distributed in the hope that it will be useful, but
	15	* WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	17	* General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	22	* 02110-1301 USA
	23	*/
	24
500fe141	25	#include <linux/delay.h>
79bcc10b MWK	26	#include <linux/firmware.h>
	27	#include <linux/i2c.h>
	28	#include <linux/init.h>
500fe141	29	#include <linux/leds.h>
79bcc10b MWK	30	#include <linux/module.h>
79bcc10b MWK	31	#include <linux/mutex.h>
6a0c9a47	32	#include <linux/platform_data/leds-lp55xx.h>
79bcc10b	33	#include <linux/slab.h>
7542a04b	34	#include <linux/of.h>
6a0c9a47 MWK	35
6a0c9a47 MWK	36	#include "leds-lp55xx-common.h"
500fe141	37
12f022d2 MWK	38	#define LP5521_PROGRAM_LENGTH 32
	39	#define LP5521_MAX_LEDS 3
	40	#define LP5521_CMD_DIRECT 0x3F
500fe141 SO	41
	42	/* Registers */
	43	#define LP5521_REG_ENABLE 0x00
	44	#define LP5521_REG_OP_MODE 0x01
	45	#define LP5521_REG_R_PWM 0x02
	46	#define LP5521_REG_G_PWM 0x03
	47	#define LP5521_REG_B_PWM 0x04
	48	#define LP5521_REG_R_CURRENT 0x05
	49	#define LP5521_REG_G_CURRENT 0x06
	50	#define LP5521_REG_B_CURRENT 0x07
	51	#define LP5521_REG_CONFIG 0x08
500fe141 SO	52	#define LP5521_REG_STATUS 0x0C
500fe141 SO	53	#define LP5521_REG_RESET 0x0D
500fe141 SO	54	#define LP5521_REG_R_PROG_MEM 0x10
	55	#define LP5521_REG_G_PROG_MEM 0x30
	56	#define LP5521_REG_B_PROG_MEM 0x50
	57
500fe141 SO	58	/* Base register to set LED current */
500fe141 SO	59	#define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT
500fe141 SO	60	/* Base register to set the brightness */
	61	#define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM
	62
	63	/* Bits in ENABLE register */
	64	#define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */
	65	#define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */
	66	#define LP5521_EXEC_RUN 0x2A
32a2f747 KM	67	#define LP5521_ENABLE_DEFAULT \
	68	(LP5521_MASTER_ENABLE \| LP5521_LOGARITHMIC_PWM)
	69	#define LP5521_ENABLE_RUN_PROGRAM \
	70	(LP5521_ENABLE_DEFAULT \| LP5521_EXEC_RUN)
500fe141	71
81f2a5b4 KM	72	/* CONFIG register */
	73	#define LP5521_PWM_HF 0x40 /* PWM: 0 = 256Hz, 1 = 558Hz */
	74	#define LP5521_PWRSAVE_EN 0x20 /* 1 = Power save mode */
	75	#define LP5521_CP_MODE_OFF 0 /* Charge pump (CP) off */
	76	#define LP5521_CP_MODE_BYPASS 8 /* CP forced to bypass mode */
	77	#define LP5521_CP_MODE_1X5 0x10 /* CP forced to 1.5x mode */
	78	#define LP5521_CP_MODE_AUTO 0x18 /* Automatic mode selection */
	79	#define LP5521_R_TO_BATT 0x04 /* R out: 0 = CP, 1 = Vbat */
	80	#define LP5521_CLK_INT 0x01 /* Internal clock */
	81	#define LP5521_DEFAULT_CFG \
	82	(LP5521_PWM_HF \| LP5521_PWRSAVE_EN \| LP5521_CP_MODE_AUTO)
	83
500fe141 SO	84	/* Status */
	85	#define LP5521_EXT_CLK_USED 0x08
	86
b3c49c05 SK	87	/* default R channel current register value */
	88	#define LP5521_REG_R_CURR_DEFAULT 0xAF
	89
48068d5d MWK	90	/* Reset register value */
	91	#define LP5521_RESET 0xFF
	92
9ce7cb17 MWK	93	/* Program Memory Operations */
	94	#define LP5521_MODE_R_M 0x30 /* Operation Mode Register */
	95	#define LP5521_MODE_G_M 0x0C
	96	#define LP5521_MODE_B_M 0x03
	97	#define LP5521_LOAD_R 0x10
	98	#define LP5521_LOAD_G 0x04
	99	#define LP5521_LOAD_B 0x01
	100
	101	#define LP5521_R_IS_LOADING(mode) \
	102	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
	103	#define LP5521_G_IS_LOADING(mode) \
	104	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
	105	#define LP5521_B_IS_LOADING(mode) \
	106	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
	107
	108	#define LP5521_EXEC_R_M 0x30 /* Enable Register */
	109	#define LP5521_EXEC_G_M 0x0C
	110	#define LP5521_EXEC_B_M 0x03
	111	#define LP5521_EXEC_M 0x3F
	112	#define LP5521_RUN_R 0x20
	113	#define LP5521_RUN_G 0x08
	114	#define LP5521_RUN_B 0x02
500fe141	115
9ce7cb17 MWK	116	static inline void lp5521_wait_opmode_done(void)
	117	{
	118	/* operation mode change needs to be longer than 153 us */
	119	usleep_range(200, 300);
	120	}
	121
94482174 MWK	122	static inline void lp5521_wait_enable_done(void)
	123	{
	124	/* it takes more 488 us to update ENABLE register */
	125	usleep_range(500, 600);
	126	}
	127
a96bfa13 MWK	128	static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
	129	{
	130	led->led_current = led_current;
	131	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
	132	led_current);
	133	}
	134
9ce7cb17	135	static void lp5521_load_engine(struct lp55xx_chip *chip)
500fe141	136	{
9ce7cb17 MWK	137	enum lp55xx_engine_index idx = chip->engine_idx;
	138	u8 mask[] = {
	139	[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
	140	[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
	141	[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	142	};
500fe141	143
9ce7cb17 MWK	144	u8 val[] = {
	145	[LP55XX_ENGINE_1] = LP5521_LOAD_R,
	146	[LP55XX_ENGINE_2] = LP5521_LOAD_G,
	147	[LP55XX_ENGINE_3] = LP5521_LOAD_B,
	148	};
500fe141	149
9ce7cb17	150	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
500fe141	151
9ce7cb17 MWK	152	lp5521_wait_opmode_done();
9ce7cb17 MWK	153	}
500fe141	154
28c9266b	155	static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
9ce7cb17 MWK	156	{
	157	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
	158	lp5521_wait_opmode_done();
500fe141 SO	159	}
500fe141 SO	160
28c9266b MK	161	static void lp5521_stop_engine(struct lp55xx_chip *chip)
	162	{
	163	enum lp55xx_engine_index idx = chip->engine_idx;
	164	u8 mask[] = {
	165	[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
	166	[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
	167	[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	168	};
	169
	170	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);
	171
	172	lp5521_wait_opmode_done();
	173	}
	174
9ce7cb17	175	static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
500fe141	176	{
500fe141	177	int ret;
500fe141	178	u8 mode;
9ce7cb17	179	u8 exec;
500fe141	180
9ce7cb17 MWK	181	/* stop engine */
	182	if (!start) {
	183	lp5521_stop_engine(chip);
	184	lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
	185	lp5521_wait_opmode_done();
	186	return;
	187	}
	188
	189	/*
	190	* To run the engine,
	191	* operation mode and enable register should updated at the same time
	192	*/
	193
	194	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
5bc9ad77	195	if (ret)
9ce7cb17	196	return;
5bc9ad77	197
9ce7cb17	198	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
5bc9ad77	199	if (ret)
9ce7cb17 MWK	200	return;
	201
	202	/* change operation mode to RUN only when each engine is loading */
	203	if (LP5521_R_IS_LOADING(mode)) {
	204	mode = (mode & ~LP5521_MODE_R_M) \| LP5521_RUN_R;
	205	exec = (exec & ~LP5521_EXEC_R_M) \| LP5521_RUN_R;
	206	}
	207
	208	if (LP5521_G_IS_LOADING(mode)) {
	209	mode = (mode & ~LP5521_MODE_G_M) \| LP5521_RUN_G;
	210	exec = (exec & ~LP5521_EXEC_G_M) \| LP5521_RUN_G;
	211	}
	212
	213	if (LP5521_B_IS_LOADING(mode)) {
	214	mode = (mode & ~LP5521_MODE_B_M) \| LP5521_RUN_B;
	215	exec = (exec & ~LP5521_EXEC_B_M) \| LP5521_RUN_B;
	216	}
	217
	218	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
	219	lp5521_wait_opmode_done();
	220
	221	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
	222	lp5521_wait_enable_done();
	223	}
	224
	225	static int lp5521_update_program_memory(struct lp55xx_chip *chip,
	226	const u8 *data, size_t size)
	227	{
	228	enum lp55xx_engine_index idx = chip->engine_idx;
	229	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
	230	u8 addr[] = {
	231	[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
	232	[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
	233	[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
	234	};
	235	unsigned cmd;
	236	char c[3];
9ce7cb17	237	int nrchars;
9ce7cb17	238	int ret;
1eca0b3a MK	239	int offset = 0;
1eca0b3a MK	240	int i = 0;
9ce7cb17	241
9ce7cb17 MWK	242	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
	243	/* separate sscanfs because length is working only for %s */
	244	ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
	245	if (ret != 1)
	246	goto err;
	247
	248	ret = sscanf(c, "%2x", &cmd);
	249	if (ret != 1)
	250	goto err;
	251
	252	pattern[i] = (u8)cmd;
	253	offset += nrchars;
	254	i++;
	255	}
	256
	257	/* Each instruction is 16bit long. Check that length is even */
	258	if (i % 2)
	259	goto err;
	260
1eca0b3a	261	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
c0e5e9b5	262	ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
e70988d1	263	if (ret)
c0e5e9b5	264	return -EINVAL;
c0e5e9b5 MK	265	}
c0e5e9b5 MK	266
c0e5e9b5	267	return size;
9ce7cb17 MWK	268
	269	err:
	270	dev_err(&chip->cl->dev, "wrong pattern format\n");
	271	return -EINVAL;
	272	}
	273
	274	static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
	275	{
	276	const struct firmware *fw = chip->fw;
	277
	278	if (fw->size > LP5521_PROGRAM_LENGTH) {
	279	dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
	280	fw->size);
	281	return;
	282	}
500fe141	283
9ce7cb17 MWK	284	/*
	285	* Program momery sequence
	286	* 1) set engine mode to "LOAD"
	287	* 2) write firmware data into program memory
	288	*/
	289
	290	lp5521_load_engine(chip);
	291	lp5521_update_program_memory(chip, fw->data, fw->size);
500fe141 SO	292	}
500fe141 SO	293
ffbdccdb	294	static int lp5521_post_init_device(struct lp55xx_chip *chip)
500fe141	295	{
500fe141	296	int ret;
94482174	297	u8 val;
500fe141	298
94482174 MWK	299	/*
	300	* Make sure that the chip is reset by reading back the r channel
	301	* current reg. This is dummy read is required on some platforms -
	302	* otherwise further access to the R G B channels in the
	303	* LP5521_REG_ENABLE register will not have any effect - strange!
	304	*/
ffbdccdb	305	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
94482174	306	if (ret) {
ffbdccdb	307	dev_err(&chip->cl->dev, "error in resetting chip\n");
94482174 MWK	308	return ret;
	309	}
	310	if (val != LP5521_REG_R_CURR_DEFAULT) {
ffbdccdb	311	dev_err(&chip->cl->dev,
94482174 MWK	312	"unexpected data in register (expected 0x%x got 0x%x)\n",
	313	LP5521_REG_R_CURR_DEFAULT, val);
	314	ret = -EINVAL;
	315	return ret;
	316	}
	317	usleep_range(10000, 20000);
500fe141	318
500fe141	319	/* Set all PWMs to direct control mode */
ffbdccdb	320	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
500fe141	321
81f2a5b4 KM	322	/* Update configuration for the clock setting */
	323	val = LP5521_DEFAULT_CFG;
	324	if (!lp55xx_is_extclk_used(chip))
	325	val \|= LP5521_CLK_INT;
	326
ffbdccdb	327	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
94482174 MWK	328	if (ret)
94482174 MWK	329	return ret;
500fe141 SO	330
500fe141 SO	331	/* Initialize all channels PWM to zero -> leds off */
ffbdccdb MWK	332	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
	333	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
	334	lp55xx_write(chip, LP5521_REG_B_PWM, 0);
500fe141 SO	335
500fe141 SO	336	/* Set engines are set to run state when OP_MODE enables engines */
ffbdccdb	337	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
94482174 MWK	338	if (ret)
94482174 MWK	339	return ret;
500fe141	340
94482174 MWK	341	lp5521_wait_enable_done();
	342
	343	return 0;
500fe141 SO	344	}
500fe141 SO	345
9ca3bd80	346	static int lp5521_run_selftest(struct lp55xx_chip chip, char buf)
500fe141	347	{
9ca3bd80	348	struct lp55xx_platform_data *pdata = chip->pdata;
500fe141 SO	349	int ret;
	350	u8 status;
	351
9ca3bd80	352	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
500fe141 SO	353	if (ret < 0)
	354	return ret;
	355
9ca3bd80 MWK	356	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
	357	return 0;
	358
500fe141	359	/* Check that ext clock is really in use if requested */
9ca3bd80 MWK	360	if ((status & LP5521_EXT_CLK_USED) == 0)
	361	return -EIO;
	362
500fe141 SO	363	return 0;
	364	}
	365
500fe141 SO	366	static void lp5521_led_brightness_work(struct work_struct *work)
500fe141 SO	367	{
a6e4679a	368	struct lp55xx_led *led = container_of(work, struct lp55xx_led,
500fe141	369	brightness_work);
a6e4679a	370	struct lp55xx_chip *chip = led->chip;
500fe141 SO	371
500fe141 SO	372	mutex_lock(&chip->lock);
a6e4679a	373	lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
500fe141 SO	374	led->brightness);
	375	mutex_unlock(&chip->lock);
	376	}
	377
c0e5e9b5 MK	378	static ssize_t show_engine_mode(struct device *dev,
	379	struct device_attribute *attr,
	380	char *buf, int nr)
	381	{
	382	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	383	struct lp55xx_chip *chip = led->chip;
	384	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
	385
	386	switch (mode) {
	387	case LP55XX_ENGINE_RUN:
	388	return sprintf(buf, "run\n");
	389	case LP55XX_ENGINE_LOAD:
	390	return sprintf(buf, "load\n");
	391	case LP55XX_ENGINE_DISABLED:
	392	default:
	393	return sprintf(buf, "disabled\n");
	394	}
	395	}
	396	show_mode(1)
	397	show_mode(2)
	398	show_mode(3)
	399
	400	static ssize_t store_engine_mode(struct device *dev,
	401	struct device_attribute *attr,
	402	const char *buf, size_t len, int nr)
	403	{
	404	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	405	struct lp55xx_chip *chip = led->chip;
	406	struct lp55xx_engine *engine = &chip->engines[nr - 1];
	407
	408	mutex_lock(&chip->lock);
	409
	410	chip->engine_idx = nr;
	411
	412	if (!strncmp(buf, "run", 3)) {
	413	lp5521_run_engine(chip, true);
	414	engine->mode = LP55XX_ENGINE_RUN;
	415	} else if (!strncmp(buf, "load", 4)) {
	416	lp5521_stop_engine(chip);
	417	lp5521_load_engine(chip);
	418	engine->mode = LP55XX_ENGINE_LOAD;
	419	} else if (!strncmp(buf, "disabled", 8)) {
	420	lp5521_stop_engine(chip);
	421	engine->mode = LP55XX_ENGINE_DISABLED;
	422	}
	423
	424	mutex_unlock(&chip->lock);
	425
	426	return len;
	427	}
	428	store_mode(1)
	429	store_mode(2)
	430	store_mode(3)
	431
	432	static ssize_t store_engine_load(struct device *dev,
	433	struct device_attribute *attr,
	434	const char *buf, size_t len, int nr)
	435	{
	436	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	437	struct lp55xx_chip *chip = led->chip;
e70988d1	438	int ret;
c0e5e9b5 MK	439
	440	mutex_lock(&chip->lock);
	441
	442	chip->engine_idx = nr;
	443	lp5521_load_engine(chip);
e70988d1	444	ret = lp5521_update_program_memory(chip, buf, len);
c0e5e9b5 MK	445
	446	mutex_unlock(&chip->lock);
	447
e70988d1	448	return ret;
c0e5e9b5 MK	449	}
	450	store_load(1)
	451	store_load(2)
	452	store_load(3)
	453
500fe141 SO	454	static ssize_t lp5521_selftest(struct device *dev,
	455	struct device_attribute *attr,
	456	char *buf)
	457	{
9ca3bd80 MWK	458	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
9ca3bd80 MWK	459	struct lp55xx_chip *chip = led->chip;
500fe141 SO	460	int ret;
	461
	462	mutex_lock(&chip->lock);
	463	ret = lp5521_run_selftest(chip, buf);
	464	mutex_unlock(&chip->lock);
24d32128 KM	465
24d32128 KM	466	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
500fe141 SO	467	}
500fe141 SO	468
500fe141	469	/* device attributes */
c0e5e9b5 MK	470	static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
	471	static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
	472	static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
	473	static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
	474	static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
	475	static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
	476	static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
500fe141 SO	477
500fe141 SO	478	static struct attribute *lp5521_attributes[] = {
c0e5e9b5 MK	479	&dev_attr_engine1_mode.attr,
	480	&dev_attr_engine2_mode.attr,
	481	&dev_attr_engine3_mode.attr,
	482	&dev_attr_engine1_load.attr,
	483	&dev_attr_engine2_load.attr,
	484	&dev_attr_engine3_load.attr,
500fe141	485	&dev_attr_selftest.attr,
500fe141 SO	486	NULL
	487	};
	488
	489	static const struct attribute_group lp5521_group = {
	490	.attrs = lp5521_attributes,
	491	};
	492
48068d5d MWK	493	/* Chip specific configurations */
	494	static struct lp55xx_device_config lp5521_cfg = {
	495	.reset = {
	496	.addr = LP5521_REG_RESET,
	497	.val = LP5521_RESET,
	498	},
e3a700d8 MWK	499	.enable = {
	500	.addr = LP5521_REG_ENABLE,
	501	.val = LP5521_ENABLE_DEFAULT,
	502	},
0e202346	503	.max_channel = LP5521_MAX_LEDS,
ffbdccdb	504	.post_init_device = lp5521_post_init_device,
a6e4679a	505	.brightness_work_fn = lp5521_led_brightness_work,
a96bfa13	506	.set_led_current = lp5521_set_led_current,
9ce7cb17 MWK	507	.firmware_cb = lp5521_firmware_loaded,
9ce7cb17 MWK	508	.run_engine = lp5521_run_engine,
e73c0ce6	509	.dev_attr_group = &lp5521_group,
48068d5d MWK	510	};
48068d5d MWK	511
98ea1ea2	512	static int lp5521_probe(struct i2c_client *client,
500fe141 SO	513	const struct i2c_device_id *id)
500fe141 SO	514	{
1904f83d	515	int ret;
6a0c9a47 MWK	516	struct lp55xx_chip *chip;
6a0c9a47 MWK	517	struct lp55xx_led *led;
7542a04b LW	518	struct lp55xx_platform_data *pdata;
	519	struct device_node *np = client->dev.of_node;
	520
87aae1ea	521	if (!dev_get_platdata(&client->dev)) {
7542a04b LW	522	if (np) {
	523	ret = lp55xx_of_populate_pdata(&client->dev, np);
	524	if (ret < 0)
	525	return ret;
	526	} else {
	527	dev_err(&client->dev, "no platform data\n");
	528	return -EINVAL;
	529	}
500fe141	530	}
87aae1ea	531	pdata = dev_get_platdata(&client->dev);
500fe141	532
6a0c9a47 MWK	533	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
	534	if (!chip)
	535	return -ENOMEM;
	536
	537	led = devm_kzalloc(&client->dev,
	538	sizeof(led) pdata->num_channels, GFP_KERNEL);
	539	if (!led)
	540	return -ENOMEM;
	541
	542	chip->cl = client;
	543	chip->pdata = pdata;
48068d5d	544	chip->cfg = &lp5521_cfg;
6a0c9a47 MWK	545
6a0c9a47 MWK	546	mutex_init(&chip->lock);
500fe141	547
6a0c9a47	548	i2c_set_clientdata(client, led);
500fe141	549
22ebeb48	550	ret = lp55xx_init_device(chip);
944f7b1d	551	if (ret)
f6c64c6f	552	goto err_init;
500fe141 SO	553
	554	dev_info(&client->dev, "%s programmable led chip found\n", id->name);
	555
9e9b3db1	556	ret = lp55xx_register_leds(led, chip);
f6524808	557	if (ret)
9e9b3db1	558	goto err_register_leds;
500fe141	559
e73c0ce6	560	ret = lp55xx_register_sysfs(chip);
500fe141 SO	561	if (ret) {
500fe141 SO	562	dev_err(&client->dev, "registering sysfs failed\n");
e73c0ce6	563	goto err_register_sysfs;
500fe141	564	}
e73c0ce6 MWK	565
	566	return 0;
	567
	568	err_register_sysfs:
c3a68ebf	569	lp55xx_unregister_leds(led, chip);
9e9b3db1	570	err_register_leds:
6ce61762	571	lp55xx_deinit_device(chip);
f6c64c6f	572	err_init:
500fe141 SO	573	return ret;
	574	}
	575
678e8a6b	576	static int lp5521_remove(struct i2c_client *client)
500fe141	577	{
6ce61762 MWK	578	struct lp55xx_led *led = i2c_get_clientdata(client);
6ce61762 MWK	579	struct lp55xx_chip *chip = led->chip;
500fe141	580
28c9266b	581	lp5521_stop_all_engines(chip);
87cc4bde	582	lp55xx_unregister_sysfs(chip);
c3a68ebf	583	lp55xx_unregister_leds(led, chip);
6ce61762	584	lp55xx_deinit_device(chip);
500fe141	585
500fe141 SO	586	return 0;
	587	}
	588
	589	static const struct i2c_device_id lp5521_id[] = {
	590	{ "lp5521", 0 }, /* Three channel chip */
	591	{ }
	592	};
	593	MODULE_DEVICE_TABLE(i2c, lp5521_id);
	594
b548a34b AL	595	#ifdef CONFIG_OF
	596	static const struct of_device_id of_lp5521_leds_match[] = {
	597	{ .compatible = "national,lp5521", },
	598	{},
	599	};
	600
	601	MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
	602	#endif
500fe141 SO	603	static struct i2c_driver lp5521_driver = {
	604	.driver = {
	605	.name = "lp5521",
b548a34b	606	.of_match_table = of_match_ptr(of_lp5521_leds_match),
500fe141 SO	607	},
500fe141 SO	608	.probe = lp5521_probe,
df07cf81	609	.remove = lp5521_remove,
500fe141 SO	610	.id_table = lp5521_id,
	611	};
	612
09a0d183	613	module_i2c_driver(lp5521_driver);
500fe141 SO	614
500fe141 SO	615	MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
a2387cb9	616	MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
500fe141 SO	617	MODULE_DESCRIPTION("LP5521 LED engine");
500fe141 SO	618	MODULE_LICENSE("GPL v2");