phy: cleanup 10g code
[deliverable/linux.git] / drivers / leds / leds-lp5521.c
CommitLineData
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1/*
2 * LP5521 LED chip driver.
3 *
4 * Copyright (C) 2010 Nokia Corporation
a2387cb9 5 * Copyright (C) 2012 Texas Instruments
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6 *
7 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
a2387cb9 8 * Milo(Woogyom) Kim <milo.kim@ti.com>
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9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 */
24
500fe141 25#include <linux/delay.h>
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26#include <linux/firmware.h>
27#include <linux/i2c.h>
28#include <linux/init.h>
500fe141 29#include <linux/leds.h>
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30#include <linux/module.h>
31#include <linux/mutex.h>
6a0c9a47 32#include <linux/platform_data/leds-lp55xx.h>
79bcc10b 33#include <linux/slab.h>
7542a04b 34#include <linux/of.h>
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35
36#include "leds-lp55xx-common.h"
500fe141 37
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38#define LP5521_PROGRAM_LENGTH 32
39#define LP5521_MAX_LEDS 3
40#define LP5521_CMD_DIRECT 0x3F
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41
42/* Registers */
43#define LP5521_REG_ENABLE 0x00
44#define LP5521_REG_OP_MODE 0x01
45#define LP5521_REG_R_PWM 0x02
46#define LP5521_REG_G_PWM 0x03
47#define LP5521_REG_B_PWM 0x04
48#define LP5521_REG_R_CURRENT 0x05
49#define LP5521_REG_G_CURRENT 0x06
50#define LP5521_REG_B_CURRENT 0x07
51#define LP5521_REG_CONFIG 0x08
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52#define LP5521_REG_STATUS 0x0C
53#define LP5521_REG_RESET 0x0D
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54#define LP5521_REG_R_PROG_MEM 0x10
55#define LP5521_REG_G_PROG_MEM 0x30
56#define LP5521_REG_B_PROG_MEM 0x50
57
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58/* Base register to set LED current */
59#define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT
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60/* Base register to set the brightness */
61#define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM
62
63/* Bits in ENABLE register */
64#define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */
65#define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */
66#define LP5521_EXEC_RUN 0x2A
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67#define LP5521_ENABLE_DEFAULT \
68 (LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
69#define LP5521_ENABLE_RUN_PROGRAM \
70 (LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)
500fe141 71
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72/* CONFIG register */
73#define LP5521_PWM_HF 0x40 /* PWM: 0 = 256Hz, 1 = 558Hz */
74#define LP5521_PWRSAVE_EN 0x20 /* 1 = Power save mode */
75#define LP5521_CP_MODE_OFF 0 /* Charge pump (CP) off */
76#define LP5521_CP_MODE_BYPASS 8 /* CP forced to bypass mode */
77#define LP5521_CP_MODE_1X5 0x10 /* CP forced to 1.5x mode */
78#define LP5521_CP_MODE_AUTO 0x18 /* Automatic mode selection */
79#define LP5521_R_TO_BATT 0x04 /* R out: 0 = CP, 1 = Vbat */
80#define LP5521_CLK_INT 0x01 /* Internal clock */
81#define LP5521_DEFAULT_CFG \
82 (LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO)
83
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84/* Status */
85#define LP5521_EXT_CLK_USED 0x08
86
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87/* default R channel current register value */
88#define LP5521_REG_R_CURR_DEFAULT 0xAF
89
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90/* Reset register value */
91#define LP5521_RESET 0xFF
92
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93/* Program Memory Operations */
94#define LP5521_MODE_R_M 0x30 /* Operation Mode Register */
95#define LP5521_MODE_G_M 0x0C
96#define LP5521_MODE_B_M 0x03
97#define LP5521_LOAD_R 0x10
98#define LP5521_LOAD_G 0x04
99#define LP5521_LOAD_B 0x01
100
101#define LP5521_R_IS_LOADING(mode) \
102 ((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
103#define LP5521_G_IS_LOADING(mode) \
104 ((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
105#define LP5521_B_IS_LOADING(mode) \
106 ((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
107
108#define LP5521_EXEC_R_M 0x30 /* Enable Register */
109#define LP5521_EXEC_G_M 0x0C
110#define LP5521_EXEC_B_M 0x03
111#define LP5521_EXEC_M 0x3F
112#define LP5521_RUN_R 0x20
113#define LP5521_RUN_G 0x08
114#define LP5521_RUN_B 0x02
500fe141 115
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116static inline void lp5521_wait_opmode_done(void)
117{
118 /* operation mode change needs to be longer than 153 us */
119 usleep_range(200, 300);
120}
121
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122static inline void lp5521_wait_enable_done(void)
123{
124 /* it takes more 488 us to update ENABLE register */
125 usleep_range(500, 600);
126}
127
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128static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
129{
130 led->led_current = led_current;
131 lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
132 led_current);
133}
134
9ce7cb17 135static void lp5521_load_engine(struct lp55xx_chip *chip)
500fe141 136{
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137 enum lp55xx_engine_index idx = chip->engine_idx;
138 u8 mask[] = {
139 [LP55XX_ENGINE_1] = LP5521_MODE_R_M,
140 [LP55XX_ENGINE_2] = LP5521_MODE_G_M,
141 [LP55XX_ENGINE_3] = LP5521_MODE_B_M,
142 };
500fe141 143
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144 u8 val[] = {
145 [LP55XX_ENGINE_1] = LP5521_LOAD_R,
146 [LP55XX_ENGINE_2] = LP5521_LOAD_G,
147 [LP55XX_ENGINE_3] = LP5521_LOAD_B,
148 };
500fe141 149
9ce7cb17 150 lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
500fe141 151
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152 lp5521_wait_opmode_done();
153}
500fe141 154
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155static void lp5521_stop_engine(struct lp55xx_chip *chip)
156{
157 lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
158 lp5521_wait_opmode_done();
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159}
160
9ce7cb17 161static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
500fe141 162{
500fe141 163 int ret;
500fe141 164 u8 mode;
9ce7cb17 165 u8 exec;
500fe141 166
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167 /* stop engine */
168 if (!start) {
169 lp5521_stop_engine(chip);
170 lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
171 lp5521_wait_opmode_done();
172 return;
173 }
174
175 /*
176 * To run the engine,
177 * operation mode and enable register should updated at the same time
178 */
179
180 ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
5bc9ad77 181 if (ret)
9ce7cb17 182 return;
5bc9ad77 183
9ce7cb17 184 ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
5bc9ad77 185 if (ret)
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186 return;
187
188 /* change operation mode to RUN only when each engine is loading */
189 if (LP5521_R_IS_LOADING(mode)) {
190 mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
191 exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
192 }
193
194 if (LP5521_G_IS_LOADING(mode)) {
195 mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
196 exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
197 }
198
199 if (LP5521_B_IS_LOADING(mode)) {
200 mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
201 exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
202 }
203
204 lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
205 lp5521_wait_opmode_done();
206
207 lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
208 lp5521_wait_enable_done();
209}
210
211static int lp5521_update_program_memory(struct lp55xx_chip *chip,
212 const u8 *data, size_t size)
213{
214 enum lp55xx_engine_index idx = chip->engine_idx;
215 u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
216 u8 addr[] = {
217 [LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
218 [LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
219 [LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
220 };
221 unsigned cmd;
222 char c[3];
9ce7cb17 223 int nrchars;
9ce7cb17 224 int ret;
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225 int offset = 0;
226 int i = 0;
9ce7cb17 227
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228 while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
229 /* separate sscanfs because length is working only for %s */
230 ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
231 if (ret != 1)
232 goto err;
233
234 ret = sscanf(c, "%2x", &cmd);
235 if (ret != 1)
236 goto err;
237
238 pattern[i] = (u8)cmd;
239 offset += nrchars;
240 i++;
241 }
242
243 /* Each instruction is 16bit long. Check that length is even */
244 if (i % 2)
245 goto err;
246
1eca0b3a 247 for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
c0e5e9b5 248 ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
e70988d1 249 if (ret)
c0e5e9b5 250 return -EINVAL;
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251 }
252
c0e5e9b5 253 return size;
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254
255err:
256 dev_err(&chip->cl->dev, "wrong pattern format\n");
257 return -EINVAL;
258}
259
260static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
261{
262 const struct firmware *fw = chip->fw;
263
264 if (fw->size > LP5521_PROGRAM_LENGTH) {
265 dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
266 fw->size);
267 return;
268 }
500fe141 269
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270 /*
271 * Program momery sequence
272 * 1) set engine mode to "LOAD"
273 * 2) write firmware data into program memory
274 */
275
276 lp5521_load_engine(chip);
277 lp5521_update_program_memory(chip, fw->data, fw->size);
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SO
278}
279
ffbdccdb 280static int lp5521_post_init_device(struct lp55xx_chip *chip)
500fe141 281{
500fe141 282 int ret;
94482174 283 u8 val;
500fe141 284
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285 /*
286 * Make sure that the chip is reset by reading back the r channel
287 * current reg. This is dummy read is required on some platforms -
288 * otherwise further access to the R G B channels in the
289 * LP5521_REG_ENABLE register will not have any effect - strange!
290 */
ffbdccdb 291 ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
94482174 292 if (ret) {
ffbdccdb 293 dev_err(&chip->cl->dev, "error in resetting chip\n");
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294 return ret;
295 }
296 if (val != LP5521_REG_R_CURR_DEFAULT) {
ffbdccdb 297 dev_err(&chip->cl->dev,
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298 "unexpected data in register (expected 0x%x got 0x%x)\n",
299 LP5521_REG_R_CURR_DEFAULT, val);
300 ret = -EINVAL;
301 return ret;
302 }
303 usleep_range(10000, 20000);
500fe141 304
500fe141 305 /* Set all PWMs to direct control mode */
ffbdccdb 306 ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
500fe141 307
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308 /* Update configuration for the clock setting */
309 val = LP5521_DEFAULT_CFG;
310 if (!lp55xx_is_extclk_used(chip))
311 val |= LP5521_CLK_INT;
312
ffbdccdb 313 ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
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314 if (ret)
315 return ret;
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316
317 /* Initialize all channels PWM to zero -> leds off */
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318 lp55xx_write(chip, LP5521_REG_R_PWM, 0);
319 lp55xx_write(chip, LP5521_REG_G_PWM, 0);
320 lp55xx_write(chip, LP5521_REG_B_PWM, 0);
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321
322 /* Set engines are set to run state when OP_MODE enables engines */
ffbdccdb 323 ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
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324 if (ret)
325 return ret;
500fe141 326
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327 lp5521_wait_enable_done();
328
329 return 0;
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330}
331
9ca3bd80 332static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
500fe141 333{
9ca3bd80 334 struct lp55xx_platform_data *pdata = chip->pdata;
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SO
335 int ret;
336 u8 status;
337
9ca3bd80 338 ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
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339 if (ret < 0)
340 return ret;
341
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342 if (pdata->clock_mode != LP55XX_CLOCK_EXT)
343 return 0;
344
500fe141 345 /* Check that ext clock is really in use if requested */
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MWK
346 if ((status & LP5521_EXT_CLK_USED) == 0)
347 return -EIO;
348
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SO
349 return 0;
350}
351
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SO
352static void lp5521_led_brightness_work(struct work_struct *work)
353{
a6e4679a 354 struct lp55xx_led *led = container_of(work, struct lp55xx_led,
500fe141 355 brightness_work);
a6e4679a 356 struct lp55xx_chip *chip = led->chip;
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SO
357
358 mutex_lock(&chip->lock);
a6e4679a 359 lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
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SO
360 led->brightness);
361 mutex_unlock(&chip->lock);
362}
363
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364static ssize_t show_engine_mode(struct device *dev,
365 struct device_attribute *attr,
366 char *buf, int nr)
367{
368 struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
369 struct lp55xx_chip *chip = led->chip;
370 enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
371
372 switch (mode) {
373 case LP55XX_ENGINE_RUN:
374 return sprintf(buf, "run\n");
375 case LP55XX_ENGINE_LOAD:
376 return sprintf(buf, "load\n");
377 case LP55XX_ENGINE_DISABLED:
378 default:
379 return sprintf(buf, "disabled\n");
380 }
381}
382show_mode(1)
383show_mode(2)
384show_mode(3)
385
386static ssize_t store_engine_mode(struct device *dev,
387 struct device_attribute *attr,
388 const char *buf, size_t len, int nr)
389{
390 struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
391 struct lp55xx_chip *chip = led->chip;
392 struct lp55xx_engine *engine = &chip->engines[nr - 1];
393
394 mutex_lock(&chip->lock);
395
396 chip->engine_idx = nr;
397
398 if (!strncmp(buf, "run", 3)) {
399 lp5521_run_engine(chip, true);
400 engine->mode = LP55XX_ENGINE_RUN;
401 } else if (!strncmp(buf, "load", 4)) {
402 lp5521_stop_engine(chip);
403 lp5521_load_engine(chip);
404 engine->mode = LP55XX_ENGINE_LOAD;
405 } else if (!strncmp(buf, "disabled", 8)) {
406 lp5521_stop_engine(chip);
407 engine->mode = LP55XX_ENGINE_DISABLED;
408 }
409
410 mutex_unlock(&chip->lock);
411
412 return len;
413}
414store_mode(1)
415store_mode(2)
416store_mode(3)
417
418static ssize_t store_engine_load(struct device *dev,
419 struct device_attribute *attr,
420 const char *buf, size_t len, int nr)
421{
422 struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
423 struct lp55xx_chip *chip = led->chip;
e70988d1 424 int ret;
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425
426 mutex_lock(&chip->lock);
427
428 chip->engine_idx = nr;
429 lp5521_load_engine(chip);
e70988d1 430 ret = lp5521_update_program_memory(chip, buf, len);
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431
432 mutex_unlock(&chip->lock);
433
e70988d1 434 return ret;
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MK
435}
436store_load(1)
437store_load(2)
438store_load(3)
439
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SO
440static ssize_t lp5521_selftest(struct device *dev,
441 struct device_attribute *attr,
442 char *buf)
443{
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444 struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
445 struct lp55xx_chip *chip = led->chip;
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SO
446 int ret;
447
448 mutex_lock(&chip->lock);
449 ret = lp5521_run_selftest(chip, buf);
450 mutex_unlock(&chip->lock);
24d32128
KM
451
452 return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
500fe141
SO
453}
454
500fe141 455/* device attributes */
c0e5e9b5
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456static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
457static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
458static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
459static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
460static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
461static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
462static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
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SO
463
464static struct attribute *lp5521_attributes[] = {
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465 &dev_attr_engine1_mode.attr,
466 &dev_attr_engine2_mode.attr,
467 &dev_attr_engine3_mode.attr,
468 &dev_attr_engine1_load.attr,
469 &dev_attr_engine2_load.attr,
470 &dev_attr_engine3_load.attr,
500fe141 471 &dev_attr_selftest.attr,
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SO
472 NULL
473};
474
475static const struct attribute_group lp5521_group = {
476 .attrs = lp5521_attributes,
477};
478
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479/* Chip specific configurations */
480static struct lp55xx_device_config lp5521_cfg = {
481 .reset = {
482 .addr = LP5521_REG_RESET,
483 .val = LP5521_RESET,
484 },
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485 .enable = {
486 .addr = LP5521_REG_ENABLE,
487 .val = LP5521_ENABLE_DEFAULT,
488 },
0e202346 489 .max_channel = LP5521_MAX_LEDS,
ffbdccdb 490 .post_init_device = lp5521_post_init_device,
a6e4679a 491 .brightness_work_fn = lp5521_led_brightness_work,
a96bfa13 492 .set_led_current = lp5521_set_led_current,
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493 .firmware_cb = lp5521_firmware_loaded,
494 .run_engine = lp5521_run_engine,
e73c0ce6 495 .dev_attr_group = &lp5521_group,
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496};
497
98ea1ea2 498static int lp5521_probe(struct i2c_client *client,
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499 const struct i2c_device_id *id)
500{
1904f83d 501 int ret;
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MWK
502 struct lp55xx_chip *chip;
503 struct lp55xx_led *led;
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504 struct lp55xx_platform_data *pdata;
505 struct device_node *np = client->dev.of_node;
506
87aae1ea 507 if (!dev_get_platdata(&client->dev)) {
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LW
508 if (np) {
509 ret = lp55xx_of_populate_pdata(&client->dev, np);
510 if (ret < 0)
511 return ret;
512 } else {
513 dev_err(&client->dev, "no platform data\n");
514 return -EINVAL;
515 }
500fe141 516 }
87aae1ea 517 pdata = dev_get_platdata(&client->dev);
500fe141 518
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519 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
520 if (!chip)
521 return -ENOMEM;
522
523 led = devm_kzalloc(&client->dev,
524 sizeof(*led) * pdata->num_channels, GFP_KERNEL);
525 if (!led)
526 return -ENOMEM;
527
528 chip->cl = client;
529 chip->pdata = pdata;
48068d5d 530 chip->cfg = &lp5521_cfg;
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531
532 mutex_init(&chip->lock);
500fe141 533
6a0c9a47 534 i2c_set_clientdata(client, led);
500fe141 535
22ebeb48 536 ret = lp55xx_init_device(chip);
944f7b1d 537 if (ret)
f6c64c6f 538 goto err_init;
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SO
539
540 dev_info(&client->dev, "%s programmable led chip found\n", id->name);
541
9e9b3db1 542 ret = lp55xx_register_leds(led, chip);
f6524808 543 if (ret)
9e9b3db1 544 goto err_register_leds;
500fe141 545
e73c0ce6 546 ret = lp55xx_register_sysfs(chip);
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SO
547 if (ret) {
548 dev_err(&client->dev, "registering sysfs failed\n");
e73c0ce6 549 goto err_register_sysfs;
500fe141 550 }
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MWK
551
552 return 0;
553
554err_register_sysfs:
c3a68ebf 555 lp55xx_unregister_leds(led, chip);
9e9b3db1 556err_register_leds:
6ce61762 557 lp55xx_deinit_device(chip);
f6c64c6f 558err_init:
500fe141
SO
559 return ret;
560}
561
678e8a6b 562static int lp5521_remove(struct i2c_client *client)
500fe141 563{
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MWK
564 struct lp55xx_led *led = i2c_get_clientdata(client);
565 struct lp55xx_chip *chip = led->chip;
500fe141 566
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MWK
567 lp5521_stop_engine(chip);
568 lp55xx_unregister_sysfs(chip);
c3a68ebf 569 lp55xx_unregister_leds(led, chip);
6ce61762 570 lp55xx_deinit_device(chip);
500fe141 571
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SO
572 return 0;
573}
574
575static const struct i2c_device_id lp5521_id[] = {
576 { "lp5521", 0 }, /* Three channel chip */
577 { }
578};
579MODULE_DEVICE_TABLE(i2c, lp5521_id);
580
b548a34b
AL
581#ifdef CONFIG_OF
582static const struct of_device_id of_lp5521_leds_match[] = {
583 { .compatible = "national,lp5521", },
584 {},
585};
586
587MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
588#endif
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SO
589static struct i2c_driver lp5521_driver = {
590 .driver = {
591 .name = "lp5521",
b548a34b 592 .of_match_table = of_match_ptr(of_lp5521_leds_match),
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SO
593 },
594 .probe = lp5521_probe,
df07cf81 595 .remove = lp5521_remove,
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SO
596 .id_table = lp5521_id,
597};
598
09a0d183 599module_i2c_driver(lp5521_driver);
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SO
600
601MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
a2387cb9 602MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
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SO
603MODULE_DESCRIPTION("LP5521 LED engine");
604MODULE_LICENSE("GPL v2");
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