omapfb: add support for the OMAP2EVM LCD
[deliverable/linux.git] / drivers / lguest / page_tables.c
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1/*P:700
2 * The pagetable code, on the other hand, still shows the scars of
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3 * previous encounters. It's functional, and as neat as it can be in the
4 * circumstances, but be wary, for these things are subtle and break easily.
5 * The Guest provides a virtual to physical mapping, but we can neither trust
a6bd8e13 6 * it nor use it: we verify and convert it here then point the CPU to the
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7 * converted Guest pages when running the Guest.
8:*/
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9
10/* Copyright (C) Rusty Russell IBM Corporation 2006.
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11 * GPL v2 and any later version */
12#include <linux/mm.h>
13#include <linux/types.h>
14#include <linux/spinlock.h>
15#include <linux/random.h>
16#include <linux/percpu.h>
17#include <asm/tlbflush.h>
47436aa4 18#include <asm/uaccess.h>
58a24566 19#include <asm/bootparam.h>
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20#include "lg.h"
21
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22/*M:008
23 * We hold reference to pages, which prevents them from being swapped.
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24 * It'd be nice to have a callback in the "struct mm_struct" when Linux wants
25 * to swap out. If we had this, and a shrinker callback to trim PTE pages, we
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26 * could probably consider launching Guests as non-root.
27:*/
f56a384e 28
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29/*H:300
30 * The Page Table Code
31 *
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32 * We use two-level page tables for the Guest, or three-level with PAE. If
33 * you're not entirely comfortable with virtual addresses, physical addresses
34 * and page tables then I recommend you review arch/x86/lguest/boot.c's "Page
35 * Table Handling" (with diagrams!).
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36 *
37 * The Guest keeps page tables, but we maintain the actual ones here: these are
38 * called "shadow" page tables. Which is a very Guest-centric name: these are
39 * the real page tables the CPU uses, although we keep them up to date to
40 * reflect the Guest's. (See what I mean about weird naming? Since when do
41 * shadows reflect anything?)
42 *
43 * Anyway, this is the most complicated part of the Host code. There are seven
44 * parts to this:
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45 * (i) Looking up a page table entry when the Guest faults,
46 * (ii) Making sure the Guest stack is mapped,
47 * (iii) Setting up a page table entry when the Guest tells us one has changed,
bff672e6 48 * (iv) Switching page tables,
e1e72965 49 * (v) Flushing (throwing away) page tables,
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50 * (vi) Mapping the Switcher when the Guest is about to run,
51 * (vii) Setting up the page tables initially.
2e04ef76 52:*/
bff672e6 53
2e04ef76 54/*
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55 * The Switcher uses the complete top PTE page. That's 1024 PTE entries (4MB)
56 * or 512 PTE entries with PAE (2MB).
2e04ef76 57 */
df29f43e 58#define SWITCHER_PGD_INDEX (PTRS_PER_PGD - 1)
d7e28ffe 59
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60/*
61 * For PAE we need the PMD index as well. We use the last 2MB, so we
62 * will need the last pmd entry of the last pmd page.
63 */
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64#ifdef CONFIG_X86_PAE
65#define SWITCHER_PMD_INDEX (PTRS_PER_PMD - 1)
66#define RESERVE_MEM 2U
67#define CHECK_GPGD_MASK _PAGE_PRESENT
68#else
69#define RESERVE_MEM 4U
70#define CHECK_GPGD_MASK _PAGE_TABLE
71#endif
72
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73/*
74 * We actually need a separate PTE page for each CPU. Remember that after the
bff672e6 75 * Switcher code itself comes two pages for each CPU, and we don't want this
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76 * CPU's guest to see the pages of any other CPU.
77 */
df29f43e 78static DEFINE_PER_CPU(pte_t *, switcher_pte_pages);
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79#define switcher_pte_page(cpu) per_cpu(switcher_pte_pages, cpu)
80
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81/*H:320
82 * The page table code is curly enough to need helper functions to keep it
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83 * clear and clean. The kernel itself provides many of them; one advantage
84 * of insisting that the Guest and Host use the same CONFIG_PAE setting.
bff672e6 85 *
df29f43e 86 * There are two functions which return pointers to the shadow (aka "real")
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87 * page tables.
88 *
89 * spgd_addr() takes the virtual address and returns a pointer to the top-level
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90 * page directory entry (PGD) for that address. Since we keep track of several
91 * page tables, the "i" argument tells us which one we're interested in (it's
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92 * usually the current one).
93 */
382ac6b3 94static pgd_t *spgd_addr(struct lg_cpu *cpu, u32 i, unsigned long vaddr)
d7e28ffe 95{
df29f43e 96 unsigned int index = pgd_index(vaddr);
d7e28ffe 97
acdd0b62 98#ifndef CONFIG_X86_PAE
bff672e6 99 /* We kill any Guest trying to touch the Switcher addresses. */
d7e28ffe 100 if (index >= SWITCHER_PGD_INDEX) {
382ac6b3 101 kill_guest(cpu, "attempt to access switcher pages");
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102 index = 0;
103 }
acdd0b62 104#endif
bff672e6 105 /* Return a pointer index'th pgd entry for the i'th page table. */
382ac6b3 106 return &cpu->lg->pgdirs[i].pgdir[index];
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107}
108
acdd0b62 109#ifdef CONFIG_X86_PAE
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110/*
111 * This routine then takes the PGD entry given above, which contains the
acdd0b62 112 * address of the PMD page. It then returns a pointer to the PMD entry for the
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113 * given address.
114 */
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115static pmd_t *spmd_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr)
116{
117 unsigned int index = pmd_index(vaddr);
118 pmd_t *page;
119
120 /* We kill any Guest trying to touch the Switcher addresses. */
121 if (pgd_index(vaddr) == SWITCHER_PGD_INDEX &&
122 index >= SWITCHER_PMD_INDEX) {
123 kill_guest(cpu, "attempt to access switcher pages");
124 index = 0;
125 }
126
127 /* You should never call this if the PGD entry wasn't valid */
128 BUG_ON(!(pgd_flags(spgd) & _PAGE_PRESENT));
129 page = __va(pgd_pfn(spgd) << PAGE_SHIFT);
130
131 return &page[index];
132}
133#endif
134
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135/*
136 * This routine then takes the page directory entry returned above, which
e1e72965 137 * contains the address of the page table entry (PTE) page. It then returns a
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138 * pointer to the PTE entry for the given address.
139 */
acdd0b62 140static pte_t *spte_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr)
d7e28ffe 141{
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142#ifdef CONFIG_X86_PAE
143 pmd_t *pmd = spmd_addr(cpu, spgd, vaddr);
144 pte_t *page = __va(pmd_pfn(*pmd) << PAGE_SHIFT);
145
146 /* You should never call this if the PMD entry wasn't valid */
147 BUG_ON(!(pmd_flags(*pmd) & _PAGE_PRESENT));
148#else
df29f43e 149 pte_t *page = __va(pgd_pfn(spgd) << PAGE_SHIFT);
bff672e6 150 /* You should never call this if the PGD entry wasn't valid */
df29f43e 151 BUG_ON(!(pgd_flags(spgd) & _PAGE_PRESENT));
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152#endif
153
90603d15 154 return &page[pte_index(vaddr)];
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155}
156
2e04ef76 157/*
a91d74a3 158 * These functions are just like the above two, except they access the Guest
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159 * page tables. Hence they return a Guest address.
160 */
1713608f 161static unsigned long gpgd_addr(struct lg_cpu *cpu, unsigned long vaddr)
d7e28ffe 162{
df29f43e 163 unsigned int index = vaddr >> (PGDIR_SHIFT);
1713608f 164 return cpu->lg->pgdirs[cpu->cpu_pgd].gpgdir + index * sizeof(pgd_t);
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165}
166
acdd0b62 167#ifdef CONFIG_X86_PAE
a91d74a3 168/* Follow the PGD to the PMD. */
acdd0b62 169static unsigned long gpmd_addr(pgd_t gpgd, unsigned long vaddr)
d7e28ffe 170{
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171 unsigned long gpage = pgd_pfn(gpgd) << PAGE_SHIFT;
172 BUG_ON(!(pgd_flags(gpgd) & _PAGE_PRESENT));
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173 return gpage + pmd_index(vaddr) * sizeof(pmd_t);
174}
acdd0b62 175
a91d74a3 176/* Follow the PMD to the PTE. */
acdd0b62 177static unsigned long gpte_addr(struct lg_cpu *cpu,
92b4d8df 178 pmd_t gpmd, unsigned long vaddr)
acdd0b62 179{
92b4d8df 180 unsigned long gpage = pmd_pfn(gpmd) << PAGE_SHIFT;
acdd0b62 181
acdd0b62 182 BUG_ON(!(pmd_flags(gpmd) & _PAGE_PRESENT));
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183 return gpage + pte_index(vaddr) * sizeof(pte_t);
184}
acdd0b62 185#else
a91d74a3 186/* Follow the PGD to the PTE (no mid-level for !PAE). */
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187static unsigned long gpte_addr(struct lg_cpu *cpu,
188 pgd_t gpgd, unsigned long vaddr)
189{
190 unsigned long gpage = pgd_pfn(gpgd) << PAGE_SHIFT;
191
192 BUG_ON(!(pgd_flags(gpgd) & _PAGE_PRESENT));
90603d15 193 return gpage + pte_index(vaddr) * sizeof(pte_t);
d7e28ffe 194}
92b4d8df 195#endif
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196/*:*/
197
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198/*M:014
199 * get_pfn is slow: we could probably try to grab batches of pages here as
200 * an optimization (ie. pre-faulting).
201:*/
d7e28ffe 202
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203/*H:350
204 * This routine takes a page number given by the Guest and converts it to
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205 * an actual, physical page number. It can fail for several reasons: the
206 * virtual address might not be mapped by the Launcher, the write flag is set
207 * and the page is read-only, or the write flag was set and the page was
208 * shared so had to be copied, but we ran out of memory.
209 *
a6bd8e13 210 * This holds a reference to the page, so release_pte() is careful to put that
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211 * back.
212 */
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213static unsigned long get_pfn(unsigned long virtpfn, int write)
214{
215 struct page *page;
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216
217 /* gup me one page at this address please! */
218 if (get_user_pages_fast(virtpfn << PAGE_SHIFT, 1, write, &page) == 1)
219 return page_to_pfn(page);
220
bff672e6 221 /* This value indicates failure. */
71a3f4ed 222 return -1UL;
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223}
224
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225/*H:340
226 * Converting a Guest page table entry to a shadow (ie. real) page table
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227 * entry can be a little tricky. The flags are (almost) the same, but the
228 * Guest PTE contains a virtual page number: the CPU needs the real page
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229 * number.
230 */
382ac6b3 231static pte_t gpte_to_spte(struct lg_cpu *cpu, pte_t gpte, int write)
d7e28ffe 232{
df29f43e 233 unsigned long pfn, base, flags;
d7e28ffe 234
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235 /*
236 * The Guest sets the global flag, because it thinks that it is using
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237 * PGE. We only told it to use PGE so it would tell us whether it was
238 * flushing a kernel mapping or a userspace mapping. We don't actually
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239 * use the global bit, so throw it away.
240 */
df29f43e 241 flags = (pte_flags(gpte) & ~_PAGE_GLOBAL);
bff672e6 242
3c6b5bfa 243 /* The Guest's pages are offset inside the Launcher. */
382ac6b3 244 base = (unsigned long)cpu->lg->mem_base / PAGE_SIZE;
3c6b5bfa 245
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246 /*
247 * We need a temporary "unsigned long" variable to hold the answer from
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248 * get_pfn(), because it returns 0xFFFFFFFF on failure, which wouldn't
249 * fit in spte.pfn. get_pfn() finds the real physical number of the
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250 * page, given the virtual number.
251 */
df29f43e 252 pfn = get_pfn(base + pte_pfn(gpte), write);
d7e28ffe 253 if (pfn == -1UL) {
382ac6b3 254 kill_guest(cpu, "failed to get page %lu", pte_pfn(gpte));
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255 /*
256 * When we destroy the Guest, we'll go through the shadow page
bff672e6 257 * tables and release_pte() them. Make sure we don't think
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258 * this one is valid!
259 */
df29f43e 260 flags = 0;
d7e28ffe 261 }
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262 /* Now we assemble our shadow PTE from the page number and flags. */
263 return pfn_pte(pfn, __pgprot(flags));
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264}
265
bff672e6 266/*H:460 And to complete the chain, release_pte() looks like this: */
df29f43e 267static void release_pte(pte_t pte)
d7e28ffe 268{
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269 /*
270 * Remember that get_user_pages_fast() took a reference to the page, in
271 * get_pfn()? We have to put it back now.
272 */
df29f43e 273 if (pte_flags(pte) & _PAGE_PRESENT)
90603d15 274 put_page(pte_page(pte));
d7e28ffe 275}
bff672e6 276/*:*/
d7e28ffe 277
382ac6b3 278static void check_gpte(struct lg_cpu *cpu, pte_t gpte)
d7e28ffe 279{
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280 if ((pte_flags(gpte) & _PAGE_PSE) ||
281 pte_pfn(gpte) >= cpu->lg->pfn_limit)
382ac6b3 282 kill_guest(cpu, "bad page table entry");
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283}
284
382ac6b3 285static void check_gpgd(struct lg_cpu *cpu, pgd_t gpgd)
d7e28ffe 286{
acdd0b62 287 if ((pgd_flags(gpgd) & ~CHECK_GPGD_MASK) ||
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288 (pgd_pfn(gpgd) >= cpu->lg->pfn_limit))
289 kill_guest(cpu, "bad page directory entry");
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290}
291
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292#ifdef CONFIG_X86_PAE
293static void check_gpmd(struct lg_cpu *cpu, pmd_t gpmd)
294{
295 if ((pmd_flags(gpmd) & ~_PAGE_TABLE) ||
296 (pmd_pfn(gpmd) >= cpu->lg->pfn_limit))
297 kill_guest(cpu, "bad page middle directory entry");
298}
299#endif
300
bff672e6 301/*H:330
e1e72965 302 * (i) Looking up a page table entry when the Guest faults.
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303 *
304 * We saw this call in run_guest(): when we see a page fault in the Guest, we
305 * come here. That's because we only set up the shadow page tables lazily as
306 * they're needed, so we get page faults all the time and quietly fix them up
307 * and return to the Guest without it knowing.
308 *
309 * If we fixed up the fault (ie. we mapped the address), this routine returns
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310 * true. Otherwise, it was a real fault and we need to tell the Guest.
311 */
df1693ab 312bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
d7e28ffe 313{
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314 pgd_t gpgd;
315 pgd_t *spgd;
d7e28ffe 316 unsigned long gpte_ptr;
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317 pte_t gpte;
318 pte_t *spte;
d7e28ffe 319
a91d74a3 320 /* Mid level for PAE. */
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321#ifdef CONFIG_X86_PAE
322 pmd_t *spmd;
323 pmd_t gpmd;
324#endif
325
bff672e6 326 /* First step: get the top-level Guest page table entry. */
382ac6b3 327 gpgd = lgread(cpu, gpgd_addr(cpu, vaddr), pgd_t);
bff672e6 328 /* Toplevel not present? We can't map it in. */
df29f43e 329 if (!(pgd_flags(gpgd) & _PAGE_PRESENT))
df1693ab 330 return false;
d7e28ffe 331
bff672e6 332 /* Now look at the matching shadow entry. */
382ac6b3 333 spgd = spgd_addr(cpu, cpu->cpu_pgd, vaddr);
df29f43e 334 if (!(pgd_flags(*spgd) & _PAGE_PRESENT)) {
bff672e6 335 /* No shadow entry: allocate a new shadow PTE page. */
d7e28ffe 336 unsigned long ptepage = get_zeroed_page(GFP_KERNEL);
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337 /*
338 * This is not really the Guest's fault, but killing it is
339 * simple for this corner case.
340 */
d7e28ffe 341 if (!ptepage) {
382ac6b3 342 kill_guest(cpu, "out of memory allocating pte page");
df1693ab 343 return false;
d7e28ffe 344 }
bff672e6 345 /* We check that the Guest pgd is OK. */
382ac6b3 346 check_gpgd(cpu, gpgd);
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347 /*
348 * And we copy the flags to the shadow PGD entry. The page
349 * number in the shadow PGD is the page we just allocated.
350 */
acdd0b62 351 set_pgd(spgd, __pgd(__pa(ptepage) | pgd_flags(gpgd)));
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352 }
353
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354#ifdef CONFIG_X86_PAE
355 gpmd = lgread(cpu, gpmd_addr(gpgd, vaddr), pmd_t);
2e04ef76 356 /* Middle level not present? We can't map it in. */
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357 if (!(pmd_flags(gpmd) & _PAGE_PRESENT))
358 return false;
359
360 /* Now look at the matching shadow entry. */
361 spmd = spmd_addr(cpu, *spgd, vaddr);
362
363 if (!(pmd_flags(*spmd) & _PAGE_PRESENT)) {
364 /* No shadow entry: allocate a new shadow PTE page. */
365 unsigned long ptepage = get_zeroed_page(GFP_KERNEL);
366
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367 /*
368 * This is not really the Guest's fault, but killing it is
369 * simple for this corner case.
370 */
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371 if (!ptepage) {
372 kill_guest(cpu, "out of memory allocating pte page");
373 return false;
374 }
375
376 /* We check that the Guest pmd is OK. */
377 check_gpmd(cpu, gpmd);
378
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379 /*
380 * And we copy the flags to the shadow PMD entry. The page
381 * number in the shadow PMD is the page we just allocated.
382 */
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383 native_set_pmd(spmd, __pmd(__pa(ptepage) | pmd_flags(gpmd)));
384 }
92b4d8df 385
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386 /*
387 * OK, now we look at the lower level in the Guest page table: keep its
388 * address, because we might update it later.
389 */
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390 gpte_ptr = gpte_addr(cpu, gpmd, vaddr);
391#else
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392 /*
393 * OK, now we look at the lower level in the Guest page table: keep its
394 * address, because we might update it later.
395 */
acdd0b62 396 gpte_ptr = gpte_addr(cpu, gpgd, vaddr);
92b4d8df 397#endif
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398
399 /* Read the actual PTE value. */
382ac6b3 400 gpte = lgread(cpu, gpte_ptr, pte_t);
d7e28ffe 401
bff672e6 402 /* If this page isn't in the Guest page tables, we can't page it in. */
df29f43e 403 if (!(pte_flags(gpte) & _PAGE_PRESENT))
df1693ab 404 return false;
d7e28ffe 405
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406 /*
407 * Check they're not trying to write to a page the Guest wants
408 * read-only (bit 2 of errcode == write).
409 */
df29f43e 410 if ((errcode & 2) && !(pte_flags(gpte) & _PAGE_RW))
df1693ab 411 return false;
d7e28ffe 412
e1e72965 413 /* User access to a kernel-only page? (bit 3 == user access) */
df29f43e 414 if ((errcode & 4) && !(pte_flags(gpte) & _PAGE_USER))
df1693ab 415 return false;
d7e28ffe 416
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417 /*
418 * Check that the Guest PTE flags are OK, and the page number is below
419 * the pfn_limit (ie. not mapping the Launcher binary).
420 */
382ac6b3 421 check_gpte(cpu, gpte);
e1e72965 422
bff672e6 423 /* Add the _PAGE_ACCESSED and (for a write) _PAGE_DIRTY flag */
df29f43e 424 gpte = pte_mkyoung(gpte);
d7e28ffe 425 if (errcode & 2)
df29f43e 426 gpte = pte_mkdirty(gpte);
d7e28ffe 427
bff672e6 428 /* Get the pointer to the shadow PTE entry we're going to set. */
acdd0b62 429 spte = spte_addr(cpu, *spgd, vaddr);
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430
431 /*
432 * If there was a valid shadow PTE entry here before, we release it.
433 * This can happen with a write to a previously read-only entry.
434 */
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435 release_pte(*spte);
436
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437 /*
438 * If this is a write, we insist that the Guest page is writable (the
439 * final arg to gpte_to_spte()).
440 */
df29f43e 441 if (pte_dirty(gpte))
382ac6b3 442 *spte = gpte_to_spte(cpu, gpte, 1);
df29f43e 443 else
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444 /*
445 * If this is a read, don't set the "writable" bit in the page
bff672e6 446 * table entry, even if the Guest says it's writable. That way
e1e72965 447 * we will come back here when a write does actually occur, so
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448 * we can update the Guest's _PAGE_DIRTY flag.
449 */
90603d15 450 native_set_pte(spte, gpte_to_spte(cpu, pte_wrprotect(gpte), 0));
d7e28ffe 451
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452 /*
453 * Finally, we write the Guest PTE entry back: we've set the
454 * _PAGE_ACCESSED and maybe the _PAGE_DIRTY flags.
455 */
382ac6b3 456 lgwrite(cpu, gpte_ptr, pte_t, gpte);
bff672e6 457
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458 /*
459 * The fault is fixed, the page table is populated, the mapping
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460 * manipulated, the result returned and the code complete. A small
461 * delay and a trace of alliteration are the only indications the Guest
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462 * has that a page fault occurred at all.
463 */
df1693ab 464 return true;
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465}
466
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467/*H:360
468 * (ii) Making sure the Guest stack is mapped.
bff672e6 469 *
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470 * Remember that direct traps into the Guest need a mapped Guest kernel stack.
471 * pin_stack_pages() calls us here: we could simply call demand_page(), but as
472 * we've seen that logic is quite long, and usually the stack pages are already
473 * mapped, so it's overkill.
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474 *
475 * This is a quick version which answers the question: is this virtual address
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476 * mapped by the shadow page tables, and is it writable?
477 */
df1693ab 478static bool page_writable(struct lg_cpu *cpu, unsigned long vaddr)
d7e28ffe 479{
df29f43e 480 pgd_t *spgd;
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481 unsigned long flags;
482
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483#ifdef CONFIG_X86_PAE
484 pmd_t *spmd;
485#endif
e1e72965 486 /* Look at the current top level entry: is it present? */
382ac6b3 487 spgd = spgd_addr(cpu, cpu->cpu_pgd, vaddr);
df29f43e 488 if (!(pgd_flags(*spgd) & _PAGE_PRESENT))
df1693ab 489 return false;
d7e28ffe 490
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491#ifdef CONFIG_X86_PAE
492 spmd = spmd_addr(cpu, *spgd, vaddr);
493 if (!(pmd_flags(*spmd) & _PAGE_PRESENT))
494 return false;
495#endif
496
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497 /*
498 * Check the flags on the pte entry itself: it must be present and
499 * writable.
500 */
acdd0b62 501 flags = pte_flags(*(spte_addr(cpu, *spgd, vaddr)));
df29f43e 502
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503 return (flags & (_PAGE_PRESENT|_PAGE_RW)) == (_PAGE_PRESENT|_PAGE_RW);
504}
505
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506/*
507 * So, when pin_stack_pages() asks us to pin a page, we check if it's already
bff672e6 508 * in the page tables, and if not, we call demand_page() with error code 2
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509 * (meaning "write").
510 */
1713608f 511void pin_page(struct lg_cpu *cpu, unsigned long vaddr)
d7e28ffe 512{
1713608f 513 if (!page_writable(cpu, vaddr) && !demand_page(cpu, vaddr, 2))
382ac6b3 514 kill_guest(cpu, "bad stack page %#lx", vaddr);
d7e28ffe 515}
a91d74a3 516/*:*/
d7e28ffe 517
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518#ifdef CONFIG_X86_PAE
519static void release_pmd(pmd_t *spmd)
520{
521 /* If the entry's not present, there's nothing to release. */
522 if (pmd_flags(*spmd) & _PAGE_PRESENT) {
523 unsigned int i;
524 pte_t *ptepage = __va(pmd_pfn(*spmd) << PAGE_SHIFT);
525 /* For each entry in the page, we might need to release it. */
526 for (i = 0; i < PTRS_PER_PTE; i++)
527 release_pte(ptepage[i]);
528 /* Now we can free the page of PTEs */
529 free_page((long)ptepage);
530 /* And zero out the PMD entry so we never release it twice. */
531 native_set_pmd(spmd, __pmd(0));
532 }
533}
534
535static void release_pgd(pgd_t *spgd)
536{
537 /* If the entry's not present, there's nothing to release. */
538 if (pgd_flags(*spgd) & _PAGE_PRESENT) {
539 unsigned int i;
540 pmd_t *pmdpage = __va(pgd_pfn(*spgd) << PAGE_SHIFT);
541
542 for (i = 0; i < PTRS_PER_PMD; i++)
543 release_pmd(&pmdpage[i]);
544
545 /* Now we can free the page of PMDs */
546 free_page((long)pmdpage);
547 /* And zero out the PGD entry so we never release it twice. */
548 set_pgd(spgd, __pgd(0));
549 }
550}
551
552#else /* !CONFIG_X86_PAE */
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553/*H:450
554 * If we chase down the release_pgd() code, the non-PAE version looks like
555 * this. The PAE version is almost identical, but instead of calling
556 * release_pte it calls release_pmd(), which looks much like this.
557 */
90603d15 558static void release_pgd(pgd_t *spgd)
d7e28ffe 559{
bff672e6 560 /* If the entry's not present, there's nothing to release. */
df29f43e 561 if (pgd_flags(*spgd) & _PAGE_PRESENT) {
d7e28ffe 562 unsigned int i;
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563 /*
564 * Converting the pfn to find the actual PTE page is easy: turn
bff672e6 565 * the page number into a physical address, then convert to a
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566 * virtual address (easy for kernel pages like this one).
567 */
df29f43e 568 pte_t *ptepage = __va(pgd_pfn(*spgd) << PAGE_SHIFT);
bff672e6 569 /* For each entry in the page, we might need to release it. */
df29f43e 570 for (i = 0; i < PTRS_PER_PTE; i++)
d7e28ffe 571 release_pte(ptepage[i]);
bff672e6 572 /* Now we can free the page of PTEs */
d7e28ffe 573 free_page((long)ptepage);
e1e72965 574 /* And zero out the PGD entry so we never release it twice. */
df29f43e 575 *spgd = __pgd(0);
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576 }
577}
acdd0b62 578#endif
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579
580/*H:445
581 * We saw flush_user_mappings() twice: once from the flush_user_mappings()
e1e72965 582 * hypercall and once in new_pgdir() when we re-used a top-level pgdir page.
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583 * It simply releases every PTE page from 0 up to the Guest's kernel address.
584 */
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585static void flush_user_mappings(struct lguest *lg, int idx)
586{
587 unsigned int i;
bff672e6 588 /* Release every pgd entry up to the kernel's address. */
47436aa4 589 for (i = 0; i < pgd_index(lg->kernel_address); i++)
90603d15 590 release_pgd(lg->pgdirs[idx].pgdir + i);
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591}
592
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593/*H:440
594 * (v) Flushing (throwing away) page tables,
e1e72965
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595 *
596 * The Guest has a hypercall to throw away the page tables: it's used when a
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597 * large number of mappings have been changed.
598 */
1713608f 599void guest_pagetable_flush_user(struct lg_cpu *cpu)
d7e28ffe 600{
bff672e6 601 /* Drop the userspace part of the current page table. */
1713608f 602 flush_user_mappings(cpu->lg, cpu->cpu_pgd);
d7e28ffe 603}
bff672e6 604/*:*/
d7e28ffe 605
47436aa4 606/* We walk down the guest page tables to get a guest-physical address */
1713608f 607unsigned long guest_pa(struct lg_cpu *cpu, unsigned long vaddr)
47436aa4
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608{
609 pgd_t gpgd;
610 pte_t gpte;
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611#ifdef CONFIG_X86_PAE
612 pmd_t gpmd;
613#endif
47436aa4 614 /* First step: get the top-level Guest page table entry. */
382ac6b3 615 gpgd = lgread(cpu, gpgd_addr(cpu, vaddr), pgd_t);
47436aa4 616 /* Toplevel not present? We can't map it in. */
6afbdd05 617 if (!(pgd_flags(gpgd) & _PAGE_PRESENT)) {
382ac6b3 618 kill_guest(cpu, "Bad address %#lx", vaddr);
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619 return -1UL;
620 }
47436aa4 621
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622#ifdef CONFIG_X86_PAE
623 gpmd = lgread(cpu, gpmd_addr(gpgd, vaddr), pmd_t);
624 if (!(pmd_flags(gpmd) & _PAGE_PRESENT))
625 kill_guest(cpu, "Bad address %#lx", vaddr);
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626 gpte = lgread(cpu, gpte_addr(cpu, gpmd, vaddr), pte_t);
627#else
acdd0b62 628 gpte = lgread(cpu, gpte_addr(cpu, gpgd, vaddr), pte_t);
92b4d8df 629#endif
47436aa4 630 if (!(pte_flags(gpte) & _PAGE_PRESENT))
382ac6b3 631 kill_guest(cpu, "Bad address %#lx", vaddr);
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632
633 return pte_pfn(gpte) * PAGE_SIZE | (vaddr & ~PAGE_MASK);
634}
635
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636/*
637 * We keep several page tables. This is a simple routine to find the page
bff672e6 638 * table (if any) corresponding to this top-level address the Guest has given
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639 * us.
640 */
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641static unsigned int find_pgdir(struct lguest *lg, unsigned long pgtable)
642{
643 unsigned int i;
644 for (i = 0; i < ARRAY_SIZE(lg->pgdirs); i++)
4357bd94 645 if (lg->pgdirs[i].pgdir && lg->pgdirs[i].gpgdir == pgtable)
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646 break;
647 return i;
648}
649
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650/*H:435
651 * And this is us, creating the new page directory. If we really do
bff672e6 652 * allocate a new one (and so the kernel parts are not there), we set
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653 * blank_pgdir.
654 */
1713608f 655static unsigned int new_pgdir(struct lg_cpu *cpu,
ee3db0f2 656 unsigned long gpgdir,
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657 int *blank_pgdir)
658{
659 unsigned int next;
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660#ifdef CONFIG_X86_PAE
661 pmd_t *pmd_table;
662#endif
d7e28ffe 663
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664 /*
665 * We pick one entry at random to throw out. Choosing the Least
666 * Recently Used might be better, but this is easy.
667 */
382ac6b3 668 next = random32() % ARRAY_SIZE(cpu->lg->pgdirs);
bff672e6 669 /* If it's never been allocated at all before, try now. */
382ac6b3
GOC
670 if (!cpu->lg->pgdirs[next].pgdir) {
671 cpu->lg->pgdirs[next].pgdir =
672 (pgd_t *)get_zeroed_page(GFP_KERNEL);
bff672e6 673 /* If the allocation fails, just keep using the one we have */
382ac6b3 674 if (!cpu->lg->pgdirs[next].pgdir)
1713608f 675 next = cpu->cpu_pgd;
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676 else {
677#ifdef CONFIG_X86_PAE
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678 /*
679 * In PAE mode, allocate a pmd page and populate the
680 * last pgd entry.
681 */
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682 pmd_table = (pmd_t *)get_zeroed_page(GFP_KERNEL);
683 if (!pmd_table) {
684 free_page((long)cpu->lg->pgdirs[next].pgdir);
685 set_pgd(cpu->lg->pgdirs[next].pgdir, __pgd(0));
686 next = cpu->cpu_pgd;
687 } else {
688 set_pgd(cpu->lg->pgdirs[next].pgdir +
689 SWITCHER_PGD_INDEX,
690 __pgd(__pa(pmd_table) | _PAGE_PRESENT));
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691 /*
692 * This is a blank page, so there are no kernel
693 * mappings: caller must map the stack!
694 */
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695 *blank_pgdir = 1;
696 }
697#else
d7e28ffe 698 *blank_pgdir = 1;
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699#endif
700 }
d7e28ffe 701 }
bff672e6 702 /* Record which Guest toplevel this shadows. */
382ac6b3 703 cpu->lg->pgdirs[next].gpgdir = gpgdir;
d7e28ffe 704 /* Release all the non-kernel mappings. */
382ac6b3 705 flush_user_mappings(cpu->lg, next);
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706
707 return next;
708}
709
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710/*H:430
711 * (iv) Switching page tables
bff672e6 712 *
90603d15 713 * Now we've seen all the page table setting and manipulation, let's see
e1e72965 714 * what happens when the Guest changes page tables (ie. changes the top-level
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715 * pgdir). This occurs on almost every context switch.
716 */
4665ac8e 717void guest_new_pagetable(struct lg_cpu *cpu, unsigned long pgtable)
d7e28ffe
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718{
719 int newpgdir, repin = 0;
720
bff672e6 721 /* Look to see if we have this one already. */
382ac6b3 722 newpgdir = find_pgdir(cpu->lg, pgtable);
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723 /*
724 * If not, we allocate or mug an existing one: if it's a fresh one,
725 * repin gets set to 1.
726 */
382ac6b3 727 if (newpgdir == ARRAY_SIZE(cpu->lg->pgdirs))
1713608f 728 newpgdir = new_pgdir(cpu, pgtable, &repin);
bff672e6 729 /* Change the current pgd index to the new one. */
1713608f 730 cpu->cpu_pgd = newpgdir;
bff672e6 731 /* If it was completely blank, we map in the Guest kernel stack */
d7e28ffe 732 if (repin)
4665ac8e 733 pin_stack_pages(cpu);
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734}
735
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736/*H:470
737 * Finally, a routine which throws away everything: all PGD entries in all
e1e72965 738 * the shadow page tables, including the Guest's kernel mappings. This is used
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739 * when we destroy the Guest.
740 */
d7e28ffe
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741static void release_all_pagetables(struct lguest *lg)
742{
743 unsigned int i, j;
744
bff672e6 745 /* Every shadow pagetable this Guest has */
d7e28ffe 746 for (i = 0; i < ARRAY_SIZE(lg->pgdirs); i++)
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747 if (lg->pgdirs[i].pgdir) {
748#ifdef CONFIG_X86_PAE
749 pgd_t *spgd;
750 pmd_t *pmdpage;
751 unsigned int k;
752
753 /* Get the last pmd page. */
754 spgd = lg->pgdirs[i].pgdir + SWITCHER_PGD_INDEX;
755 pmdpage = __va(pgd_pfn(*spgd) << PAGE_SHIFT);
756
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757 /*
758 * And release the pmd entries of that pmd page,
759 * except for the switcher pmd.
760 */
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761 for (k = 0; k < SWITCHER_PMD_INDEX; k++)
762 release_pmd(&pmdpage[k]);
763#endif
bff672e6 764 /* Every PGD entry except the Switcher at the top */
d7e28ffe 765 for (j = 0; j < SWITCHER_PGD_INDEX; j++)
90603d15 766 release_pgd(lg->pgdirs[i].pgdir + j);
acdd0b62 767 }
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768}
769
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770/*
771 * We also throw away everything when a Guest tells us it's changed a kernel
bff672e6 772 * mapping. Since kernel mappings are in every page table, it's easiest to
e1e72965 773 * throw them all away. This traps the Guest in amber for a while as
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774 * everything faults back in, but it's rare.
775 */
4665ac8e 776void guest_pagetable_clear_all(struct lg_cpu *cpu)
d7e28ffe 777{
4665ac8e 778 release_all_pagetables(cpu->lg);
bff672e6 779 /* We need the Guest kernel stack mapped again. */
4665ac8e 780 pin_stack_pages(cpu);
d7e28ffe 781}
e1e72965 782/*:*/
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783
784/*M:009
785 * Since we throw away all mappings when a kernel mapping changes, our
e1e72965
RR
786 * performance sucks for guests using highmem. In fact, a guest with
787 * PAGE_OFFSET 0xc0000000 (the default) and more than about 700MB of RAM is
788 * usually slower than a Guest with less memory.
789 *
790 * This, of course, cannot be fixed. It would take some kind of... well, I
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791 * don't know, but the term "puissant code-fu" comes to mind.
792:*/
d7e28ffe 793
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794/*H:420
795 * This is the routine which actually sets the page table entry for then
bff672e6
RR
796 * "idx"'th shadow page table.
797 *
798 * Normally, we can just throw out the old entry and replace it with 0: if they
799 * use it demand_page() will put the new entry in. We need to do this anyway:
800 * The Guest expects _PAGE_ACCESSED to be set on its PTE the first time a page
801 * is read from, and _PAGE_DIRTY when it's written to.
802 *
803 * But Avi Kivity pointed out that most Operating Systems (Linux included) set
804 * these bits on PTEs immediately anyway. This is done to save the CPU from
805 * having to update them, but it helps us the same way: if they set
806 * _PAGE_ACCESSED then we can put a read-only PTE entry in immediately, and if
807 * they set _PAGE_DIRTY then we can put a writable PTE entry in immediately.
808 */
382ac6b3 809static void do_set_pte(struct lg_cpu *cpu, int idx,
df29f43e 810 unsigned long vaddr, pte_t gpte)
d7e28ffe 811{
e1e72965 812 /* Look up the matching shadow page directory entry. */
382ac6b3 813 pgd_t *spgd = spgd_addr(cpu, idx, vaddr);
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814#ifdef CONFIG_X86_PAE
815 pmd_t *spmd;
816#endif
bff672e6
RR
817
818 /* If the top level isn't present, there's no entry to update. */
df29f43e 819 if (pgd_flags(*spgd) & _PAGE_PRESENT) {
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820#ifdef CONFIG_X86_PAE
821 spmd = spmd_addr(cpu, *spgd, vaddr);
822 if (pmd_flags(*spmd) & _PAGE_PRESENT) {
823#endif
2e04ef76 824 /* Otherwise, start by releasing the existing entry. */
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825 pte_t *spte = spte_addr(cpu, *spgd, vaddr);
826 release_pte(*spte);
827
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828 /*
829 * If they're setting this entry as dirty or accessed,
830 * we might as well put that entry they've given us in
831 * now. This shaves 10% off a copy-on-write
832 * micro-benchmark.
833 */
acdd0b62
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834 if (pte_flags(gpte) & (_PAGE_DIRTY | _PAGE_ACCESSED)) {
835 check_gpte(cpu, gpte);
836 native_set_pte(spte,
837 gpte_to_spte(cpu, gpte,
838 pte_flags(gpte) & _PAGE_DIRTY));
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839 } else {
840 /*
841 * Otherwise kill it and we can demand_page()
842 * it in later.
843 */
acdd0b62 844 native_set_pte(spte, __pte(0));
2e04ef76 845 }
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846#ifdef CONFIG_X86_PAE
847 }
848#endif
d7e28ffe
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849 }
850}
851
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852/*H:410
853 * Updating a PTE entry is a little trickier.
bff672e6
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854 *
855 * We keep track of several different page tables (the Guest uses one for each
856 * process, so it makes sense to cache at least a few). Each of these have
857 * identical kernel parts: ie. every mapping above PAGE_OFFSET is the same for
858 * all processes. So when the page table above that address changes, we update
859 * all the page tables, not just the current one. This is rare.
860 *
a6bd8e13 861 * The benefit is that when we have to track a new page table, we can keep all
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862 * the kernel mappings. This speeds up context switch immensely.
863 */
382ac6b3 864void guest_set_pte(struct lg_cpu *cpu,
ee3db0f2 865 unsigned long gpgdir, unsigned long vaddr, pte_t gpte)
d7e28ffe 866{
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867 /*
868 * Kernel mappings must be changed on all top levels. Slow, but doesn't
869 * happen often.
870 */
382ac6b3 871 if (vaddr >= cpu->lg->kernel_address) {
d7e28ffe 872 unsigned int i;
382ac6b3
GOC
873 for (i = 0; i < ARRAY_SIZE(cpu->lg->pgdirs); i++)
874 if (cpu->lg->pgdirs[i].pgdir)
875 do_set_pte(cpu, i, vaddr, gpte);
d7e28ffe 876 } else {
bff672e6 877 /* Is this page table one we have a shadow for? */
382ac6b3
GOC
878 int pgdir = find_pgdir(cpu->lg, gpgdir);
879 if (pgdir != ARRAY_SIZE(cpu->lg->pgdirs))
bff672e6 880 /* If so, do the update. */
382ac6b3 881 do_set_pte(cpu, pgdir, vaddr, gpte);
d7e28ffe
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882 }
883}
884
bff672e6 885/*H:400
e1e72965 886 * (iii) Setting up a page table entry when the Guest tells us one has changed.
bff672e6
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887 *
888 * Just like we did in interrupts_and_traps.c, it makes sense for us to deal
889 * with the other side of page tables while we're here: what happens when the
890 * Guest asks for a page table to be updated?
891 *
892 * We already saw that demand_page() will fill in the shadow page tables when
893 * needed, so we can simply remove shadow page table entries whenever the Guest
894 * tells us they've changed. When the Guest tries to use the new entry it will
895 * fault and demand_page() will fix it up.
896 *
fd589a8f 897 * So with that in mind here's our code to update a (top-level) PGD entry:
bff672e6 898 */
ebe0ba84 899void guest_set_pgd(struct lguest *lg, unsigned long gpgdir, u32 idx)
d7e28ffe
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900{
901 int pgdir;
902
903 if (idx >= SWITCHER_PGD_INDEX)
904 return;
905
bff672e6 906 /* If they're talking about a page table we have a shadow for... */
ee3db0f2 907 pgdir = find_pgdir(lg, gpgdir);
d7e28ffe 908 if (pgdir < ARRAY_SIZE(lg->pgdirs))
bff672e6 909 /* ... throw it away. */
90603d15 910 release_pgd(lg->pgdirs[pgdir].pgdir + idx);
d7e28ffe 911}
a91d74a3 912
acdd0b62 913#ifdef CONFIG_X86_PAE
a91d74a3 914/* For setting a mid-level, we just throw everything away. It's easy. */
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915void guest_set_pmd(struct lguest *lg, unsigned long pmdp, u32 idx)
916{
917 guest_pagetable_clear_all(&lg->cpus[0]);
918}
919#endif
d7e28ffe 920
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921/*H:505
922 * To get through boot, we construct simple identity page mappings (which
2e04ef76 923 * set virtual == physical) and linear mappings which will get the Guest far
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924 * enough into the boot to create its own. The linear mapping means we
925 * simplify the Guest boot, but it makes assumptions about their PAGE_OFFSET,
926 * as you'll see.
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927 *
928 * We lay them out of the way, just below the initrd (which is why we need to
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929 * know its size here).
930 */
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931static unsigned long setup_pagetables(struct lguest *lg,
932 unsigned long mem,
933 unsigned long initrd_size)
934{
935 pgd_t __user *pgdir;
936 pte_t __user *linear;
58a24566 937 unsigned long mem_base = (unsigned long)lg->mem_base;
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938 unsigned int mapped_pages, i, linear_pages;
939#ifdef CONFIG_X86_PAE
940 pmd_t __user *pmds;
941 unsigned int j;
942 pgd_t pgd;
943 pmd_t pmd;
944#else
945 unsigned int phys_linear;
946#endif
58a24566 947
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948 /*
949 * We have mapped_pages frames to map, so we need linear_pages page
950 * tables to map them.
951 */
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952 mapped_pages = mem / PAGE_SIZE;
953 linear_pages = (mapped_pages + PTRS_PER_PTE - 1) / PTRS_PER_PTE;
954
955 /* We put the toplevel page directory page at the top of memory. */
956 pgdir = (pgd_t *)(mem + mem_base - initrd_size - PAGE_SIZE);
957
958 /* Now we use the next linear_pages pages as pte pages */
959 linear = (void *)pgdir - linear_pages * PAGE_SIZE;
960
acdd0b62 961#ifdef CONFIG_X86_PAE
a91d74a3
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962 /*
963 * And the single mid page goes below that. We only use one, but
964 * that's enough to map 1G, which definitely gets us through boot.
965 */
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966 pmds = (void *)linear - PAGE_SIZE;
967#endif
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968 /*
969 * Linear mapping is easy: put every page's address into the
970 * mapping in order.
971 */
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972 for (i = 0; i < mapped_pages; i++) {
973 pte_t pte;
974 pte = pfn_pte(i, __pgprot(_PAGE_PRESENT|_PAGE_RW|_PAGE_USER));
975 if (copy_to_user(&linear[i], &pte, sizeof(pte)) != 0)
976 return -EFAULT;
977 }
978
a91d74a3 979#ifdef CONFIG_X86_PAE
2e04ef76 980 /*
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RR
981 * Make the Guest PMD entries point to the corresponding place in the
982 * linear mapping (up to one page worth of PMD).
2e04ef76 983 */
92b4d8df 984 for (i = j = 0; i < mapped_pages && j < PTRS_PER_PMD;
acdd0b62 985 i += PTRS_PER_PTE, j++) {
a91d74a3 986 /* FIXME: native_set_pmd is overkill here. */
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987 native_set_pmd(&pmd, __pmd(((unsigned long)(linear + i)
988 - mem_base) | _PAGE_PRESENT | _PAGE_RW | _PAGE_USER));
989
990 if (copy_to_user(&pmds[j], &pmd, sizeof(pmd)) != 0)
991 return -EFAULT;
992 }
993
a91d74a3 994 /* One PGD entry, pointing to that PMD page. */
acdd0b62 995 set_pgd(&pgd, __pgd(((u32)pmds - mem_base) | _PAGE_PRESENT));
a91d74a3 996 /* Copy it in as the first PGD entry (ie. addresses 0-1G). */
acdd0b62
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997 if (copy_to_user(&pgdir[0], &pgd, sizeof(pgd)) != 0)
998 return -EFAULT;
a91d74a3
RR
999 /*
1000 * And the third PGD entry (ie. addresses 3G-4G).
1001 *
1002 * FIXME: This assumes that PAGE_OFFSET for the Guest is 0xC0000000.
1003 */
acdd0b62
MZ
1004 if (copy_to_user(&pgdir[3], &pgd, sizeof(pgd)) != 0)
1005 return -EFAULT;
1006#else
a91d74a3
RR
1007 /*
1008 * The top level points to the linear page table pages above.
1009 * We setup the identity and linear mappings here.
1010 */
58a24566
MZ
1011 phys_linear = (unsigned long)linear - mem_base;
1012 for (i = 0; i < mapped_pages; i += PTRS_PER_PTE) {
1013 pgd_t pgd;
a91d74a3
RR
1014 /*
1015 * Create a PGD entry which points to the right part of the
1016 * linear PTE pages.
1017 */
58a24566
MZ
1018 pgd = __pgd((phys_linear + i * sizeof(pte_t)) |
1019 (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER));
1020
a91d74a3
RR
1021 /*
1022 * Copy it into the PGD page at 0 and PAGE_OFFSET.
1023 */
58a24566
MZ
1024 if (copy_to_user(&pgdir[i / PTRS_PER_PTE], &pgd, sizeof(pgd))
1025 || copy_to_user(&pgdir[pgd_index(PAGE_OFFSET)
1026 + i / PTRS_PER_PTE],
1027 &pgd, sizeof(pgd)))
1028 return -EFAULT;
1029 }
acdd0b62 1030#endif
58a24566 1031
2e04ef76 1032 /*
a91d74a3
RR
1033 * We return the top level (guest-physical) address: we remember where
1034 * this is to write it into lguest_data when the Guest initializes.
2e04ef76 1035 */
58a24566
MZ
1036 return (unsigned long)pgdir - mem_base;
1037}
1038
2e04ef76
RR
1039/*H:500
1040 * (vii) Setting up the page tables initially.
bff672e6
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1041 *
1042 * When a Guest is first created, the Launcher tells us where the toplevel of
2e04ef76
RR
1043 * its first page table is. We set some things up here:
1044 */
58a24566 1045int init_guest_pagetable(struct lguest *lg)
d7e28ffe 1046{
58a24566
MZ
1047 u64 mem;
1048 u32 initrd_size;
1049 struct boot_params __user *boot = (struct boot_params *)lg->mem_base;
acdd0b62
MZ
1050#ifdef CONFIG_X86_PAE
1051 pgd_t *pgd;
1052 pmd_t *pmd_table;
1053#endif
2e04ef76
RR
1054 /*
1055 * Get the Guest memory size and the ramdisk size from the boot header
1056 * located at lg->mem_base (Guest address 0).
1057 */
58a24566
MZ
1058 if (copy_from_user(&mem, &boot->e820_map[0].size, sizeof(mem))
1059 || get_user(initrd_size, &boot->hdr.ramdisk_size))
1060 return -EFAULT;
1061
2e04ef76
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1062 /*
1063 * We start on the first shadow page table, and give it a blank PGD
1064 * page.
1065 */
58a24566
MZ
1066 lg->pgdirs[0].gpgdir = setup_pagetables(lg, mem, initrd_size);
1067 if (IS_ERR_VALUE(lg->pgdirs[0].gpgdir))
1068 return lg->pgdirs[0].gpgdir;
1713608f
GOC
1069 lg->pgdirs[0].pgdir = (pgd_t *)get_zeroed_page(GFP_KERNEL);
1070 if (!lg->pgdirs[0].pgdir)
d7e28ffe 1071 return -ENOMEM;
a91d74a3 1072
acdd0b62 1073#ifdef CONFIG_X86_PAE
a91d74a3 1074 /* For PAE, we also create the initial mid-level. */
acdd0b62
MZ
1075 pgd = lg->pgdirs[0].pgdir;
1076 pmd_table = (pmd_t *) get_zeroed_page(GFP_KERNEL);
1077 if (!pmd_table)
1078 return -ENOMEM;
1079
1080 set_pgd(pgd + SWITCHER_PGD_INDEX,
1081 __pgd(__pa(pmd_table) | _PAGE_PRESENT));
1082#endif
a91d74a3
RR
1083
1084 /* This is the current page table. */
1713608f 1085 lg->cpus[0].cpu_pgd = 0;
d7e28ffe
RR
1086 return 0;
1087}
1088
a91d74a3 1089/*H:508 When the Guest calls LHCALL_LGUEST_INIT we do more setup. */
382ac6b3 1090void page_table_guest_data_init(struct lg_cpu *cpu)
47436aa4
RR
1091{
1092 /* We get the kernel address: above this is all kernel memory. */
382ac6b3 1093 if (get_user(cpu->lg->kernel_address,
acdd0b62 1094 &cpu->lg->lguest_data->kernel_address)
2e04ef76
RR
1095 /*
1096 * We tell the Guest that it can't use the top 2 or 4 MB
1097 * of virtual addresses used by the Switcher.
1098 */
acdd0b62
MZ
1099 || put_user(RESERVE_MEM * 1024 * 1024,
1100 &cpu->lg->lguest_data->reserve_mem)
1101 || put_user(cpu->lg->pgdirs[0].gpgdir,
1102 &cpu->lg->lguest_data->pgdir))
382ac6b3 1103 kill_guest(cpu, "bad guest page %p", cpu->lg->lguest_data);
47436aa4 1104
2e04ef76
RR
1105 /*
1106 * In flush_user_mappings() we loop from 0 to
47436aa4 1107 * "pgd_index(lg->kernel_address)". This assumes it won't hit the
2e04ef76
RR
1108 * Switcher mappings, so check that now.
1109 */
acdd0b62
MZ
1110#ifdef CONFIG_X86_PAE
1111 if (pgd_index(cpu->lg->kernel_address) == SWITCHER_PGD_INDEX &&
1112 pmd_index(cpu->lg->kernel_address) == SWITCHER_PMD_INDEX)
1113#else
382ac6b3 1114 if (pgd_index(cpu->lg->kernel_address) >= SWITCHER_PGD_INDEX)
acdd0b62 1115#endif
382ac6b3
GOC
1116 kill_guest(cpu, "bad kernel address %#lx",
1117 cpu->lg->kernel_address);
47436aa4
RR
1118}
1119
bff672e6 1120/* When a Guest dies, our cleanup is fairly simple. */
d7e28ffe
RR
1121void free_guest_pagetable(struct lguest *lg)
1122{
1123 unsigned int i;
1124
bff672e6 1125 /* Throw away all page table pages. */
d7e28ffe 1126 release_all_pagetables(lg);
bff672e6 1127 /* Now free the top levels: free_page() can handle 0 just fine. */
d7e28ffe
RR
1128 for (i = 0; i < ARRAY_SIZE(lg->pgdirs); i++)
1129 free_page((long)lg->pgdirs[i].pgdir);
1130}
1131
2e04ef76
RR
1132/*H:480
1133 * (vi) Mapping the Switcher when the Guest is about to run.
bff672e6 1134 *
e1e72965 1135 * The Switcher and the two pages for this CPU need to be visible in the
bff672e6 1136 * Guest (and not the pages for other CPUs). We have the appropriate PTE pages
e1e72965 1137 * for each CPU already set up, we just need to hook them in now we know which
2e04ef76
RR
1138 * Guest is about to run on this CPU.
1139 */
0c78441c 1140void map_switcher_in_guest(struct lg_cpu *cpu, struct lguest_pages *pages)
d7e28ffe 1141{
df29f43e 1142 pte_t *switcher_pte_page = __get_cpu_var(switcher_pte_pages);
df29f43e 1143 pte_t regs_pte;
a53a35a8 1144 unsigned long pfn;
d7e28ffe 1145
acdd0b62
MZ
1146#ifdef CONFIG_X86_PAE
1147 pmd_t switcher_pmd;
1148 pmd_t *pmd_table;
1149
a91d74a3 1150 /* FIXME: native_set_pmd is overkill here. */
acdd0b62
MZ
1151 native_set_pmd(&switcher_pmd, pfn_pmd(__pa(switcher_pte_page) >>
1152 PAGE_SHIFT, PAGE_KERNEL_EXEC));
1153
a91d74a3
RR
1154 /* Figure out where the pmd page is, by reading the PGD, and converting
1155 * it to a virtual address. */
acdd0b62
MZ
1156 pmd_table = __va(pgd_pfn(cpu->lg->
1157 pgdirs[cpu->cpu_pgd].pgdir[SWITCHER_PGD_INDEX])
1158 << PAGE_SHIFT);
a91d74a3 1159 /* Now write it into the shadow page table. */
acdd0b62
MZ
1160 native_set_pmd(&pmd_table[SWITCHER_PMD_INDEX], switcher_pmd);
1161#else
1162 pgd_t switcher_pgd;
1163
2e04ef76
RR
1164 /*
1165 * Make the last PGD entry for this Guest point to the Switcher's PTE
1166 * page for this CPU (with appropriate flags).
1167 */
ed1dc778 1168 switcher_pgd = __pgd(__pa(switcher_pte_page) | __PAGE_KERNEL_EXEC);
df29f43e 1169
1713608f 1170 cpu->lg->pgdirs[cpu->cpu_pgd].pgdir[SWITCHER_PGD_INDEX] = switcher_pgd;
d7e28ffe 1171
acdd0b62 1172#endif
2e04ef76
RR
1173 /*
1174 * We also change the Switcher PTE page. When we're running the Guest,
bff672e6
RR
1175 * we want the Guest's "regs" page to appear where the first Switcher
1176 * page for this CPU is. This is an optimization: when the Switcher
1177 * saves the Guest registers, it saves them into the first page of this
1178 * CPU's "struct lguest_pages": if we make sure the Guest's register
1179 * page is already mapped there, we don't have to copy them out
2e04ef76
RR
1180 * again.
1181 */
a53a35a8 1182 pfn = __pa(cpu->regs_page) >> PAGE_SHIFT;
90603d15
MZ
1183 native_set_pte(&regs_pte, pfn_pte(pfn, PAGE_KERNEL));
1184 native_set_pte(&switcher_pte_page[pte_index((unsigned long)pages)],
1185 regs_pte);
d7e28ffe 1186}
bff672e6 1187/*:*/
d7e28ffe
RR
1188
1189static void free_switcher_pte_pages(void)
1190{
1191 unsigned int i;
1192
1193 for_each_possible_cpu(i)
1194 free_page((long)switcher_pte_page(i));
1195}
1196
2e04ef76
RR
1197/*H:520
1198 * Setting up the Switcher PTE page for given CPU is fairly easy, given
bff672e6
RR
1199 * the CPU number and the "struct page"s for the Switcher code itself.
1200 *
2e04ef76
RR
1201 * Currently the Switcher is less than a page long, so "pages" is always 1.
1202 */
d7e28ffe
RR
1203static __init void populate_switcher_pte_page(unsigned int cpu,
1204 struct page *switcher_page[],
1205 unsigned int pages)
1206{
1207 unsigned int i;
df29f43e 1208 pte_t *pte = switcher_pte_page(cpu);
d7e28ffe 1209
bff672e6 1210 /* The first entries are easy: they map the Switcher code. */
d7e28ffe 1211 for (i = 0; i < pages; i++) {
90603d15
MZ
1212 native_set_pte(&pte[i], mk_pte(switcher_page[i],
1213 __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED)));
d7e28ffe
RR
1214 }
1215
bff672e6 1216 /* The only other thing we map is this CPU's pair of pages. */
d7e28ffe
RR
1217 i = pages + cpu*2;
1218
bff672e6 1219 /* First page (Guest registers) is writable from the Guest */
90603d15
MZ
1220 native_set_pte(&pte[i], pfn_pte(page_to_pfn(switcher_page[i]),
1221 __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED|_PAGE_RW)));
df29f43e 1222
2e04ef76
RR
1223 /*
1224 * The second page contains the "struct lguest_ro_state", and is
1225 * read-only.
1226 */
90603d15
MZ
1227 native_set_pte(&pte[i+1], pfn_pte(page_to_pfn(switcher_page[i+1]),
1228 __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED)));
d7e28ffe
RR
1229}
1230
2e04ef76
RR
1231/*
1232 * We've made it through the page table code. Perhaps our tired brains are
e1e72965
RR
1233 * still processing the details, or perhaps we're simply glad it's over.
1234 *
a6bd8e13
RR
1235 * If nothing else, note that all this complexity in juggling shadow page tables
1236 * in sync with the Guest's page tables is for one reason: for most Guests this
1237 * page table dance determines how bad performance will be. This is why Xen
1238 * uses exotic direct Guest pagetable manipulation, and why both Intel and AMD
1239 * have implemented shadow page table support directly into hardware.
e1e72965 1240 *
2e04ef76
RR
1241 * There is just one file remaining in the Host.
1242 */
e1e72965 1243
2e04ef76
RR
1244/*H:510
1245 * At boot or module load time, init_pagetables() allocates and populates
1246 * the Switcher PTE page for each CPU.
1247 */
d7e28ffe
RR
1248__init int init_pagetables(struct page **switcher_page, unsigned int pages)
1249{
1250 unsigned int i;
1251
1252 for_each_possible_cpu(i) {
df29f43e 1253 switcher_pte_page(i) = (pte_t *)get_zeroed_page(GFP_KERNEL);
d7e28ffe
RR
1254 if (!switcher_pte_page(i)) {
1255 free_switcher_pte_pages();
1256 return -ENOMEM;
1257 }
1258 populate_switcher_pte_page(i, switcher_page, pages);
1259 }
1260 return 0;
1261}
bff672e6 1262/*:*/
d7e28ffe 1263
bff672e6 1264/* Cleaning up simply involves freeing the PTE page for each CPU. */
d7e28ffe
RR
1265void free_pagetables(void)
1266{
1267 free_switcher_pte_pages();
1268}
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