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1da177e4 LT |
1 | /* |
2 | * Device driver for the via-cuda on Apple Powermacs. | |
3 | * | |
4 | * The VIA (versatile interface adapter) interfaces to the CUDA, | |
5 | * a 6805 microprocessor core which controls the ADB (Apple Desktop | |
6 | * Bus) which connects to the keyboard and mouse. The CUDA also | |
7 | * controls system power and the RTC (real time clock) chip. | |
8 | * | |
9 | * Copyright (C) 1996 Paul Mackerras. | |
10 | */ | |
11 | #include <stdarg.h> | |
1da177e4 LT |
12 | #include <linux/types.h> |
13 | #include <linux/errno.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/sched.h> | |
17 | #include <linux/adb.h> | |
18 | #include <linux/cuda.h> | |
19 | #include <linux/spinlock.h> | |
20 | #include <linux/interrupt.h> | |
21 | #ifdef CONFIG_PPC | |
22 | #include <asm/prom.h> | |
23 | #include <asm/machdep.h> | |
24 | #else | |
25 | #include <asm/macintosh.h> | |
26 | #include <asm/macints.h> | |
27 | #include <asm/machw.h> | |
28 | #include <asm/mac_via.h> | |
29 | #endif | |
30 | #include <asm/io.h> | |
31 | #include <asm/system.h> | |
32 | #include <linux/init.h> | |
33 | ||
34 | static volatile unsigned char __iomem *via; | |
35 | static DEFINE_SPINLOCK(cuda_lock); | |
36 | ||
37 | #ifdef CONFIG_MAC | |
38 | #define CUDA_IRQ IRQ_MAC_ADB | |
1da177e4 LT |
39 | #define eieio() |
40 | #else | |
41 | #define CUDA_IRQ vias->intrs[0].line | |
42 | #endif | |
43 | ||
44 | /* VIA registers - spaced 0x200 bytes apart */ | |
45 | #define RS 0x200 /* skip between registers */ | |
46 | #define B 0 /* B-side data */ | |
47 | #define A RS /* A-side data */ | |
48 | #define DIRB (2*RS) /* B-side direction (1=output) */ | |
49 | #define DIRA (3*RS) /* A-side direction (1=output) */ | |
50 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ | |
51 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ | |
52 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ | |
53 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ | |
54 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ | |
55 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ | |
56 | #define SR (10*RS) /* Shift register */ | |
57 | #define ACR (11*RS) /* Auxiliary control register */ | |
58 | #define PCR (12*RS) /* Peripheral control register */ | |
59 | #define IFR (13*RS) /* Interrupt flag register */ | |
60 | #define IER (14*RS) /* Interrupt enable register */ | |
61 | #define ANH (15*RS) /* A-side data, no handshake */ | |
62 | ||
63 | /* Bits in B data register: all active low */ | |
64 | #define TREQ 0x08 /* Transfer request (input) */ | |
65 | #define TACK 0x10 /* Transfer acknowledge (output) */ | |
66 | #define TIP 0x20 /* Transfer in progress (output) */ | |
67 | ||
68 | /* Bits in ACR */ | |
69 | #define SR_CTRL 0x1c /* Shift register control bits */ | |
70 | #define SR_EXT 0x0c /* Shift on external clock */ | |
71 | #define SR_OUT 0x10 /* Shift out if 1 */ | |
72 | ||
73 | /* Bits in IFR and IER */ | |
74 | #define IER_SET 0x80 /* set bits in IER */ | |
75 | #define IER_CLR 0 /* clear bits in IER */ | |
76 | #define SR_INT 0x04 /* Shift register full/empty */ | |
77 | ||
78 | static enum cuda_state { | |
79 | idle, | |
80 | sent_first_byte, | |
81 | sending, | |
82 | reading, | |
83 | read_done, | |
84 | awaiting_reply | |
85 | } cuda_state; | |
86 | ||
87 | static struct adb_request *current_req; | |
88 | static struct adb_request *last_req; | |
89 | static unsigned char cuda_rbuf[16]; | |
90 | static unsigned char *reply_ptr; | |
91 | static int reading_reply; | |
92 | static int data_index; | |
93 | #ifdef CONFIG_PPC | |
94 | static struct device_node *vias; | |
95 | #endif | |
96 | static int cuda_fully_inited = 0; | |
97 | ||
98 | #ifdef CONFIG_ADB | |
99 | static int cuda_probe(void); | |
100 | static int cuda_init(void); | |
101 | static int cuda_send_request(struct adb_request *req, int sync); | |
102 | static int cuda_adb_autopoll(int devs); | |
103 | static int cuda_reset_adb_bus(void); | |
104 | #endif /* CONFIG_ADB */ | |
105 | ||
106 | static int cuda_init_via(void); | |
107 | static void cuda_start(void); | |
108 | static irqreturn_t cuda_interrupt(int irq, void *arg, struct pt_regs *regs); | |
109 | static void cuda_input(unsigned char *buf, int nb, struct pt_regs *regs); | |
110 | void cuda_poll(void); | |
111 | static int cuda_write(struct adb_request *req); | |
112 | ||
113 | int cuda_request(struct adb_request *req, | |
114 | void (*done)(struct adb_request *), int nbytes, ...); | |
115 | ||
116 | #ifdef CONFIG_ADB | |
117 | struct adb_driver via_cuda_driver = { | |
118 | "CUDA", | |
119 | cuda_probe, | |
120 | cuda_init, | |
121 | cuda_send_request, | |
122 | cuda_adb_autopoll, | |
123 | cuda_poll, | |
124 | cuda_reset_adb_bus | |
125 | }; | |
126 | #endif /* CONFIG_ADB */ | |
127 | ||
128 | #ifdef CONFIG_PPC | |
51d3082f | 129 | int __init find_via_cuda(void) |
1da177e4 | 130 | { |
1da177e4 | 131 | struct adb_request req; |
51d3082f BH |
132 | phys_addr_t taddr; |
133 | u32 *reg; | |
134 | int err; | |
1da177e4 LT |
135 | |
136 | if (vias != 0) | |
137 | return 1; | |
51d3082f | 138 | vias = of_find_node_by_name(NULL, "via-cuda"); |
1da177e4 LT |
139 | if (vias == 0) |
140 | return 0; | |
1da177e4 | 141 | |
51d3082f BH |
142 | reg = (u32 *)get_property(vias, "reg", NULL); |
143 | if (reg == NULL) { | |
144 | printk(KERN_ERR "via-cuda: No \"reg\" property !\n"); | |
145 | goto fail; | |
146 | } | |
147 | taddr = of_translate_address(vias, reg); | |
148 | if (taddr == 0) { | |
149 | printk(KERN_ERR "via-cuda: Can't translate address !\n"); | |
150 | goto fail; | |
151 | } | |
152 | via = ioremap(taddr, 0x2000); | |
153 | if (via == NULL) { | |
154 | printk(KERN_ERR "via-cuda: Can't map address !\n"); | |
155 | goto fail; | |
1da177e4 | 156 | } |
1da177e4 LT |
157 | |
158 | cuda_state = idle; | |
159 | sys_ctrler = SYS_CTRLER_CUDA; | |
160 | ||
161 | err = cuda_init_via(); | |
162 | if (err) { | |
163 | printk(KERN_ERR "cuda_init_via() failed\n"); | |
164 | via = NULL; | |
165 | return 0; | |
166 | } | |
167 | ||
168 | /* Clear and enable interrupts, but only on PPC. On 68K it's done */ | |
169 | /* for us by the main VIA driver in arch/m68k/mac/via.c */ | |
170 | ||
171 | #ifndef CONFIG_MAC | |
172 | out_8(&via[IFR], 0x7f); /* clear interrupts by writing 1s */ | |
173 | out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */ | |
174 | #endif | |
175 | ||
176 | /* enable autopoll */ | |
177 | cuda_request(&req, NULL, 3, CUDA_PACKET, CUDA_AUTOPOLL, 1); | |
178 | while (!req.complete) | |
179 | cuda_poll(); | |
180 | ||
181 | return 1; | |
51d3082f BH |
182 | |
183 | fail: | |
184 | of_node_put(vias); | |
185 | vias = NULL; | |
186 | return 0; | |
1da177e4 LT |
187 | } |
188 | #endif /* CONFIG_PPC */ | |
189 | ||
190 | static int __init via_cuda_start(void) | |
191 | { | |
192 | if (via == NULL) | |
193 | return -ENODEV; | |
194 | ||
1da177e4 LT |
195 | if (request_irq(CUDA_IRQ, cuda_interrupt, 0, "ADB", cuda_interrupt)) { |
196 | printk(KERN_ERR "cuda_init: can't get irq %d\n", CUDA_IRQ); | |
197 | return -EAGAIN; | |
198 | } | |
199 | ||
200 | printk("Macintosh CUDA driver v0.5 for Unified ADB.\n"); | |
201 | ||
202 | cuda_fully_inited = 1; | |
203 | return 0; | |
204 | } | |
205 | ||
206 | device_initcall(via_cuda_start); | |
207 | ||
208 | #ifdef CONFIG_ADB | |
209 | static int | |
210 | cuda_probe(void) | |
211 | { | |
212 | #ifdef CONFIG_PPC | |
213 | if (sys_ctrler != SYS_CTRLER_CUDA) | |
214 | return -ENODEV; | |
215 | #else | |
216 | if (macintosh_config->adb_type != MAC_ADB_CUDA) | |
217 | return -ENODEV; | |
218 | via = via1; | |
219 | #endif | |
220 | return 0; | |
221 | } | |
222 | ||
223 | static int __init | |
224 | cuda_init(void) | |
225 | { | |
226 | #ifdef CONFIG_PPC | |
227 | if (via == NULL) | |
228 | return -ENODEV; | |
229 | return 0; | |
230 | #else | |
231 | int err = cuda_init_via(); | |
232 | if (err) { | |
233 | printk(KERN_ERR "cuda_init_via() failed\n"); | |
234 | return -ENODEV; | |
235 | } | |
236 | ||
237 | return via_cuda_start(); | |
238 | #endif | |
239 | } | |
240 | #endif /* CONFIG_ADB */ | |
241 | ||
242 | #define WAIT_FOR(cond, what) \ | |
243 | do { \ | |
244 | int x; \ | |
245 | for (x = 1000; !(cond); --x) { \ | |
246 | if (x == 0) { \ | |
247 | printk("Timeout waiting for " what "\n"); \ | |
248 | return -ENXIO; \ | |
249 | } \ | |
250 | udelay(100); \ | |
251 | } \ | |
252 | } while (0) | |
253 | ||
254 | static int | |
255 | cuda_init_via(void) | |
256 | { | |
257 | out_8(&via[DIRB], (in_8(&via[DIRB]) | TACK | TIP) & ~TREQ); /* TACK & TIP out */ | |
258 | out_8(&via[B], in_8(&via[B]) | TACK | TIP); /* negate them */ | |
259 | out_8(&via[ACR] ,(in_8(&via[ACR]) & ~SR_CTRL) | SR_EXT); /* SR data in */ | |
260 | (void)in_8(&via[SR]); /* clear any left-over data */ | |
261 | #ifndef CONFIG_MAC | |
262 | out_8(&via[IER], 0x7f); /* disable interrupts from VIA */ | |
263 | (void)in_8(&via[IER]); | |
264 | #endif | |
265 | ||
266 | /* delay 4ms and then clear any pending interrupt */ | |
267 | mdelay(4); | |
268 | (void)in_8(&via[SR]); | |
269 | out_8(&via[IFR], in_8(&via[IFR]) & 0x7f); | |
270 | ||
271 | /* sync with the CUDA - assert TACK without TIP */ | |
272 | out_8(&via[B], in_8(&via[B]) & ~TACK); | |
273 | ||
274 | /* wait for the CUDA to assert TREQ in response */ | |
275 | WAIT_FOR((in_8(&via[B]) & TREQ) == 0, "CUDA response to sync"); | |
276 | ||
277 | /* wait for the interrupt and then clear it */ | |
278 | WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)"); | |
279 | (void)in_8(&via[SR]); | |
280 | out_8(&via[IFR], in_8(&via[IFR]) & 0x7f); | |
281 | ||
282 | /* finish the sync by negating TACK */ | |
283 | out_8(&via[B], in_8(&via[B]) | TACK); | |
284 | ||
285 | /* wait for the CUDA to negate TREQ and the corresponding interrupt */ | |
286 | WAIT_FOR(in_8(&via[B]) & TREQ, "CUDA response to sync (3)"); | |
287 | WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)"); | |
288 | (void)in_8(&via[SR]); | |
289 | out_8(&via[IFR], in_8(&via[IFR]) & 0x7f); | |
290 | out_8(&via[B], in_8(&via[B]) | TIP); /* should be unnecessary */ | |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
295 | #ifdef CONFIG_ADB | |
296 | /* Send an ADB command */ | |
297 | static int | |
298 | cuda_send_request(struct adb_request *req, int sync) | |
299 | { | |
300 | int i; | |
301 | ||
302 | if ((via == NULL) || !cuda_fully_inited) { | |
303 | req->complete = 1; | |
304 | return -ENXIO; | |
305 | } | |
306 | ||
307 | req->reply_expected = 1; | |
308 | ||
309 | i = cuda_write(req); | |
310 | if (i) | |
311 | return i; | |
312 | ||
313 | if (sync) { | |
314 | while (!req->complete) | |
315 | cuda_poll(); | |
316 | } | |
317 | return 0; | |
318 | } | |
319 | ||
320 | ||
321 | /* Enable/disable autopolling */ | |
322 | static int | |
323 | cuda_adb_autopoll(int devs) | |
324 | { | |
325 | struct adb_request req; | |
326 | ||
327 | if ((via == NULL) || !cuda_fully_inited) | |
328 | return -ENXIO; | |
329 | ||
330 | cuda_request(&req, NULL, 3, CUDA_PACKET, CUDA_AUTOPOLL, (devs? 1: 0)); | |
331 | while (!req.complete) | |
332 | cuda_poll(); | |
333 | return 0; | |
334 | } | |
335 | ||
336 | /* Reset adb bus - how do we do this?? */ | |
337 | static int | |
338 | cuda_reset_adb_bus(void) | |
339 | { | |
340 | struct adb_request req; | |
341 | ||
342 | if ((via == NULL) || !cuda_fully_inited) | |
343 | return -ENXIO; | |
344 | ||
345 | cuda_request(&req, NULL, 2, ADB_PACKET, 0); /* maybe? */ | |
346 | while (!req.complete) | |
347 | cuda_poll(); | |
348 | return 0; | |
349 | } | |
350 | #endif /* CONFIG_ADB */ | |
351 | /* Construct and send a cuda request */ | |
352 | int | |
353 | cuda_request(struct adb_request *req, void (*done)(struct adb_request *), | |
354 | int nbytes, ...) | |
355 | { | |
356 | va_list list; | |
357 | int i; | |
358 | ||
359 | if (via == NULL) { | |
360 | req->complete = 1; | |
361 | return -ENXIO; | |
362 | } | |
363 | ||
364 | req->nbytes = nbytes; | |
365 | req->done = done; | |
366 | va_start(list, nbytes); | |
367 | for (i = 0; i < nbytes; ++i) | |
368 | req->data[i] = va_arg(list, int); | |
369 | va_end(list); | |
370 | req->reply_expected = 1; | |
371 | return cuda_write(req); | |
372 | } | |
373 | ||
374 | static int | |
375 | cuda_write(struct adb_request *req) | |
376 | { | |
377 | unsigned long flags; | |
378 | ||
379 | if (req->nbytes < 2 || req->data[0] > CUDA_PACKET) { | |
380 | req->complete = 1; | |
381 | return -EINVAL; | |
382 | } | |
383 | req->next = NULL; | |
384 | req->sent = 0; | |
385 | req->complete = 0; | |
386 | req->reply_len = 0; | |
387 | ||
388 | spin_lock_irqsave(&cuda_lock, flags); | |
389 | if (current_req != 0) { | |
390 | last_req->next = req; | |
391 | last_req = req; | |
392 | } else { | |
393 | current_req = req; | |
394 | last_req = req; | |
395 | if (cuda_state == idle) | |
396 | cuda_start(); | |
397 | } | |
398 | spin_unlock_irqrestore(&cuda_lock, flags); | |
399 | ||
400 | return 0; | |
401 | } | |
402 | ||
403 | static void | |
404 | cuda_start(void) | |
405 | { | |
406 | struct adb_request *req; | |
407 | ||
408 | /* assert cuda_state == idle */ | |
409 | /* get the packet to send */ | |
410 | req = current_req; | |
411 | if (req == 0) | |
412 | return; | |
413 | if ((in_8(&via[B]) & TREQ) == 0) | |
414 | return; /* a byte is coming in from the CUDA */ | |
415 | ||
416 | /* set the shift register to shift out and send a byte */ | |
417 | out_8(&via[ACR], in_8(&via[ACR]) | SR_OUT); | |
418 | out_8(&via[SR], req->data[0]); | |
419 | out_8(&via[B], in_8(&via[B]) & ~TIP); | |
420 | cuda_state = sent_first_byte; | |
421 | } | |
422 | ||
423 | void | |
424 | cuda_poll(void) | |
425 | { | |
426 | unsigned long flags; | |
427 | ||
428 | /* cuda_interrupt only takes a normal lock, we disable | |
429 | * interrupts here to avoid re-entering and thus deadlocking. | |
430 | * An option would be to disable only the IRQ source with | |
431 | * disable_irq(), would that work on m68k ? --BenH | |
432 | */ | |
433 | local_irq_save(flags); | |
434 | cuda_interrupt(0, NULL, NULL); | |
435 | local_irq_restore(flags); | |
436 | } | |
437 | ||
438 | static irqreturn_t | |
439 | cuda_interrupt(int irq, void *arg, struct pt_regs *regs) | |
440 | { | |
441 | int status; | |
442 | struct adb_request *req = NULL; | |
443 | unsigned char ibuf[16]; | |
444 | int ibuf_len = 0; | |
445 | int complete = 0; | |
446 | unsigned char virq; | |
447 | ||
448 | spin_lock(&cuda_lock); | |
449 | ||
450 | virq = in_8(&via[IFR]) & 0x7f; | |
451 | out_8(&via[IFR], virq); | |
452 | if ((virq & SR_INT) == 0) { | |
453 | spin_unlock(&cuda_lock); | |
454 | return IRQ_NONE; | |
455 | } | |
456 | ||
457 | status = (~in_8(&via[B]) & (TIP|TREQ)) | (in_8(&via[ACR]) & SR_OUT); | |
458 | /* printk("cuda_interrupt: state=%d status=%x\n", cuda_state, status); */ | |
459 | switch (cuda_state) { | |
460 | case idle: | |
461 | /* CUDA has sent us the first byte of data - unsolicited */ | |
462 | if (status != TREQ) | |
463 | printk("cuda: state=idle, status=%x\n", status); | |
464 | (void)in_8(&via[SR]); | |
465 | out_8(&via[B], in_8(&via[B]) & ~TIP); | |
466 | cuda_state = reading; | |
467 | reply_ptr = cuda_rbuf; | |
468 | reading_reply = 0; | |
469 | break; | |
470 | ||
471 | case awaiting_reply: | |
472 | /* CUDA has sent us the first byte of data of a reply */ | |
473 | if (status != TREQ) | |
474 | printk("cuda: state=awaiting_reply, status=%x\n", status); | |
475 | (void)in_8(&via[SR]); | |
476 | out_8(&via[B], in_8(&via[B]) & ~TIP); | |
477 | cuda_state = reading; | |
478 | reply_ptr = current_req->reply; | |
479 | reading_reply = 1; | |
480 | break; | |
481 | ||
482 | case sent_first_byte: | |
483 | if (status == TREQ + TIP + SR_OUT) { | |
484 | /* collision */ | |
485 | out_8(&via[ACR], in_8(&via[ACR]) & ~SR_OUT); | |
486 | (void)in_8(&via[SR]); | |
487 | out_8(&via[B], in_8(&via[B]) | TIP | TACK); | |
488 | cuda_state = idle; | |
489 | } else { | |
490 | /* assert status == TIP + SR_OUT */ | |
491 | if (status != TIP + SR_OUT) | |
492 | printk("cuda: state=sent_first_byte status=%x\n", status); | |
493 | out_8(&via[SR], current_req->data[1]); | |
494 | out_8(&via[B], in_8(&via[B]) ^ TACK); | |
495 | data_index = 2; | |
496 | cuda_state = sending; | |
497 | } | |
498 | break; | |
499 | ||
500 | case sending: | |
501 | req = current_req; | |
502 | if (data_index >= req->nbytes) { | |
503 | out_8(&via[ACR], in_8(&via[ACR]) & ~SR_OUT); | |
504 | (void)in_8(&via[SR]); | |
505 | out_8(&via[B], in_8(&via[B]) | TACK | TIP); | |
506 | req->sent = 1; | |
507 | if (req->reply_expected) { | |
508 | cuda_state = awaiting_reply; | |
509 | } else { | |
510 | current_req = req->next; | |
511 | complete = 1; | |
512 | /* not sure about this */ | |
513 | cuda_state = idle; | |
514 | cuda_start(); | |
515 | } | |
516 | } else { | |
517 | out_8(&via[SR], req->data[data_index++]); | |
518 | out_8(&via[B], in_8(&via[B]) ^ TACK); | |
519 | } | |
520 | break; | |
521 | ||
522 | case reading: | |
523 | *reply_ptr++ = in_8(&via[SR]); | |
524 | if (status == TIP) { | |
525 | /* that's all folks */ | |
526 | out_8(&via[B], in_8(&via[B]) | TACK | TIP); | |
527 | cuda_state = read_done; | |
528 | } else { | |
529 | /* assert status == TIP | TREQ */ | |
530 | if (status != TIP + TREQ) | |
531 | printk("cuda: state=reading status=%x\n", status); | |
532 | out_8(&via[B], in_8(&via[B]) ^ TACK); | |
533 | } | |
534 | break; | |
535 | ||
536 | case read_done: | |
537 | (void)in_8(&via[SR]); | |
538 | if (reading_reply) { | |
539 | req = current_req; | |
540 | req->reply_len = reply_ptr - req->reply; | |
541 | if (req->data[0] == ADB_PACKET) { | |
542 | /* Have to adjust the reply from ADB commands */ | |
543 | if (req->reply_len <= 2 || (req->reply[1] & 2) != 0) { | |
544 | /* the 0x2 bit indicates no response */ | |
545 | req->reply_len = 0; | |
546 | } else { | |
547 | /* leave just the command and result bytes in the reply */ | |
548 | req->reply_len -= 2; | |
549 | memmove(req->reply, req->reply + 2, req->reply_len); | |
550 | } | |
551 | } | |
552 | current_req = req->next; | |
553 | complete = 1; | |
554 | } else { | |
555 | /* This is tricky. We must break the spinlock to call | |
556 | * cuda_input. However, doing so means we might get | |
557 | * re-entered from another CPU getting an interrupt | |
558 | * or calling cuda_poll(). I ended up using the stack | |
559 | * (it's only for 16 bytes) and moving the actual | |
560 | * call to cuda_input to outside of the lock. | |
561 | */ | |
562 | ibuf_len = reply_ptr - cuda_rbuf; | |
563 | memcpy(ibuf, cuda_rbuf, ibuf_len); | |
564 | } | |
565 | if (status == TREQ) { | |
566 | out_8(&via[B], in_8(&via[B]) & ~TIP); | |
567 | cuda_state = reading; | |
568 | reply_ptr = cuda_rbuf; | |
569 | reading_reply = 0; | |
570 | } else { | |
571 | cuda_state = idle; | |
572 | cuda_start(); | |
573 | } | |
574 | break; | |
575 | ||
576 | default: | |
577 | printk("cuda_interrupt: unknown cuda_state %d?\n", cuda_state); | |
578 | } | |
579 | spin_unlock(&cuda_lock); | |
580 | if (complete && req) { | |
581 | void (*done)(struct adb_request *) = req->done; | |
582 | mb(); | |
583 | req->complete = 1; | |
584 | /* Here, we assume that if the request has a done member, the | |
585 | * struct request will survive to setting req->complete to 1 | |
586 | */ | |
587 | if (done) | |
588 | (*done)(req); | |
589 | } | |
590 | if (ibuf_len) | |
591 | cuda_input(ibuf, ibuf_len, regs); | |
592 | return IRQ_HANDLED; | |
593 | } | |
594 | ||
595 | static void | |
596 | cuda_input(unsigned char *buf, int nb, struct pt_regs *regs) | |
597 | { | |
598 | int i; | |
599 | ||
600 | switch (buf[0]) { | |
601 | case ADB_PACKET: | |
602 | #ifdef CONFIG_XMON | |
603 | if (nb == 5 && buf[2] == 0x2c) { | |
604 | extern int xmon_wants_key, xmon_adb_keycode; | |
605 | if (xmon_wants_key) { | |
606 | xmon_adb_keycode = buf[3]; | |
607 | return; | |
608 | } | |
609 | } | |
610 | #endif /* CONFIG_XMON */ | |
611 | #ifdef CONFIG_ADB | |
612 | adb_input(buf+2, nb-2, regs, buf[1] & 0x40); | |
613 | #endif /* CONFIG_ADB */ | |
614 | break; | |
615 | ||
616 | default: | |
617 | printk("data from cuda (%d bytes):", nb); | |
618 | for (i = 0; i < nb; ++i) | |
619 | printk(" %.2x", buf[i]); | |
620 | printk("\n"); | |
621 | } | |
622 | } |