projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'master' into for-linus
[deliverable/linux.git] / drivers / macintosh / via-pmu.c
CommitLineData
1da177e4
LT		 1/*
2 * Device driver for the via-pmu on Apple Powermacs.
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBook 3400 and 2400.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
12 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 13 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT		 14 *
15 * THIS DRIVER IS BECOMING A TOTAL MESS !
16 * - Cleanup atomically disabling reply to PMU events after
17 * a sleep or a freq. switch
1da177e4
LT		 18 *
19 */
20#include <stdarg.h>
ffe83733 21#include <linux/smp_lock.h>
1da177e4
LT		 22#include <linux/types.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/delay.h>
26#include <linux/sched.h>
27#include <linux/miscdevice.h>
28#include <linux/blkdev.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/poll.h>
32#include <linux/adb.h>
33#include <linux/pmu.h>
34#include <linux/cuda.h>
1da177e4
LT		 35#include <linux/module.h>
36#include <linux/spinlock.h>
37#include <linux/pm.h>
38#include <linux/proc_fs.h>
9d2f7342 39#include <linux/seq_file.h>
1da177e4
LT		 40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/device.h>
43#include <linux/sysdev.h>
7dfb7103 44#include <linux/freezer.h>
1da177e4 45#include <linux/syscalls.h>
6002f544 46#include <linux/suspend.h>
1da177e4
LT		 47#include <linux/cpu.h>
48#include <asm/prom.h>
49#include <asm/machdep.h>
50#include <asm/io.h>
51#include <asm/pgtable.h>
52#include <asm/system.h>
53#include <asm/sections.h>
54#include <asm/irq.h>
55#include <asm/pmac_feature.h>
5b9ca526
BH		 56#include <asm/pmac_pfunc.h>
57#include <asm/pmac_low_i2c.h>
1da177e4
LT		 58#include <asm/uaccess.h>
59#include <asm/mmu_context.h>
60#include <asm/cputable.h>
61#include <asm/time.h>
1da177e4 62#include <asm/backlight.h>
1da177e4 63
9e8e30a0
JB		 64#include "via-pmu-event.h"
65
1da177e4 66/* Some compile options */
f91266ed 67#undef DEBUG_SLEEP
1da177e4
LT		 68
69/* Misc minor number allocated for /dev/pmu */
70#define PMU_MINOR 154
71
72/* How many iterations between battery polls */
73#define BATTERY_POLLING_COUNT 2
74
75static volatile unsigned char __iomem *via;
76
77/* VIA registers - spaced 0x200 bytes apart */
78#define RS 0x200 /* skip between registers */
79#define B 0 /* B-side data */
80#define A RS /* A-side data */
81#define DIRB (2*RS) /* B-side direction (1=output) */
82#define DIRA (3*RS) /* A-side direction (1=output) */
83#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
84#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
85#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
86#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
87#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
88#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
89#define SR (10*RS) /* Shift register */
90#define ACR (11*RS) /* Auxiliary control register */
91#define PCR (12*RS) /* Peripheral control register */
92#define IFR (13*RS) /* Interrupt flag register */
93#define IER (14*RS) /* Interrupt enable register */
94#define ANH (15*RS) /* A-side data, no handshake */
95
96/* Bits in B data register: both active low */
97#define TACK 0x08 /* Transfer acknowledge (input) */
98#define TREQ 0x10 /* Transfer request (output) */
99
100/* Bits in ACR */
101#define SR_CTRL 0x1c /* Shift register control bits */
102#define SR_EXT 0x0c /* Shift on external clock */
103#define SR_OUT 0x10 /* Shift out if 1 */
104
105/* Bits in IFR and IER */
106#define IER_SET 0x80 /* set bits in IER */
107#define IER_CLR 0 /* clear bits in IER */
108#define SR_INT 0x04 /* Shift register full/empty */
109#define CB2_INT 0x08
110#define CB1_INT 0x10 /* transition on CB1 input */
111
112static volatile enum pmu_state {
113 idle,
114 sending,
115 intack,
116 reading,
117 reading_intr,
118 locked,
119} pmu_state;
120
121static volatile enum int_data_state {
122 int_data_empty,
123 int_data_fill,
124 int_data_ready,
125 int_data_flush
126} int_data_state[2] = { int_data_empty, int_data_empty };
127
128static struct adb_request *current_req;
129static struct adb_request *last_req;
130static struct adb_request *req_awaiting_reply;
131static unsigned char interrupt_data[2][32];
132static int interrupt_data_len[2];
133static int int_data_last;
134static unsigned char *reply_ptr;
135static int data_index;
136static int data_len;
137static volatile int adb_int_pending;
138static volatile int disable_poll;
1da177e4
LT		 139static struct device_node *vias;
140static int pmu_kind = PMU_UNKNOWN;
87275856 141static int pmu_fully_inited;
1da177e4 142static int pmu_has_adb;
51d3082f 143static struct device_node *gpio_node;
87275856 144static unsigned char __iomem *gpio_reg;
0ebfff14 145static int gpio_irq = NO_IRQ;
1da177e4 146static int gpio_irq_enabled = -1;
87275856 147static volatile int pmu_suspended;
1da177e4
LT		 148static spinlock_t pmu_lock;
149static u8 pmu_intr_mask;
150static int pmu_version;
151static int drop_interrupts;
f91266ed 152#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 153static int option_lid_wakeup = 1;
f91266ed 154#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 155static unsigned long async_req_locks;
156static unsigned int pmu_irq_stats[11];
157
158static struct proc_dir_entry *proc_pmu_root;
159static struct proc_dir_entry *proc_pmu_info;
160static struct proc_dir_entry *proc_pmu_irqstats;
161static struct proc_dir_entry *proc_pmu_options;
162static int option_server_mode;
163
1da177e4
LT		 164int pmu_battery_count;
165int pmu_cur_battery;
a334bdbd 166unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT		 167struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
168static int query_batt_timer = BATTERY_POLLING_COUNT;
169static struct adb_request batt_req;
170static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 171
1da177e4
LT		 172int __fake_sleep;
173int asleep;
1da177e4
LT		 174
175#ifdef CONFIG_ADB
87275856 176static int adb_dev_map;
1da177e4
LT		 177static int pmu_adb_flags;
178
179static int pmu_probe(void);
180static int pmu_init(void);
181static int pmu_send_request(struct adb_request *req, int sync);
182static int pmu_adb_autopoll(int devs);
183static int pmu_adb_reset_bus(void);
184#endif /* CONFIG_ADB */
185
186static int init_pmu(void);
1da177e4 187static void pmu_start(void);
7d12e780
DH		 188static irqreturn_t via_pmu_interrupt(int irq, void *arg);
189static irqreturn_t gpio1_interrupt(int irq, void *arg);
9d2f7342
AD		 190static const struct file_operations pmu_info_proc_fops;
191static const struct file_operations pmu_irqstats_proc_fops;
1da177e4 192static void pmu_pass_intr(unsigned char *data, int len);
9d2f7342
AD		 193static const struct file_operations pmu_battery_proc_fops;
194static const struct file_operations pmu_options_proc_fops;
1da177e4
LT		 195
196#ifdef CONFIG_ADB
197struct adb_driver via_pmu_driver = {
198 "PMU",
199 pmu_probe,
200 pmu_init,
201 pmu_send_request,
202 pmu_adb_autopoll,
203 pmu_poll_adb,
204 pmu_adb_reset_bus
205};
206#endif /* CONFIG_ADB */
207
208extern void low_sleep_handler(void);
209extern void enable_kernel_altivec(void);
210extern void enable_kernel_fp(void);
211
212#ifdef DEBUG_SLEEP
213int pmu_polled_request(struct adb_request *req);
f91266ed 214void pmu_blink(int n);
1da177e4
LT		 215#endif
216
217/*
218 * This table indicates for each PMU opcode:
219 * - the number of data bytes to be sent with the command, or -1
220 * if a length byte should be sent,
221 * - the number of response bytes which the PMU will return, or
222 * -1 if it will send a length byte.
223 */
aacaf9bd 224static const s8 pmu_data_len[256][2] = {
1da177e4
LT		 225/* 0 1 2 3 4 5 6 7 */
226/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
227/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
228/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
229/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
230/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
231/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
232/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
233/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
234/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
235/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
236/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
237/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
238/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
239/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
240/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
241/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
242/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
243/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
244/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
246/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
247/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
248/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
249/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
250/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
251/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
252/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
254/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
255/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
256/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
258};
259
260static char *pbook_type[] = {
261 "Unknown PowerBook",
262 "PowerBook 2400/3400/3500(G3)",
263 "PowerBook G3 Series",
264 "1999 PowerBook G3",
265 "Core99"
266};
267
51d3082f 268int __init find_via_pmu(void)
1da177e4 269{
cc5d0189 270 u64 taddr;
018a3d1d 271 const u32 *reg;
51d3082f 272
1da177e4
LT		 273 if (via != 0)
274 return 1;
51d3082f
BH		 275 vias = of_find_node_by_name(NULL, "via-pmu");
276 if (vias == NULL)
1da177e4 277 return 0;
1da177e4 278
01b2726d 279 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH		 280 if (reg == NULL) {
281 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
282 goto fail;
283 }
284 taddr = of_translate_address(vias, reg);
bb6b9b28 285 if (taddr == OF_BAD_ADDR) {
51d3082f
BH		 286 printk(KERN_ERR "via-pmu: Can't translate address !\n");
287 goto fail;
1da177e4
LT		 288 }
289
290 spin_lock_init(&pmu_lock);
291
292 pmu_has_adb = 1;
293
294 pmu_intr_mask = PMU_INT_PCEJECT |
295 PMU_INT_SNDBRT |
296 PMU_INT_ADB |
297 PMU_INT_TICK;
298
299 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
55b61fec 300 || of_device_is_compatible(vias->parent, "ohare")))
1da177e4 301 pmu_kind = PMU_OHARE_BASED;
55b61fec 302 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 303 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 304 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 305 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR		 306 else if (of_device_is_compatible(vias->parent, "Keylargo")
307 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 308 struct device_node *gpiop;
1658ab66 309 struct device_node *adbp;
cc5d0189 310 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT		 311
312 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR		 313 adbp = of_find_node_by_type(NULL, "adb");
314 pmu_has_adb = (adbp != NULL);
315 of_node_put(adbp);
1da177e4
LT		 316 pmu_intr_mask = PMU_INT_PCEJECT |
317 PMU_INT_SNDBRT |
318 PMU_INT_ADB |
319 PMU_INT_TICK |
320 PMU_INT_ENVIRONMENT;
321
51d3082f
BH		 322 gpiop = of_find_node_by_name(NULL, "gpio");
323 if (gpiop) {
01b2726d 324 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH		 325 if (reg)
326 gaddr = of_translate_address(gpiop, reg);
cc5d0189 327 if (gaddr != OF_BAD_ADDR)
51d3082f 328 gpio_reg = ioremap(gaddr, 0x10);
1da177e4 329 }
61e37ca2 330 if (gpio_reg == NULL) {
51d3082f 331 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
61e37ca2
OH		 332 goto fail_gpio;
333 }
1da177e4
LT		 334 } else
335 pmu_kind = PMU_UNKNOWN;
336
51d3082f
BH		 337 via = ioremap(taddr, 0x2000);
338 if (via == NULL) {
339 printk(KERN_ERR "via-pmu: Can't map address !\n");
340 goto fail;
341 }
1da177e4
LT		 342
343 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
344 out_8(&via[IFR], 0x7f); /* clear IFR */
345
346 pmu_state = idle;
347
348 if (!init_pmu()) {
349 via = NULL;
350 return 0;
351 }
352
bb6b9b28 353 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
1da177e4
LT		 354 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
355
356 sys_ctrler = SYS_CTRLER_PMU;
357
358 return 1;
51d3082f
BH		 359 fail:
360 of_node_put(vias);
61e37ca2
OH		 361 iounmap(gpio_reg);
362 gpio_reg = NULL;
363 fail_gpio:
51d3082f
BH		 364 vias = NULL;
365 return 0;
1da177e4
LT		 366}
367
368#ifdef CONFIG_ADB
51d3082f 369static int pmu_probe(void)
1da177e4
LT		 370{
371 return vias == NULL? -ENODEV: 0;
372}
373
51d3082f 374static int __init pmu_init(void)
1da177e4
LT		 375{
376 if (vias == NULL)
377 return -ENODEV;
378 return 0;
379}
380#endif /* CONFIG_ADB */
381
382/*
383 * We can't wait until pmu_init gets called, that happens too late.
384 * It happens after IDE and SCSI initialization, which can take a few
385 * seconds, and by that time the PMU could have given up on us and
386 * turned us off.
387 * Thus this is called with arch_initcall rather than device_initcall.
388 */
389static int __init via_pmu_start(void)
390{
0ebfff14
BH		 391 unsigned int irq;
392
1da177e4
LT		 393 if (vias == NULL)
394 return -ENODEV;
395
1da177e4 396 batt_req.complete = 1;
1da177e4 397
0ebfff14
BH		 398 irq = irq_of_parse_and_map(vias, 0);
399 if (irq == NO_IRQ) {
7b52b440 400 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH		 401 return -ENODEV;
402 }
ba461f09
IC		 403 /* We set IRQF_NO_SUSPEND because we don't want the interrupt
404 * to be disabled between the 2 passes of driver suspend, we
405 * control our own disabling for that one
11a50873 406 */
ba461f09
IC		 407 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
408 "VIA-PMU", (void *)0)) {
0ebfff14
BH		 409 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
410 return -ENODEV;
1da177e4
LT		 411 }
412
51d3082f
BH		 413 if (pmu_kind == PMU_KEYLARGO_BASED) {
414 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
415 if (gpio_node == NULL)
416 gpio_node = of_find_node_by_name(NULL,
417 "pmu-interrupt");
0ebfff14
BH		 418 if (gpio_node)
419 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 420
0ebfff14 421 if (gpio_irq != NO_IRQ) {
11a50873 422 if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
51d3082f
BH		 423 "GPIO1 ADB", (void *)0))
424 printk(KERN_ERR "pmu: can't get irq %d"
425 " (GPIO1)\n", gpio_irq);
426 else
427 gpio_irq_enabled = 1;
428 }
1da177e4
LT		 429 }
430
431 /* Enable interrupts */
432 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
433
434 pmu_fully_inited = 1;
435
436 /* Make sure PMU settle down before continuing. This is _very_ important
437 * since the IDE probe may shut interrupts down for quite a bit of time. If
438 * a PMU communication is pending while this happens, the PMU may timeout
439 * Not that on Core99 machines, the PMU keeps sending us environement
440 * messages, we should find a way to either fix IDE or make it call
441 * pmu_suspend() before masking interrupts. This can also happens while
442 * scolling with some fbdevs.
443 */
444 do {
445 pmu_poll();
446 } while (pmu_state != idle);
447
448 return 0;
449}
450
451arch_initcall(via_pmu_start);
452
453/*
454 * This has to be done after pci_init, which is a subsys_initcall.
455 */
456static int __init via_pmu_dev_init(void)
457{
458 if (vias == NULL)
459 return -ENODEV;
460
1da177e4 461#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 462 /* Initialize backlight */
4b755999 463 pmu_backlight_init();
5474c120 464#endif
1da177e4 465
8c870933 466#ifdef CONFIG_PPC32
71a157e8
GL		 467 if (of_machine_is_compatible("AAPL,3400/2400") ||
468 of_machine_is_compatible("AAPL,3500")) {
1da177e4
LT		 469 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
470 NULL, PMAC_MB_INFO_MODEL, 0);
471 pmu_battery_count = 1;
472 if (mb == PMAC_TYPE_COMET)
473 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
474 else
475 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
71a157e8
GL		 476 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
477 of_machine_is_compatible("PowerBook1,1")) {
1da177e4
LT		 478 pmu_battery_count = 2;
479 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
480 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
481 } else {
30686ba6
SR		 482 struct device_node* prim =
483 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 484 const u32 *prim_info = NULL;
1da177e4 485 if (prim)
01b2726d 486 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT		 487 if (prim_info) {
488 /* Other stuffs here yet unknown */
489 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
490 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
491 if (pmu_battery_count > 1)
492 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
493 }
30686ba6 494 of_node_put(prim);
1da177e4 495 }
8c870933
BH		 496#endif /* CONFIG_PPC32 */
497
1da177e4
LT		 498 /* Create /proc/pmu */
499 proc_pmu_root = proc_mkdir("pmu", NULL);
500 if (proc_pmu_root) {
8c870933 501 long i;
1da177e4
LT		 502
503 for (i=0; i<pmu_battery_count; i++) {
504 char title[16];
8c870933 505 sprintf(title, "battery_%ld", i);
9d2f7342
AD		 506 proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
507 &pmu_battery_proc_fops, (void *)i);
1da177e4 508 }
1da177e4 509
9d2f7342
AD		 510 proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
511 proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
512 &pmu_irqstats_proc_fops);
513 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
514 &pmu_options_proc_fops);
1da177e4
LT		 515 }
516 return 0;
517}
518
519device_initcall(via_pmu_dev_init);
520
aacaf9bd 521static int
1da177e4
LT		 522init_pmu(void)
523{
524 int timeout;
525 struct adb_request req;
526
527 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
528 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
529
530 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
531 timeout = 100000;
532 while (!req.complete) {
533 if (--timeout < 0) {
534 printk(KERN_ERR "init_pmu: no response from PMU\n");
535 return 0;
536 }
537 udelay(10);
538 pmu_poll();
539 }
540
541 /* ack all pending interrupts */
542 timeout = 100000;
543 interrupt_data[0][0] = 1;
544 while (interrupt_data[0][0] || pmu_state != idle) {
545 if (--timeout < 0) {
546 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
547 return 0;
548 }
549 if (pmu_state == idle)
550 adb_int_pending = 1;
7d12e780 551 via_pmu_interrupt(0, NULL);
1da177e4
LT		 552 udelay(10);
553 }
554
555 /* Tell PMU we are ready. */
556 if (pmu_kind == PMU_KEYLARGO_BASED) {
557 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
558 while (!req.complete)
559 pmu_poll();
560 }
561
562 /* Read PMU version */
563 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
564 pmu_wait_complete(&req);
565 if (req.reply_len > 0)
566 pmu_version = req.reply[0];
567
568 /* Read server mode setting */
569 if (pmu_kind == PMU_KEYLARGO_BASED) {
570 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
571 PMU_PWR_GET_POWERUP_EVENTS);
572 pmu_wait_complete(&req);
573 if (req.reply_len == 2) {
574 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
575 option_server_mode = 1;
576 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
577 option_server_mode ? "enabled" : "disabled");
578 }
579 }
580 return 1;
581}
582
583int
584pmu_get_model(void)
585{
586 return pmu_kind;
587}
588
1da177e4
LT		 589static void pmu_set_server_mode(int server_mode)
590{
591 struct adb_request req;
592
593 if (pmu_kind != PMU_KEYLARGO_BASED)
594 return;
595
596 option_server_mode = server_mode;
597 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
598 pmu_wait_complete(&req);
599 if (req.reply_len < 2)
600 return;
601 if (server_mode)
602 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
603 PMU_PWR_SET_POWERUP_EVENTS,
604 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
605 else
606 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
607 PMU_PWR_CLR_POWERUP_EVENTS,
608 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
609 pmu_wait_complete(&req);
610}
611
1da177e4
LT		 612/* This new version of the code for 2400/3400/3500 powerbooks
613 * is inspired from the implementation in gkrellm-pmu
614 */
aacaf9bd 615static void
1da177e4
LT		 616done_battery_state_ohare(struct adb_request* req)
617{
618 /* format:
619 * [0] : flags
620 * 0x01 : AC indicator
621 * 0x02 : charging
622 * 0x04 : battery exist
623 * 0x08 :
624 * 0x10 :
625 * 0x20 : full charged
626 * 0x40 : pcharge reset
627 * 0x80 : battery exist
628 *
629 * [1][2] : battery voltage
630 * [3] : CPU temperature
631 * [4] : battery temperature
632 * [5] : current
633 * [6][7] : pcharge
634 * --tkoba
635 */
636 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
637 long pcharge, charge, vb, vmax, lmax;
638 long vmax_charging, vmax_charged;
639 long amperage, voltage, time, max;
640 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
641 NULL, PMAC_MB_INFO_MODEL, 0);
642
643 if (req->reply[0] & 0x01)
644 pmu_power_flags |= PMU_PWR_AC_PRESENT;
645 else
646 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
647
648 if (mb == PMAC_TYPE_COMET) {
649 vmax_charged = 189;
650 vmax_charging = 213;
651 lmax = 6500;
652 } else {
653 vmax_charged = 330;
654 vmax_charging = 330;
655 lmax = 6500;
656 }
657 vmax = vmax_charged;
658
659 /* If battery installed */
660 if (req->reply[0] & 0x04) {
661 bat_flags |= PMU_BATT_PRESENT;
662 if (req->reply[0] & 0x02)
663 bat_flags |= PMU_BATT_CHARGING;
664 vb = (req->reply[1] << 8) | req->reply[2];
665 voltage = (vb * 265 + 72665) / 10;
666 amperage = req->reply[5];
667 if ((req->reply[0] & 0x01) == 0) {
668 if (amperage > 200)
669 vb += ((amperage - 200) * 15)/100;
670 } else if (req->reply[0] & 0x02) {
671 vb = (vb * 97) / 100;
672 vmax = vmax_charging;
673 }
674 charge = (100 * vb) / vmax;
675 if (req->reply[0] & 0x40) {
676 pcharge = (req->reply[6] << 8) + req->reply[7];
677 if (pcharge > lmax)
678 pcharge = lmax;
679 pcharge *= 100;
680 pcharge = 100 - pcharge / lmax;
681 if (pcharge < charge)
682 charge = pcharge;
683 }
684 if (amperage > 0)
685 time = (charge * 16440) / amperage;
686 else
687 time = 0;
688 max = 100;
689 amperage = -amperage;
690 } else
691 charge = max = amperage = voltage = time = 0;
692
693 pmu_batteries[pmu_cur_battery].flags = bat_flags;
694 pmu_batteries[pmu_cur_battery].charge = charge;
695 pmu_batteries[pmu_cur_battery].max_charge = max;
696 pmu_batteries[pmu_cur_battery].amperage = amperage;
697 pmu_batteries[pmu_cur_battery].voltage = voltage;
698 pmu_batteries[pmu_cur_battery].time_remaining = time;
699
700 clear_bit(0, &async_req_locks);
701}
702
aacaf9bd 703static void
1da177e4
LT		 704done_battery_state_smart(struct adb_request* req)
705{
706 /* format:
707 * [0] : format of this structure (known: 3,4,5)
708 * [1] : flags
709 *
710 * format 3 & 4:
711 *
712 * [2] : charge
713 * [3] : max charge
714 * [4] : current
715 * [5] : voltage
716 *
717 * format 5:
718 *
719 * [2][3] : charge
720 * [4][5] : max charge
721 * [6][7] : current
722 * [8][9] : voltage
723 */
724
725 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
726 int amperage;
727 unsigned int capa, max, voltage;
728
729 if (req->reply[1] & 0x01)
730 pmu_power_flags |= PMU_PWR_AC_PRESENT;
731 else
732 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
733
734
735 capa = max = amperage = voltage = 0;
736
737 if (req->reply[1] & 0x04) {
738 bat_flags |= PMU_BATT_PRESENT;
739 switch(req->reply[0]) {
740 case 3:
741 case 4: capa = req->reply[2];
742 max = req->reply[3];
743 amperage = *((signed char *)&req->reply[4]);
744 voltage = req->reply[5];
745 break;
746 case 5: capa = (req->reply[2] << 8) | req->reply[3];
747 max = (req->reply[4] << 8) | req->reply[5];
748 amperage = *((signed short *)&req->reply[6]);
749 voltage = (req->reply[8] << 8) | req->reply[9];
750 break;
751 default:
752 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
753 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
754 break;
755 }
756 }
757
758 if ((req->reply[1] & 0x01) && (amperage > 0))
759 bat_flags |= PMU_BATT_CHARGING;
760
761 pmu_batteries[pmu_cur_battery].flags = bat_flags;
762 pmu_batteries[pmu_cur_battery].charge = capa;
763 pmu_batteries[pmu_cur_battery].max_charge = max;
764 pmu_batteries[pmu_cur_battery].amperage = amperage;
765 pmu_batteries[pmu_cur_battery].voltage = voltage;
766 if (amperage) {
767 if ((req->reply[1] & 0x01) && (amperage > 0))
768 pmu_batteries[pmu_cur_battery].time_remaining
769 = ((max-capa) * 3600) / amperage;
770 else
771 pmu_batteries[pmu_cur_battery].time_remaining
772 = (capa * 3600) / (-amperage);
773 } else
774 pmu_batteries[pmu_cur_battery].time_remaining = 0;
775
776 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
777
778 clear_bit(0, &async_req_locks);
779}
780
aacaf9bd 781static void
1da177e4
LT		 782query_battery_state(void)
783{
784 if (test_and_set_bit(0, &async_req_locks))
785 return;
786 if (pmu_kind == PMU_OHARE_BASED)
787 pmu_request(&batt_req, done_battery_state_ohare,
788 1, PMU_BATTERY_STATE);
789 else
790 pmu_request(&batt_req, done_battery_state_smart,
791 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
792}
793
9d2f7342 794static int pmu_info_proc_show(struct seq_file *m, void *v)
1da177e4 795{
9d2f7342
AD		 796 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
797 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
798 seq_printf(m, "AC Power : %d\n",
63e1fd41 799 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
9d2f7342
AD		 800 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
801
802 return 0;
803}
1da177e4 804
9d2f7342
AD		 805static int pmu_info_proc_open(struct inode *inode, struct file *file)
806{
807 return single_open(file, pmu_info_proc_show, NULL);
1da177e4
LT		 808}
809
9d2f7342
AD		 810static const struct file_operations pmu_info_proc_fops = {
811 .owner = THIS_MODULE,
812 .open = pmu_info_proc_open,
813 .read = seq_read,
814 .llseek = seq_lseek,
815 .release = single_release,
816};
817
818static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 819{
820 int i;
1da177e4
LT		 821 static const char *irq_names[] = {
822 "Total CB1 triggered events",
823 "Total GPIO1 triggered events",
824 "PC-Card eject button",
825 "Sound/Brightness button",
826 "ADB message",
827 "Battery state change",
828 "Environment interrupt",
829 "Tick timer",
830 "Ghost interrupt (zero len)",
831 "Empty interrupt (empty mask)",
832 "Max irqs in a row"
833 };
834
835 for (i=0; i<11; i++) {
9d2f7342 836 seq_printf(m, " %2u: %10u (%s)\n",
1da177e4
LT		 837 i, pmu_irq_stats[i], irq_names[i]);
838 }
9d2f7342 839 return 0;
1da177e4
LT		 840}
841
9d2f7342 842static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
1da177e4 843{
9d2f7342
AD		 844 return single_open(file, pmu_irqstats_proc_show, NULL);
845}
846
847static const struct file_operations pmu_irqstats_proc_fops = {
848 .owner = THIS_MODULE,
849 .open = pmu_irqstats_proc_open,
850 .read = seq_read,
851 .llseek = seq_lseek,
852 .release = single_release,
853};
854
855static int pmu_battery_proc_show(struct seq_file *m, void *v)
856{
857 long batnum = (long)m->private;
1da177e4 858
9d2f7342
AD		 859 seq_putc(m, '\n');
860 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
861 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
862 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
863 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
864 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
865 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
866 return 0;
1da177e4 867}
1da177e4 868
9d2f7342 869static int pmu_battery_proc_open(struct inode *inode, struct file *file)
1da177e4 870{
9d2f7342
AD		 871 return single_open(file, pmu_battery_proc_show, PDE(inode)->data);
872}
1da177e4 873
9d2f7342
AD		 874static const struct file_operations pmu_battery_proc_fops = {
875 .owner = THIS_MODULE,
876 .open = pmu_battery_proc_open,
877 .read = seq_read,
878 .llseek = seq_lseek,
879 .release = single_release,
880};
881
882static int pmu_options_proc_show(struct seq_file *m, void *v)
883{
f91266ed 884#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 885 if (pmu_kind == PMU_KEYLARGO_BASED &&
886 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
9d2f7342 887 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 888#endif
1da177e4 889 if (pmu_kind == PMU_KEYLARGO_BASED)
9d2f7342 890 seq_printf(m, "server_mode=%d\n", option_server_mode);
1da177e4 891
9d2f7342 892 return 0;
1da177e4 893}
9d2f7342
AD		 894
895static int pmu_options_proc_open(struct inode *inode, struct file *file)
896{
897 return single_open(file, pmu_options_proc_show, NULL);
898}
899
900static ssize_t pmu_options_proc_write(struct file *file,
901 const char __user *buffer, size_t count, loff_t *pos)
1da177e4
LT		 902{
903 char tmp[33];
904 char *label, *val;
9d2f7342 905 size_t fcount = count;
1da177e4
LT		 906
907 if (!count)
908 return -EINVAL;
909 if (count > 32)
910 count = 32;
911 if (copy_from_user(tmp, buffer, count))
912 return -EFAULT;
913 tmp[count] = 0;
914
915 label = tmp;
916 while(*label == ' ')
917 label++;
918 val = label;
919 while(*val && (*val != '=')) {
920 if (*val == ' ')
921 *val = 0;
922 val++;
923 }
924 if ((*val) == 0)
925 return -EINVAL;
926 *(val++) = 0;
927 while(*val == ' ')
928 val++;
f91266ed 929#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 930 if (pmu_kind == PMU_KEYLARGO_BASED &&
931 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
932 if (!strcmp(label, "lid_wakeup"))
933 option_lid_wakeup = ((*val) == '1');
8c870933 934#endif
1da177e4
LT		 935 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
936 int new_value;
937 new_value = ((*val) == '1');
938 if (new_value != option_server_mode)
939 pmu_set_server_mode(new_value);
940 }
941 return fcount;
942}
943
9d2f7342
AD		 944static const struct file_operations pmu_options_proc_fops = {
945 .owner = THIS_MODULE,
946 .open = pmu_options_proc_open,
947 .read = seq_read,
948 .llseek = seq_lseek,
949 .release = single_release,
950 .write = pmu_options_proc_write,
951};
952
1da177e4
LT		 953#ifdef CONFIG_ADB
954/* Send an ADB command */
11a50873 955static int pmu_send_request(struct adb_request *req, int sync)
1da177e4
LT		 956{
957 int i, ret;
958
959 if ((vias == NULL) || (!pmu_fully_inited)) {
960 req->complete = 1;
961 return -ENXIO;
962 }
963
964 ret = -EINVAL;
965
966 switch (req->data[0]) {
967 case PMU_PACKET:
968 for (i = 0; i < req->nbytes - 1; ++i)
969 req->data[i] = req->data[i+1];
970 --req->nbytes;
971 if (pmu_data_len[req->data[0]][1] != 0) {
972 req->reply[0] = ADB_RET_OK;
973 req->reply_len = 1;
974 } else
975 req->reply_len = 0;
976 ret = pmu_queue_request(req);
977 break;
978 case CUDA_PACKET:
979 switch (req->data[1]) {
980 case CUDA_GET_TIME:
981 if (req->nbytes != 2)
982 break;
983 req->data[0] = PMU_READ_RTC;
984 req->nbytes = 1;
985 req->reply_len = 3;
986 req->reply[0] = CUDA_PACKET;
987 req->reply[1] = 0;
988 req->reply[2] = CUDA_GET_TIME;
989 ret = pmu_queue_request(req);
990 break;
991 case CUDA_SET_TIME:
992 if (req->nbytes != 6)
993 break;
994 req->data[0] = PMU_SET_RTC;
995 req->nbytes = 5;
996 for (i = 1; i <= 4; ++i)
997 req->data[i] = req->data[i+1];
998 req->reply_len = 3;
999 req->reply[0] = CUDA_PACKET;
1000 req->reply[1] = 0;
1001 req->reply[2] = CUDA_SET_TIME;
1002 ret = pmu_queue_request(req);
1003 break;
1004 }
1005 break;
1006 case ADB_PACKET:
1007 if (!pmu_has_adb)
1008 return -ENXIO;
1009 for (i = req->nbytes - 1; i > 1; --i)
1010 req->data[i+2] = req->data[i];
1011 req->data[3] = req->nbytes - 2;
1012 req->data[2] = pmu_adb_flags;
1013 /*req->data[1] = req->data[1];*/
1014 req->data[0] = PMU_ADB_CMD;
1015 req->nbytes += 2;
1016 req->reply_expected = 1;
1017 req->reply_len = 0;
1018 ret = pmu_queue_request(req);
1019 break;
1020 }
1021 if (ret) {
1022 req->complete = 1;
1023 return ret;
1024 }
1025
1026 if (sync)
1027 while (!req->complete)
1028 pmu_poll();
1029
1030 return 0;
1031}
1032
1033/* Enable/disable autopolling */
11a50873 1034static int __pmu_adb_autopoll(int devs)
1da177e4
LT		 1035{
1036 struct adb_request req;
1037
1da177e4 1038 if (devs) {
1da177e4
LT		 1039 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1040 adb_dev_map >> 8, adb_dev_map);
1041 pmu_adb_flags = 2;
1042 } else {
1043 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1044 pmu_adb_flags = 0;
1045 }
1046 while (!req.complete)
1047 pmu_poll();
1048 return 0;
1049}
1050
11a50873
BH		 1051static int pmu_adb_autopoll(int devs)
1052{
1053 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1054 return -ENXIO;
1055
1056 adb_dev_map = devs;
1057 return __pmu_adb_autopoll(devs);
1058}
1059
1da177e4 1060/* Reset the ADB bus */
11a50873 1061static int pmu_adb_reset_bus(void)
1da177e4
LT		 1062{
1063 struct adb_request req;
1064 int save_autopoll = adb_dev_map;
1065
1066 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1067 return -ENXIO;
1068
1069 /* anyone got a better idea?? */
11a50873 1070 __pmu_adb_autopoll(0);
1da177e4 1071
11a50873 1072 req.nbytes = 4;
1da177e4
LT		 1073 req.done = NULL;
1074 req.data[0] = PMU_ADB_CMD;
11a50873
BH		 1075 req.data[1] = ADB_BUSRESET;
1076 req.data[2] = 0;
1da177e4
LT		 1077 req.data[3] = 0;
1078 req.data[4] = 0;
1079 req.reply_len = 0;
1080 req.reply_expected = 1;
1081 if (pmu_queue_request(&req) != 0) {
1082 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1083 return -EIO;
1084 }
1085 pmu_wait_complete(&req);
1086
1087 if (save_autopoll != 0)
11a50873 1088 __pmu_adb_autopoll(save_autopoll);
1da177e4
LT		 1089
1090 return 0;
1091}
1092#endif /* CONFIG_ADB */
1093
1094/* Construct and send a pmu request */
aacaf9bd 1095int
1da177e4
LT		 1096pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1097 int nbytes, ...)
1098{
1099 va_list list;
1100 int i;
1101
1102 if (vias == NULL)
1103 return -ENXIO;
1104
1105 if (nbytes < 0 || nbytes > 32) {
1106 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1107 req->complete = 1;
1108 return -EINVAL;
1109 }
1110 req->nbytes = nbytes;
1111 req->done = done;
1112 va_start(list, nbytes);
1113 for (i = 0; i < nbytes; ++i)
1114 req->data[i] = va_arg(list, int);
1115 va_end(list);
1116 req->reply_len = 0;
1117 req->reply_expected = 0;
1118 return pmu_queue_request(req);
1119}
1120
aacaf9bd 1121int
1da177e4
LT		 1122pmu_queue_request(struct adb_request *req)
1123{
1124 unsigned long flags;
1125 int nsend;
1126
1127 if (via == NULL) {
1128 req->complete = 1;
1129 return -ENXIO;
1130 }
1131 if (req->nbytes <= 0) {
1132 req->complete = 1;
1133 return 0;
1134 }
1135 nsend = pmu_data_len[req->data[0]][0];
1136 if (nsend >= 0 && req->nbytes != nsend + 1) {
1137 req->complete = 1;
1138 return -EINVAL;
1139 }
1140
1141 req->next = NULL;
1142 req->sent = 0;
1143 req->complete = 0;
1144
1145 spin_lock_irqsave(&pmu_lock, flags);
1146 if (current_req != 0) {
1147 last_req->next = req;
1148 last_req = req;
1149 } else {
1150 current_req = req;
1151 last_req = req;
1152 if (pmu_state == idle)
1153 pmu_start();
1154 }
1155 spin_unlock_irqrestore(&pmu_lock, flags);
1156
1157 return 0;
1158}
1159
1160static inline void
1161wait_for_ack(void)
1162{
1163 /* Sightly increased the delay, I had one occurrence of the message
1164 * reported
1165 */
1166 int timeout = 4000;
1167 while ((in_8(&via[B]) & TACK) == 0) {
1168 if (--timeout < 0) {
1169 printk(KERN_ERR "PMU not responding (!ack)\n");
1170 return;
1171 }
1172 udelay(10);
1173 }
1174}
1175
1176/* New PMU seems to be very sensitive to those timings, so we make sure
1177 * PCI is flushed immediately */
1178static inline void
1179send_byte(int x)
1180{
1181 volatile unsigned char __iomem *v = via;
1182
1183 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1184 out_8(&v[SR], x);
1185 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1186 (void)in_8(&v[B]);
1187}
1188
1189static inline void
1190recv_byte(void)
1191{
1192 volatile unsigned char __iomem *v = via;
1193
1194 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1195 in_8(&v[SR]); /* resets SR */
1196 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1197 (void)in_8(&v[B]);
1198}
1199
1200static inline void
1201pmu_done(struct adb_request *req)
1202{
1203 void (*done)(struct adb_request *) = req->done;
1204 mb();
1205 req->complete = 1;
1206 /* Here, we assume that if the request has a done member, the
1207 * struct request will survive to setting req->complete to 1
1208 */
1209 if (done)
1210 (*done)(req);
1211}
1212
aacaf9bd 1213static void
1da177e4
LT		 1214pmu_start(void)
1215{
1216 struct adb_request *req;
1217
1218 /* assert pmu_state == idle */
1219 /* get the packet to send */
1220 req = current_req;
1221 if (req == 0 || pmu_state != idle
1222 || (/*req->reply_expected && */req_awaiting_reply))
1223 return;
1224
1225 pmu_state = sending;
1226 data_index = 1;
1227 data_len = pmu_data_len[req->data[0]][0];
1228
1229 /* Sounds safer to make sure ACK is high before writing. This helped
1230 * kill a problem with ADB and some iBooks
1231 */
1232 wait_for_ack();
1233 /* set the shift register to shift out and send a byte */
1234 send_byte(req->data[0]);
1235}
1236
aacaf9bd 1237void
1da177e4
LT		 1238pmu_poll(void)
1239{
1240 if (!via)
1241 return;
1242 if (disable_poll)
1243 return;
7d12e780 1244 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1245}
1246
aacaf9bd 1247void
1da177e4
LT		 1248pmu_poll_adb(void)
1249{
1250 if (!via)
1251 return;
1252 if (disable_poll)
1253 return;
1254 /* Kicks ADB read when PMU is suspended */
1255 adb_int_pending = 1;
1256 do {
7d12e780 1257 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1258 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1259 || req_awaiting_reply));
1260}
1261
aacaf9bd 1262void
1da177e4
LT		 1263pmu_wait_complete(struct adb_request *req)
1264{
1265 if (!via)
1266 return;
1267 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1268 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1269}
1270
1271/* This function loops until the PMU is idle and prevents it from
1272 * anwsering to ADB interrupts. pmu_request can still be called.
1273 * This is done to avoid spurrious shutdowns when we know we'll have
1274 * interrupts switched off for a long time
1275 */
aacaf9bd 1276void
1da177e4
LT		 1277pmu_suspend(void)
1278{
1279 unsigned long flags;
1b0e9d44 1280
1da177e4
LT		 1281 if (!via)
1282 return;
1283
1284 spin_lock_irqsave(&pmu_lock, flags);
1285 pmu_suspended++;
1286 if (pmu_suspended > 1) {
1287 spin_unlock_irqrestore(&pmu_lock, flags);
1288 return;
1289 }
1290
1291 do {
1292 spin_unlock_irqrestore(&pmu_lock, flags);
1293 if (req_awaiting_reply)
1294 adb_int_pending = 1;
7d12e780 1295 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1296 spin_lock_irqsave(&pmu_lock, flags);
1297 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT		 1298 if (gpio_irq >= 0)
1299 disable_irq_nosync(gpio_irq);
1300 out_8(&via[IER], CB1_INT | IER_CLR);
1301 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT		 1302 break;
1303 }
1304 } while (1);
1305}
1306
aacaf9bd 1307void
1da177e4
LT		 1308pmu_resume(void)
1309{
1310 unsigned long flags;
1311
1312 if (!via || (pmu_suspended < 1))
1313 return;
1314
1315 spin_lock_irqsave(&pmu_lock, flags);
1316 pmu_suspended--;
1317 if (pmu_suspended > 0) {
1318 spin_unlock_irqrestore(&pmu_lock, flags);
1319 return;
1320 }
1321 adb_int_pending = 1;
1da177e4
LT		 1322 if (gpio_irq >= 0)
1323 enable_irq(gpio_irq);
1324 out_8(&via[IER], CB1_INT | IER_SET);
1325 spin_unlock_irqrestore(&pmu_lock, flags);
1326 pmu_poll();
1da177e4
LT		 1327}
1328
1329/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1330static void
7d12e780 1331pmu_handle_data(unsigned char *data, int len)
1da177e4
LT		 1332{
1333 unsigned char ints, pirq;
1334 int i = 0;
1335
1336 asleep = 0;
1337 if (drop_interrupts || len < 1) {
1338 adb_int_pending = 0;
1339 pmu_irq_stats[8]++;
1340 return;
1341 }
1342
1343 /* Get PMU interrupt mask */
1344 ints = data[0];
1345
1346 /* Record zero interrupts for stats */
1347 if (ints == 0)
1348 pmu_irq_stats[9]++;
1349
1350 /* Hack to deal with ADB autopoll flag */
1351 if (ints & PMU_INT_ADB)
1352 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1353
1354next:
1355
1356 if (ints == 0) {
1357 if (i > pmu_irq_stats[10])
1358 pmu_irq_stats[10] = i;
1359 return;
1360 }
1361
1362 for (pirq = 0; pirq < 8; pirq++)
1363 if (ints & (1 << pirq))
1364 break;
1365 pmu_irq_stats[pirq]++;
1366 i++;
1367 ints &= ~(1 << pirq);
1368
1369 /* Note: for some reason, we get an interrupt with len=1,
1370 * data[0]==0 after each normal ADB interrupt, at least
1371 * on the Pismo. Still investigating... --BenH
1372 */
1373 if ((1 << pirq) & PMU_INT_ADB) {
1374 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1375 struct adb_request *req = req_awaiting_reply;
1376 if (req == 0) {
1377 printk(KERN_ERR "PMU: extra ADB reply\n");
1378 return;
1379 }
1380 req_awaiting_reply = NULL;
1381 if (len <= 2)
1382 req->reply_len = 0;
1383 else {
1384 memcpy(req->reply, data + 1, len - 1);
1385 req->reply_len = len - 1;
1386 }
1387 pmu_done(req);
1388 } else {
1da177e4
LT		 1389 if (len == 4 && data[1] == 0x2c) {
1390 extern int xmon_wants_key, xmon_adb_keycode;
1391 if (xmon_wants_key) {
1392 xmon_adb_keycode = data[2];
1393 return;
1394 }
1395 }
1da177e4
LT		 1396#ifdef CONFIG_ADB
1397 /*
1398 * XXX On the [23]400 the PMU gives us an up
1399 * event for keycodes 0x74 or 0x75 when the PC
1400 * card eject buttons are released, so we
1401 * ignore those events.
1402 */
1403 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1404 && data[1] == 0x2c && data[3] == 0xff
1405 && (data[2] & ~1) == 0xf4))
7d12e780 1406 adb_input(data+1, len-1, 1);
1da177e4
LT		 1407#endif /* CONFIG_ADB */
1408 }
1409 }
1410 /* Sound/brightness button pressed */
1411 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1412#ifdef CONFIG_PMAC_BACKLIGHT
1413 if (len == 3)
4b755999
MH		 1414 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1415#endif
1da177e4
LT		 1416 }
1417 /* Tick interrupt */
1418 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT		 1419 /* Environement or tick interrupt, query batteries */
1420 if (pmu_battery_count) {
1421 if ((--query_batt_timer) == 0) {
1422 query_battery_state();
1423 query_batt_timer = BATTERY_POLLING_COUNT;
1424 }
1425 }
1426 }
1427 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1428 if (pmu_battery_count)
1429 query_battery_state();
1430 pmu_pass_intr(data, len);
9e8e30a0
JB		 1431 /* len == 6 is probably a bad check. But how do I
1432 * know what PMU versions send what events here? */
1433 if (len == 6) {
1434 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1435 via_pmu_event(PMU_EVT_LID, data[1]&1);
1436 }
1da177e4
LT		 1437 } else {
1438 pmu_pass_intr(data, len);
1da177e4
LT		 1439 }
1440 goto next;
1441}
1442
aacaf9bd 1443static struct adb_request*
7d12e780 1444pmu_sr_intr(void)
1da177e4
LT		 1445{
1446 struct adb_request *req;
1447 int bite = 0;
1448
1449 if (via[B] & TREQ) {
1450 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1451 out_8(&via[IFR], SR_INT);
1452 return NULL;
1453 }
1454 /* The ack may not yet be low when we get the interrupt */
1455 while ((in_8(&via[B]) & TACK) != 0)
1456 ;
1457
1458 /* if reading grab the byte, and reset the interrupt */
1459 if (pmu_state == reading || pmu_state == reading_intr)
1460 bite = in_8(&via[SR]);
1461
1462 /* reset TREQ and wait for TACK to go high */
1463 out_8(&via[B], in_8(&via[B]) | TREQ);
1464 wait_for_ack();
1465
1466 switch (pmu_state) {
1467 case sending:
1468 req = current_req;
1469 if (data_len < 0) {
1470 data_len = req->nbytes - 1;
1471 send_byte(data_len);
1472 break;
1473 }
1474 if (data_index <= data_len) {
1475 send_byte(req->data[data_index++]);
1476 break;
1477 }
1478 req->sent = 1;
1479 data_len = pmu_data_len[req->data[0]][1];
1480 if (data_len == 0) {
1481 pmu_state = idle;
1482 current_req = req->next;
1483 if (req->reply_expected)
1484 req_awaiting_reply = req;
1485 else
1486 return req;
1487 } else {
1488 pmu_state = reading;
1489 data_index = 0;
1490 reply_ptr = req->reply + req->reply_len;
1491 recv_byte();
1492 }
1493 break;
1494
1495 case intack:
1496 data_index = 0;
1497 data_len = -1;
1498 pmu_state = reading_intr;
1499 reply_ptr = interrupt_data[int_data_last];
1500 recv_byte();
1501 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1502 enable_irq(gpio_irq);
1503 gpio_irq_enabled = 1;
1504 }
1505 break;
1506
1507 case reading:
1508 case reading_intr:
1509 if (data_len == -1) {
1510 data_len = bite;
1511 if (bite > 32)
1512 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1513 } else if (data_index < 32) {
1514 reply_ptr[data_index++] = bite;
1515 }
1516 if (data_index < data_len) {
1517 recv_byte();
1518 break;
1519 }
1520
1521 if (pmu_state == reading_intr) {
1522 pmu_state = idle;
1523 int_data_state[int_data_last] = int_data_ready;
1524 interrupt_data_len[int_data_last] = data_len;
1525 } else {
1526 req = current_req;
1527 /*
1528 * For PMU sleep and freq change requests, we lock the
c03983ac 1529 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT		 1530 * spurrious event polling getting in
1531 */
1532 current_req = req->next;
1533 req->reply_len += data_index;
1534 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1535 pmu_state = locked;
1536 else
1537 pmu_state = idle;
1538 return req;
1539 }
1540 break;
1541
1542 default:
1543 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1544 pmu_state);
1545 }
1546 return NULL;
1547}
1548
aacaf9bd 1549static irqreturn_t
7d12e780 1550via_pmu_interrupt(int irq, void *arg)
1da177e4
LT		 1551{
1552 unsigned long flags;
1553 int intr;
1554 int nloop = 0;
1555 int int_data = -1;
1556 struct adb_request *req = NULL;
1557 int handled = 0;
1558
1559 /* This is a bit brutal, we can probably do better */
1560 spin_lock_irqsave(&pmu_lock, flags);
1561 ++disable_poll;
1562
1563 for (;;) {
1564 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1565 if (intr == 0)
1566 break;
1567 handled = 1;
1568 if (++nloop > 1000) {
1569 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1570 "intr=%x, ier=%x pmu_state=%d\n",
1571 intr, in_8(&via[IER]), pmu_state);
1572 break;
1573 }
1574 out_8(&via[IFR], intr);
1575 if (intr & CB1_INT) {
1576 adb_int_pending = 1;
1577 pmu_irq_stats[0]++;
1578 }
1579 if (intr & SR_INT) {
7d12e780 1580 req = pmu_sr_intr();
1da177e4
LT		 1581 if (req)
1582 break;
1583 }
1584 }
1585
1586recheck:
1587 if (pmu_state == idle) {
1588 if (adb_int_pending) {
1589 if (int_data_state[0] == int_data_empty)
1590 int_data_last = 0;
1591 else if (int_data_state[1] == int_data_empty)
1592 int_data_last = 1;
1593 else
1594 goto no_free_slot;
1595 pmu_state = intack;
1596 int_data_state[int_data_last] = int_data_fill;
1597 /* Sounds safer to make sure ACK is high before writing.
1598 * This helped kill a problem with ADB and some iBooks
1599 */
1600 wait_for_ack();
1601 send_byte(PMU_INT_ACK);
1602 adb_int_pending = 0;
1603 } else if (current_req)
1604 pmu_start();
1605 }
1606no_free_slot:
1607 /* Mark the oldest buffer for flushing */
1608 if (int_data_state[!int_data_last] == int_data_ready) {
1609 int_data_state[!int_data_last] = int_data_flush;
1610 int_data = !int_data_last;
1611 } else if (int_data_state[int_data_last] == int_data_ready) {
1612 int_data_state[int_data_last] = int_data_flush;
1613 int_data = int_data_last;
1614 }
1615 --disable_poll;
1616 spin_unlock_irqrestore(&pmu_lock, flags);
1617
1618 /* Deal with completed PMU requests outside of the lock */
1619 if (req) {
1620 pmu_done(req);
1621 req = NULL;
1622 }
1623
1624 /* Deal with interrupt datas outside of the lock */
1625 if (int_data >= 0) {
7d12e780 1626 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT		 1627 spin_lock_irqsave(&pmu_lock, flags);
1628 ++disable_poll;
1629 int_data_state[int_data] = int_data_empty;
1630 int_data = -1;
1631 goto recheck;
1632 }
1633
1634 return IRQ_RETVAL(handled);
1635}
1636
aacaf9bd 1637void
1da177e4
LT		 1638pmu_unlock(void)
1639{
1640 unsigned long flags;
1641
1642 spin_lock_irqsave(&pmu_lock, flags);
1643 if (pmu_state == locked)
1644 pmu_state = idle;
1645 adb_int_pending = 1;
1646 spin_unlock_irqrestore(&pmu_lock, flags);
1647}
1648
1649
aacaf9bd 1650static irqreturn_t
7d12e780 1651gpio1_interrupt(int irq, void *arg)
1da177e4
LT		 1652{
1653 unsigned long flags;
1654
1655 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1656 spin_lock_irqsave(&pmu_lock, flags);
1657 if (gpio_irq_enabled > 0) {
1658 disable_irq_nosync(gpio_irq);
1659 gpio_irq_enabled = 0;
1660 }
1661 pmu_irq_stats[1]++;
1662 adb_int_pending = 1;
1663 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1664 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1665 return IRQ_HANDLED;
1666 }
1667 return IRQ_NONE;
1668}
1669
aacaf9bd 1670void
1da177e4
LT		 1671pmu_enable_irled(int on)
1672{
1673 struct adb_request req;
1674
1675 if (vias == NULL)
1676 return ;
1677 if (pmu_kind == PMU_KEYLARGO_BASED)
1678 return ;
1679
1680 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1681 (on ? PMU_POW_ON : PMU_POW_OFF));
1682 pmu_wait_complete(&req);
1683}
1684
aacaf9bd 1685void
1da177e4
LT		 1686pmu_restart(void)
1687{
1688 struct adb_request req;
1689
1690 if (via == NULL)
1691 return;
1692
1693 local_irq_disable();
1694
1695 drop_interrupts = 1;
1696
1697 if (pmu_kind != PMU_KEYLARGO_BASED) {
1698 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1699 PMU_INT_TICK );
1700 while(!req.complete)
1701 pmu_poll();
1702 }
1703
1704 pmu_request(&req, NULL, 1, PMU_RESET);
1705 pmu_wait_complete(&req);
1706 for (;;)
1707 ;
1708}
1709
aacaf9bd 1710void
1da177e4
LT		 1711pmu_shutdown(void)
1712{
1713 struct adb_request req;
1714
1715 if (via == NULL)
1716 return;
1717
1718 local_irq_disable();
1719
1720 drop_interrupts = 1;
1721
1722 if (pmu_kind != PMU_KEYLARGO_BASED) {
1723 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1724 PMU_INT_TICK );
1725 pmu_wait_complete(&req);
1726 } else {
1727 /* Disable server mode on shutdown or we'll just
1728 * wake up again
1729 */
1730 pmu_set_server_mode(0);
1731 }
1732
1733 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1734 'M', 'A', 'T', 'T');
1735 pmu_wait_complete(&req);
1736 for (;;)
1737 ;
1738}
1739
1740int
1741pmu_present(void)
1742{
1743 return via != 0;
1744}
1745
f91266ed 1746#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 1747/*
1748 * Put the powerbook to sleep.
1749 */
1750
aacaf9bd 1751static u32 save_via[8];
1da177e4 1752
aacaf9bd 1753static void
1da177e4
LT		 1754save_via_state(void)
1755{
1756 save_via[0] = in_8(&via[ANH]);
1757 save_via[1] = in_8(&via[DIRA]);
1758 save_via[2] = in_8(&via[B]);
1759 save_via[3] = in_8(&via[DIRB]);
1760 save_via[4] = in_8(&via[PCR]);
1761 save_via[5] = in_8(&via[ACR]);
1762 save_via[6] = in_8(&via[T1CL]);
1763 save_via[7] = in_8(&via[T1CH]);
1764}
aacaf9bd 1765static void
1da177e4
LT		 1766restore_via_state(void)
1767{
1768 out_8(&via[ANH], save_via[0]);
1769 out_8(&via[DIRA], save_via[1]);
1770 out_8(&via[B], save_via[2]);
1771 out_8(&via[DIRB], save_via[3]);
1772 out_8(&via[PCR], save_via[4]);
1773 out_8(&via[ACR], save_via[5]);
1774 out_8(&via[T1CL], save_via[6]);
1775 out_8(&via[T1CH], save_via[7]);
1776 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
1777 out_8(&via[IFR], 0x7f); /* clear IFR */
1778 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1779}
1780
1da177e4
LT		 1781#define GRACKLE_PM (1<<7)
1782#define GRACKLE_DOZE (1<<5)
1783#define GRACKLE_NAP (1<<4)
1784#define GRACKLE_SLEEP (1<<3)
1785
3bea6313 1786static int powerbook_sleep_grackle(void)
1da177e4
LT		 1787{
1788 unsigned long save_l2cr;
1789 unsigned short pmcr1;
1790 struct adb_request req;
1da177e4
LT		 1791 struct pci_dev *grackle;
1792
c78f8305 1793 grackle = pci_get_bus_and_slot(0, 0);
1da177e4
LT		 1794 if (!grackle)
1795 return -ENODEV;
1796
1da177e4
LT		 1797 /* Turn off various things. Darwin does some retry tests here... */
1798 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1799 pmu_wait_complete(&req);
1800 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1801 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1802 pmu_wait_complete(&req);
1803
1804 /* For 750, save backside cache setting and disable it */
1805 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1806
1807 if (!__fake_sleep) {
1808 /* Ask the PMU to put us to sleep */
1809 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1810 pmu_wait_complete(&req);
1811 }
1812
1813 /* The VIA is supposed not to be restored correctly*/
1814 save_via_state();
1815 /* We shut down some HW */
1816 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1817
1818 pci_read_config_word(grackle, 0x70, &pmcr1);
1819 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1820 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1821 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1822 pci_write_config_word(grackle, 0x70, pmcr1);
1823
1824 /* Call low-level ASM sleep handler */
1825 if (__fake_sleep)
1826 mdelay(5000);
1827 else
1828 low_sleep_handler();
1829
1830 /* We're awake again, stop grackle PM */
1831 pci_read_config_word(grackle, 0x70, &pmcr1);
1832 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1833 pci_write_config_word(grackle, 0x70, pmcr1);
1834
c78f8305
AC		 1835 pci_dev_put(grackle);
1836
1da177e4
LT		 1837 /* Make sure the PMU is idle */
1838 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1839 restore_via_state();
1840
1841 /* Restore L2 cache */
1842 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1843 _set_L2CR(save_l2cr);
1844
1845 /* Restore userland MMU context */
5e696617 1846 switch_mmu_context(NULL, current->active_mm);
1da177e4
LT		 1847
1848 /* Power things up */
1849 pmu_unlock();
1850 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1851 pmu_wait_complete(&req);
1852 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1853 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1854 pmu_wait_complete(&req);
1855 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1856 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1857 pmu_wait_complete(&req);
1858
1da177e4
LT		 1859 return 0;
1860}
1861
aacaf9bd 1862static int
1da177e4
LT		 1863powerbook_sleep_Core99(void)
1864{
1865 unsigned long save_l2cr;
1866 unsigned long save_l3cr;
1867 struct adb_request req;
1da177e4
LT		 1868
1869 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1870 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1871 return -ENOSYS;
1872 }
1873
1874 if (num_online_cpus() > 1 || cpu_is_offline(0))
1875 return -EAGAIN;
1876
b16eeb47
BH		 1877 /* Stop environment and ADB interrupts */
1878 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1879 pmu_wait_complete(&req);
1da177e4
LT		 1880
1881 /* Tell PMU what events will wake us up */
1882 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1883 0xff, 0xff);
1884 pmu_wait_complete(&req);
1885 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1886 0, PMU_PWR_WAKEUP_KEY |
1887 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1888 pmu_wait_complete(&req);
1889
1890 /* Save the state of the L2 and L3 caches */
1891 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1892 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1893
1894 if (!__fake_sleep) {
1895 /* Ask the PMU to put us to sleep */
1896 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1897 pmu_wait_complete(&req);
1898 }
1899
1900 /* The VIA is supposed not to be restored correctly*/
1901 save_via_state();
1902
1903 /* Shut down various ASICs. There's a chance that we can no longer
1904 * talk to the PMU after this, so I moved it to _after_ sending the
1905 * sleep command to it. Still need to be checked.
1906 */
1907 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1908
1909 /* Call low-level ASM sleep handler */
1910 if (__fake_sleep)
1911 mdelay(5000);
1912 else
1913 low_sleep_handler();
1914
1915 /* Restore Apple core ASICs state */
1916 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1917
1918 /* Restore VIA */
1919 restore_via_state();
1920
0086b5ec
BH		 1921 /* tweak LPJ before cpufreq is there */
1922 loops_per_jiffy *= 2;
1923
1da177e4
LT		 1924 /* Restore video */
1925 pmac_call_early_video_resume();
1926
1927 /* Restore L2 cache */
1928 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1929 _set_L2CR(save_l2cr);
1930 /* Restore L3 cache */
1931 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1932 _set_L3CR(save_l3cr);
1933
1934 /* Restore userland MMU context */
5e696617 1935 switch_mmu_context(NULL, current->active_mm);
1da177e4
LT		 1936
1937 /* Tell PMU we are ready */
1938 pmu_unlock();
1939 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1940 pmu_wait_complete(&req);
1941 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1942 pmu_wait_complete(&req);
1943
0086b5ec
BH		 1944 /* Restore LPJ, cpufreq will adjust the cpu frequency */
1945 loops_per_jiffy /= 2;
1946
1da177e4
LT		 1947 return 0;
1948}
1949
1950#define PB3400_MEM_CTRL 0xf8000000
1951#define PB3400_MEM_CTRL_SLEEP 0x70
1952
887ef35a
PM		 1953static void __iomem *pb3400_mem_ctrl;
1954
1955static void powerbook_sleep_init_3400(void)
1956{
1957 /* map in the memory controller registers */
1958 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1959 if (pb3400_mem_ctrl == NULL)
1960 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1961}
1962
1963static int powerbook_sleep_3400(void)
1da177e4 1964{
f91266ed 1965 int i, x;
1da177e4 1966 unsigned int hid0;
887ef35a 1967 unsigned long msr;
1da177e4 1968 struct adb_request sleep_req;
1da177e4
LT		 1969 unsigned int __iomem *mem_ctrl_sleep;
1970
887ef35a 1971 if (pb3400_mem_ctrl == NULL)
1da177e4 1972 return -ENOMEM;
887ef35a 1973 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 1974
1da177e4
LT		 1975 /* Set the memory controller to keep the memory refreshed
1976 while we're asleep */
1977 for (i = 0x403f; i >= 0x4000; --i) {
1978 out_be32(mem_ctrl_sleep, i);
1979 do {
1980 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1981 } while (x == 0);
1982 if (x >= 0x100)
1983 break;
1984 }
1985
1986 /* Ask the PMU to put us to sleep */
1987 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM		 1988 pmu_wait_complete(&sleep_req);
1989 pmu_unlock();
1da177e4 1990
887ef35a 1991 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 1992
1da177e4
LT		 1993 asleep = 1;
1994
1995 /* Put the CPU into sleep mode */
21fe3301 1996 hid0 = mfspr(SPRN_HID0);
1da177e4 1997 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 1998 mtspr(SPRN_HID0, hid0);
887ef35a
PM		 1999 local_irq_enable();
2000 msr = mfmsr() | MSR_POW;
2001 while (asleep) {
2002 mb();
2003 mtmsr(msr);
2004 isync();
2005 }
2006 local_irq_disable();
1da177e4
LT		 2007
2008 /* OK, we're awake again, start restoring things */
2009 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 2010 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 2011
1da177e4
LT		 2012 return 0;
2013}
2014
f91266ed 2015#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 2016
1da177e4
LT		 2017/*
2018 * Support for /dev/pmu device
2019 */
2020#define RB_SIZE 0x10
2021struct pmu_private {
2022 struct list_head list;
2023 int rb_get;
2024 int rb_put;
2025 struct rb_entry {
2026 unsigned short len;
2027 unsigned char data[16];
2028 } rb_buf[RB_SIZE];
2029 wait_queue_head_t wait;
2030 spinlock_t lock;
2031#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2032 int backlight_locker;
4b755999 2033#endif
1da177e4
LT		 2034};
2035
2036static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2037static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2038
aacaf9bd 2039static void
1da177e4
LT		 2040pmu_pass_intr(unsigned char *data, int len)
2041{
2042 struct pmu_private *pp;
2043 struct list_head *list;
2044 int i;
2045 unsigned long flags;
2046
2047 if (len > sizeof(pp->rb_buf[0].data))
2048 len = sizeof(pp->rb_buf[0].data);
2049 spin_lock_irqsave(&all_pvt_lock, flags);
2050 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2051 pp = list_entry(list, struct pmu_private, list);
2052 spin_lock(&pp->lock);
2053 i = pp->rb_put + 1;
2054 if (i >= RB_SIZE)
2055 i = 0;
2056 if (i != pp->rb_get) {
2057 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2058 rp->len = len;
2059 memcpy(rp->data, data, len);
2060 pp->rb_put = i;
2061 wake_up_interruptible(&pp->wait);
2062 }
2063 spin_unlock(&pp->lock);
2064 }
2065 spin_unlock_irqrestore(&all_pvt_lock, flags);
2066}
2067
aacaf9bd 2068static int
1da177e4
LT		 2069pmu_open(struct inode *inode, struct file *file)
2070{
2071 struct pmu_private *pp;
2072 unsigned long flags;
2073
2074 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2075 if (pp == 0)
2076 return -ENOMEM;
2077 pp->rb_get = pp->rb_put = 0;
2078 spin_lock_init(&pp->lock);
2079 init_waitqueue_head(&pp->wait);
ffe83733 2080 lock_kernel();
1da177e4
LT		 2081 spin_lock_irqsave(&all_pvt_lock, flags);
2082#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2083 pp->backlight_locker = 0;
4b755999 2084#endif
1da177e4
LT		 2085 list_add(&pp->list, &all_pmu_pvt);
2086 spin_unlock_irqrestore(&all_pvt_lock, flags);
2087 file->private_data = pp;
ffe83733 2088 unlock_kernel();
1da177e4
LT		 2089 return 0;
2090}
2091
aacaf9bd 2092static ssize_t
1da177e4
LT		 2093pmu_read(struct file *file, char __user *buf,
2094 size_t count, loff_t *ppos)
2095{
2096 struct pmu_private *pp = file->private_data;
2097 DECLARE_WAITQUEUE(wait, current);
2098 unsigned long flags;
2099 int ret = 0;
2100
2101 if (count < 1 || pp == 0)
2102 return -EINVAL;
2103 if (!access_ok(VERIFY_WRITE, buf, count))
2104 return -EFAULT;
2105
2106 spin_lock_irqsave(&pp->lock, flags);
2107 add_wait_queue(&pp->wait, &wait);
2108 current->state = TASK_INTERRUPTIBLE;
2109
2110 for (;;) {
2111 ret = -EAGAIN;
2112 if (pp->rb_get != pp->rb_put) {
2113 int i = pp->rb_get;
2114 struct rb_entry *rp = &pp->rb_buf[i];
2115 ret = rp->len;
2116 spin_unlock_irqrestore(&pp->lock, flags);
2117 if (ret > count)
2118 ret = count;
2119 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2120 ret = -EFAULT;
2121 if (++i >= RB_SIZE)
2122 i = 0;
2123 spin_lock_irqsave(&pp->lock, flags);
2124 pp->rb_get = i;
2125 }
2126 if (ret >= 0)
2127 break;
2128 if (file->f_flags & O_NONBLOCK)
2129 break;
2130 ret = -ERESTARTSYS;
2131 if (signal_pending(current))
2132 break;
2133 spin_unlock_irqrestore(&pp->lock, flags);
2134 schedule();
2135 spin_lock_irqsave(&pp->lock, flags);
2136 }
2137 current->state = TASK_RUNNING;
2138 remove_wait_queue(&pp->wait, &wait);
2139 spin_unlock_irqrestore(&pp->lock, flags);
2140
2141 return ret;
2142}
2143
aacaf9bd 2144static ssize_t
1da177e4
LT		 2145pmu_write(struct file *file, const char __user *buf,
2146 size_t count, loff_t *ppos)
2147{
2148 return 0;
2149}
2150
aacaf9bd 2151static unsigned int
1da177e4
LT		 2152pmu_fpoll(struct file *filp, poll_table *wait)
2153{
2154 struct pmu_private *pp = filp->private_data;
2155 unsigned int mask = 0;
2156 unsigned long flags;
2157
2158 if (pp == 0)
2159 return 0;
2160 poll_wait(filp, &pp->wait, wait);
2161 spin_lock_irqsave(&pp->lock, flags);
2162 if (pp->rb_get != pp->rb_put)
2163 mask |= POLLIN;
2164 spin_unlock_irqrestore(&pp->lock, flags);
2165 return mask;
2166}
2167
aacaf9bd 2168static int
1da177e4
LT		 2169pmu_release(struct inode *inode, struct file *file)
2170{
2171 struct pmu_private *pp = file->private_data;
2172 unsigned long flags;
2173
1da177e4
LT		 2174 if (pp != 0) {
2175 file->private_data = NULL;
2176 spin_lock_irqsave(&all_pvt_lock, flags);
2177 list_del(&pp->list);
2178 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2179
1da177e4 2180#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH		 2181 if (pp->backlight_locker)
2182 pmac_backlight_enable();
2183#endif
2184
1da177e4
LT		 2185 kfree(pp);
2186 }
1da177e4
LT		 2187 return 0;
2188}
2189
f91266ed 2190#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2191static void pmac_suspend_disable_irqs(void)
f91266ed 2192{
f91266ed
JB		 2193 /* Call platform functions marked "on sleep" */
2194 pmac_pfunc_i2c_suspend();
2195 pmac_pfunc_base_suspend();
f91266ed
JB		 2196}
2197
2198static int powerbook_sleep(suspend_state_t state)
2199{
2200 int error = 0;
2201
2202 /* Wait for completion of async requests */
2203 while (!batt_req.complete)
2204 pmu_poll();
2205
2206 /* Giveup the lazy FPU & vec so we don't have to back them
2207 * up from the low level code
2208 */
2209 enable_kernel_fp();
2210
2211#ifdef CONFIG_ALTIVEC
2212 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2213 enable_kernel_altivec();
2214#endif /* CONFIG_ALTIVEC */
2215
2216 switch (pmu_kind) {
2217 case PMU_OHARE_BASED:
2218 error = powerbook_sleep_3400();
2219 break;
2220 case PMU_HEATHROW_BASED:
2221 case PMU_PADDINGTON_BASED:
2222 error = powerbook_sleep_grackle();
2223 break;
2224 case PMU_KEYLARGO_BASED:
2225 error = powerbook_sleep_Core99();
2226 break;
2227 default:
2228 return -ENOSYS;
2229 }
2230
2231 if (error)
2232 return error;
2233
2234 mdelay(100);
2235
f91266ed
JB		 2236 return 0;
2237}
2238
7ac5dde9 2239static void pmac_suspend_enable_irqs(void)
f91266ed
JB		 2240{
2241 /* Force a poll of ADB interrupts */
2242 adb_int_pending = 1;
2243 via_pmu_interrupt(0, NULL);
2244
f91266ed 2245 mdelay(10);
f91266ed
JB		 2246
2247 /* Call platform functions marked "on wake" */
2248 pmac_pfunc_base_resume();
2249 pmac_pfunc_i2c_resume();
2250}
2251
2252static int pmu_sleep_valid(suspend_state_t state)
2253{
2254 return state == PM_SUSPEND_MEM
2255 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2256}
2257
2258static struct platform_suspend_ops pmu_pm_ops = {
2259 .enter = powerbook_sleep,
2260 .valid = pmu_sleep_valid,
2261};
2262
2263static int register_pmu_pm_ops(void)
2264{
7ac5dde9
SW		 2265 if (pmu_kind == PMU_OHARE_BASED)
2266 powerbook_sleep_init_3400();
2267 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2268 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB		 2269 suspend_set_ops(&pmu_pm_ops);
2270
2271 return 0;
2272}
2273
2274device_initcall(register_pmu_pm_ops);
2275#endif
2276
55929332 2277static int pmu_ioctl(struct file *filp,
1da177e4
LT		 2278 u_int cmd, u_long arg)
2279{
1da177e4 2280 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2281 int error = -EINVAL;
1da177e4
LT		 2282
2283 switch (cmd) {
2284 case PMU_IOC_SLEEP:
2285 if (!capable(CAP_SYS_ADMIN))
2286 return -EACCES;
f91266ed 2287 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2288 case PMU_IOC_CAN_SLEEP:
f91266ed 2289 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT		 2290 return put_user(0, argp);
2291 else
2292 return put_user(1, argp);
2293
5474c120
MH		 2294#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2295 /* Compatibility ioctl's for backlight */
1da177e4 2296 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH		 2297 {
2298 int brightness;
2299
5474c120
MH		 2300 brightness = pmac_backlight_get_legacy_brightness();
2301 if (brightness < 0)
2302 return brightness;
2303 else
2304 return put_user(brightness, argp);
2305
2306 }
1da177e4
LT		 2307 case PMU_IOC_SET_BACKLIGHT:
2308 {
5474c120
MH		 2309 int brightness;
2310
5474c120
MH		 2311 error = get_user(brightness, argp);
2312 if (error)
2313 return error;
2314
2315 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT		 2316 }
2317#ifdef CONFIG_INPUT_ADBHID
2318 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2319 struct pmu_private *pp = filp->private_data;
8c870933 2320
1da177e4
LT		 2321 if (pp->backlight_locker)
2322 return 0;
4b755999 2323
1da177e4 2324 pp->backlight_locker = 1;
4b755999
MH		 2325 pmac_backlight_disable();
2326
1da177e4
LT		 2327 return 0;
2328 }
2329#endif /* CONFIG_INPUT_ADBHID */
5474c120 2330#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2331
1da177e4
LT		 2332 case PMU_IOC_GET_MODEL:
2333 return put_user(pmu_kind, argp);
2334 case PMU_IOC_HAS_ADB:
2335 return put_user(pmu_has_adb, argp);
2336 }
8c870933 2337 return error;
1da177e4
LT		 2338}
2339
55929332
AB		 2340static long pmu_unlocked_ioctl(struct file *filp,
2341 u_int cmd, u_long arg)
2342{
2343 int ret;
2344
2345 lock_kernel();
2346 ret = pmu_ioctl(filp, cmd, arg);
2347 unlock_kernel();
2348
2349 return ret;
2350}
2351
fa027c2a 2352static const struct file_operations pmu_device_fops = {
1da177e4
LT		 2353 .read = pmu_read,
2354 .write = pmu_write,
2355 .poll = pmu_fpoll,
55929332 2356 .unlocked_ioctl = pmu_unlocked_ioctl,
1da177e4
LT		 2357 .open = pmu_open,
2358 .release = pmu_release,
2359};
2360
aacaf9bd 2361static struct miscdevice pmu_device = {
1da177e4
LT		 2362 PMU_MINOR, "pmu", &pmu_device_fops
2363};
2364
8c870933 2365static int pmu_device_init(void)
1da177e4
LT		 2366{
2367 if (!via)
8c870933 2368 return 0;
1da177e4
LT		 2369 if (misc_register(&pmu_device) < 0)
2370 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2371 return 0;
1da177e4 2372}
8c870933
BH		 2373device_initcall(pmu_device_init);
2374
1da177e4
LT		 2375
2376#ifdef DEBUG_SLEEP
aacaf9bd 2377static inline void
1da177e4
LT		 2378polled_handshake(volatile unsigned char __iomem *via)
2379{
2380 via[B] &= ~TREQ; eieio();
2381 while ((via[B] & TACK) != 0)
2382 ;
2383 via[B] |= TREQ; eieio();
2384 while ((via[B] & TACK) == 0)
2385 ;
2386}
2387
aacaf9bd 2388static inline void
1da177e4
LT		 2389polled_send_byte(volatile unsigned char __iomem *via, int x)
2390{
2391 via[ACR] |= SR_OUT | SR_EXT; eieio();
2392 via[SR] = x; eieio();
2393 polled_handshake(via);
2394}
2395
aacaf9bd 2396static inline int
1da177e4
LT		 2397polled_recv_byte(volatile unsigned char __iomem *via)
2398{
2399 int x;
2400
2401 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2402 x = via[SR]; eieio();
2403 polled_handshake(via);
2404 x = via[SR]; eieio();
2405 return x;
2406}
2407
aacaf9bd 2408int
1da177e4
LT		 2409pmu_polled_request(struct adb_request *req)
2410{
2411 unsigned long flags;
2412 int i, l, c;
2413 volatile unsigned char __iomem *v = via;
2414
2415 req->complete = 1;
2416 c = req->data[0];
2417 l = pmu_data_len[c][0];
2418 if (l >= 0 && req->nbytes != l + 1)
2419 return -EINVAL;
2420
2421 local_irq_save(flags);
2422 while (pmu_state != idle)
2423 pmu_poll();
2424
2425 while ((via[B] & TACK) == 0)
2426 ;
2427 polled_send_byte(v, c);
2428 if (l < 0) {
2429 l = req->nbytes - 1;
2430 polled_send_byte(v, l);
2431 }
2432 for (i = 1; i <= l; ++i)
2433 polled_send_byte(v, req->data[i]);
2434
2435 l = pmu_data_len[c][1];
2436 if (l < 0)
2437 l = polled_recv_byte(v);
2438 for (i = 0; i < l; ++i)
2439 req->reply[i + req->reply_len] = polled_recv_byte(v);
2440
2441 if (req->done)
2442 (*req->done)(req);
2443
2444 local_irq_restore(flags);
2445 return 0;
2446}
1da177e4 2447
f91266ed
JB		 2448/* N.B. This doesn't work on the 3400 */
2449void pmu_blink(int n)
2450{
2451 struct adb_request req;
1da177e4 2452
f91266ed 2453 memset(&req, 0, sizeof(req));
1da177e4 2454
f91266ed
JB		 2455 for (; n > 0; --n) {
2456 req.nbytes = 4;
2457 req.done = NULL;
2458 req.data[0] = 0xee;
2459 req.data[1] = 4;
2460 req.data[2] = 0;
2461 req.data[3] = 1;
2462 req.reply[0] = ADB_RET_OK;
2463 req.reply_len = 1;
2464 req.reply_expected = 0;
2465 pmu_polled_request(&req);
2466 mdelay(50);
2467 req.nbytes = 4;
2468 req.done = NULL;
2469 req.data[0] = 0xee;
2470 req.data[1] = 4;
2471 req.data[2] = 0;
2472 req.data[3] = 0;
2473 req.reply[0] = ADB_RET_OK;
2474 req.reply_len = 1;
2475 req.reply_expected = 0;
2476 pmu_polled_request(&req);
2477 mdelay(50);
2478 }
2479 mdelay(50);
2480}
2481#endif /* DEBUG_SLEEP */
1da177e4 2482
f91266ed 2483#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2484int pmu_sys_suspended;
1da177e4 2485
3bfffd97 2486static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
1da177e4 2487{
ca078bae 2488 if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
1da177e4
LT		 2489 return 0;
2490
0094f2cd 2491 /* Suspend PMU event interrupts */\
1da177e4 2492 pmu_suspend();
1da177e4 2493 pmu_sys_suspended = 1;
0094f2cd
BH		 2494
2495#ifdef CONFIG_PMAC_BACKLIGHT
2496 /* Tell backlight code not to muck around with the chip anymore */
2497 pmu_backlight_set_sleep(1);
2498#endif
2499
1da177e4
LT		 2500 return 0;
2501}
2502
2503static int pmu_sys_resume(struct sys_device *sysdev)
2504{
2505 struct adb_request req;
2506
2507 if (!pmu_sys_suspended)
2508 return 0;
2509
2510 /* Tell PMU we are ready */
2511 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2512 pmu_wait_complete(&req);
2513
0094f2cd
BH		 2514#ifdef CONFIG_PMAC_BACKLIGHT
2515 /* Tell backlight code it can use the chip again */
2516 pmu_backlight_set_sleep(0);
2517#endif
1da177e4
LT		 2518 /* Resume PMU event interrupts */
2519 pmu_resume();
1da177e4
LT		 2520 pmu_sys_suspended = 0;
2521
2522 return 0;
2523}
2524
f91266ed 2525#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 2526
2527static struct sysdev_class pmu_sysclass = {
af5ca3f4 2528 .name = "pmu",
1da177e4
LT		 2529};
2530
2531static struct sys_device device_pmu = {
1da177e4
LT		 2532 .cls = &pmu_sysclass,
2533};
2534
2535static struct sysdev_driver driver_pmu = {
f91266ed 2536#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 2537 .suspend = &pmu_sys_suspend,
2538 .resume = &pmu_sys_resume,
f91266ed 2539#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 2540};
2541
2542static int __init init_pmu_sysfs(void)
2543{
2544 int rc;
2545
2546 rc = sysdev_class_register(&pmu_sysclass);
2547 if (rc) {
2548 printk(KERN_ERR "Failed registering PMU sys class\n");
2549 return -ENODEV;
2550 }
2551 rc = sysdev_register(&device_pmu);
2552 if (rc) {
2553 printk(KERN_ERR "Failed registering PMU sys device\n");
2554 return -ENODEV;
2555 }
2556 rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
2557 if (rc) {
2558 printk(KERN_ERR "Failed registering PMU sys driver\n");
2559 return -ENODEV;
2560 }
2561 return 0;
2562}
2563
2564subsys_initcall(init_pmu_sysfs);
2565
2566EXPORT_SYMBOL(pmu_request);
730745a5 2567EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT		 2568EXPORT_SYMBOL(pmu_poll);
2569EXPORT_SYMBOL(pmu_poll_adb);
2570EXPORT_SYMBOL(pmu_wait_complete);
2571EXPORT_SYMBOL(pmu_suspend);
2572EXPORT_SYMBOL(pmu_resume);
2573EXPORT_SYMBOL(pmu_unlock);
620a2459 2574#if defined(CONFIG_PPC32)
1da177e4
LT		 2575EXPORT_SYMBOL(pmu_enable_irled);
2576EXPORT_SYMBOL(pmu_battery_count);
2577EXPORT_SYMBOL(pmu_batteries);
2578EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2579#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2580
Linux kernel - Deliverables
This page took 0.651886 seconds and 5 git commands to generate.