Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Device driver for the via-pmu on Apple Powermacs. | |
3 | * | |
4 | * The VIA (versatile interface adapter) interfaces to the PMU, | |
5 | * a 6805 microprocessor core whose primary function is to control | |
6 | * battery charging and system power on the PowerBook 3400 and 2400. | |
7 | * The PMU also controls the ADB (Apple Desktop Bus) which connects | |
8 | * to the keyboard and mouse, as well as the non-volatile RAM | |
9 | * and the RTC (real time clock) chip. | |
10 | * | |
11 | * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. | |
12 | * Copyright (C) 2001-2002 Benjamin Herrenschmidt | |
f91266ed | 13 | * Copyright (C) 2006-2007 Johannes Berg |
1da177e4 LT |
14 | * |
15 | * THIS DRIVER IS BECOMING A TOTAL MESS ! | |
16 | * - Cleanup atomically disabling reply to PMU events after | |
17 | * a sleep or a freq. switch | |
1da177e4 LT |
18 | * |
19 | */ | |
20 | #include <stdarg.h> | |
d851b6e0 | 21 | #include <linux/mutex.h> |
1da177e4 LT |
22 | #include <linux/types.h> |
23 | #include <linux/errno.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/miscdevice.h> | |
28 | #include <linux/blkdev.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/poll.h> | |
32 | #include <linux/adb.h> | |
33 | #include <linux/pmu.h> | |
34 | #include <linux/cuda.h> | |
1da177e4 LT |
35 | #include <linux/module.h> |
36 | #include <linux/spinlock.h> | |
37 | #include <linux/pm.h> | |
38 | #include <linux/proc_fs.h> | |
9d2f7342 | 39 | #include <linux/seq_file.h> |
1da177e4 LT |
40 | #include <linux/init.h> |
41 | #include <linux/interrupt.h> | |
42 | #include <linux/device.h> | |
e83b906c | 43 | #include <linux/syscore_ops.h> |
7dfb7103 | 44 | #include <linux/freezer.h> |
1da177e4 | 45 | #include <linux/syscalls.h> |
6002f544 | 46 | #include <linux/suspend.h> |
1da177e4 | 47 | #include <linux/cpu.h> |
4cc4587f | 48 | #include <linux/compat.h> |
5af50730 RH |
49 | #include <linux/of_address.h> |
50 | #include <linux/of_irq.h> | |
1da177e4 LT |
51 | #include <asm/prom.h> |
52 | #include <asm/machdep.h> | |
53 | #include <asm/io.h> | |
54 | #include <asm/pgtable.h> | |
1da177e4 LT |
55 | #include <asm/sections.h> |
56 | #include <asm/irq.h> | |
57 | #include <asm/pmac_feature.h> | |
5b9ca526 BH |
58 | #include <asm/pmac_pfunc.h> |
59 | #include <asm/pmac_low_i2c.h> | |
1da177e4 LT |
60 | #include <asm/uaccess.h> |
61 | #include <asm/mmu_context.h> | |
62 | #include <asm/cputable.h> | |
63 | #include <asm/time.h> | |
1da177e4 | 64 | #include <asm/backlight.h> |
1da177e4 | 65 | |
9e8e30a0 JB |
66 | #include "via-pmu-event.h" |
67 | ||
1da177e4 | 68 | /* Some compile options */ |
f91266ed | 69 | #undef DEBUG_SLEEP |
1da177e4 LT |
70 | |
71 | /* Misc minor number allocated for /dev/pmu */ | |
72 | #define PMU_MINOR 154 | |
73 | ||
74 | /* How many iterations between battery polls */ | |
75 | #define BATTERY_POLLING_COUNT 2 | |
76 | ||
d851b6e0 | 77 | static DEFINE_MUTEX(pmu_info_proc_mutex); |
1da177e4 LT |
78 | static volatile unsigned char __iomem *via; |
79 | ||
80 | /* VIA registers - spaced 0x200 bytes apart */ | |
81 | #define RS 0x200 /* skip between registers */ | |
82 | #define B 0 /* B-side data */ | |
83 | #define A RS /* A-side data */ | |
84 | #define DIRB (2*RS) /* B-side direction (1=output) */ | |
85 | #define DIRA (3*RS) /* A-side direction (1=output) */ | |
86 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ | |
87 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ | |
88 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ | |
89 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ | |
90 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ | |
91 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ | |
92 | #define SR (10*RS) /* Shift register */ | |
93 | #define ACR (11*RS) /* Auxiliary control register */ | |
94 | #define PCR (12*RS) /* Peripheral control register */ | |
95 | #define IFR (13*RS) /* Interrupt flag register */ | |
96 | #define IER (14*RS) /* Interrupt enable register */ | |
97 | #define ANH (15*RS) /* A-side data, no handshake */ | |
98 | ||
99 | /* Bits in B data register: both active low */ | |
100 | #define TACK 0x08 /* Transfer acknowledge (input) */ | |
101 | #define TREQ 0x10 /* Transfer request (output) */ | |
102 | ||
103 | /* Bits in ACR */ | |
104 | #define SR_CTRL 0x1c /* Shift register control bits */ | |
105 | #define SR_EXT 0x0c /* Shift on external clock */ | |
106 | #define SR_OUT 0x10 /* Shift out if 1 */ | |
107 | ||
108 | /* Bits in IFR and IER */ | |
109 | #define IER_SET 0x80 /* set bits in IER */ | |
110 | #define IER_CLR 0 /* clear bits in IER */ | |
111 | #define SR_INT 0x04 /* Shift register full/empty */ | |
112 | #define CB2_INT 0x08 | |
113 | #define CB1_INT 0x10 /* transition on CB1 input */ | |
114 | ||
115 | static volatile enum pmu_state { | |
116 | idle, | |
117 | sending, | |
118 | intack, | |
119 | reading, | |
120 | reading_intr, | |
121 | locked, | |
122 | } pmu_state; | |
123 | ||
124 | static volatile enum int_data_state { | |
125 | int_data_empty, | |
126 | int_data_fill, | |
127 | int_data_ready, | |
128 | int_data_flush | |
129 | } int_data_state[2] = { int_data_empty, int_data_empty }; | |
130 | ||
131 | static struct adb_request *current_req; | |
132 | static struct adb_request *last_req; | |
133 | static struct adb_request *req_awaiting_reply; | |
134 | static unsigned char interrupt_data[2][32]; | |
135 | static int interrupt_data_len[2]; | |
136 | static int int_data_last; | |
137 | static unsigned char *reply_ptr; | |
138 | static int data_index; | |
139 | static int data_len; | |
140 | static volatile int adb_int_pending; | |
141 | static volatile int disable_poll; | |
1da177e4 LT |
142 | static struct device_node *vias; |
143 | static int pmu_kind = PMU_UNKNOWN; | |
87275856 | 144 | static int pmu_fully_inited; |
1da177e4 | 145 | static int pmu_has_adb; |
51d3082f | 146 | static struct device_node *gpio_node; |
87275856 | 147 | static unsigned char __iomem *gpio_reg; |
0ebfff14 | 148 | static int gpio_irq = NO_IRQ; |
1da177e4 | 149 | static int gpio_irq_enabled = -1; |
87275856 | 150 | static volatile int pmu_suspended; |
1da177e4 LT |
151 | static spinlock_t pmu_lock; |
152 | static u8 pmu_intr_mask; | |
153 | static int pmu_version; | |
154 | static int drop_interrupts; | |
f91266ed | 155 | #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) |
1da177e4 | 156 | static int option_lid_wakeup = 1; |
f91266ed | 157 | #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ |
1da177e4 LT |
158 | static unsigned long async_req_locks; |
159 | static unsigned int pmu_irq_stats[11]; | |
160 | ||
161 | static struct proc_dir_entry *proc_pmu_root; | |
162 | static struct proc_dir_entry *proc_pmu_info; | |
163 | static struct proc_dir_entry *proc_pmu_irqstats; | |
164 | static struct proc_dir_entry *proc_pmu_options; | |
165 | static int option_server_mode; | |
166 | ||
1da177e4 LT |
167 | int pmu_battery_count; |
168 | int pmu_cur_battery; | |
a334bdbd | 169 | unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT; |
1da177e4 LT |
170 | struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; |
171 | static int query_batt_timer = BATTERY_POLLING_COUNT; | |
172 | static struct adb_request batt_req; | |
173 | static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; | |
1da177e4 | 174 | |
1da177e4 LT |
175 | int __fake_sleep; |
176 | int asleep; | |
1da177e4 LT |
177 | |
178 | #ifdef CONFIG_ADB | |
87275856 | 179 | static int adb_dev_map; |
1da177e4 LT |
180 | static int pmu_adb_flags; |
181 | ||
182 | static int pmu_probe(void); | |
183 | static int pmu_init(void); | |
184 | static int pmu_send_request(struct adb_request *req, int sync); | |
185 | static int pmu_adb_autopoll(int devs); | |
186 | static int pmu_adb_reset_bus(void); | |
187 | #endif /* CONFIG_ADB */ | |
188 | ||
189 | static int init_pmu(void); | |
1da177e4 | 190 | static void pmu_start(void); |
7d12e780 DH |
191 | static irqreturn_t via_pmu_interrupt(int irq, void *arg); |
192 | static irqreturn_t gpio1_interrupt(int irq, void *arg); | |
9d2f7342 AD |
193 | static const struct file_operations pmu_info_proc_fops; |
194 | static const struct file_operations pmu_irqstats_proc_fops; | |
1da177e4 | 195 | static void pmu_pass_intr(unsigned char *data, int len); |
9d2f7342 AD |
196 | static const struct file_operations pmu_battery_proc_fops; |
197 | static const struct file_operations pmu_options_proc_fops; | |
1da177e4 LT |
198 | |
199 | #ifdef CONFIG_ADB | |
200 | struct adb_driver via_pmu_driver = { | |
201 | "PMU", | |
202 | pmu_probe, | |
203 | pmu_init, | |
204 | pmu_send_request, | |
205 | pmu_adb_autopoll, | |
206 | pmu_poll_adb, | |
207 | pmu_adb_reset_bus | |
208 | }; | |
209 | #endif /* CONFIG_ADB */ | |
210 | ||
211 | extern void low_sleep_handler(void); | |
212 | extern void enable_kernel_altivec(void); | |
213 | extern void enable_kernel_fp(void); | |
214 | ||
215 | #ifdef DEBUG_SLEEP | |
216 | int pmu_polled_request(struct adb_request *req); | |
f91266ed | 217 | void pmu_blink(int n); |
1da177e4 LT |
218 | #endif |
219 | ||
220 | /* | |
221 | * This table indicates for each PMU opcode: | |
222 | * - the number of data bytes to be sent with the command, or -1 | |
223 | * if a length byte should be sent, | |
224 | * - the number of response bytes which the PMU will return, or | |
225 | * -1 if it will send a length byte. | |
226 | */ | |
aacaf9bd | 227 | static const s8 pmu_data_len[256][2] = { |
1da177e4 LT |
228 | /* 0 1 2 3 4 5 6 7 */ |
229 | /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
230 | /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
231 | /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
232 | /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
233 | /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
234 | /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, | |
235 | /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
236 | /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, | |
237 | /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
238 | /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, | |
239 | /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, | |
240 | /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, | |
241 | /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
242 | /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, | |
243 | /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
244 | /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, | |
245 | /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
246 | /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
247 | /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
248 | /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
249 | /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, | |
250 | /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
251 | /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
252 | /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
253 | /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
254 | /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
255 | /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
256 | /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, | |
257 | /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, | |
258 | /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
259 | /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
260 | /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
261 | }; | |
262 | ||
263 | static char *pbook_type[] = { | |
264 | "Unknown PowerBook", | |
265 | "PowerBook 2400/3400/3500(G3)", | |
266 | "PowerBook G3 Series", | |
267 | "1999 PowerBook G3", | |
268 | "Core99" | |
269 | }; | |
270 | ||
51d3082f | 271 | int __init find_via_pmu(void) |
1da177e4 | 272 | { |
cc5d0189 | 273 | u64 taddr; |
018a3d1d | 274 | const u32 *reg; |
51d3082f | 275 | |
1da177e4 LT |
276 | if (via != 0) |
277 | return 1; | |
51d3082f BH |
278 | vias = of_find_node_by_name(NULL, "via-pmu"); |
279 | if (vias == NULL) | |
1da177e4 | 280 | return 0; |
1da177e4 | 281 | |
01b2726d | 282 | reg = of_get_property(vias, "reg", NULL); |
51d3082f BH |
283 | if (reg == NULL) { |
284 | printk(KERN_ERR "via-pmu: No \"reg\" property !\n"); | |
285 | goto fail; | |
286 | } | |
287 | taddr = of_translate_address(vias, reg); | |
bb6b9b28 | 288 | if (taddr == OF_BAD_ADDR) { |
51d3082f BH |
289 | printk(KERN_ERR "via-pmu: Can't translate address !\n"); |
290 | goto fail; | |
1da177e4 LT |
291 | } |
292 | ||
293 | spin_lock_init(&pmu_lock); | |
294 | ||
295 | pmu_has_adb = 1; | |
296 | ||
297 | pmu_intr_mask = PMU_INT_PCEJECT | | |
298 | PMU_INT_SNDBRT | | |
299 | PMU_INT_ADB | | |
300 | PMU_INT_TICK; | |
301 | ||
302 | if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0) | |
55b61fec | 303 | || of_device_is_compatible(vias->parent, "ohare"))) |
1da177e4 | 304 | pmu_kind = PMU_OHARE_BASED; |
55b61fec | 305 | else if (of_device_is_compatible(vias->parent, "paddington")) |
1da177e4 | 306 | pmu_kind = PMU_PADDINGTON_BASED; |
55b61fec | 307 | else if (of_device_is_compatible(vias->parent, "heathrow")) |
1da177e4 | 308 | pmu_kind = PMU_HEATHROW_BASED; |
55b61fec SR |
309 | else if (of_device_is_compatible(vias->parent, "Keylargo") |
310 | || of_device_is_compatible(vias->parent, "K2-Keylargo")) { | |
51d3082f | 311 | struct device_node *gpiop; |
1658ab66 | 312 | struct device_node *adbp; |
cc5d0189 | 313 | u64 gaddr = OF_BAD_ADDR; |
1da177e4 LT |
314 | |
315 | pmu_kind = PMU_KEYLARGO_BASED; | |
1658ab66 SR |
316 | adbp = of_find_node_by_type(NULL, "adb"); |
317 | pmu_has_adb = (adbp != NULL); | |
318 | of_node_put(adbp); | |
1da177e4 LT |
319 | pmu_intr_mask = PMU_INT_PCEJECT | |
320 | PMU_INT_SNDBRT | | |
321 | PMU_INT_ADB | | |
322 | PMU_INT_TICK | | |
323 | PMU_INT_ENVIRONMENT; | |
324 | ||
51d3082f BH |
325 | gpiop = of_find_node_by_name(NULL, "gpio"); |
326 | if (gpiop) { | |
01b2726d | 327 | reg = of_get_property(gpiop, "reg", NULL); |
51d3082f BH |
328 | if (reg) |
329 | gaddr = of_translate_address(gpiop, reg); | |
cc5d0189 | 330 | if (gaddr != OF_BAD_ADDR) |
51d3082f | 331 | gpio_reg = ioremap(gaddr, 0x10); |
e702240e | 332 | of_node_put(gpiop); |
1da177e4 | 333 | } |
61e37ca2 | 334 | if (gpio_reg == NULL) { |
51d3082f | 335 | printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n"); |
ffa3eb01 | 336 | goto fail; |
61e37ca2 | 337 | } |
1da177e4 LT |
338 | } else |
339 | pmu_kind = PMU_UNKNOWN; | |
340 | ||
51d3082f BH |
341 | via = ioremap(taddr, 0x2000); |
342 | if (via == NULL) { | |
343 | printk(KERN_ERR "via-pmu: Can't map address !\n"); | |
ffa3eb01 | 344 | goto fail_via_remap; |
51d3082f | 345 | } |
1da177e4 LT |
346 | |
347 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
348 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
349 | ||
350 | pmu_state = idle; | |
351 | ||
ffa3eb01 PC |
352 | if (!init_pmu()) |
353 | goto fail_init; | |
1da177e4 | 354 | |
bb6b9b28 | 355 | printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n", |
1da177e4 LT |
356 | PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); |
357 | ||
358 | sys_ctrler = SYS_CTRLER_PMU; | |
359 | ||
360 | return 1; | |
ffa3eb01 PC |
361 | |
362 | fail_init: | |
363 | iounmap(via); | |
364 | via = NULL; | |
365 | fail_via_remap: | |
61e37ca2 OH |
366 | iounmap(gpio_reg); |
367 | gpio_reg = NULL; | |
ffa3eb01 PC |
368 | fail: |
369 | of_node_put(vias); | |
51d3082f BH |
370 | vias = NULL; |
371 | return 0; | |
1da177e4 LT |
372 | } |
373 | ||
374 | #ifdef CONFIG_ADB | |
51d3082f | 375 | static int pmu_probe(void) |
1da177e4 LT |
376 | { |
377 | return vias == NULL? -ENODEV: 0; | |
378 | } | |
379 | ||
51d3082f | 380 | static int __init pmu_init(void) |
1da177e4 LT |
381 | { |
382 | if (vias == NULL) | |
383 | return -ENODEV; | |
384 | return 0; | |
385 | } | |
386 | #endif /* CONFIG_ADB */ | |
387 | ||
388 | /* | |
389 | * We can't wait until pmu_init gets called, that happens too late. | |
390 | * It happens after IDE and SCSI initialization, which can take a few | |
391 | * seconds, and by that time the PMU could have given up on us and | |
392 | * turned us off. | |
393 | * Thus this is called with arch_initcall rather than device_initcall. | |
394 | */ | |
395 | static int __init via_pmu_start(void) | |
396 | { | |
0ebfff14 BH |
397 | unsigned int irq; |
398 | ||
1da177e4 LT |
399 | if (vias == NULL) |
400 | return -ENODEV; | |
401 | ||
1da177e4 | 402 | batt_req.complete = 1; |
1da177e4 | 403 | |
0ebfff14 BH |
404 | irq = irq_of_parse_and_map(vias, 0); |
405 | if (irq == NO_IRQ) { | |
7b52b440 | 406 | printk(KERN_ERR "via-pmu: can't map interrupt\n"); |
0ebfff14 BH |
407 | return -ENODEV; |
408 | } | |
ba461f09 IC |
409 | /* We set IRQF_NO_SUSPEND because we don't want the interrupt |
410 | * to be disabled between the 2 passes of driver suspend, we | |
411 | * control our own disabling for that one | |
11a50873 | 412 | */ |
ba461f09 IC |
413 | if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND, |
414 | "VIA-PMU", (void *)0)) { | |
0ebfff14 BH |
415 | printk(KERN_ERR "via-pmu: can't request irq %d\n", irq); |
416 | return -ENODEV; | |
1da177e4 LT |
417 | } |
418 | ||
51d3082f BH |
419 | if (pmu_kind == PMU_KEYLARGO_BASED) { |
420 | gpio_node = of_find_node_by_name(NULL, "extint-gpio1"); | |
421 | if (gpio_node == NULL) | |
422 | gpio_node = of_find_node_by_name(NULL, | |
423 | "pmu-interrupt"); | |
0ebfff14 BH |
424 | if (gpio_node) |
425 | gpio_irq = irq_of_parse_and_map(gpio_node, 0); | |
51d3082f | 426 | |
0ebfff14 | 427 | if (gpio_irq != NO_IRQ) { |
11a50873 | 428 | if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER, |
51d3082f BH |
429 | "GPIO1 ADB", (void *)0)) |
430 | printk(KERN_ERR "pmu: can't get irq %d" | |
431 | " (GPIO1)\n", gpio_irq); | |
432 | else | |
433 | gpio_irq_enabled = 1; | |
434 | } | |
1da177e4 LT |
435 | } |
436 | ||
437 | /* Enable interrupts */ | |
438 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
439 | ||
440 | pmu_fully_inited = 1; | |
441 | ||
442 | /* Make sure PMU settle down before continuing. This is _very_ important | |
443 | * since the IDE probe may shut interrupts down for quite a bit of time. If | |
444 | * a PMU communication is pending while this happens, the PMU may timeout | |
445 | * Not that on Core99 machines, the PMU keeps sending us environement | |
446 | * messages, we should find a way to either fix IDE or make it call | |
447 | * pmu_suspend() before masking interrupts. This can also happens while | |
448 | * scolling with some fbdevs. | |
449 | */ | |
450 | do { | |
451 | pmu_poll(); | |
452 | } while (pmu_state != idle); | |
453 | ||
454 | return 0; | |
455 | } | |
456 | ||
457 | arch_initcall(via_pmu_start); | |
458 | ||
459 | /* | |
460 | * This has to be done after pci_init, which is a subsys_initcall. | |
461 | */ | |
462 | static int __init via_pmu_dev_init(void) | |
463 | { | |
464 | if (vias == NULL) | |
465 | return -ENODEV; | |
466 | ||
1da177e4 | 467 | #ifdef CONFIG_PMAC_BACKLIGHT |
5474c120 | 468 | /* Initialize backlight */ |
4b755999 | 469 | pmu_backlight_init(); |
5474c120 | 470 | #endif |
1da177e4 | 471 | |
8c870933 | 472 | #ifdef CONFIG_PPC32 |
71a157e8 GL |
473 | if (of_machine_is_compatible("AAPL,3400/2400") || |
474 | of_machine_is_compatible("AAPL,3500")) { | |
1da177e4 LT |
475 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, |
476 | NULL, PMAC_MB_INFO_MODEL, 0); | |
477 | pmu_battery_count = 1; | |
478 | if (mb == PMAC_TYPE_COMET) | |
479 | pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET; | |
480 | else | |
481 | pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER; | |
71a157e8 GL |
482 | } else if (of_machine_is_compatible("AAPL,PowerBook1998") || |
483 | of_machine_is_compatible("PowerBook1,1")) { | |
1da177e4 LT |
484 | pmu_battery_count = 2; |
485 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
486 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
487 | } else { | |
30686ba6 SR |
488 | struct device_node* prim = |
489 | of_find_node_by_name(NULL, "power-mgt"); | |
018a3d1d | 490 | const u32 *prim_info = NULL; |
1da177e4 | 491 | if (prim) |
01b2726d | 492 | prim_info = of_get_property(prim, "prim-info", NULL); |
1da177e4 LT |
493 | if (prim_info) { |
494 | /* Other stuffs here yet unknown */ | |
495 | pmu_battery_count = (prim_info[6] >> 16) & 0xff; | |
496 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
497 | if (pmu_battery_count > 1) | |
498 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
499 | } | |
30686ba6 | 500 | of_node_put(prim); |
1da177e4 | 501 | } |
8c870933 BH |
502 | #endif /* CONFIG_PPC32 */ |
503 | ||
1da177e4 LT |
504 | /* Create /proc/pmu */ |
505 | proc_pmu_root = proc_mkdir("pmu", NULL); | |
506 | if (proc_pmu_root) { | |
8c870933 | 507 | long i; |
1da177e4 LT |
508 | |
509 | for (i=0; i<pmu_battery_count; i++) { | |
510 | char title[16]; | |
8c870933 | 511 | sprintf(title, "battery_%ld", i); |
9d2f7342 AD |
512 | proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root, |
513 | &pmu_battery_proc_fops, (void *)i); | |
1da177e4 | 514 | } |
1da177e4 | 515 | |
9d2f7342 AD |
516 | proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops); |
517 | proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root, | |
518 | &pmu_irqstats_proc_fops); | |
519 | proc_pmu_options = proc_create("options", 0600, proc_pmu_root, | |
520 | &pmu_options_proc_fops); | |
1da177e4 LT |
521 | } |
522 | return 0; | |
523 | } | |
524 | ||
525 | device_initcall(via_pmu_dev_init); | |
526 | ||
aacaf9bd | 527 | static int |
1da177e4 LT |
528 | init_pmu(void) |
529 | { | |
530 | int timeout; | |
531 | struct adb_request req; | |
532 | ||
533 | out_8(&via[B], via[B] | TREQ); /* negate TREQ */ | |
534 | out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */ | |
535 | ||
536 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
537 | timeout = 100000; | |
538 | while (!req.complete) { | |
539 | if (--timeout < 0) { | |
540 | printk(KERN_ERR "init_pmu: no response from PMU\n"); | |
541 | return 0; | |
542 | } | |
543 | udelay(10); | |
544 | pmu_poll(); | |
545 | } | |
546 | ||
547 | /* ack all pending interrupts */ | |
548 | timeout = 100000; | |
549 | interrupt_data[0][0] = 1; | |
550 | while (interrupt_data[0][0] || pmu_state != idle) { | |
551 | if (--timeout < 0) { | |
552 | printk(KERN_ERR "init_pmu: timed out acking intrs\n"); | |
553 | return 0; | |
554 | } | |
555 | if (pmu_state == idle) | |
556 | adb_int_pending = 1; | |
7d12e780 | 557 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
558 | udelay(10); |
559 | } | |
560 | ||
561 | /* Tell PMU we are ready. */ | |
562 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
563 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
564 | while (!req.complete) | |
565 | pmu_poll(); | |
566 | } | |
567 | ||
568 | /* Read PMU version */ | |
569 | pmu_request(&req, NULL, 1, PMU_GET_VERSION); | |
570 | pmu_wait_complete(&req); | |
571 | if (req.reply_len > 0) | |
572 | pmu_version = req.reply[0]; | |
573 | ||
574 | /* Read server mode setting */ | |
575 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
576 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, | |
577 | PMU_PWR_GET_POWERUP_EVENTS); | |
578 | pmu_wait_complete(&req); | |
579 | if (req.reply_len == 2) { | |
580 | if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT) | |
581 | option_server_mode = 1; | |
582 | printk(KERN_INFO "via-pmu: Server Mode is %s\n", | |
583 | option_server_mode ? "enabled" : "disabled"); | |
584 | } | |
585 | } | |
586 | return 1; | |
587 | } | |
588 | ||
589 | int | |
590 | pmu_get_model(void) | |
591 | { | |
592 | return pmu_kind; | |
593 | } | |
594 | ||
1da177e4 LT |
595 | static void pmu_set_server_mode(int server_mode) |
596 | { | |
597 | struct adb_request req; | |
598 | ||
599 | if (pmu_kind != PMU_KEYLARGO_BASED) | |
600 | return; | |
601 | ||
602 | option_server_mode = server_mode; | |
603 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS); | |
604 | pmu_wait_complete(&req); | |
605 | if (req.reply_len < 2) | |
606 | return; | |
607 | if (server_mode) | |
608 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
609 | PMU_PWR_SET_POWERUP_EVENTS, | |
610 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
611 | else | |
612 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
613 | PMU_PWR_CLR_POWERUP_EVENTS, | |
614 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
615 | pmu_wait_complete(&req); | |
616 | } | |
617 | ||
1da177e4 LT |
618 | /* This new version of the code for 2400/3400/3500 powerbooks |
619 | * is inspired from the implementation in gkrellm-pmu | |
620 | */ | |
aacaf9bd | 621 | static void |
1da177e4 LT |
622 | done_battery_state_ohare(struct adb_request* req) |
623 | { | |
624 | /* format: | |
625 | * [0] : flags | |
626 | * 0x01 : AC indicator | |
627 | * 0x02 : charging | |
628 | * 0x04 : battery exist | |
629 | * 0x08 : | |
630 | * 0x10 : | |
631 | * 0x20 : full charged | |
632 | * 0x40 : pcharge reset | |
633 | * 0x80 : battery exist | |
634 | * | |
635 | * [1][2] : battery voltage | |
636 | * [3] : CPU temperature | |
637 | * [4] : battery temperature | |
638 | * [5] : current | |
639 | * [6][7] : pcharge | |
640 | * --tkoba | |
641 | */ | |
642 | unsigned int bat_flags = PMU_BATT_TYPE_HOOPER; | |
643 | long pcharge, charge, vb, vmax, lmax; | |
644 | long vmax_charging, vmax_charged; | |
645 | long amperage, voltage, time, max; | |
646 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | |
647 | NULL, PMAC_MB_INFO_MODEL, 0); | |
648 | ||
649 | if (req->reply[0] & 0x01) | |
650 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
651 | else | |
652 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
653 | ||
654 | if (mb == PMAC_TYPE_COMET) { | |
655 | vmax_charged = 189; | |
656 | vmax_charging = 213; | |
657 | lmax = 6500; | |
658 | } else { | |
659 | vmax_charged = 330; | |
660 | vmax_charging = 330; | |
661 | lmax = 6500; | |
662 | } | |
663 | vmax = vmax_charged; | |
664 | ||
665 | /* If battery installed */ | |
666 | if (req->reply[0] & 0x04) { | |
667 | bat_flags |= PMU_BATT_PRESENT; | |
668 | if (req->reply[0] & 0x02) | |
669 | bat_flags |= PMU_BATT_CHARGING; | |
670 | vb = (req->reply[1] << 8) | req->reply[2]; | |
671 | voltage = (vb * 265 + 72665) / 10; | |
672 | amperage = req->reply[5]; | |
673 | if ((req->reply[0] & 0x01) == 0) { | |
674 | if (amperage > 200) | |
675 | vb += ((amperage - 200) * 15)/100; | |
676 | } else if (req->reply[0] & 0x02) { | |
677 | vb = (vb * 97) / 100; | |
678 | vmax = vmax_charging; | |
679 | } | |
680 | charge = (100 * vb) / vmax; | |
681 | if (req->reply[0] & 0x40) { | |
682 | pcharge = (req->reply[6] << 8) + req->reply[7]; | |
683 | if (pcharge > lmax) | |
684 | pcharge = lmax; | |
685 | pcharge *= 100; | |
686 | pcharge = 100 - pcharge / lmax; | |
687 | if (pcharge < charge) | |
688 | charge = pcharge; | |
689 | } | |
690 | if (amperage > 0) | |
691 | time = (charge * 16440) / amperage; | |
692 | else | |
693 | time = 0; | |
694 | max = 100; | |
695 | amperage = -amperage; | |
696 | } else | |
697 | charge = max = amperage = voltage = time = 0; | |
698 | ||
699 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
700 | pmu_batteries[pmu_cur_battery].charge = charge; | |
701 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
702 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
703 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
704 | pmu_batteries[pmu_cur_battery].time_remaining = time; | |
705 | ||
706 | clear_bit(0, &async_req_locks); | |
707 | } | |
708 | ||
aacaf9bd | 709 | static void |
1da177e4 LT |
710 | done_battery_state_smart(struct adb_request* req) |
711 | { | |
712 | /* format: | |
713 | * [0] : format of this structure (known: 3,4,5) | |
714 | * [1] : flags | |
715 | * | |
716 | * format 3 & 4: | |
717 | * | |
718 | * [2] : charge | |
719 | * [3] : max charge | |
720 | * [4] : current | |
721 | * [5] : voltage | |
722 | * | |
723 | * format 5: | |
724 | * | |
725 | * [2][3] : charge | |
726 | * [4][5] : max charge | |
727 | * [6][7] : current | |
728 | * [8][9] : voltage | |
729 | */ | |
730 | ||
731 | unsigned int bat_flags = PMU_BATT_TYPE_SMART; | |
732 | int amperage; | |
733 | unsigned int capa, max, voltage; | |
734 | ||
735 | if (req->reply[1] & 0x01) | |
736 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
737 | else | |
738 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
739 | ||
740 | ||
741 | capa = max = amperage = voltage = 0; | |
742 | ||
743 | if (req->reply[1] & 0x04) { | |
744 | bat_flags |= PMU_BATT_PRESENT; | |
745 | switch(req->reply[0]) { | |
746 | case 3: | |
747 | case 4: capa = req->reply[2]; | |
748 | max = req->reply[3]; | |
749 | amperage = *((signed char *)&req->reply[4]); | |
750 | voltage = req->reply[5]; | |
751 | break; | |
752 | case 5: capa = (req->reply[2] << 8) | req->reply[3]; | |
753 | max = (req->reply[4] << 8) | req->reply[5]; | |
754 | amperage = *((signed short *)&req->reply[6]); | |
755 | voltage = (req->reply[8] << 8) | req->reply[9]; | |
756 | break; | |
757 | default: | |
ebd004e4 AS |
758 | pr_warn("pmu.c: unrecognized battery info, " |
759 | "len: %d, %4ph\n", req->reply_len, | |
760 | req->reply); | |
1da177e4 LT |
761 | break; |
762 | } | |
763 | } | |
764 | ||
765 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
766 | bat_flags |= PMU_BATT_CHARGING; | |
767 | ||
768 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
769 | pmu_batteries[pmu_cur_battery].charge = capa; | |
770 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
771 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
772 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
773 | if (amperage) { | |
774 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
775 | pmu_batteries[pmu_cur_battery].time_remaining | |
776 | = ((max-capa) * 3600) / amperage; | |
777 | else | |
778 | pmu_batteries[pmu_cur_battery].time_remaining | |
779 | = (capa * 3600) / (-amperage); | |
780 | } else | |
781 | pmu_batteries[pmu_cur_battery].time_remaining = 0; | |
782 | ||
783 | pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count; | |
784 | ||
785 | clear_bit(0, &async_req_locks); | |
786 | } | |
787 | ||
aacaf9bd | 788 | static void |
1da177e4 LT |
789 | query_battery_state(void) |
790 | { | |
791 | if (test_and_set_bit(0, &async_req_locks)) | |
792 | return; | |
793 | if (pmu_kind == PMU_OHARE_BASED) | |
794 | pmu_request(&batt_req, done_battery_state_ohare, | |
795 | 1, PMU_BATTERY_STATE); | |
796 | else | |
797 | pmu_request(&batt_req, done_battery_state_smart, | |
798 | 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); | |
799 | } | |
800 | ||
9d2f7342 | 801 | static int pmu_info_proc_show(struct seq_file *m, void *v) |
1da177e4 | 802 | { |
9d2f7342 AD |
803 | seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION); |
804 | seq_printf(m, "PMU firmware version : %02x\n", pmu_version); | |
805 | seq_printf(m, "AC Power : %d\n", | |
63e1fd41 | 806 | ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0); |
9d2f7342 AD |
807 | seq_printf(m, "Battery count : %d\n", pmu_battery_count); |
808 | ||
809 | return 0; | |
810 | } | |
1da177e4 | 811 | |
9d2f7342 AD |
812 | static int pmu_info_proc_open(struct inode *inode, struct file *file) |
813 | { | |
814 | return single_open(file, pmu_info_proc_show, NULL); | |
1da177e4 LT |
815 | } |
816 | ||
9d2f7342 AD |
817 | static const struct file_operations pmu_info_proc_fops = { |
818 | .owner = THIS_MODULE, | |
819 | .open = pmu_info_proc_open, | |
820 | .read = seq_read, | |
821 | .llseek = seq_lseek, | |
822 | .release = single_release, | |
823 | }; | |
824 | ||
825 | static int pmu_irqstats_proc_show(struct seq_file *m, void *v) | |
1da177e4 LT |
826 | { |
827 | int i; | |
1da177e4 LT |
828 | static const char *irq_names[] = { |
829 | "Total CB1 triggered events", | |
830 | "Total GPIO1 triggered events", | |
831 | "PC-Card eject button", | |
832 | "Sound/Brightness button", | |
833 | "ADB message", | |
834 | "Battery state change", | |
835 | "Environment interrupt", | |
836 | "Tick timer", | |
837 | "Ghost interrupt (zero len)", | |
838 | "Empty interrupt (empty mask)", | |
839 | "Max irqs in a row" | |
840 | }; | |
841 | ||
842 | for (i=0; i<11; i++) { | |
9d2f7342 | 843 | seq_printf(m, " %2u: %10u (%s)\n", |
1da177e4 LT |
844 | i, pmu_irq_stats[i], irq_names[i]); |
845 | } | |
9d2f7342 | 846 | return 0; |
1da177e4 LT |
847 | } |
848 | ||
9d2f7342 | 849 | static int pmu_irqstats_proc_open(struct inode *inode, struct file *file) |
1da177e4 | 850 | { |
9d2f7342 AD |
851 | return single_open(file, pmu_irqstats_proc_show, NULL); |
852 | } | |
853 | ||
854 | static const struct file_operations pmu_irqstats_proc_fops = { | |
855 | .owner = THIS_MODULE, | |
856 | .open = pmu_irqstats_proc_open, | |
857 | .read = seq_read, | |
858 | .llseek = seq_lseek, | |
859 | .release = single_release, | |
860 | }; | |
861 | ||
862 | static int pmu_battery_proc_show(struct seq_file *m, void *v) | |
863 | { | |
864 | long batnum = (long)m->private; | |
1da177e4 | 865 | |
9d2f7342 AD |
866 | seq_putc(m, '\n'); |
867 | seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags); | |
868 | seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge); | |
869 | seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge); | |
870 | seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage); | |
871 | seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage); | |
872 | seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining); | |
873 | return 0; | |
1da177e4 | 874 | } |
1da177e4 | 875 | |
9d2f7342 | 876 | static int pmu_battery_proc_open(struct inode *inode, struct file *file) |
1da177e4 | 877 | { |
d9dda78b | 878 | return single_open(file, pmu_battery_proc_show, PDE_DATA(inode)); |
9d2f7342 | 879 | } |
1da177e4 | 880 | |
9d2f7342 AD |
881 | static const struct file_operations pmu_battery_proc_fops = { |
882 | .owner = THIS_MODULE, | |
883 | .open = pmu_battery_proc_open, | |
884 | .read = seq_read, | |
885 | .llseek = seq_lseek, | |
886 | .release = single_release, | |
887 | }; | |
888 | ||
889 | static int pmu_options_proc_show(struct seq_file *m, void *v) | |
890 | { | |
f91266ed | 891 | #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) |
1da177e4 LT |
892 | if (pmu_kind == PMU_KEYLARGO_BASED && |
893 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
9d2f7342 | 894 | seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup); |
8c870933 | 895 | #endif |
1da177e4 | 896 | if (pmu_kind == PMU_KEYLARGO_BASED) |
9d2f7342 | 897 | seq_printf(m, "server_mode=%d\n", option_server_mode); |
1da177e4 | 898 | |
9d2f7342 | 899 | return 0; |
1da177e4 | 900 | } |
9d2f7342 AD |
901 | |
902 | static int pmu_options_proc_open(struct inode *inode, struct file *file) | |
903 | { | |
904 | return single_open(file, pmu_options_proc_show, NULL); | |
905 | } | |
906 | ||
907 | static ssize_t pmu_options_proc_write(struct file *file, | |
908 | const char __user *buffer, size_t count, loff_t *pos) | |
1da177e4 LT |
909 | { |
910 | char tmp[33]; | |
911 | char *label, *val; | |
9d2f7342 | 912 | size_t fcount = count; |
1da177e4 LT |
913 | |
914 | if (!count) | |
915 | return -EINVAL; | |
916 | if (count > 32) | |
917 | count = 32; | |
918 | if (copy_from_user(tmp, buffer, count)) | |
919 | return -EFAULT; | |
920 | tmp[count] = 0; | |
921 | ||
922 | label = tmp; | |
923 | while(*label == ' ') | |
924 | label++; | |
925 | val = label; | |
926 | while(*val && (*val != '=')) { | |
927 | if (*val == ' ') | |
928 | *val = 0; | |
929 | val++; | |
930 | } | |
931 | if ((*val) == 0) | |
932 | return -EINVAL; | |
933 | *(val++) = 0; | |
934 | while(*val == ' ') | |
935 | val++; | |
f91266ed | 936 | #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) |
1da177e4 LT |
937 | if (pmu_kind == PMU_KEYLARGO_BASED && |
938 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
939 | if (!strcmp(label, "lid_wakeup")) | |
940 | option_lid_wakeup = ((*val) == '1'); | |
8c870933 | 941 | #endif |
1da177e4 LT |
942 | if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { |
943 | int new_value; | |
944 | new_value = ((*val) == '1'); | |
945 | if (new_value != option_server_mode) | |
946 | pmu_set_server_mode(new_value); | |
947 | } | |
948 | return fcount; | |
949 | } | |
950 | ||
9d2f7342 AD |
951 | static const struct file_operations pmu_options_proc_fops = { |
952 | .owner = THIS_MODULE, | |
953 | .open = pmu_options_proc_open, | |
954 | .read = seq_read, | |
955 | .llseek = seq_lseek, | |
956 | .release = single_release, | |
957 | .write = pmu_options_proc_write, | |
958 | }; | |
959 | ||
1da177e4 LT |
960 | #ifdef CONFIG_ADB |
961 | /* Send an ADB command */ | |
11a50873 | 962 | static int pmu_send_request(struct adb_request *req, int sync) |
1da177e4 LT |
963 | { |
964 | int i, ret; | |
965 | ||
966 | if ((vias == NULL) || (!pmu_fully_inited)) { | |
967 | req->complete = 1; | |
968 | return -ENXIO; | |
969 | } | |
970 | ||
971 | ret = -EINVAL; | |
972 | ||
973 | switch (req->data[0]) { | |
974 | case PMU_PACKET: | |
975 | for (i = 0; i < req->nbytes - 1; ++i) | |
976 | req->data[i] = req->data[i+1]; | |
977 | --req->nbytes; | |
978 | if (pmu_data_len[req->data[0]][1] != 0) { | |
979 | req->reply[0] = ADB_RET_OK; | |
980 | req->reply_len = 1; | |
981 | } else | |
982 | req->reply_len = 0; | |
983 | ret = pmu_queue_request(req); | |
984 | break; | |
985 | case CUDA_PACKET: | |
986 | switch (req->data[1]) { | |
987 | case CUDA_GET_TIME: | |
988 | if (req->nbytes != 2) | |
989 | break; | |
990 | req->data[0] = PMU_READ_RTC; | |
991 | req->nbytes = 1; | |
992 | req->reply_len = 3; | |
993 | req->reply[0] = CUDA_PACKET; | |
994 | req->reply[1] = 0; | |
995 | req->reply[2] = CUDA_GET_TIME; | |
996 | ret = pmu_queue_request(req); | |
997 | break; | |
998 | case CUDA_SET_TIME: | |
999 | if (req->nbytes != 6) | |
1000 | break; | |
1001 | req->data[0] = PMU_SET_RTC; | |
1002 | req->nbytes = 5; | |
1003 | for (i = 1; i <= 4; ++i) | |
1004 | req->data[i] = req->data[i+1]; | |
1005 | req->reply_len = 3; | |
1006 | req->reply[0] = CUDA_PACKET; | |
1007 | req->reply[1] = 0; | |
1008 | req->reply[2] = CUDA_SET_TIME; | |
1009 | ret = pmu_queue_request(req); | |
1010 | break; | |
1011 | } | |
1012 | break; | |
1013 | case ADB_PACKET: | |
1014 | if (!pmu_has_adb) | |
1015 | return -ENXIO; | |
1016 | for (i = req->nbytes - 1; i > 1; --i) | |
1017 | req->data[i+2] = req->data[i]; | |
1018 | req->data[3] = req->nbytes - 2; | |
1019 | req->data[2] = pmu_adb_flags; | |
1020 | /*req->data[1] = req->data[1];*/ | |
1021 | req->data[0] = PMU_ADB_CMD; | |
1022 | req->nbytes += 2; | |
1023 | req->reply_expected = 1; | |
1024 | req->reply_len = 0; | |
1025 | ret = pmu_queue_request(req); | |
1026 | break; | |
1027 | } | |
1028 | if (ret) { | |
1029 | req->complete = 1; | |
1030 | return ret; | |
1031 | } | |
1032 | ||
1033 | if (sync) | |
1034 | while (!req->complete) | |
1035 | pmu_poll(); | |
1036 | ||
1037 | return 0; | |
1038 | } | |
1039 | ||
1040 | /* Enable/disable autopolling */ | |
11a50873 | 1041 | static int __pmu_adb_autopoll(int devs) |
1da177e4 LT |
1042 | { |
1043 | struct adb_request req; | |
1044 | ||
1da177e4 | 1045 | if (devs) { |
1da177e4 LT |
1046 | pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, |
1047 | adb_dev_map >> 8, adb_dev_map); | |
1048 | pmu_adb_flags = 2; | |
1049 | } else { | |
1050 | pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); | |
1051 | pmu_adb_flags = 0; | |
1052 | } | |
1053 | while (!req.complete) | |
1054 | pmu_poll(); | |
1055 | return 0; | |
1056 | } | |
1057 | ||
11a50873 BH |
1058 | static int pmu_adb_autopoll(int devs) |
1059 | { | |
1060 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1061 | return -ENXIO; | |
1062 | ||
1063 | adb_dev_map = devs; | |
1064 | return __pmu_adb_autopoll(devs); | |
1065 | } | |
1066 | ||
1da177e4 | 1067 | /* Reset the ADB bus */ |
11a50873 | 1068 | static int pmu_adb_reset_bus(void) |
1da177e4 LT |
1069 | { |
1070 | struct adb_request req; | |
1071 | int save_autopoll = adb_dev_map; | |
1072 | ||
1073 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1074 | return -ENXIO; | |
1075 | ||
1076 | /* anyone got a better idea?? */ | |
11a50873 | 1077 | __pmu_adb_autopoll(0); |
1da177e4 | 1078 | |
11a50873 | 1079 | req.nbytes = 4; |
1da177e4 LT |
1080 | req.done = NULL; |
1081 | req.data[0] = PMU_ADB_CMD; | |
11a50873 BH |
1082 | req.data[1] = ADB_BUSRESET; |
1083 | req.data[2] = 0; | |
1da177e4 LT |
1084 | req.data[3] = 0; |
1085 | req.data[4] = 0; | |
1086 | req.reply_len = 0; | |
1087 | req.reply_expected = 1; | |
1088 | if (pmu_queue_request(&req) != 0) { | |
1089 | printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); | |
1090 | return -EIO; | |
1091 | } | |
1092 | pmu_wait_complete(&req); | |
1093 | ||
1094 | if (save_autopoll != 0) | |
11a50873 | 1095 | __pmu_adb_autopoll(save_autopoll); |
1da177e4 LT |
1096 | |
1097 | return 0; | |
1098 | } | |
1099 | #endif /* CONFIG_ADB */ | |
1100 | ||
1101 | /* Construct and send a pmu request */ | |
aacaf9bd | 1102 | int |
1da177e4 LT |
1103 | pmu_request(struct adb_request *req, void (*done)(struct adb_request *), |
1104 | int nbytes, ...) | |
1105 | { | |
1106 | va_list list; | |
1107 | int i; | |
1108 | ||
1109 | if (vias == NULL) | |
1110 | return -ENXIO; | |
1111 | ||
1112 | if (nbytes < 0 || nbytes > 32) { | |
1113 | printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); | |
1114 | req->complete = 1; | |
1115 | return -EINVAL; | |
1116 | } | |
1117 | req->nbytes = nbytes; | |
1118 | req->done = done; | |
1119 | va_start(list, nbytes); | |
1120 | for (i = 0; i < nbytes; ++i) | |
1121 | req->data[i] = va_arg(list, int); | |
1122 | va_end(list); | |
1123 | req->reply_len = 0; | |
1124 | req->reply_expected = 0; | |
1125 | return pmu_queue_request(req); | |
1126 | } | |
1127 | ||
aacaf9bd | 1128 | int |
1da177e4 LT |
1129 | pmu_queue_request(struct adb_request *req) |
1130 | { | |
1131 | unsigned long flags; | |
1132 | int nsend; | |
1133 | ||
1134 | if (via == NULL) { | |
1135 | req->complete = 1; | |
1136 | return -ENXIO; | |
1137 | } | |
1138 | if (req->nbytes <= 0) { | |
1139 | req->complete = 1; | |
1140 | return 0; | |
1141 | } | |
1142 | nsend = pmu_data_len[req->data[0]][0]; | |
1143 | if (nsend >= 0 && req->nbytes != nsend + 1) { | |
1144 | req->complete = 1; | |
1145 | return -EINVAL; | |
1146 | } | |
1147 | ||
1148 | req->next = NULL; | |
1149 | req->sent = 0; | |
1150 | req->complete = 0; | |
1151 | ||
1152 | spin_lock_irqsave(&pmu_lock, flags); | |
1153 | if (current_req != 0) { | |
1154 | last_req->next = req; | |
1155 | last_req = req; | |
1156 | } else { | |
1157 | current_req = req; | |
1158 | last_req = req; | |
1159 | if (pmu_state == idle) | |
1160 | pmu_start(); | |
1161 | } | |
1162 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1163 | ||
1164 | return 0; | |
1165 | } | |
1166 | ||
1167 | static inline void | |
1168 | wait_for_ack(void) | |
1169 | { | |
1170 | /* Sightly increased the delay, I had one occurrence of the message | |
1171 | * reported | |
1172 | */ | |
1173 | int timeout = 4000; | |
1174 | while ((in_8(&via[B]) & TACK) == 0) { | |
1175 | if (--timeout < 0) { | |
1176 | printk(KERN_ERR "PMU not responding (!ack)\n"); | |
1177 | return; | |
1178 | } | |
1179 | udelay(10); | |
1180 | } | |
1181 | } | |
1182 | ||
1183 | /* New PMU seems to be very sensitive to those timings, so we make sure | |
1184 | * PCI is flushed immediately */ | |
1185 | static inline void | |
1186 | send_byte(int x) | |
1187 | { | |
1188 | volatile unsigned char __iomem *v = via; | |
1189 | ||
1190 | out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT); | |
1191 | out_8(&v[SR], x); | |
1192 | out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */ | |
1193 | (void)in_8(&v[B]); | |
1194 | } | |
1195 | ||
1196 | static inline void | |
1197 | recv_byte(void) | |
1198 | { | |
1199 | volatile unsigned char __iomem *v = via; | |
1200 | ||
1201 | out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT); | |
1202 | in_8(&v[SR]); /* resets SR */ | |
1203 | out_8(&v[B], in_8(&v[B]) & ~TREQ); | |
1204 | (void)in_8(&v[B]); | |
1205 | } | |
1206 | ||
1207 | static inline void | |
1208 | pmu_done(struct adb_request *req) | |
1209 | { | |
1210 | void (*done)(struct adb_request *) = req->done; | |
1211 | mb(); | |
1212 | req->complete = 1; | |
1213 | /* Here, we assume that if the request has a done member, the | |
1214 | * struct request will survive to setting req->complete to 1 | |
1215 | */ | |
1216 | if (done) | |
1217 | (*done)(req); | |
1218 | } | |
1219 | ||
aacaf9bd | 1220 | static void |
1da177e4 LT |
1221 | pmu_start(void) |
1222 | { | |
1223 | struct adb_request *req; | |
1224 | ||
1225 | /* assert pmu_state == idle */ | |
1226 | /* get the packet to send */ | |
1227 | req = current_req; | |
1228 | if (req == 0 || pmu_state != idle | |
1229 | || (/*req->reply_expected && */req_awaiting_reply)) | |
1230 | return; | |
1231 | ||
1232 | pmu_state = sending; | |
1233 | data_index = 1; | |
1234 | data_len = pmu_data_len[req->data[0]][0]; | |
1235 | ||
1236 | /* Sounds safer to make sure ACK is high before writing. This helped | |
1237 | * kill a problem with ADB and some iBooks | |
1238 | */ | |
1239 | wait_for_ack(); | |
1240 | /* set the shift register to shift out and send a byte */ | |
1241 | send_byte(req->data[0]); | |
1242 | } | |
1243 | ||
aacaf9bd | 1244 | void |
1da177e4 LT |
1245 | pmu_poll(void) |
1246 | { | |
1247 | if (!via) | |
1248 | return; | |
1249 | if (disable_poll) | |
1250 | return; | |
7d12e780 | 1251 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1252 | } |
1253 | ||
aacaf9bd | 1254 | void |
1da177e4 LT |
1255 | pmu_poll_adb(void) |
1256 | { | |
1257 | if (!via) | |
1258 | return; | |
1259 | if (disable_poll) | |
1260 | return; | |
1261 | /* Kicks ADB read when PMU is suspended */ | |
1262 | adb_int_pending = 1; | |
1263 | do { | |
7d12e780 | 1264 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1265 | } while (pmu_suspended && (adb_int_pending || pmu_state != idle |
1266 | || req_awaiting_reply)); | |
1267 | } | |
1268 | ||
aacaf9bd | 1269 | void |
1da177e4 LT |
1270 | pmu_wait_complete(struct adb_request *req) |
1271 | { | |
1272 | if (!via) | |
1273 | return; | |
1274 | while((pmu_state != idle && pmu_state != locked) || !req->complete) | |
7d12e780 | 1275 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1276 | } |
1277 | ||
1278 | /* This function loops until the PMU is idle and prevents it from | |
1279 | * anwsering to ADB interrupts. pmu_request can still be called. | |
1280 | * This is done to avoid spurrious shutdowns when we know we'll have | |
1281 | * interrupts switched off for a long time | |
1282 | */ | |
aacaf9bd | 1283 | void |
1da177e4 LT |
1284 | pmu_suspend(void) |
1285 | { | |
1286 | unsigned long flags; | |
1b0e9d44 | 1287 | |
1da177e4 LT |
1288 | if (!via) |
1289 | return; | |
1290 | ||
1291 | spin_lock_irqsave(&pmu_lock, flags); | |
1292 | pmu_suspended++; | |
1293 | if (pmu_suspended > 1) { | |
1294 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1295 | return; | |
1296 | } | |
1297 | ||
1298 | do { | |
1299 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1300 | if (req_awaiting_reply) | |
1301 | adb_int_pending = 1; | |
7d12e780 | 1302 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1303 | spin_lock_irqsave(&pmu_lock, flags); |
1304 | if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) { | |
1da177e4 LT |
1305 | if (gpio_irq >= 0) |
1306 | disable_irq_nosync(gpio_irq); | |
1307 | out_8(&via[IER], CB1_INT | IER_CLR); | |
1308 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1da177e4 LT |
1309 | break; |
1310 | } | |
1311 | } while (1); | |
1312 | } | |
1313 | ||
aacaf9bd | 1314 | void |
1da177e4 LT |
1315 | pmu_resume(void) |
1316 | { | |
1317 | unsigned long flags; | |
1318 | ||
1319 | if (!via || (pmu_suspended < 1)) | |
1320 | return; | |
1321 | ||
1322 | spin_lock_irqsave(&pmu_lock, flags); | |
1323 | pmu_suspended--; | |
1324 | if (pmu_suspended > 0) { | |
1325 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1326 | return; | |
1327 | } | |
1328 | adb_int_pending = 1; | |
1da177e4 LT |
1329 | if (gpio_irq >= 0) |
1330 | enable_irq(gpio_irq); | |
1331 | out_8(&via[IER], CB1_INT | IER_SET); | |
1332 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1333 | pmu_poll(); | |
1da177e4 LT |
1334 | } |
1335 | ||
1336 | /* Interrupt data could be the result data from an ADB cmd */ | |
aacaf9bd | 1337 | static void |
7d12e780 | 1338 | pmu_handle_data(unsigned char *data, int len) |
1da177e4 LT |
1339 | { |
1340 | unsigned char ints, pirq; | |
1341 | int i = 0; | |
1342 | ||
1343 | asleep = 0; | |
1344 | if (drop_interrupts || len < 1) { | |
1345 | adb_int_pending = 0; | |
1346 | pmu_irq_stats[8]++; | |
1347 | return; | |
1348 | } | |
1349 | ||
1350 | /* Get PMU interrupt mask */ | |
1351 | ints = data[0]; | |
1352 | ||
1353 | /* Record zero interrupts for stats */ | |
1354 | if (ints == 0) | |
1355 | pmu_irq_stats[9]++; | |
1356 | ||
1357 | /* Hack to deal with ADB autopoll flag */ | |
1358 | if (ints & PMU_INT_ADB) | |
1359 | ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL); | |
1360 | ||
1361 | next: | |
1362 | ||
1363 | if (ints == 0) { | |
1364 | if (i > pmu_irq_stats[10]) | |
1365 | pmu_irq_stats[10] = i; | |
1366 | return; | |
1367 | } | |
1368 | ||
1369 | for (pirq = 0; pirq < 8; pirq++) | |
1370 | if (ints & (1 << pirq)) | |
1371 | break; | |
1372 | pmu_irq_stats[pirq]++; | |
1373 | i++; | |
1374 | ints &= ~(1 << pirq); | |
1375 | ||
1376 | /* Note: for some reason, we get an interrupt with len=1, | |
1377 | * data[0]==0 after each normal ADB interrupt, at least | |
1378 | * on the Pismo. Still investigating... --BenH | |
1379 | */ | |
1380 | if ((1 << pirq) & PMU_INT_ADB) { | |
1381 | if ((data[0] & PMU_INT_ADB_AUTO) == 0) { | |
1382 | struct adb_request *req = req_awaiting_reply; | |
1383 | if (req == 0) { | |
1384 | printk(KERN_ERR "PMU: extra ADB reply\n"); | |
1385 | return; | |
1386 | } | |
1387 | req_awaiting_reply = NULL; | |
1388 | if (len <= 2) | |
1389 | req->reply_len = 0; | |
1390 | else { | |
1391 | memcpy(req->reply, data + 1, len - 1); | |
1392 | req->reply_len = len - 1; | |
1393 | } | |
1394 | pmu_done(req); | |
1395 | } else { | |
1da177e4 LT |
1396 | if (len == 4 && data[1] == 0x2c) { |
1397 | extern int xmon_wants_key, xmon_adb_keycode; | |
1398 | if (xmon_wants_key) { | |
1399 | xmon_adb_keycode = data[2]; | |
1400 | return; | |
1401 | } | |
1402 | } | |
1da177e4 LT |
1403 | #ifdef CONFIG_ADB |
1404 | /* | |
1405 | * XXX On the [23]400 the PMU gives us an up | |
1406 | * event for keycodes 0x74 or 0x75 when the PC | |
1407 | * card eject buttons are released, so we | |
1408 | * ignore those events. | |
1409 | */ | |
1410 | if (!(pmu_kind == PMU_OHARE_BASED && len == 4 | |
1411 | && data[1] == 0x2c && data[3] == 0xff | |
1412 | && (data[2] & ~1) == 0xf4)) | |
7d12e780 | 1413 | adb_input(data+1, len-1, 1); |
1da177e4 LT |
1414 | #endif /* CONFIG_ADB */ |
1415 | } | |
1416 | } | |
1417 | /* Sound/brightness button pressed */ | |
1418 | else if ((1 << pirq) & PMU_INT_SNDBRT) { | |
1419 | #ifdef CONFIG_PMAC_BACKLIGHT | |
1420 | if (len == 3) | |
4b755999 MH |
1421 | pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4); |
1422 | #endif | |
1da177e4 LT |
1423 | } |
1424 | /* Tick interrupt */ | |
1425 | else if ((1 << pirq) & PMU_INT_TICK) { | |
1da177e4 LT |
1426 | /* Environement or tick interrupt, query batteries */ |
1427 | if (pmu_battery_count) { | |
1428 | if ((--query_batt_timer) == 0) { | |
1429 | query_battery_state(); | |
1430 | query_batt_timer = BATTERY_POLLING_COUNT; | |
1431 | } | |
1432 | } | |
1433 | } | |
1434 | else if ((1 << pirq) & PMU_INT_ENVIRONMENT) { | |
1435 | if (pmu_battery_count) | |
1436 | query_battery_state(); | |
1437 | pmu_pass_intr(data, len); | |
9e8e30a0 JB |
1438 | /* len == 6 is probably a bad check. But how do I |
1439 | * know what PMU versions send what events here? */ | |
1440 | if (len == 6) { | |
1441 | via_pmu_event(PMU_EVT_POWER, !!(data[1]&8)); | |
1442 | via_pmu_event(PMU_EVT_LID, data[1]&1); | |
1443 | } | |
1da177e4 LT |
1444 | } else { |
1445 | pmu_pass_intr(data, len); | |
1da177e4 LT |
1446 | } |
1447 | goto next; | |
1448 | } | |
1449 | ||
aacaf9bd | 1450 | static struct adb_request* |
7d12e780 | 1451 | pmu_sr_intr(void) |
1da177e4 LT |
1452 | { |
1453 | struct adb_request *req; | |
1454 | int bite = 0; | |
1455 | ||
1456 | if (via[B] & TREQ) { | |
1457 | printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]); | |
1458 | out_8(&via[IFR], SR_INT); | |
1459 | return NULL; | |
1460 | } | |
1461 | /* The ack may not yet be low when we get the interrupt */ | |
1462 | while ((in_8(&via[B]) & TACK) != 0) | |
1463 | ; | |
1464 | ||
1465 | /* if reading grab the byte, and reset the interrupt */ | |
1466 | if (pmu_state == reading || pmu_state == reading_intr) | |
1467 | bite = in_8(&via[SR]); | |
1468 | ||
1469 | /* reset TREQ and wait for TACK to go high */ | |
1470 | out_8(&via[B], in_8(&via[B]) | TREQ); | |
1471 | wait_for_ack(); | |
1472 | ||
1473 | switch (pmu_state) { | |
1474 | case sending: | |
1475 | req = current_req; | |
1476 | if (data_len < 0) { | |
1477 | data_len = req->nbytes - 1; | |
1478 | send_byte(data_len); | |
1479 | break; | |
1480 | } | |
1481 | if (data_index <= data_len) { | |
1482 | send_byte(req->data[data_index++]); | |
1483 | break; | |
1484 | } | |
1485 | req->sent = 1; | |
1486 | data_len = pmu_data_len[req->data[0]][1]; | |
1487 | if (data_len == 0) { | |
1488 | pmu_state = idle; | |
1489 | current_req = req->next; | |
1490 | if (req->reply_expected) | |
1491 | req_awaiting_reply = req; | |
1492 | else | |
1493 | return req; | |
1494 | } else { | |
1495 | pmu_state = reading; | |
1496 | data_index = 0; | |
1497 | reply_ptr = req->reply + req->reply_len; | |
1498 | recv_byte(); | |
1499 | } | |
1500 | break; | |
1501 | ||
1502 | case intack: | |
1503 | data_index = 0; | |
1504 | data_len = -1; | |
1505 | pmu_state = reading_intr; | |
1506 | reply_ptr = interrupt_data[int_data_last]; | |
1507 | recv_byte(); | |
1508 | if (gpio_irq >= 0 && !gpio_irq_enabled) { | |
1509 | enable_irq(gpio_irq); | |
1510 | gpio_irq_enabled = 1; | |
1511 | } | |
1512 | break; | |
1513 | ||
1514 | case reading: | |
1515 | case reading_intr: | |
1516 | if (data_len == -1) { | |
1517 | data_len = bite; | |
1518 | if (bite > 32) | |
1519 | printk(KERN_ERR "PMU: bad reply len %d\n", bite); | |
1520 | } else if (data_index < 32) { | |
1521 | reply_ptr[data_index++] = bite; | |
1522 | } | |
1523 | if (data_index < data_len) { | |
1524 | recv_byte(); | |
1525 | break; | |
1526 | } | |
1527 | ||
1528 | if (pmu_state == reading_intr) { | |
1529 | pmu_state = idle; | |
1530 | int_data_state[int_data_last] = int_data_ready; | |
1531 | interrupt_data_len[int_data_last] = data_len; | |
1532 | } else { | |
1533 | req = current_req; | |
1534 | /* | |
1535 | * For PMU sleep and freq change requests, we lock the | |
c03983ac | 1536 | * PMU until it's explicitly unlocked. This avoids any |
1da177e4 LT |
1537 | * spurrious event polling getting in |
1538 | */ | |
1539 | current_req = req->next; | |
1540 | req->reply_len += data_index; | |
1541 | if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED) | |
1542 | pmu_state = locked; | |
1543 | else | |
1544 | pmu_state = idle; | |
1545 | return req; | |
1546 | } | |
1547 | break; | |
1548 | ||
1549 | default: | |
1550 | printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n", | |
1551 | pmu_state); | |
1552 | } | |
1553 | return NULL; | |
1554 | } | |
1555 | ||
aacaf9bd | 1556 | static irqreturn_t |
7d12e780 | 1557 | via_pmu_interrupt(int irq, void *arg) |
1da177e4 LT |
1558 | { |
1559 | unsigned long flags; | |
1560 | int intr; | |
1561 | int nloop = 0; | |
1562 | int int_data = -1; | |
1563 | struct adb_request *req = NULL; | |
1564 | int handled = 0; | |
1565 | ||
1566 | /* This is a bit brutal, we can probably do better */ | |
1567 | spin_lock_irqsave(&pmu_lock, flags); | |
1568 | ++disable_poll; | |
1569 | ||
1570 | for (;;) { | |
1571 | intr = in_8(&via[IFR]) & (SR_INT | CB1_INT); | |
1572 | if (intr == 0) | |
1573 | break; | |
1574 | handled = 1; | |
1575 | if (++nloop > 1000) { | |
1576 | printk(KERN_DEBUG "PMU: stuck in intr loop, " | |
1577 | "intr=%x, ier=%x pmu_state=%d\n", | |
1578 | intr, in_8(&via[IER]), pmu_state); | |
1579 | break; | |
1580 | } | |
1581 | out_8(&via[IFR], intr); | |
1582 | if (intr & CB1_INT) { | |
1583 | adb_int_pending = 1; | |
1584 | pmu_irq_stats[0]++; | |
1585 | } | |
1586 | if (intr & SR_INT) { | |
7d12e780 | 1587 | req = pmu_sr_intr(); |
1da177e4 LT |
1588 | if (req) |
1589 | break; | |
1590 | } | |
1591 | } | |
1592 | ||
1593 | recheck: | |
1594 | if (pmu_state == idle) { | |
1595 | if (adb_int_pending) { | |
1596 | if (int_data_state[0] == int_data_empty) | |
1597 | int_data_last = 0; | |
1598 | else if (int_data_state[1] == int_data_empty) | |
1599 | int_data_last = 1; | |
1600 | else | |
1601 | goto no_free_slot; | |
1602 | pmu_state = intack; | |
1603 | int_data_state[int_data_last] = int_data_fill; | |
1604 | /* Sounds safer to make sure ACK is high before writing. | |
1605 | * This helped kill a problem with ADB and some iBooks | |
1606 | */ | |
1607 | wait_for_ack(); | |
1608 | send_byte(PMU_INT_ACK); | |
1609 | adb_int_pending = 0; | |
1610 | } else if (current_req) | |
1611 | pmu_start(); | |
1612 | } | |
1613 | no_free_slot: | |
1614 | /* Mark the oldest buffer for flushing */ | |
1615 | if (int_data_state[!int_data_last] == int_data_ready) { | |
1616 | int_data_state[!int_data_last] = int_data_flush; | |
1617 | int_data = !int_data_last; | |
1618 | } else if (int_data_state[int_data_last] == int_data_ready) { | |
1619 | int_data_state[int_data_last] = int_data_flush; | |
1620 | int_data = int_data_last; | |
1621 | } | |
1622 | --disable_poll; | |
1623 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1624 | ||
1625 | /* Deal with completed PMU requests outside of the lock */ | |
1626 | if (req) { | |
1627 | pmu_done(req); | |
1628 | req = NULL; | |
1629 | } | |
1630 | ||
1631 | /* Deal with interrupt datas outside of the lock */ | |
1632 | if (int_data >= 0) { | |
7d12e780 | 1633 | pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]); |
1da177e4 LT |
1634 | spin_lock_irqsave(&pmu_lock, flags); |
1635 | ++disable_poll; | |
1636 | int_data_state[int_data] = int_data_empty; | |
1637 | int_data = -1; | |
1638 | goto recheck; | |
1639 | } | |
1640 | ||
1641 | return IRQ_RETVAL(handled); | |
1642 | } | |
1643 | ||
aacaf9bd | 1644 | void |
1da177e4 LT |
1645 | pmu_unlock(void) |
1646 | { | |
1647 | unsigned long flags; | |
1648 | ||
1649 | spin_lock_irqsave(&pmu_lock, flags); | |
1650 | if (pmu_state == locked) | |
1651 | pmu_state = idle; | |
1652 | adb_int_pending = 1; | |
1653 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1654 | } | |
1655 | ||
1656 | ||
aacaf9bd | 1657 | static irqreturn_t |
7d12e780 | 1658 | gpio1_interrupt(int irq, void *arg) |
1da177e4 LT |
1659 | { |
1660 | unsigned long flags; | |
1661 | ||
1662 | if ((in_8(gpio_reg + 0x9) & 0x02) == 0) { | |
1663 | spin_lock_irqsave(&pmu_lock, flags); | |
1664 | if (gpio_irq_enabled > 0) { | |
1665 | disable_irq_nosync(gpio_irq); | |
1666 | gpio_irq_enabled = 0; | |
1667 | } | |
1668 | pmu_irq_stats[1]++; | |
1669 | adb_int_pending = 1; | |
1670 | spin_unlock_irqrestore(&pmu_lock, flags); | |
7d12e780 | 1671 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1672 | return IRQ_HANDLED; |
1673 | } | |
1674 | return IRQ_NONE; | |
1675 | } | |
1676 | ||
aacaf9bd | 1677 | void |
1da177e4 LT |
1678 | pmu_enable_irled(int on) |
1679 | { | |
1680 | struct adb_request req; | |
1681 | ||
1682 | if (vias == NULL) | |
1683 | return ; | |
1684 | if (pmu_kind == PMU_KEYLARGO_BASED) | |
1685 | return ; | |
1686 | ||
1687 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | | |
1688 | (on ? PMU_POW_ON : PMU_POW_OFF)); | |
1689 | pmu_wait_complete(&req); | |
1690 | } | |
1691 | ||
aacaf9bd | 1692 | void |
1da177e4 LT |
1693 | pmu_restart(void) |
1694 | { | |
1695 | struct adb_request req; | |
1696 | ||
1697 | if (via == NULL) | |
1698 | return; | |
1699 | ||
1700 | local_irq_disable(); | |
1701 | ||
1702 | drop_interrupts = 1; | |
1703 | ||
1704 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1705 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1706 | PMU_INT_TICK ); | |
1707 | while(!req.complete) | |
1708 | pmu_poll(); | |
1709 | } | |
1710 | ||
1711 | pmu_request(&req, NULL, 1, PMU_RESET); | |
1712 | pmu_wait_complete(&req); | |
1713 | for (;;) | |
1714 | ; | |
1715 | } | |
1716 | ||
aacaf9bd | 1717 | void |
1da177e4 LT |
1718 | pmu_shutdown(void) |
1719 | { | |
1720 | struct adb_request req; | |
1721 | ||
1722 | if (via == NULL) | |
1723 | return; | |
1724 | ||
1725 | local_irq_disable(); | |
1726 | ||
1727 | drop_interrupts = 1; | |
1728 | ||
1729 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1730 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1731 | PMU_INT_TICK ); | |
1732 | pmu_wait_complete(&req); | |
1733 | } else { | |
1734 | /* Disable server mode on shutdown or we'll just | |
1735 | * wake up again | |
1736 | */ | |
1737 | pmu_set_server_mode(0); | |
1738 | } | |
1739 | ||
1740 | pmu_request(&req, NULL, 5, PMU_SHUTDOWN, | |
1741 | 'M', 'A', 'T', 'T'); | |
1742 | pmu_wait_complete(&req); | |
1743 | for (;;) | |
1744 | ; | |
1745 | } | |
1746 | ||
1747 | int | |
1748 | pmu_present(void) | |
1749 | { | |
1750 | return via != 0; | |
1751 | } | |
1752 | ||
f91266ed | 1753 | #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) |
1da177e4 LT |
1754 | /* |
1755 | * Put the powerbook to sleep. | |
1756 | */ | |
1757 | ||
aacaf9bd | 1758 | static u32 save_via[8]; |
1da177e4 | 1759 | |
aacaf9bd | 1760 | static void |
1da177e4 LT |
1761 | save_via_state(void) |
1762 | { | |
1763 | save_via[0] = in_8(&via[ANH]); | |
1764 | save_via[1] = in_8(&via[DIRA]); | |
1765 | save_via[2] = in_8(&via[B]); | |
1766 | save_via[3] = in_8(&via[DIRB]); | |
1767 | save_via[4] = in_8(&via[PCR]); | |
1768 | save_via[5] = in_8(&via[ACR]); | |
1769 | save_via[6] = in_8(&via[T1CL]); | |
1770 | save_via[7] = in_8(&via[T1CH]); | |
1771 | } | |
aacaf9bd | 1772 | static void |
1da177e4 LT |
1773 | restore_via_state(void) |
1774 | { | |
1775 | out_8(&via[ANH], save_via[0]); | |
1776 | out_8(&via[DIRA], save_via[1]); | |
1777 | out_8(&via[B], save_via[2]); | |
1778 | out_8(&via[DIRB], save_via[3]); | |
1779 | out_8(&via[PCR], save_via[4]); | |
1780 | out_8(&via[ACR], save_via[5]); | |
1781 | out_8(&via[T1CL], save_via[6]); | |
1782 | out_8(&via[T1CH], save_via[7]); | |
1783 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
1784 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
1785 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
1786 | } | |
1787 | ||
1da177e4 LT |
1788 | #define GRACKLE_PM (1<<7) |
1789 | #define GRACKLE_DOZE (1<<5) | |
1790 | #define GRACKLE_NAP (1<<4) | |
1791 | #define GRACKLE_SLEEP (1<<3) | |
1792 | ||
3bea6313 | 1793 | static int powerbook_sleep_grackle(void) |
1da177e4 LT |
1794 | { |
1795 | unsigned long save_l2cr; | |
1796 | unsigned short pmcr1; | |
1797 | struct adb_request req; | |
1da177e4 LT |
1798 | struct pci_dev *grackle; |
1799 | ||
c78f8305 | 1800 | grackle = pci_get_bus_and_slot(0, 0); |
1da177e4 LT |
1801 | if (!grackle) |
1802 | return -ENODEV; | |
1803 | ||
1da177e4 LT |
1804 | /* Turn off various things. Darwin does some retry tests here... */ |
1805 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE); | |
1806 | pmu_wait_complete(&req); | |
1807 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
1808 | PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
1809 | pmu_wait_complete(&req); | |
1810 | ||
1811 | /* For 750, save backside cache setting and disable it */ | |
1812 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
1813 | ||
1814 | if (!__fake_sleep) { | |
1815 | /* Ask the PMU to put us to sleep */ | |
1816 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
1817 | pmu_wait_complete(&req); | |
1818 | } | |
1819 | ||
1820 | /* The VIA is supposed not to be restored correctly*/ | |
1821 | save_via_state(); | |
1822 | /* We shut down some HW */ | |
1823 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | |
1824 | ||
1825 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
1826 | /* Apparently, MacOS uses NAP mode for Grackle ??? */ | |
1827 | pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP); | |
1828 | pmcr1 |= GRACKLE_PM|GRACKLE_NAP; | |
1829 | pci_write_config_word(grackle, 0x70, pmcr1); | |
1830 | ||
1831 | /* Call low-level ASM sleep handler */ | |
1832 | if (__fake_sleep) | |
1833 | mdelay(5000); | |
1834 | else | |
1835 | low_sleep_handler(); | |
1836 | ||
1837 | /* We're awake again, stop grackle PM */ | |
1838 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
1839 | pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP); | |
1840 | pci_write_config_word(grackle, 0x70, pmcr1); | |
1841 | ||
c78f8305 AC |
1842 | pci_dev_put(grackle); |
1843 | ||
1da177e4 LT |
1844 | /* Make sure the PMU is idle */ |
1845 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | |
1846 | restore_via_state(); | |
1847 | ||
1848 | /* Restore L2 cache */ | |
1849 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
1850 | _set_L2CR(save_l2cr); | |
1851 | ||
1852 | /* Restore userland MMU context */ | |
5e696617 | 1853 | switch_mmu_context(NULL, current->active_mm); |
1da177e4 LT |
1854 | |
1855 | /* Power things up */ | |
1856 | pmu_unlock(); | |
1857 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
1858 | pmu_wait_complete(&req); | |
1859 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, | |
1860 | PMU_POW0_ON|PMU_POW0_HARD_DRIVE); | |
1861 | pmu_wait_complete(&req); | |
1862 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
1863 | PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
1864 | pmu_wait_complete(&req); | |
1865 | ||
1da177e4 LT |
1866 | return 0; |
1867 | } | |
1868 | ||
aacaf9bd | 1869 | static int |
1da177e4 LT |
1870 | powerbook_sleep_Core99(void) |
1871 | { | |
1872 | unsigned long save_l2cr; | |
1873 | unsigned long save_l3cr; | |
1874 | struct adb_request req; | |
1da177e4 LT |
1875 | |
1876 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) { | |
1877 | printk(KERN_ERR "Sleep mode not supported on this machine\n"); | |
1878 | return -ENOSYS; | |
1879 | } | |
1880 | ||
1881 | if (num_online_cpus() > 1 || cpu_is_offline(0)) | |
1882 | return -EAGAIN; | |
1883 | ||
b16eeb47 BH |
1884 | /* Stop environment and ADB interrupts */ |
1885 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); | |
1886 | pmu_wait_complete(&req); | |
1da177e4 LT |
1887 | |
1888 | /* Tell PMU what events will wake us up */ | |
1889 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, | |
1890 | 0xff, 0xff); | |
1891 | pmu_wait_complete(&req); | |
1892 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS, | |
1893 | 0, PMU_PWR_WAKEUP_KEY | | |
1894 | (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0)); | |
1895 | pmu_wait_complete(&req); | |
1896 | ||
1897 | /* Save the state of the L2 and L3 caches */ | |
1898 | save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ | |
1899 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
1900 | ||
1901 | if (!__fake_sleep) { | |
1902 | /* Ask the PMU to put us to sleep */ | |
1903 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
1904 | pmu_wait_complete(&req); | |
1905 | } | |
1906 | ||
1907 | /* The VIA is supposed not to be restored correctly*/ | |
1908 | save_via_state(); | |
1909 | ||
1910 | /* Shut down various ASICs. There's a chance that we can no longer | |
1911 | * talk to the PMU after this, so I moved it to _after_ sending the | |
1912 | * sleep command to it. Still need to be checked. | |
1913 | */ | |
1914 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); | |
1915 | ||
1916 | /* Call low-level ASM sleep handler */ | |
1917 | if (__fake_sleep) | |
1918 | mdelay(5000); | |
1919 | else | |
1920 | low_sleep_handler(); | |
1921 | ||
1922 | /* Restore Apple core ASICs state */ | |
1923 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); | |
1924 | ||
1925 | /* Restore VIA */ | |
1926 | restore_via_state(); | |
1927 | ||
0086b5ec BH |
1928 | /* tweak LPJ before cpufreq is there */ |
1929 | loops_per_jiffy *= 2; | |
1930 | ||
1da177e4 LT |
1931 | /* Restore video */ |
1932 | pmac_call_early_video_resume(); | |
1933 | ||
1934 | /* Restore L2 cache */ | |
1935 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
1936 | _set_L2CR(save_l2cr); | |
1937 | /* Restore L3 cache */ | |
1938 | if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) | |
1939 | _set_L3CR(save_l3cr); | |
1940 | ||
1941 | /* Restore userland MMU context */ | |
5e696617 | 1942 | switch_mmu_context(NULL, current->active_mm); |
1da177e4 LT |
1943 | |
1944 | /* Tell PMU we are ready */ | |
1945 | pmu_unlock(); | |
1946 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
1947 | pmu_wait_complete(&req); | |
1948 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
1949 | pmu_wait_complete(&req); | |
1950 | ||
0086b5ec BH |
1951 | /* Restore LPJ, cpufreq will adjust the cpu frequency */ |
1952 | loops_per_jiffy /= 2; | |
1953 | ||
1da177e4 LT |
1954 | return 0; |
1955 | } | |
1956 | ||
1957 | #define PB3400_MEM_CTRL 0xf8000000 | |
1958 | #define PB3400_MEM_CTRL_SLEEP 0x70 | |
1959 | ||
887ef35a PM |
1960 | static void __iomem *pb3400_mem_ctrl; |
1961 | ||
1962 | static void powerbook_sleep_init_3400(void) | |
1963 | { | |
1964 | /* map in the memory controller registers */ | |
1965 | pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100); | |
1966 | if (pb3400_mem_ctrl == NULL) | |
1967 | printk(KERN_WARNING "ioremap failed: sleep won't be possible"); | |
1968 | } | |
1969 | ||
1970 | static int powerbook_sleep_3400(void) | |
1da177e4 | 1971 | { |
f91266ed | 1972 | int i, x; |
1da177e4 | 1973 | unsigned int hid0; |
887ef35a | 1974 | unsigned long msr; |
1da177e4 | 1975 | struct adb_request sleep_req; |
1da177e4 LT |
1976 | unsigned int __iomem *mem_ctrl_sleep; |
1977 | ||
887ef35a | 1978 | if (pb3400_mem_ctrl == NULL) |
1da177e4 | 1979 | return -ENOMEM; |
887ef35a | 1980 | mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP; |
1da177e4 | 1981 | |
1da177e4 LT |
1982 | /* Set the memory controller to keep the memory refreshed |
1983 | while we're asleep */ | |
1984 | for (i = 0x403f; i >= 0x4000; --i) { | |
1985 | out_be32(mem_ctrl_sleep, i); | |
1986 | do { | |
1987 | x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; | |
1988 | } while (x == 0); | |
1989 | if (x >= 0x100) | |
1990 | break; | |
1991 | } | |
1992 | ||
1993 | /* Ask the PMU to put us to sleep */ | |
1994 | pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
887ef35a PM |
1995 | pmu_wait_complete(&sleep_req); |
1996 | pmu_unlock(); | |
1da177e4 | 1997 | |
887ef35a | 1998 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); |
1da177e4 | 1999 | |
1da177e4 LT |
2000 | asleep = 1; |
2001 | ||
2002 | /* Put the CPU into sleep mode */ | |
21fe3301 | 2003 | hid0 = mfspr(SPRN_HID0); |
1da177e4 | 2004 | hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; |
21fe3301 | 2005 | mtspr(SPRN_HID0, hid0); |
887ef35a PM |
2006 | local_irq_enable(); |
2007 | msr = mfmsr() | MSR_POW; | |
2008 | while (asleep) { | |
2009 | mb(); | |
2010 | mtmsr(msr); | |
2011 | isync(); | |
2012 | } | |
2013 | local_irq_disable(); | |
1da177e4 LT |
2014 | |
2015 | /* OK, we're awake again, start restoring things */ | |
2016 | out_be32(mem_ctrl_sleep, 0x3f); | |
887ef35a | 2017 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); |
1da177e4 | 2018 | |
1da177e4 LT |
2019 | return 0; |
2020 | } | |
2021 | ||
f91266ed | 2022 | #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ |
8c870933 | 2023 | |
1da177e4 LT |
2024 | /* |
2025 | * Support for /dev/pmu device | |
2026 | */ | |
2027 | #define RB_SIZE 0x10 | |
2028 | struct pmu_private { | |
2029 | struct list_head list; | |
2030 | int rb_get; | |
2031 | int rb_put; | |
2032 | struct rb_entry { | |
2033 | unsigned short len; | |
2034 | unsigned char data[16]; | |
2035 | } rb_buf[RB_SIZE]; | |
2036 | wait_queue_head_t wait; | |
2037 | spinlock_t lock; | |
2038 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2039 | int backlight_locker; | |
4b755999 | 2040 | #endif |
1da177e4 LT |
2041 | }; |
2042 | ||
2043 | static LIST_HEAD(all_pmu_pvt); | |
aacaf9bd | 2044 | static DEFINE_SPINLOCK(all_pvt_lock); |
1da177e4 | 2045 | |
aacaf9bd | 2046 | static void |
1da177e4 LT |
2047 | pmu_pass_intr(unsigned char *data, int len) |
2048 | { | |
2049 | struct pmu_private *pp; | |
2050 | struct list_head *list; | |
2051 | int i; | |
2052 | unsigned long flags; | |
2053 | ||
2054 | if (len > sizeof(pp->rb_buf[0].data)) | |
2055 | len = sizeof(pp->rb_buf[0].data); | |
2056 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2057 | for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) { | |
2058 | pp = list_entry(list, struct pmu_private, list); | |
2059 | spin_lock(&pp->lock); | |
2060 | i = pp->rb_put + 1; | |
2061 | if (i >= RB_SIZE) | |
2062 | i = 0; | |
2063 | if (i != pp->rb_get) { | |
2064 | struct rb_entry *rp = &pp->rb_buf[pp->rb_put]; | |
2065 | rp->len = len; | |
2066 | memcpy(rp->data, data, len); | |
2067 | pp->rb_put = i; | |
2068 | wake_up_interruptible(&pp->wait); | |
2069 | } | |
2070 | spin_unlock(&pp->lock); | |
2071 | } | |
2072 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2073 | } | |
2074 | ||
aacaf9bd | 2075 | static int |
1da177e4 LT |
2076 | pmu_open(struct inode *inode, struct file *file) |
2077 | { | |
2078 | struct pmu_private *pp; | |
2079 | unsigned long flags; | |
2080 | ||
2081 | pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL); | |
2082 | if (pp == 0) | |
2083 | return -ENOMEM; | |
2084 | pp->rb_get = pp->rb_put = 0; | |
2085 | spin_lock_init(&pp->lock); | |
2086 | init_waitqueue_head(&pp->wait); | |
d851b6e0 | 2087 | mutex_lock(&pmu_info_proc_mutex); |
1da177e4 LT |
2088 | spin_lock_irqsave(&all_pvt_lock, flags); |
2089 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2090 | pp->backlight_locker = 0; | |
4b755999 | 2091 | #endif |
1da177e4 LT |
2092 | list_add(&pp->list, &all_pmu_pvt); |
2093 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2094 | file->private_data = pp; | |
d851b6e0 | 2095 | mutex_unlock(&pmu_info_proc_mutex); |
1da177e4 LT |
2096 | return 0; |
2097 | } | |
2098 | ||
aacaf9bd | 2099 | static ssize_t |
1da177e4 LT |
2100 | pmu_read(struct file *file, char __user *buf, |
2101 | size_t count, loff_t *ppos) | |
2102 | { | |
2103 | struct pmu_private *pp = file->private_data; | |
2104 | DECLARE_WAITQUEUE(wait, current); | |
2105 | unsigned long flags; | |
2106 | int ret = 0; | |
2107 | ||
2108 | if (count < 1 || pp == 0) | |
2109 | return -EINVAL; | |
2110 | if (!access_ok(VERIFY_WRITE, buf, count)) | |
2111 | return -EFAULT; | |
2112 | ||
2113 | spin_lock_irqsave(&pp->lock, flags); | |
2114 | add_wait_queue(&pp->wait, &wait); | |
111fbc68 | 2115 | set_current_state(TASK_INTERRUPTIBLE); |
1da177e4 LT |
2116 | |
2117 | for (;;) { | |
2118 | ret = -EAGAIN; | |
2119 | if (pp->rb_get != pp->rb_put) { | |
2120 | int i = pp->rb_get; | |
2121 | struct rb_entry *rp = &pp->rb_buf[i]; | |
2122 | ret = rp->len; | |
2123 | spin_unlock_irqrestore(&pp->lock, flags); | |
2124 | if (ret > count) | |
2125 | ret = count; | |
2126 | if (ret > 0 && copy_to_user(buf, rp->data, ret)) | |
2127 | ret = -EFAULT; | |
2128 | if (++i >= RB_SIZE) | |
2129 | i = 0; | |
2130 | spin_lock_irqsave(&pp->lock, flags); | |
2131 | pp->rb_get = i; | |
2132 | } | |
2133 | if (ret >= 0) | |
2134 | break; | |
2135 | if (file->f_flags & O_NONBLOCK) | |
2136 | break; | |
2137 | ret = -ERESTARTSYS; | |
2138 | if (signal_pending(current)) | |
2139 | break; | |
2140 | spin_unlock_irqrestore(&pp->lock, flags); | |
2141 | schedule(); | |
2142 | spin_lock_irqsave(&pp->lock, flags); | |
2143 | } | |
111fbc68 | 2144 | __set_current_state(TASK_RUNNING); |
1da177e4 LT |
2145 | remove_wait_queue(&pp->wait, &wait); |
2146 | spin_unlock_irqrestore(&pp->lock, flags); | |
2147 | ||
2148 | return ret; | |
2149 | } | |
2150 | ||
aacaf9bd | 2151 | static ssize_t |
1da177e4 LT |
2152 | pmu_write(struct file *file, const char __user *buf, |
2153 | size_t count, loff_t *ppos) | |
2154 | { | |
2155 | return 0; | |
2156 | } | |
2157 | ||
aacaf9bd | 2158 | static unsigned int |
1da177e4 LT |
2159 | pmu_fpoll(struct file *filp, poll_table *wait) |
2160 | { | |
2161 | struct pmu_private *pp = filp->private_data; | |
2162 | unsigned int mask = 0; | |
2163 | unsigned long flags; | |
2164 | ||
2165 | if (pp == 0) | |
2166 | return 0; | |
2167 | poll_wait(filp, &pp->wait, wait); | |
2168 | spin_lock_irqsave(&pp->lock, flags); | |
2169 | if (pp->rb_get != pp->rb_put) | |
2170 | mask |= POLLIN; | |
2171 | spin_unlock_irqrestore(&pp->lock, flags); | |
2172 | return mask; | |
2173 | } | |
2174 | ||
aacaf9bd | 2175 | static int |
1da177e4 LT |
2176 | pmu_release(struct inode *inode, struct file *file) |
2177 | { | |
2178 | struct pmu_private *pp = file->private_data; | |
2179 | unsigned long flags; | |
2180 | ||
1da177e4 LT |
2181 | if (pp != 0) { |
2182 | file->private_data = NULL; | |
2183 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2184 | list_del(&pp->list); | |
2185 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
4b755999 | 2186 | |
1da177e4 | 2187 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) |
4b755999 MH |
2188 | if (pp->backlight_locker) |
2189 | pmac_backlight_enable(); | |
2190 | #endif | |
2191 | ||
1da177e4 LT |
2192 | kfree(pp); |
2193 | } | |
1da177e4 LT |
2194 | return 0; |
2195 | } | |
2196 | ||
f91266ed | 2197 | #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) |
7ac5dde9 | 2198 | static void pmac_suspend_disable_irqs(void) |
f91266ed | 2199 | { |
f91266ed JB |
2200 | /* Call platform functions marked "on sleep" */ |
2201 | pmac_pfunc_i2c_suspend(); | |
2202 | pmac_pfunc_base_suspend(); | |
f91266ed JB |
2203 | } |
2204 | ||
2205 | static int powerbook_sleep(suspend_state_t state) | |
2206 | { | |
2207 | int error = 0; | |
2208 | ||
2209 | /* Wait for completion of async requests */ | |
2210 | while (!batt_req.complete) | |
2211 | pmu_poll(); | |
2212 | ||
2213 | /* Giveup the lazy FPU & vec so we don't have to back them | |
2214 | * up from the low level code | |
2215 | */ | |
2216 | enable_kernel_fp(); | |
2217 | ||
2218 | #ifdef CONFIG_ALTIVEC | |
2219 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
2220 | enable_kernel_altivec(); | |
2221 | #endif /* CONFIG_ALTIVEC */ | |
2222 | ||
2223 | switch (pmu_kind) { | |
2224 | case PMU_OHARE_BASED: | |
2225 | error = powerbook_sleep_3400(); | |
2226 | break; | |
2227 | case PMU_HEATHROW_BASED: | |
2228 | case PMU_PADDINGTON_BASED: | |
2229 | error = powerbook_sleep_grackle(); | |
2230 | break; | |
2231 | case PMU_KEYLARGO_BASED: | |
2232 | error = powerbook_sleep_Core99(); | |
2233 | break; | |
2234 | default: | |
2235 | return -ENOSYS; | |
2236 | } | |
2237 | ||
2238 | if (error) | |
2239 | return error; | |
2240 | ||
2241 | mdelay(100); | |
2242 | ||
f91266ed JB |
2243 | return 0; |
2244 | } | |
2245 | ||
7ac5dde9 | 2246 | static void pmac_suspend_enable_irqs(void) |
f91266ed JB |
2247 | { |
2248 | /* Force a poll of ADB interrupts */ | |
2249 | adb_int_pending = 1; | |
2250 | via_pmu_interrupt(0, NULL); | |
2251 | ||
f91266ed | 2252 | mdelay(10); |
f91266ed JB |
2253 | |
2254 | /* Call platform functions marked "on wake" */ | |
2255 | pmac_pfunc_base_resume(); | |
2256 | pmac_pfunc_i2c_resume(); | |
2257 | } | |
2258 | ||
2259 | static int pmu_sleep_valid(suspend_state_t state) | |
2260 | { | |
2261 | return state == PM_SUSPEND_MEM | |
2262 | && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0); | |
2263 | } | |
2264 | ||
2f55ac07 | 2265 | static const struct platform_suspend_ops pmu_pm_ops = { |
f91266ed JB |
2266 | .enter = powerbook_sleep, |
2267 | .valid = pmu_sleep_valid, | |
2268 | }; | |
2269 | ||
2270 | static int register_pmu_pm_ops(void) | |
2271 | { | |
7ac5dde9 SW |
2272 | if (pmu_kind == PMU_OHARE_BASED) |
2273 | powerbook_sleep_init_3400(); | |
2274 | ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs; | |
2275 | ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs; | |
f91266ed JB |
2276 | suspend_set_ops(&pmu_pm_ops); |
2277 | ||
2278 | return 0; | |
2279 | } | |
2280 | ||
2281 | device_initcall(register_pmu_pm_ops); | |
2282 | #endif | |
2283 | ||
55929332 | 2284 | static int pmu_ioctl(struct file *filp, |
1da177e4 LT |
2285 | u_int cmd, u_long arg) |
2286 | { | |
1da177e4 | 2287 | __u32 __user *argp = (__u32 __user *)arg; |
8c870933 | 2288 | int error = -EINVAL; |
1da177e4 LT |
2289 | |
2290 | switch (cmd) { | |
2291 | case PMU_IOC_SLEEP: | |
2292 | if (!capable(CAP_SYS_ADMIN)) | |
2293 | return -EACCES; | |
f91266ed | 2294 | return pm_suspend(PM_SUSPEND_MEM); |
1da177e4 | 2295 | case PMU_IOC_CAN_SLEEP: |
f91266ed | 2296 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0) |
1da177e4 LT |
2297 | return put_user(0, argp); |
2298 | else | |
2299 | return put_user(1, argp); | |
2300 | ||
5474c120 MH |
2301 | #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY |
2302 | /* Compatibility ioctl's for backlight */ | |
1da177e4 | 2303 | case PMU_IOC_GET_BACKLIGHT: |
5474c120 MH |
2304 | { |
2305 | int brightness; | |
2306 | ||
5474c120 MH |
2307 | brightness = pmac_backlight_get_legacy_brightness(); |
2308 | if (brightness < 0) | |
2309 | return brightness; | |
2310 | else | |
2311 | return put_user(brightness, argp); | |
2312 | ||
2313 | } | |
1da177e4 LT |
2314 | case PMU_IOC_SET_BACKLIGHT: |
2315 | { | |
5474c120 MH |
2316 | int brightness; |
2317 | ||
5474c120 MH |
2318 | error = get_user(brightness, argp); |
2319 | if (error) | |
2320 | return error; | |
2321 | ||
2322 | return pmac_backlight_set_legacy_brightness(brightness); | |
1da177e4 LT |
2323 | } |
2324 | #ifdef CONFIG_INPUT_ADBHID | |
2325 | case PMU_IOC_GRAB_BACKLIGHT: { | |
8c870933 | 2326 | struct pmu_private *pp = filp->private_data; |
8c870933 | 2327 | |
1da177e4 LT |
2328 | if (pp->backlight_locker) |
2329 | return 0; | |
4b755999 | 2330 | |
1da177e4 | 2331 | pp->backlight_locker = 1; |
4b755999 MH |
2332 | pmac_backlight_disable(); |
2333 | ||
1da177e4 LT |
2334 | return 0; |
2335 | } | |
2336 | #endif /* CONFIG_INPUT_ADBHID */ | |
5474c120 | 2337 | #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */ |
4b755999 | 2338 | |
1da177e4 LT |
2339 | case PMU_IOC_GET_MODEL: |
2340 | return put_user(pmu_kind, argp); | |
2341 | case PMU_IOC_HAS_ADB: | |
2342 | return put_user(pmu_has_adb, argp); | |
2343 | } | |
8c870933 | 2344 | return error; |
1da177e4 LT |
2345 | } |
2346 | ||
55929332 AB |
2347 | static long pmu_unlocked_ioctl(struct file *filp, |
2348 | u_int cmd, u_long arg) | |
2349 | { | |
2350 | int ret; | |
2351 | ||
d851b6e0 | 2352 | mutex_lock(&pmu_info_proc_mutex); |
55929332 | 2353 | ret = pmu_ioctl(filp, cmd, arg); |
d851b6e0 | 2354 | mutex_unlock(&pmu_info_proc_mutex); |
55929332 AB |
2355 | |
2356 | return ret; | |
2357 | } | |
2358 | ||
4cc4587f AS |
2359 | #ifdef CONFIG_COMPAT |
2360 | #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t) | |
2361 | #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t) | |
2362 | #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t) | |
2363 | #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t) | |
2364 | #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t) | |
2365 | #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t) | |
2366 | ||
2367 | static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg) | |
2368 | { | |
2369 | switch (cmd) { | |
2370 | case PMU_IOC_SLEEP: | |
2371 | break; | |
2372 | case PMU_IOC_GET_BACKLIGHT32: | |
2373 | cmd = PMU_IOC_GET_BACKLIGHT; | |
2374 | break; | |
2375 | case PMU_IOC_SET_BACKLIGHT32: | |
2376 | cmd = PMU_IOC_SET_BACKLIGHT; | |
2377 | break; | |
2378 | case PMU_IOC_GET_MODEL32: | |
2379 | cmd = PMU_IOC_GET_MODEL; | |
2380 | break; | |
2381 | case PMU_IOC_HAS_ADB32: | |
2382 | cmd = PMU_IOC_HAS_ADB; | |
2383 | break; | |
2384 | case PMU_IOC_CAN_SLEEP32: | |
2385 | cmd = PMU_IOC_CAN_SLEEP; | |
2386 | break; | |
2387 | case PMU_IOC_GRAB_BACKLIGHT32: | |
2388 | cmd = PMU_IOC_GRAB_BACKLIGHT; | |
2389 | break; | |
2390 | default: | |
2391 | return -ENOIOCTLCMD; | |
2392 | } | |
2393 | return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); | |
2394 | } | |
2395 | #endif | |
2396 | ||
fa027c2a | 2397 | static const struct file_operations pmu_device_fops = { |
1da177e4 LT |
2398 | .read = pmu_read, |
2399 | .write = pmu_write, | |
2400 | .poll = pmu_fpoll, | |
55929332 | 2401 | .unlocked_ioctl = pmu_unlocked_ioctl, |
4cc4587f AS |
2402 | #ifdef CONFIG_COMPAT |
2403 | .compat_ioctl = compat_pmu_ioctl, | |
2404 | #endif | |
1da177e4 LT |
2405 | .open = pmu_open, |
2406 | .release = pmu_release, | |
6038f373 | 2407 | .llseek = noop_llseek, |
1da177e4 LT |
2408 | }; |
2409 | ||
aacaf9bd | 2410 | static struct miscdevice pmu_device = { |
1da177e4 LT |
2411 | PMU_MINOR, "pmu", &pmu_device_fops |
2412 | }; | |
2413 | ||
8c870933 | 2414 | static int pmu_device_init(void) |
1da177e4 LT |
2415 | { |
2416 | if (!via) | |
8c870933 | 2417 | return 0; |
1da177e4 LT |
2418 | if (misc_register(&pmu_device) < 0) |
2419 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
8c870933 | 2420 | return 0; |
1da177e4 | 2421 | } |
8c870933 BH |
2422 | device_initcall(pmu_device_init); |
2423 | ||
1da177e4 LT |
2424 | |
2425 | #ifdef DEBUG_SLEEP | |
aacaf9bd | 2426 | static inline void |
1da177e4 LT |
2427 | polled_handshake(volatile unsigned char __iomem *via) |
2428 | { | |
2429 | via[B] &= ~TREQ; eieio(); | |
2430 | while ((via[B] & TACK) != 0) | |
2431 | ; | |
2432 | via[B] |= TREQ; eieio(); | |
2433 | while ((via[B] & TACK) == 0) | |
2434 | ; | |
2435 | } | |
2436 | ||
aacaf9bd | 2437 | static inline void |
1da177e4 LT |
2438 | polled_send_byte(volatile unsigned char __iomem *via, int x) |
2439 | { | |
2440 | via[ACR] |= SR_OUT | SR_EXT; eieio(); | |
2441 | via[SR] = x; eieio(); | |
2442 | polled_handshake(via); | |
2443 | } | |
2444 | ||
aacaf9bd | 2445 | static inline int |
1da177e4 LT |
2446 | polled_recv_byte(volatile unsigned char __iomem *via) |
2447 | { | |
2448 | int x; | |
2449 | ||
2450 | via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio(); | |
2451 | x = via[SR]; eieio(); | |
2452 | polled_handshake(via); | |
2453 | x = via[SR]; eieio(); | |
2454 | return x; | |
2455 | } | |
2456 | ||
aacaf9bd | 2457 | int |
1da177e4 LT |
2458 | pmu_polled_request(struct adb_request *req) |
2459 | { | |
2460 | unsigned long flags; | |
2461 | int i, l, c; | |
2462 | volatile unsigned char __iomem *v = via; | |
2463 | ||
2464 | req->complete = 1; | |
2465 | c = req->data[0]; | |
2466 | l = pmu_data_len[c][0]; | |
2467 | if (l >= 0 && req->nbytes != l + 1) | |
2468 | return -EINVAL; | |
2469 | ||
2470 | local_irq_save(flags); | |
2471 | while (pmu_state != idle) | |
2472 | pmu_poll(); | |
2473 | ||
2474 | while ((via[B] & TACK) == 0) | |
2475 | ; | |
2476 | polled_send_byte(v, c); | |
2477 | if (l < 0) { | |
2478 | l = req->nbytes - 1; | |
2479 | polled_send_byte(v, l); | |
2480 | } | |
2481 | for (i = 1; i <= l; ++i) | |
2482 | polled_send_byte(v, req->data[i]); | |
2483 | ||
2484 | l = pmu_data_len[c][1]; | |
2485 | if (l < 0) | |
2486 | l = polled_recv_byte(v); | |
2487 | for (i = 0; i < l; ++i) | |
2488 | req->reply[i + req->reply_len] = polled_recv_byte(v); | |
2489 | ||
2490 | if (req->done) | |
2491 | (*req->done)(req); | |
2492 | ||
2493 | local_irq_restore(flags); | |
2494 | return 0; | |
2495 | } | |
1da177e4 | 2496 | |
f91266ed JB |
2497 | /* N.B. This doesn't work on the 3400 */ |
2498 | void pmu_blink(int n) | |
2499 | { | |
2500 | struct adb_request req; | |
1da177e4 | 2501 | |
f91266ed | 2502 | memset(&req, 0, sizeof(req)); |
1da177e4 | 2503 | |
f91266ed JB |
2504 | for (; n > 0; --n) { |
2505 | req.nbytes = 4; | |
2506 | req.done = NULL; | |
2507 | req.data[0] = 0xee; | |
2508 | req.data[1] = 4; | |
2509 | req.data[2] = 0; | |
2510 | req.data[3] = 1; | |
2511 | req.reply[0] = ADB_RET_OK; | |
2512 | req.reply_len = 1; | |
2513 | req.reply_expected = 0; | |
2514 | pmu_polled_request(&req); | |
2515 | mdelay(50); | |
2516 | req.nbytes = 4; | |
2517 | req.done = NULL; | |
2518 | req.data[0] = 0xee; | |
2519 | req.data[1] = 4; | |
2520 | req.data[2] = 0; | |
2521 | req.data[3] = 0; | |
2522 | req.reply[0] = ADB_RET_OK; | |
2523 | req.reply_len = 1; | |
2524 | req.reply_expected = 0; | |
2525 | pmu_polled_request(&req); | |
2526 | mdelay(50); | |
2527 | } | |
2528 | mdelay(50); | |
2529 | } | |
2530 | #endif /* DEBUG_SLEEP */ | |
1da177e4 | 2531 | |
f91266ed | 2532 | #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) |
f596575e | 2533 | int pmu_sys_suspended; |
1da177e4 | 2534 | |
e83b906c | 2535 | static int pmu_syscore_suspend(void) |
1da177e4 | 2536 | { |
e83b906c | 2537 | /* Suspend PMU event interrupts */ |
1da177e4 | 2538 | pmu_suspend(); |
1da177e4 | 2539 | pmu_sys_suspended = 1; |
0094f2cd BH |
2540 | |
2541 | #ifdef CONFIG_PMAC_BACKLIGHT | |
2542 | /* Tell backlight code not to muck around with the chip anymore */ | |
2543 | pmu_backlight_set_sleep(1); | |
2544 | #endif | |
2545 | ||
1da177e4 LT |
2546 | return 0; |
2547 | } | |
2548 | ||
e83b906c | 2549 | static void pmu_syscore_resume(void) |
1da177e4 LT |
2550 | { |
2551 | struct adb_request req; | |
2552 | ||
2553 | if (!pmu_sys_suspended) | |
e83b906c | 2554 | return; |
1da177e4 LT |
2555 | |
2556 | /* Tell PMU we are ready */ | |
2557 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
2558 | pmu_wait_complete(&req); | |
2559 | ||
0094f2cd BH |
2560 | #ifdef CONFIG_PMAC_BACKLIGHT |
2561 | /* Tell backlight code it can use the chip again */ | |
2562 | pmu_backlight_set_sleep(0); | |
2563 | #endif | |
1da177e4 LT |
2564 | /* Resume PMU event interrupts */ |
2565 | pmu_resume(); | |
1da177e4 | 2566 | pmu_sys_suspended = 0; |
1da177e4 LT |
2567 | } |
2568 | ||
e83b906c BH |
2569 | static struct syscore_ops pmu_syscore_ops = { |
2570 | .suspend = pmu_syscore_suspend, | |
2571 | .resume = pmu_syscore_resume, | |
1da177e4 LT |
2572 | }; |
2573 | ||
e83b906c | 2574 | static int pmu_syscore_register(void) |
1da177e4 | 2575 | { |
e83b906c | 2576 | register_syscore_ops(&pmu_syscore_ops); |
1da177e4 | 2577 | |
1da177e4 LT |
2578 | return 0; |
2579 | } | |
e83b906c BH |
2580 | subsys_initcall(pmu_syscore_register); |
2581 | #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ | |
1da177e4 LT |
2582 | |
2583 | EXPORT_SYMBOL(pmu_request); | |
730745a5 | 2584 | EXPORT_SYMBOL(pmu_queue_request); |
1da177e4 LT |
2585 | EXPORT_SYMBOL(pmu_poll); |
2586 | EXPORT_SYMBOL(pmu_poll_adb); | |
2587 | EXPORT_SYMBOL(pmu_wait_complete); | |
2588 | EXPORT_SYMBOL(pmu_suspend); | |
2589 | EXPORT_SYMBOL(pmu_resume); | |
2590 | EXPORT_SYMBOL(pmu_unlock); | |
620a2459 | 2591 | #if defined(CONFIG_PPC32) |
1da177e4 LT |
2592 | EXPORT_SYMBOL(pmu_enable_irled); |
2593 | EXPORT_SYMBOL(pmu_battery_count); | |
2594 | EXPORT_SYMBOL(pmu_batteries); | |
2595 | EXPORT_SYMBOL(pmu_power_flags); | |
f91266ed | 2596 | #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ |
1da177e4 | 2597 |