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dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
[deliverable/linux.git] / drivers / media / dvb / dm1105 / dm1105.c
CommitLineData
a611d0ca
IL		 1/*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
a611d0ca
IL		 22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/proc_fs.h>
27#include <linux/pci.h>
28#include <linux/dma-mapping.h>
29#include <linux/input.h>
30#include <media/ir-common.h>
31
32#include "demux.h"
33#include "dmxdev.h"
34#include "dvb_demux.h"
35#include "dvb_frontend.h"
36#include "dvb_net.h"
37#include "dvbdev.h"
38#include "dvb-pll.h"
39
40#include "stv0299.h"
e4aab64c
IL		 41#include "stv0288.h"
42#include "stb6000.h"
04ad28c9 43#include "si21xx.h"
35d9c427 44#include "cx24116.h"
a611d0ca
IL		 45#include "z0194a.h"
46
47/* ----------------------------------------------- */
48/*
49 * PCI ID's
50 */
51#ifndef PCI_VENDOR_ID_TRIGEM
52#define PCI_VENDOR_ID_TRIGEM 0x109f
53#endif
54#ifndef PCI_DEVICE_ID_DM1105
55#define PCI_DEVICE_ID_DM1105 0x036f
56#endif
57#ifndef PCI_DEVICE_ID_DW2002
58#define PCI_DEVICE_ID_DW2002 0x2002
59#endif
60#ifndef PCI_DEVICE_ID_DW2004
61#define PCI_DEVICE_ID_DW2004 0x2004
62#endif
63/* ----------------------------------------------- */
64/* sdmc dm1105 registers */
65
66/* TS Control */
67#define DM1105_TSCTR 0x00
68#define DM1105_DTALENTH 0x04
69
70/* GPIO Interface */
71#define DM1105_GPIOVAL 0x08
72#define DM1105_GPIOCTR 0x0c
73
74/* PID serial number */
75#define DM1105_PIDN 0x10
76
77/* Odd-even secret key select */
78#define DM1105_CWSEL 0x14
79
80/* Host Command Interface */
81#define DM1105_HOST_CTR 0x18
82#define DM1105_HOST_AD 0x1c
83
84/* PCI Interface */
85#define DM1105_CR 0x30
86#define DM1105_RST 0x34
87#define DM1105_STADR 0x38
88#define DM1105_RLEN 0x3c
89#define DM1105_WRP 0x40
90#define DM1105_INTCNT 0x44
91#define DM1105_INTMAK 0x48
92#define DM1105_INTSTS 0x4c
93
94/* CW Value */
95#define DM1105_ODD 0x50
96#define DM1105_EVEN 0x58
97
98/* PID Value */
99#define DM1105_PID 0x60
100
101/* IR Control */
102#define DM1105_IRCTR 0x64
103#define DM1105_IRMODE 0x68
104#define DM1105_SYSTEMCODE 0x6c
105#define DM1105_IRCODE 0x70
106
107/* Unknown Values */
108#define DM1105_ENCRYPT 0x74
109#define DM1105_VER 0x7c
110
111/* I2C Interface */
112#define DM1105_I2CCTR 0x80
113#define DM1105_I2CSTS 0x81
114#define DM1105_I2CDAT 0x82
115#define DM1105_I2C_RA 0x83
116/* ----------------------------------------------- */
117/* Interrupt Mask Bits */
118
119#define INTMAK_TSIRQM 0x01
120#define INTMAK_HIRQM 0x04
121#define INTMAK_IRM 0x08
122#define INTMAK_ALLMASK (INTMAK_TSIRQM | \
123 INTMAK_HIRQM | \
124 INTMAK_IRM)
125#define INTMAK_NONEMASK 0x00
126
127/* Interrupt Status Bits */
128#define INTSTS_TSIRQ 0x01
129#define INTSTS_HIRQ 0x04
130#define INTSTS_IR 0x08
131
132/* IR Control Bits */
133#define DM1105_IR_EN 0x01
134#define DM1105_SYS_CHK 0x02
135#define DM1105_REP_FLG 0x08
136
137/* EEPROM addr */
138#define IIC_24C01_addr 0xa0
139/* Max board count */
140#define DM1105_MAX 0x04
141
142#define DRIVER_NAME "dm1105"
143
144#define DM1105_DMA_PACKETS 47
145#define DM1105_DMA_PACKET_LENGTH (128*4)
146#define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
147
148/* GPIO's for LNB power control */
149#define DM1105_LNB_MASK 0x00000000
150#define DM1105_LNB_13V 0x00010100
151#define DM1105_LNB_18V 0x00000100
152
153static int ir_debug;
154module_param(ir_debug, int, 0644);
155MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
156
157DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
158
a611d0ca
IL		 159/* infrared remote control */
160struct infrared {
a611d0ca 161 struct input_dev *input_dev;
b72857dd 162 struct ir_input_state ir;
a611d0ca 163 char input_phys[32];
b72857dd 164 struct work_struct work;
a611d0ca
IL		 165 u32 ir_command;
166};
167
168struct dm1105dvb {
169 /* pci */
170 struct pci_dev *pdev;
171 u8 __iomem *io_mem;
172
173 /* ir */
174 struct infrared ir;
175
176 /* dvb */
177 struct dmx_frontend hw_frontend;
178 struct dmx_frontend mem_frontend;
179 struct dmxdev dmxdev;
180 struct dvb_adapter dvb_adapter;
181 struct dvb_demux demux;
182 struct dvb_frontend *fe;
183 struct dvb_net dvbnet;
184 unsigned int full_ts_users;
185
186 /* i2c */
187 struct i2c_adapter i2c_adap;
188
d1498ffc
IL		 189 /* irq */
190 struct work_struct work;
191
a611d0ca
IL		 192 /* dma */
193 dma_addr_t dma_addr;
194 unsigned char *ts_buf;
195 u32 wrp;
d1498ffc 196 u32 nextwrp;
a611d0ca
IL		 197 u32 buffer_size;
198 unsigned int PacketErrorCount;
199 unsigned int dmarst;
200 spinlock_t lock;
201
202};
203
204#define dm_io_mem(reg) ((unsigned long)(&dm1105dvb->io_mem[reg]))
205
a611d0ca
IL		 206static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
207 struct i2c_msg *msgs, int num)
208{
209 struct dm1105dvb *dm1105dvb ;
210
211 int addr, rc, i, j, k, len, byte, data;
212 u8 status;
213
214 dm1105dvb = i2c_adap->algo_data;
215 for (i = 0; i < num; i++) {
216 outb(0x00, dm_io_mem(DM1105_I2CCTR));
217 if (msgs[i].flags & I2C_M_RD) {
218 /* read bytes */
219 addr = msgs[i].addr << 1;
220 addr |= 1;
221 outb(addr, dm_io_mem(DM1105_I2CDAT));
222 for (byte = 0; byte < msgs[i].len; byte++)
223 outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1));
224
225 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
226 for (j = 0; j < 55; j++) {
227 mdelay(10);
228 status = inb(dm_io_mem(DM1105_I2CSTS));
229 if ((status & 0xc0) == 0x40)
230 break;
231 }
232 if (j >= 55)
233 return -1;
234
235 for (byte = 0; byte < msgs[i].len; byte++) {
236 rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1));
237 if (rc < 0)
238 goto err;
239 msgs[i].buf[byte] = rc;
240 }
241 } else {
242 if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
243 /* prepaired for cx24116 firmware */
244 /* Write in small blocks */
245 len = msgs[i].len - 1;
246 k = 1;
247 do {
248 outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT));
249 outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1));
250 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
251 data = msgs[i].buf[k+byte];
252 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2));
253 }
254 outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR));
255 for (j = 0; j < 25; j++) {
256 mdelay(10);
257 status = inb(dm_io_mem(DM1105_I2CSTS));
258 if ((status & 0xc0) == 0x40)
259 break;
260 }
261
262 if (j >= 25)
263 return -1;
264
265 k += 48;
266 len -= 48;
267 } while (len > 0);
268 } else {
269 /* write bytes */
270 outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT));
271 for (byte = 0; byte < msgs[i].len; byte++) {
272 data = msgs[i].buf[byte];
273 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1));
274 }
275 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
276 for (j = 0; j < 25; j++) {
277 mdelay(10);
278 status = inb(dm_io_mem(DM1105_I2CSTS));
279 if ((status & 0xc0) == 0x40)
280 break;
281 }
282
283 if (j >= 25)
284 return -1;
285 }
286 }
287 }
288 return num;
289 err:
290 return rc;
291}
292
293static u32 functionality(struct i2c_adapter *adap)
294{
295 return I2C_FUNC_I2C;
296}
297
298static struct i2c_algorithm dm1105_algo = {
299 .master_xfer = dm1105_i2c_xfer,
300 .functionality = functionality,
301};
302
303static inline struct dm1105dvb *feed_to_dm1105dvb(struct dvb_demux_feed *feed)
304{
305 return container_of(feed->demux, struct dm1105dvb, demux);
306}
307
308static inline struct dm1105dvb *frontend_to_dm1105dvb(struct dvb_frontend *fe)
309{
310 return container_of(fe->dvb, struct dm1105dvb, dvb_adapter);
311}
312
313static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
314{
315 struct dm1105dvb *dm1105dvb = frontend_to_dm1105dvb(fe);
316
317 if (voltage == SEC_VOLTAGE_18) {
318 outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
319 outl(DM1105_LNB_18V, dm_io_mem(DM1105_GPIOVAL));
320 } else {
321 /*LNB ON-13V by default!*/
322 outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
323 outl(DM1105_LNB_13V, dm_io_mem(DM1105_GPIOVAL));
324 }
325
326 return 0;
327}
328
329static void dm1105dvb_set_dma_addr(struct dm1105dvb *dm1105dvb)
330{
331 outl(cpu_to_le32(dm1105dvb->dma_addr), dm_io_mem(DM1105_STADR));
332}
333
334static int __devinit dm1105dvb_dma_map(struct dm1105dvb *dm1105dvb)
335{
336 dm1105dvb->ts_buf = pci_alloc_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, &dm1105dvb->dma_addr);
337
7b51a70c 338 return !dm1105dvb->ts_buf;
a611d0ca
IL		 339}
340
341static void dm1105dvb_dma_unmap(struct dm1105dvb *dm1105dvb)
342{
343 pci_free_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, dm1105dvb->ts_buf, dm1105dvb->dma_addr);
344}
345
df4533af 346static void dm1105dvb_enable_irqs(struct dm1105dvb *dm1105dvb)
a611d0ca
IL		 347{
348 outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK));
349 outb(1, dm_io_mem(DM1105_CR));
350}
351
352static void dm1105dvb_disable_irqs(struct dm1105dvb *dm1105dvb)
353{
354 outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK));
355 outb(0, dm_io_mem(DM1105_CR));
356}
357
358static int dm1105dvb_start_feed(struct dvb_demux_feed *f)
359{
360 struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
361
362 if (dm1105dvb->full_ts_users++ == 0)
363 dm1105dvb_enable_irqs(dm1105dvb);
364
365 return 0;
366}
367
368static int dm1105dvb_stop_feed(struct dvb_demux_feed *f)
369{
370 struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
371
372 if (--dm1105dvb->full_ts_users == 0)
373 dm1105dvb_disable_irqs(dm1105dvb);
374
375 return 0;
376}
377
b72857dd
IL		 378/* ir work handler */
379static void dm1105_emit_key(struct work_struct *work)
a611d0ca 380{
b72857dd 381 struct infrared *ir = container_of(work, struct infrared, work);
a611d0ca
IL		 382 u32 ircom = ir->ir_command;
383 u8 data;
a611d0ca 384
d1498ffc
IL		 385 if (ir_debug)
386 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
387
a611d0ca
IL		 388 data = (ircom >> 8) & 0x7f;
389
b72857dd
IL		 390 ir_input_keydown(ir->input_dev, &ir->ir, data, data);
391 ir_input_nokey(ir->input_dev, &ir->ir);
a611d0ca
IL		 392}
393
d1498ffc
IL		 394/* work handler */
395static void dm1105_dmx_buffer(struct work_struct *work)
396{
397 struct dm1105dvb *dm1105dvb =
398 container_of(work, struct dm1105dvb, work);
399 unsigned int nbpackets;
400 u32 oldwrp = dm1105dvb->wrp;
401 u32 nextwrp = dm1105dvb->nextwrp;
402
403 if (!((dm1105dvb->ts_buf[oldwrp] == 0x47) &&
404 (dm1105dvb->ts_buf[oldwrp + 188] == 0x47) &&
405 (dm1105dvb->ts_buf[oldwrp + 188 * 2] == 0x47))) {
406 dm1105dvb->PacketErrorCount++;
407 /* bad packet found */
408 if ((dm1105dvb->PacketErrorCount >= 2) &&
409 (dm1105dvb->dmarst == 0)) {
410 outb(1, dm_io_mem(DM1105_RST));
411 dm1105dvb->wrp = 0;
412 dm1105dvb->PacketErrorCount = 0;
413 dm1105dvb->dmarst = 0;
414 return;
415 }
416 }
417
418 if (nextwrp < oldwrp) {
419 memcpy(dm1105dvb->ts_buf + dm1105dvb->buffer_size,
420 dm1105dvb->ts_buf, nextwrp);
421 nbpackets = ((dm1105dvb->buffer_size - oldwrp) + nextwrp) / 188;
422 } else
423 nbpackets = (nextwrp - oldwrp) / 188;
424
425 dm1105dvb->wrp = nextwrp;
426 dvb_dmx_swfilter_packets(&dm1105dvb->demux,
427 &dm1105dvb->ts_buf[oldwrp], nbpackets);
428}
429
a611d0ca
IL		 430static irqreturn_t dm1105dvb_irq(int irq, void *dev_id)
431{
432 struct dm1105dvb *dm1105dvb = dev_id;
a611d0ca
IL		 433
434 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
435 unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS));
436 outb(intsts, dm_io_mem(DM1105_INTSTS));
437
438 switch (intsts) {
439 case INTSTS_TSIRQ:
440 case (INTSTS_TSIRQ | INTSTS_IR):
d1498ffc
IL		 441 dm1105dvb->nextwrp = inl(dm_io_mem(DM1105_WRP)) -
442 inl(dm_io_mem(DM1105_STADR));
443 schedule_work(&dm1105dvb->work);
a611d0ca
IL		 444 break;
445 case INTSTS_IR:
d1498ffc 446 dm1105dvb->ir.ir_command = inl(dm_io_mem(DM1105_IRCODE));
b72857dd 447 schedule_work(&dm1105dvb->ir.work);
a611d0ca
IL		 448 break;
449 }
a611d0ca 450
d1498ffc 451 return IRQ_HANDLED;
a611d0ca
IL		 452}
453
a611d0ca
IL		 454int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
455{
456 struct input_dev *input_dev;
b72857dd
IL		 457 IR_KEYTAB_TYPE *ir_codes = ir_codes_dm1105_nec;
458 int ir_type = IR_TYPE_OTHER;
459 int err = -ENOMEM;
a611d0ca
IL		 460
461 input_dev = input_allocate_device();
462 if (!input_dev)
463 return -ENOMEM;
464
465 dm1105->ir.input_dev = input_dev;
466 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
467 "pci-%s/ir0", pci_name(dm1105->pdev));
468
b72857dd 469 ir_input_init(input_dev, &dm1105->ir.ir, ir_type, ir_codes);
a611d0ca 470 input_dev->name = "DVB on-card IR receiver";
a611d0ca
IL		 471 input_dev->phys = dm1105->ir.input_phys;
472 input_dev->id.bustype = BUS_PCI;
b72857dd 473 input_dev->id.version = 1;
a611d0ca
IL		 474 if (dm1105->pdev->subsystem_vendor) {
475 input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
476 input_dev->id.product = dm1105->pdev->subsystem_device;
477 } else {
478 input_dev->id.vendor = dm1105->pdev->vendor;
479 input_dev->id.product = dm1105->pdev->device;
480 }
b72857dd 481
a611d0ca 482 input_dev->dev.parent = &dm1105->pdev->dev;
b72857dd
IL		 483
484 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
485
a611d0ca
IL		 486 err = input_register_device(input_dev);
487 if (err) {
488 input_free_device(input_dev);
489 return err;
490 }
491
a611d0ca
IL		 492 return 0;
493}
494
a611d0ca
IL		 495void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105)
496{
a611d0ca
IL		 497 input_unregister_device(dm1105->ir.input_dev);
498
499}
500
501static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb)
502{
503 dm1105dvb_disable_irqs(dm1105dvb);
504
505 outb(0, dm_io_mem(DM1105_HOST_CTR));
506
507 /*DATALEN 188,*/
508 outb(188, dm_io_mem(DM1105_DTALENTH));
509 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
510 outw(0xc10a, dm_io_mem(DM1105_TSCTR));
511
512 /* map DMA and set address */
513 dm1105dvb_dma_map(dm1105dvb);
514 dm1105dvb_set_dma_addr(dm1105dvb);
515 /* big buffer */
516 outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN));
517 outb(47, dm_io_mem(DM1105_INTCNT));
518
519 /* IR NEC mode enable */
520 outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR));
521 outb(0, dm_io_mem(DM1105_IRMODE));
522 outw(0, dm_io_mem(DM1105_SYSTEMCODE));
523
524 return 0;
525}
526
527static void dm1105dvb_hw_exit(struct dm1105dvb *dm1105dvb)
528{
529 dm1105dvb_disable_irqs(dm1105dvb);
530
531 /* IR disable */
532 outb(0, dm_io_mem(DM1105_IRCTR));
533 outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK));
534
535 dm1105dvb_dma_unmap(dm1105dvb);
536}
e4aab64c 537
d4305c68
IL		 538static struct stv0299_config sharp_z0194a_config = {
539 .demod_address = 0x68,
540 .inittab = sharp_z0194a_inittab,
541 .mclk = 88000000UL,
542 .invert = 1,
543 .skip_reinit = 0,
544 .lock_output = STV0299_LOCKOUTPUT_1,
545 .volt13_op0_op1 = STV0299_VOLT13_OP1,
546 .min_delay_ms = 100,
547 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
548};
549
a611d0ca
IL		 550static struct stv0288_config earda_config = {
551 .demod_address = 0x68,
552 .min_delay_ms = 100,
553};
554
555static struct si21xx_config serit_config = {
556 .demod_address = 0x68,
557 .min_delay_ms = 100,
558
559};
560
561static struct cx24116_config serit_sp2633_config = {
562 .demod_address = 0x55,
563};
a611d0ca
IL		 564
565static int __devinit frontend_init(struct dm1105dvb *dm1105dvb)
566{
567 int ret;
568
569 switch (dm1105dvb->pdev->subsystem_device) {
570 case PCI_DEVICE_ID_DW2002:
571 dm1105dvb->fe = dvb_attach(
572 stv0299_attach, &sharp_z0194a_config,
573 &dm1105dvb->i2c_adap);
574
575 if (dm1105dvb->fe) {
576 dm1105dvb->fe->ops.set_voltage =
577 dm1105dvb_set_voltage;
578 dvb_attach(dvb_pll_attach, dm1105dvb->fe, 0x60,
579 &dm1105dvb->i2c_adap, DVB_PLL_OPERA1);
580 }
e4aab64c 581
a611d0ca
IL		 582 if (!dm1105dvb->fe) {
583 dm1105dvb->fe = dvb_attach(
584 stv0288_attach, &earda_config,
585 &dm1105dvb->i2c_adap);
586 if (dm1105dvb->fe) {
587 dm1105dvb->fe->ops.set_voltage =
588 dm1105dvb_set_voltage;
589 dvb_attach(stb6000_attach, dm1105dvb->fe, 0x61,
590 &dm1105dvb->i2c_adap);
591 }
592 }
e4aab64c 593
a611d0ca
IL		 594 if (!dm1105dvb->fe) {
595 dm1105dvb->fe = dvb_attach(
596 si21xx_attach, &serit_config,
597 &dm1105dvb->i2c_adap);
598 if (dm1105dvb->fe)
599 dm1105dvb->fe->ops.set_voltage =
600 dm1105dvb_set_voltage;
601 }
a611d0ca
IL		 602 break;
603 case PCI_DEVICE_ID_DW2004:
a611d0ca
IL		 604 dm1105dvb->fe = dvb_attach(
605 cx24116_attach, &serit_sp2633_config,
606 &dm1105dvb->i2c_adap);
607 if (dm1105dvb->fe)
608 dm1105dvb->fe->ops.set_voltage = dm1105dvb_set_voltage;
a611d0ca
IL		 609 break;
610 }
611
612 if (!dm1105dvb->fe) {
613 dev_err(&dm1105dvb->pdev->dev, "could not attach frontend\n");
614 return -ENODEV;
615 }
616
617 ret = dvb_register_frontend(&dm1105dvb->dvb_adapter, dm1105dvb->fe);
618 if (ret < 0) {
619 if (dm1105dvb->fe->ops.release)
620 dm1105dvb->fe->ops.release(dm1105dvb->fe);
621 dm1105dvb->fe = NULL;
622 return ret;
623 }
624
625 return 0;
626}
627
628static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac)
629{
630 static u8 command[1] = { 0x28 };
631
632 struct i2c_msg msg[] = {
633 { .addr = IIC_24C01_addr >> 1, .flags = 0,
634 .buf = command, .len = 1 },
635 { .addr = IIC_24C01_addr >> 1, .flags = I2C_M_RD,
636 .buf = mac, .len = 6 },
637 };
638
639 dm1105_i2c_xfer(&dm1105dvb->i2c_adap, msg , 2);
7c510e4b 640 dev_info(&dm1105dvb->pdev->dev, "MAC %pM\n", mac);
a611d0ca
IL		 641}
642
643static int __devinit dm1105_probe(struct pci_dev *pdev,
644 const struct pci_device_id *ent)
645{
646 struct dm1105dvb *dm1105dvb;
647 struct dvb_adapter *dvb_adapter;
648 struct dvb_demux *dvbdemux;
649 struct dmx_demux *dmx;
650 int ret = -ENOMEM;
651
652 dm1105dvb = kzalloc(sizeof(struct dm1105dvb), GFP_KERNEL);
653 if (!dm1105dvb)
d1498ffc 654 return -ENOMEM;
a611d0ca
IL		 655
656 dm1105dvb->pdev = pdev;
657 dm1105dvb->buffer_size = 5 * DM1105_DMA_BYTES;
658 dm1105dvb->PacketErrorCount = 0;
659 dm1105dvb->dmarst = 0;
660
661 ret = pci_enable_device(pdev);
662 if (ret < 0)
663 goto err_kfree;
664
284901a9 665 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
a611d0ca
IL		 666 if (ret < 0)
667 goto err_pci_disable_device;
668
669 pci_set_master(pdev);
670
671 ret = pci_request_regions(pdev, DRIVER_NAME);
672 if (ret < 0)
673 goto err_pci_disable_device;
674
675 dm1105dvb->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
676 if (!dm1105dvb->io_mem) {
677 ret = -EIO;
678 goto err_pci_release_regions;
679 }
680
681 spin_lock_init(&dm1105dvb->lock);
682 pci_set_drvdata(pdev, dm1105dvb);
683
a611d0ca
IL		 684 ret = dm1105dvb_hw_init(dm1105dvb);
685 if (ret < 0)
d1498ffc 686 goto err_pci_iounmap;
a611d0ca
IL		 687
688 /* i2c */
689 i2c_set_adapdata(&dm1105dvb->i2c_adap, dm1105dvb);
690 strcpy(dm1105dvb->i2c_adap.name, DRIVER_NAME);
691 dm1105dvb->i2c_adap.owner = THIS_MODULE;
692 dm1105dvb->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
693 dm1105dvb->i2c_adap.dev.parent = &pdev->dev;
694 dm1105dvb->i2c_adap.algo = &dm1105_algo;
695 dm1105dvb->i2c_adap.algo_data = dm1105dvb;
696 ret = i2c_add_adapter(&dm1105dvb->i2c_adap);
697
698 if (ret < 0)
699 goto err_dm1105dvb_hw_exit;
700
701 /* dvb */
702 ret = dvb_register_adapter(&dm1105dvb->dvb_adapter, DRIVER_NAME,
703 THIS_MODULE, &pdev->dev, adapter_nr);
704 if (ret < 0)
705 goto err_i2c_del_adapter;
706
707 dvb_adapter = &dm1105dvb->dvb_adapter;
708
709 dm1105dvb_read_mac(dm1105dvb, dvb_adapter->proposed_mac);
710
711 dvbdemux = &dm1105dvb->demux;
712 dvbdemux->filternum = 256;
713 dvbdemux->feednum = 256;
714 dvbdemux->start_feed = dm1105dvb_start_feed;
715 dvbdemux->stop_feed = dm1105dvb_stop_feed;
716 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
717 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
718 ret = dvb_dmx_init(dvbdemux);
719 if (ret < 0)
720 goto err_dvb_unregister_adapter;
721
722 dmx = &dvbdemux->dmx;
723 dm1105dvb->dmxdev.filternum = 256;
724 dm1105dvb->dmxdev.demux = dmx;
725 dm1105dvb->dmxdev.capabilities = 0;
726
727 ret = dvb_dmxdev_init(&dm1105dvb->dmxdev, dvb_adapter);
728 if (ret < 0)
729 goto err_dvb_dmx_release;
730
731 dm1105dvb->hw_frontend.source = DMX_FRONTEND_0;
732
733 ret = dmx->add_frontend(dmx, &dm1105dvb->hw_frontend);
734 if (ret < 0)
735 goto err_dvb_dmxdev_release;
736
737 dm1105dvb->mem_frontend.source = DMX_MEMORY_FE;
738
739 ret = dmx->add_frontend(dmx, &dm1105dvb->mem_frontend);
740 if (ret < 0)
741 goto err_remove_hw_frontend;
742
743 ret = dmx->connect_frontend(dmx, &dm1105dvb->hw_frontend);
744 if (ret < 0)
745 goto err_remove_mem_frontend;
746
747 ret = frontend_init(dm1105dvb);
748 if (ret < 0)
749 goto err_disconnect_frontend;
750
751 dvb_net_init(dvb_adapter, &dm1105dvb->dvbnet, dmx);
752 dm1105_ir_init(dm1105dvb);
d1498ffc
IL		 753
754 INIT_WORK(&dm1105dvb->work, dm1105_dmx_buffer);
755
756 ret = request_irq(pdev->irq, dm1105dvb_irq, IRQF_SHARED,
757 DRIVER_NAME, dm1105dvb);
758 if (ret < 0)
759 goto err_free_irq;
760
761 return 0;
a611d0ca
IL		 762
763err_disconnect_frontend:
764 dmx->disconnect_frontend(dmx);
765err_remove_mem_frontend:
766 dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
767err_remove_hw_frontend:
768 dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
769err_dvb_dmxdev_release:
770 dvb_dmxdev_release(&dm1105dvb->dmxdev);
771err_dvb_dmx_release:
772 dvb_dmx_release(dvbdemux);
773err_dvb_unregister_adapter:
774 dvb_unregister_adapter(dvb_adapter);
775err_i2c_del_adapter:
776 i2c_del_adapter(&dm1105dvb->i2c_adap);
777err_dm1105dvb_hw_exit:
778 dm1105dvb_hw_exit(dm1105dvb);
779err_free_irq:
780 free_irq(pdev->irq, dm1105dvb);
781err_pci_iounmap:
782 pci_iounmap(pdev, dm1105dvb->io_mem);
783err_pci_release_regions:
784 pci_release_regions(pdev);
785err_pci_disable_device:
786 pci_disable_device(pdev);
787err_kfree:
788 pci_set_drvdata(pdev, NULL);
789 kfree(dm1105dvb);
d1498ffc 790 return ret;
a611d0ca
IL		 791}
792
793static void __devexit dm1105_remove(struct pci_dev *pdev)
794{
795 struct dm1105dvb *dm1105dvb = pci_get_drvdata(pdev);
796 struct dvb_adapter *dvb_adapter = &dm1105dvb->dvb_adapter;
797 struct dvb_demux *dvbdemux = &dm1105dvb->demux;
798 struct dmx_demux *dmx = &dvbdemux->dmx;
799
800 dm1105_ir_exit(dm1105dvb);
801 dmx->close(dmx);
802 dvb_net_release(&dm1105dvb->dvbnet);
803 if (dm1105dvb->fe)
804 dvb_unregister_frontend(dm1105dvb->fe);
805
806 dmx->disconnect_frontend(dmx);
807 dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
808 dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
809 dvb_dmxdev_release(&dm1105dvb->dmxdev);
810 dvb_dmx_release(dvbdemux);
811 dvb_unregister_adapter(dvb_adapter);
812 if (&dm1105dvb->i2c_adap)
813 i2c_del_adapter(&dm1105dvb->i2c_adap);
814
815 dm1105dvb_hw_exit(dm1105dvb);
816 synchronize_irq(pdev->irq);
817 free_irq(pdev->irq, dm1105dvb);
818 pci_iounmap(pdev, dm1105dvb->io_mem);
819 pci_release_regions(pdev);
820 pci_disable_device(pdev);
821 pci_set_drvdata(pdev, NULL);
822 kfree(dm1105dvb);
823}
824
825static struct pci_device_id dm1105_id_table[] __devinitdata = {
826 {
827 .vendor = PCI_VENDOR_ID_TRIGEM,
828 .device = PCI_DEVICE_ID_DM1105,
829 .subvendor = PCI_ANY_ID,
830 .subdevice = PCI_DEVICE_ID_DW2002,
831 }, {
832 .vendor = PCI_VENDOR_ID_TRIGEM,
833 .device = PCI_DEVICE_ID_DM1105,
834 .subvendor = PCI_ANY_ID,
835 .subdevice = PCI_DEVICE_ID_DW2004,
836 }, {
837 /* empty */
838 },
839};
840
841MODULE_DEVICE_TABLE(pci, dm1105_id_table);
842
843static struct pci_driver dm1105_driver = {
844 .name = DRIVER_NAME,
845 .id_table = dm1105_id_table,
846 .probe = dm1105_probe,
847 .remove = __devexit_p(dm1105_remove),
848};
849
850static int __init dm1105_init(void)
851{
852 return pci_register_driver(&dm1105_driver);
853}
854
855static void __exit dm1105_exit(void)
856{
857 pci_unregister_driver(&dm1105_driver);
858}
859
860module_init(dm1105_init);
861module_exit(dm1105_exit);
862
863MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
864MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
865MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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