[deliverable/linux.git] / drivers / media / dvb / frontends / mb86a20s.c

/*
 *   Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
 *
 *   Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
 *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
 *
 *   FIXME: Need to port to DVB v5.2 API
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License as
 *   published by the Free Software Foundation version 2.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *   General Public License for more details.
 */

#include <linux/kernel.h>
#include <asm/div64.h>

#include "dvb_frontend.h"
#include "mb86a20s.h"

static int debug = 1;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");

#define rc(args...)  do {						\
	printk(KERN_ERR  "mb86a20s: " args);				\
} while (0)

#define dprintk(args...)						\
	do {								\
		if (debug) {						\
			printk(KERN_DEBUG "mb86a20s: %s: ", __func__);	\
			printk(args);					\
		}							\
	} while (0)

struct mb86a20s_state {
	struct i2c_adapter *i2c;
	const struct mb86a20s_config *config;

	struct dvb_frontend frontend;
};

struct regdata {
	u8 reg;
	u8 data;
};

/*
 * Initialization sequence: Use whatevere default values that PV SBTVD
 * does on its initialisation, obtained via USB snoop
 */
static struct regdata mb86a20s_init[] = {
	{ 0x70, 0x0f },
	{ 0x70, 0xff },
	{ 0x08, 0x01 },
	{ 0x09, 0x3e },
	{ 0x50, 0xd1 },
	{ 0x51, 0x22 },
	{ 0x39, 0x01 },
	{ 0x71, 0x00 },
	{ 0x28, 0x2a },
	{ 0x29, 0x00 },
	{ 0x2a, 0xff },
	{ 0x2b, 0x80 },
	{ 0x28, 0x20 },
	{ 0x29, 0x33 },
	{ 0x2a, 0xdf },
	{ 0x2b, 0xa9 },
	{ 0x3b, 0x21 },
	{ 0x3c, 0x3a },
	{ 0x01, 0x0d },
	{ 0x04, 0x08 },
	{ 0x05, 0x05 },
	{ 0x04, 0x0e },
	{ 0x05, 0x00 },
	{ 0x04, 0x0f },
	{ 0x05, 0x14 },
	{ 0x04, 0x0b },
	{ 0x05, 0x8c },
	{ 0x04, 0x00 },
	{ 0x05, 0x00 },
	{ 0x04, 0x01 },
	{ 0x05, 0x07 },
	{ 0x04, 0x02 },
	{ 0x05, 0x0f },
	{ 0x04, 0x03 },
	{ 0x05, 0xa0 },
	{ 0x04, 0x09 },
	{ 0x05, 0x00 },
	{ 0x04, 0x0a },
	{ 0x05, 0xff },
	{ 0x04, 0x27 },
	{ 0x05, 0x64 },
	{ 0x04, 0x28 },
	{ 0x05, 0x00 },
	{ 0x04, 0x1e },
	{ 0x05, 0xff },
	{ 0x04, 0x29 },
	{ 0x05, 0x0a },
	{ 0x04, 0x32 },
	{ 0x05, 0x0a },
	{ 0x04, 0x14 },
	{ 0x05, 0x02 },
	{ 0x04, 0x04 },
	{ 0x05, 0x00 },
	{ 0x04, 0x05 },
	{ 0x05, 0x22 },
	{ 0x04, 0x06 },
	{ 0x05, 0x0e },
	{ 0x04, 0x07 },
	{ 0x05, 0xd8 },
	{ 0x04, 0x12 },
	{ 0x05, 0x00 },
	{ 0x04, 0x13 },
	{ 0x05, 0xff },
	{ 0x52, 0x01 },
	{ 0x50, 0xa7 },
	{ 0x51, 0x00 },
	{ 0x50, 0xa8 },
	{ 0x51, 0xff },
	{ 0x50, 0xa9 },
	{ 0x51, 0xff },
	{ 0x50, 0xaa },
	{ 0x51, 0x00 },
	{ 0x50, 0xab },
	{ 0x51, 0xff },
	{ 0x50, 0xac },
	{ 0x51, 0xff },
	{ 0x50, 0xad },
	{ 0x51, 0x00 },
	{ 0x50, 0xae },
	{ 0x51, 0xff },
	{ 0x50, 0xaf },
	{ 0x51, 0xff },
	{ 0x5e, 0x07 },
	{ 0x50, 0xdc },
	{ 0x51, 0x01 },
	{ 0x50, 0xdd },
	{ 0x51, 0xf4 },
	{ 0x50, 0xde },
	{ 0x51, 0x01 },
	{ 0x50, 0xdf },
	{ 0x51, 0xf4 },
	{ 0x50, 0xe0 },
	{ 0x51, 0x01 },
	{ 0x50, 0xe1 },
	{ 0x51, 0xf4 },
	{ 0x50, 0xb0 },
	{ 0x51, 0x07 },
	{ 0x50, 0xb2 },
	{ 0x51, 0xff },
	{ 0x50, 0xb3 },
	{ 0x51, 0xff },
	{ 0x50, 0xb4 },
	{ 0x51, 0xff },
	{ 0x50, 0xb5 },
	{ 0x51, 0xff },
	{ 0x50, 0xb6 },
	{ 0x51, 0xff },
	{ 0x50, 0xb7 },
	{ 0x51, 0xff },
	{ 0x50, 0x50 },
	{ 0x51, 0x02 },
	{ 0x50, 0x51 },
	{ 0x51, 0x04 },
	{ 0x45, 0x04 },
	{ 0x48, 0x04 },
	{ 0x50, 0xd5 },
	{ 0x51, 0x01 },		/* Serial */
	{ 0x50, 0xd6 },
	{ 0x51, 0x1f },
	{ 0x50, 0xd2 },
	{ 0x51, 0x03 },
	{ 0x50, 0xd7 },
	{ 0x51, 0x3f },
	{ 0x1c, 0x01 },
	{ 0x28, 0x06 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x03 },
	{ 0x28, 0x07 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x0d },
	{ 0x28, 0x08 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x02 },
	{ 0x28, 0x09 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x01 },
	{ 0x28, 0x0a },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x21 },
	{ 0x28, 0x0b },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x29 },
	{ 0x28, 0x0c },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x16 },
	{ 0x28, 0x0d },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x31 },
	{ 0x28, 0x0e },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x0e },
	{ 0x28, 0x0f },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x4e },
	{ 0x28, 0x10 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x46 },
	{ 0x28, 0x11 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x0f },
	{ 0x28, 0x12 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x56 },
	{ 0x28, 0x13 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x35 },
	{ 0x28, 0x14 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x01 },
	{ 0x2b, 0xbe },
	{ 0x28, 0x15 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x01 },
	{ 0x2b, 0x84 },
	{ 0x28, 0x16 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x03 },
	{ 0x2b, 0xee },
	{ 0x28, 0x17 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x98 },
	{ 0x28, 0x18 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x9f },
	{ 0x28, 0x19 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x07 },
	{ 0x2b, 0xb2 },
	{ 0x28, 0x1a },
	{ 0x29, 0x00 },
	{ 0x2a, 0x06 },
	{ 0x2b, 0xc2 },
	{ 0x28, 0x1b },
	{ 0x29, 0x00 },
	{ 0x2a, 0x07 },
	{ 0x2b, 0x4a },
	{ 0x28, 0x1c },
	{ 0x29, 0x00 },
	{ 0x2a, 0x01 },
	{ 0x2b, 0xbc },
	{ 0x28, 0x1d },
	{ 0x29, 0x00 },
	{ 0x2a, 0x04 },
	{ 0x2b, 0xba },
	{ 0x28, 0x1e },
	{ 0x29, 0x00 },
	{ 0x2a, 0x06 },
	{ 0x2b, 0x14 },
	{ 0x50, 0x1e },
	{ 0x51, 0x5d },
	{ 0x50, 0x22 },
	{ 0x51, 0x00 },
	{ 0x50, 0x23 },
	{ 0x51, 0xc8 },
	{ 0x50, 0x24 },
	{ 0x51, 0x00 },
	{ 0x50, 0x25 },
	{ 0x51, 0xf0 },
	{ 0x50, 0x26 },
	{ 0x51, 0x00 },
	{ 0x50, 0x27 },
	{ 0x51, 0xc3 },
	{ 0x50, 0x39 },
	{ 0x51, 0x02 },
	{ 0x50, 0xd5 },
	{ 0x51, 0x01 },
	{ 0xd0, 0x00 },
};

static struct regdata mb86a20s_reset_reception[] = {
	{ 0x70, 0xf0 },
	{ 0x70, 0xff },
	{ 0x08, 0x01 },
	{ 0x08, 0x00 },
};

static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
			     u8 i2c_addr, int reg, int data)
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = {
		.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
	};
	int rc;

	rc = i2c_transfer(state->i2c, &msg, 1);
	if (rc != 1) {
		printk("%s: writereg rcor(rc == %i, reg == 0x%02x,"
			 " data == 0x%02x)\n", __func__, rc, reg, data);
		return rc;
	}

	return 0;
}

static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
				     u8 i2c_addr, struct regdata *rd, int size)
{
	int i, rc;

	for (i = 0; i < size; i++) {
		rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
					   rd[i].data);
		if (rc < 0)
			return rc;
	}
	return 0;
}

static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
				u8 i2c_addr, u8 reg)
{
	u8 val;
	int rc;
	struct i2c_msg msg[] = {
		{ .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
		{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
	};

	rc = i2c_transfer(state->i2c, msg, 2);

	if (rc != 2) {
		rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
		return rc;
	}

	return val;
}

#define mb86a20s_readreg(state, reg) \
	mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
#define mb86a20s_writereg(state, reg, val) \
	mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
#define mb86a20s_writeregdata(state, regdata) \
	mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
	regdata, ARRAY_SIZE(regdata))

static int mb86a20s_initfe(struct dvb_frontend *fe)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	int rc;
	u8  regD5 = 1;

	dprintk("\n");

	/* Initialize the frontend */
	rc = mb86a20s_writeregdata(state, mb86a20s_init);
	if (rc < 0)
		return rc;

	if (!state->config->is_serial) {
		regD5 &= ~1;

		rc = mb86a20s_writereg(state, 0x50, 0xd5);
		if (rc < 0)
			return rc;
		rc = mb86a20s_writereg(state, 0x51, regD5);
		if (rc < 0)
			return rc;
	}

	return 0;
}

static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	unsigned rf_max, rf_min, rf;
	u8	 val;

	dprintk("\n");

	/* Does a binary search to get RF strength */
	rf_max = 0xfff;
	rf_min = 0;
	do {
		rf = (rf_max + rf_min) / 2;
		mb86a20s_writereg(state, 0x04, 0x1f);
		mb86a20s_writereg(state, 0x05, rf >> 8);
		mb86a20s_writereg(state, 0x04, 0x20);
		mb86a20s_writereg(state, 0x04, rf);

		val = mb86a20s_readreg(state, 0x02);
		if (val & 0x08)
			rf_min = (rf_max + rf_min) / 2;
		else
			rf_max = (rf_max + rf_min) / 2;
		if (rf_max - rf_min < 4) {
			*strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
			break;
		}
	} while (1);

	dprintk("signal strength = %d\n", *strength);

	return 0;
}

static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	u8 val;

	dprintk("\n");
	*status = 0;

	val = mb86a20s_readreg(state, 0x0a) & 0xf;

	if (val >= 2)
		*status |= FE_HAS_SIGNAL;

	if (val >= 4)
		*status |= FE_HAS_CARRIER;

	if (val >= 5)
		*status |= FE_HAS_VITERBI;

	if (val >= 7)
		*status |= FE_HAS_SYNC;

	if (val >= 8)				/* Maybe 9? */
		*status |= FE_HAS_LOCK;

	dprintk("val = %d, status = 0x%02x\n", val, *status);

	return 0;
}

static int mb86a20s_set_frontend(struct dvb_frontend *fe,
	struct dvb_frontend_parameters *p)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	int rc;

	dprintk("\n");

	fe->ops.tuner_ops.set_params(fe, p);
	rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);

	return rc;
}

static int mb86a20s_get_frontend(struct dvb_frontend *fe,
	struct dvb_frontend_parameters *p)
{

	/* FIXME: For now, it does nothing */

	fe->dtv_property_cache.bandwidth_hz = 6000000;
	fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
	fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
	fe->dtv_property_cache.isdbt_partial_reception = 0;

	return 0;
}

static int mb86a20s_tune(struct dvb_frontend *fe,
			struct dvb_frontend_parameters *params,
			unsigned int mode_flags,
			unsigned int *delay,
			fe_status_t *status)
{
	int rc = 0;

	dprintk("\n");

	if (params != NULL)
		rc = mb86a20s_set_frontend(fe, params);

	if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
		mb86a20s_read_status(fe, status);

	return rc;
}

static void mb86a20s_release(struct dvb_frontend *fe)
{
	struct mb86a20s_state *state = fe->demodulator_priv;

	dprintk("\n");

	kfree(state);
}

static struct dvb_frontend_ops mb86a20s_ops;

struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
				    struct i2c_adapter *i2c)
{
	u8	rev;

	/* allocate memory for the internal state */
	struct mb86a20s_state *state =
		kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);

	dprintk("\n");
	if (state == NULL) {
		rc("Unable to kzalloc\n");
		goto error;
	}

	/* setup the state */
	state->config = config;
	state->i2c = i2c;

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &mb86a20s_ops,
		sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;

	/* Check if it is a mb86a20s frontend */
	rev = mb86a20s_readreg(state, 0);

	if (rev == 0x13) {
		printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
	} else {
		printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
		       rev);
		goto error;
	}

	return &state->frontend;

error:
	kfree(state);
	return NULL;
}
EXPORT_SYMBOL(mb86a20s_attach);

static struct dvb_frontend_ops mb86a20s_ops = {
	/* Use dib8000 values per default */
	.info = {
		.name = "Fujitsu mb86A20s",
		.type = FE_OFDM,
		.caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
			FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
			FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
			FE_CAN_QPSK     | FE_CAN_QAM_16  | FE_CAN_QAM_64 |
			FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
			FE_CAN_GUARD_INTERVAL_AUTO    | FE_CAN_HIERARCHY_AUTO,
		/* Actually, those values depend on the used tuner */
		.frequency_min = 45000000,
		.frequency_max = 864000000,
		.frequency_stepsize = 62500,
	},

	.release = mb86a20s_release,

	.init = mb86a20s_initfe,
	.set_frontend = mb86a20s_set_frontend,
	.get_frontend = mb86a20s_get_frontend,
	.read_status = mb86a20s_read_status,
	.read_signal_strength = mb86a20s_read_signal_strength,
	.tune = mb86a20s_tune,
};

MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
b9ede79a MCC	1	/*
	2	* Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
	3	*
	4	* Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
	5	* Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
	6	*
	7	* FIXME: Need to port to DVB v5.2 API
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation version 2.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*/
	18
	19	#include <linux/kernel.h>
	20	#include <asm/div64.h>
	21
	22	#include "dvb_frontend.h"
	23	#include "mb86a20s.h"
	24
	25	static int debug = 1;
	26	module_param(debug, int, 0644);
	27	MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
	28
	29	#define rc(args...) do { \
	30	printk(KERN_ERR "mb86a20s: " args); \
	31	} while (0)
	32
	33	#define dprintk(args...) \
	34	do { \
	35	if (debug) { \
	36	printk(KERN_DEBUG "mb86a20s: %s: ", __func__); \
	37	printk(args); \
	38	} \
	39	} while (0)
	40
	41	struct mb86a20s_state {
	42	struct i2c_adapter *i2c;
	43	const struct mb86a20s_config *config;
	44
	45	struct dvb_frontend frontend;
b9ede79a MCC	46	};
	47
	48	struct regdata {
	49	u8 reg;
	50	u8 data;
	51	};
	52
	53	/*
	54	* Initialization sequence: Use whatevere default values that PV SBTVD
	55	* does on its initialisation, obtained via USB snoop
	56	*/
	57	static struct regdata mb86a20s_init[] = {
	58	{ 0x70, 0x0f },
	59	{ 0x70, 0xff },
	60	{ 0x08, 0x01 },
	61	{ 0x09, 0x3e },
	62	{ 0x50, 0xd1 },
	63	{ 0x51, 0x22 },
	64	{ 0x39, 0x01 },
	65	{ 0x71, 0x00 },
	66	{ 0x28, 0x2a },
	67	{ 0x29, 0x00 },
	68	{ 0x2a, 0xff },
	69	{ 0x2b, 0x80 },
	70	{ 0x28, 0x20 },
	71	{ 0x29, 0x33 },
	72	{ 0x2a, 0xdf },
	73	{ 0x2b, 0xa9 },
	74	{ 0x3b, 0x21 },
	75	{ 0x3c, 0x3a },
	76	{ 0x01, 0x0d },
	77	{ 0x04, 0x08 },
	78	{ 0x05, 0x05 },
	79	{ 0x04, 0x0e },
	80	{ 0x05, 0x00 },
	81	{ 0x04, 0x0f },
	82	{ 0x05, 0x14 },
	83	{ 0x04, 0x0b },
	84	{ 0x05, 0x8c },
	85	{ 0x04, 0x00 },
	86	{ 0x05, 0x00 },
	87	{ 0x04, 0x01 },
	88	{ 0x05, 0x07 },
	89	{ 0x04, 0x02 },
	90	{ 0x05, 0x0f },
	91	{ 0x04, 0x03 },
	92	{ 0x05, 0xa0 },
	93	{ 0x04, 0x09 },
	94	{ 0x05, 0x00 },
	95	{ 0x04, 0x0a },
	96	{ 0x05, 0xff },
	97	{ 0x04, 0x27 },
	98	{ 0x05, 0x64 },
	99	{ 0x04, 0x28 },
	100	{ 0x05, 0x00 },
	101	{ 0x04, 0x1e },
	102	{ 0x05, 0xff },
	103	{ 0x04, 0x29 },
	104	{ 0x05, 0x0a },
	105	{ 0x04, 0x32 },
	106	{ 0x05, 0x0a },
	107	{ 0x04, 0x14 },
	108	{ 0x05, 0x02 },
	109	{ 0x04, 0x04 },
110	{ 0x05, 0x00 },
111	{ 0x04, 0x05 },
112	{ 0x05, 0x22 },
113	{ 0x04, 0x06 },
114	{ 0x05, 0x0e },
115	{ 0x04, 0x07 },
116	{ 0x05, 0xd8 },
117	{ 0x04, 0x12 },
118	{ 0x05, 0x00 },
119	{ 0x04, 0x13 },
120	{ 0x05, 0xff },
121	{ 0x52, 0x01 },
122	{ 0x50, 0xa7 },
123	{ 0x51, 0x00 },
124	{ 0x50, 0xa8 },
125	{ 0x51, 0xff },
126	{ 0x50, 0xa9 },
127	{ 0x51, 0xff },
128	{ 0x50, 0xaa },
129	{ 0x51, 0x00 },
130	{ 0x50, 0xab },
131	{ 0x51, 0xff },
132	{ 0x50, 0xac },
133	{ 0x51, 0xff },
134	{ 0x50, 0xad },
135	{ 0x51, 0x00 },
136	{ 0x50, 0xae },
137	{ 0x51, 0xff },
138	{ 0x50, 0xaf },
139	{ 0x51, 0xff },
140	{ 0x5e, 0x07 },
141	{ 0x50, 0xdc },
142	{ 0x51, 0x01 },
143	{ 0x50, 0xdd },
144	{ 0x51, 0xf4 },
145	{ 0x50, 0xde },
146	{ 0x51, 0x01 },
147	{ 0x50, 0xdf },
148	{ 0x51, 0xf4 },
149	{ 0x50, 0xe0 },
150	{ 0x51, 0x01 },
151	{ 0x50, 0xe1 },
152	{ 0x51, 0xf4 },
153	{ 0x50, 0xb0 },
154	{ 0x51, 0x07 },
155	{ 0x50, 0xb2 },
156	{ 0x51, 0xff },
157	{ 0x50, 0xb3 },
158	{ 0x51, 0xff },
159	{ 0x50, 0xb4 },
160	{ 0x51, 0xff },
161	{ 0x50, 0xb5 },
162	{ 0x51, 0xff },
163	{ 0x50, 0xb6 },
164	{ 0x51, 0xff },
165	{ 0x50, 0xb7 },
166	{ 0x51, 0xff },
167	{ 0x50, 0x50 },
168	{ 0x51, 0x02 },
169	{ 0x50, 0x51 },
170	{ 0x51, 0x04 },
171	{ 0x45, 0x04 },
172	{ 0x48, 0x04 },
173	{ 0x50, 0xd5 },
7572f9c5	174	{ 0x51, 0x01 }, /* Serial */
b9ede79a MCC	175	{ 0x50, 0xd6 },
	176	{ 0x51, 0x1f },
	177	{ 0x50, 0xd2 },
	178	{ 0x51, 0x03 },
	179	{ 0x50, 0xd7 },
	180	{ 0x51, 0x3f },
	181	{ 0x1c, 0x01 },
	182	{ 0x28, 0x06 },
	183	{ 0x29, 0x00 },
	184	{ 0x2a, 0x00 },
	185	{ 0x2b, 0x03 },
	186	{ 0x28, 0x07 },
	187	{ 0x29, 0x00 },
	188	{ 0x2a, 0x00 },
	189	{ 0x2b, 0x0d },
	190	{ 0x28, 0x08 },
	191	{ 0x29, 0x00 },
	192	{ 0x2a, 0x00 },
	193	{ 0x2b, 0x02 },
	194	{ 0x28, 0x09 },
	195	{ 0x29, 0x00 },
	196	{ 0x2a, 0x00 },
	197	{ 0x2b, 0x01 },
	198	{ 0x28, 0x0a },
	199	{ 0x29, 0x00 },
	200	{ 0x2a, 0x00 },
	201	{ 0x2b, 0x21 },
	202	{ 0x28, 0x0b },
	203	{ 0x29, 0x00 },
	204	{ 0x2a, 0x00 },
	205	{ 0x2b, 0x29 },
	206	{ 0x28, 0x0c },
	207	{ 0x29, 0x00 },
	208	{ 0x2a, 0x00 },
	209	{ 0x2b, 0x16 },
	210	{ 0x28, 0x0d },
	211	{ 0x29, 0x00 },
	212	{ 0x2a, 0x00 },
	213	{ 0x2b, 0x31 },
	214	{ 0x28, 0x0e },
	215	{ 0x29, 0x00 },
	216	{ 0x2a, 0x00 },
	217	{ 0x2b, 0x0e },
	218	{ 0x28, 0x0f },
	219	{ 0x29, 0x00 },
	220	{ 0x2a, 0x00 },
	221	{ 0x2b, 0x4e },
	222	{ 0x28, 0x10 },
	223	{ 0x29, 0x00 },
	224	{ 0x2a, 0x00 },
	225	{ 0x2b, 0x46 },
	226	{ 0x28, 0x11 },
	227	{ 0x29, 0x00 },
	228	{ 0x2a, 0x00 },
	229	{ 0x2b, 0x0f },
	230	{ 0x28, 0x12 },
	231	{ 0x29, 0x00 },
	232	{ 0x2a, 0x00 },
	233	{ 0x2b, 0x56 },
	234	{ 0x28, 0x13 },
	235	{ 0x29, 0x00 },
	236	{ 0x2a, 0x00 },
	237	{ 0x2b, 0x35 },
	238	{ 0x28, 0x14 },
239	{ 0x29, 0x00 },
240	{ 0x2a, 0x01 },
241	{ 0x2b, 0xbe },
242	{ 0x28, 0x15 },
243	{ 0x29, 0x00 },
244	{ 0x2a, 0x01 },
245	{ 0x2b, 0x84 },
246	{ 0x28, 0x16 },
247	{ 0x29, 0x00 },
248	{ 0x2a, 0x03 },
249	{ 0x2b, 0xee },
250	{ 0x28, 0x17 },
251	{ 0x29, 0x00 },
252	{ 0x2a, 0x00 },
253	{ 0x2b, 0x98 },
254	{ 0x28, 0x18 },
255	{ 0x29, 0x00 },
256	{ 0x2a, 0x00 },
257	{ 0x2b, 0x9f },
258	{ 0x28, 0x19 },
259	{ 0x29, 0x00 },
260	{ 0x2a, 0x07 },
261	{ 0x2b, 0xb2 },
262	{ 0x28, 0x1a },
263	{ 0x29, 0x00 },
264	{ 0x2a, 0x06 },
265	{ 0x2b, 0xc2 },
266	{ 0x28, 0x1b },
267	{ 0x29, 0x00 },
268	{ 0x2a, 0x07 },
269	{ 0x2b, 0x4a },
270	{ 0x28, 0x1c },
271	{ 0x29, 0x00 },
272	{ 0x2a, 0x01 },
273	{ 0x2b, 0xbc },
274	{ 0x28, 0x1d },
275	{ 0x29, 0x00 },
276	{ 0x2a, 0x04 },
277	{ 0x2b, 0xba },
278	{ 0x28, 0x1e },
279	{ 0x29, 0x00 },
280	{ 0x2a, 0x06 },
281	{ 0x2b, 0x14 },
282	{ 0x50, 0x1e },
283	{ 0x51, 0x5d },
284	{ 0x50, 0x22 },
285	{ 0x51, 0x00 },
286	{ 0x50, 0x23 },
287	{ 0x51, 0xc8 },
288	{ 0x50, 0x24 },
289	{ 0x51, 0x00 },
290	{ 0x50, 0x25 },
291	{ 0x51, 0xf0 },
292	{ 0x50, 0x26 },
293	{ 0x51, 0x00 },
294	{ 0x50, 0x27 },
295	{ 0x51, 0xc3 },
296	{ 0x50, 0x39 },
297	{ 0x51, 0x02 },
298	{ 0x50, 0xd5 },
299	{ 0x51, 0x01 },
300	{ 0xd0, 0x00 },
301	};
302
303	static struct regdata mb86a20s_reset_reception[] = {
304	{ 0x70, 0xf0 },
305	{ 0x70, 0xff },
306	{ 0x08, 0x01 },
307	{ 0x08, 0x00 },
308	};
309
310	static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
311	u8 i2c_addr, int reg, int data)
312	{
313	u8 buf[] = { reg, data };
314	struct i2c_msg msg = {
315	.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
316	};
317	int rc;
318
319	rc = i2c_transfer(state->i2c, &msg, 1);
320	if (rc != 1) {
321	printk("%s: writereg rcor(rc == %i, reg == 0x%02x,"
322	" data == 0x%02x)\n", __func__, rc, reg, data);
323	return rc;
324	}
325
326	return 0;
327	}
328
329	static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
330	u8 i2c_addr, struct regdata *rd, int size)
331	{
332	int i, rc;
333
334	for (i = 0; i < size; i++) {
335	rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
336	rd[i].data);
337	if (rc < 0)
338	return rc;
339	}
340	return 0;
341	}
342
343	static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
344	u8 i2c_addr, u8 reg)
345	{
346	u8 val;
347	int rc;
348	struct i2c_msg msg[] = {
349	{ .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
350	{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
351	};
352
353	rc = i2c_transfer(state->i2c, msg, 2);
354
355	if (rc != 2) {
356	rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
357	return rc;
358	}
359
360	return val;
361	}
362
363	#define mb86a20s_readreg(state, reg) \
364	mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
365	#define mb86a20s_writereg(state, reg, val) \
366	mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
367	#define mb86a20s_writeregdata(state, regdata) \
368	mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
369	regdata, ARRAY_SIZE(regdata))
370
371	static int mb86a20s_initfe(struct dvb_frontend *fe)
372	{
373	struct mb86a20s_state *state = fe->demodulator_priv;
374	int rc;
7572f9c5	375	u8 regD5 = 1;
b9ede79a MCC	376
	377	dprintk("\n");
	378
	379	/* Initialize the frontend */
	380	rc = mb86a20s_writeregdata(state, mb86a20s_init);
	381	if (rc < 0)
	382	return rc;
	383
7572f9c5 MCC	384	if (!state->config->is_serial) {
	385	regD5 &= ~1;
	386
	387	rc = mb86a20s_writereg(state, 0x50, 0xd5);
	388	if (rc < 0)
	389	return rc;
	390	rc = mb86a20s_writereg(state, 0x51, regD5);
	391	if (rc < 0)
	392	return rc;
	393	}
	394
b9ede79a MCC	395	return 0;
	396	}
	397
	398	static int mb86a20s_read_signal_strength(struct dvb_frontend fe, u16 strength)
	399	{
	400	struct mb86a20s_state *state = fe->demodulator_priv;
	401	unsigned rf_max, rf_min, rf;
	402	u8 val;
	403
	404	dprintk("\n");
	405
	406	/* Does a binary search to get RF strength */
	407	rf_max = 0xfff;
	408	rf_min = 0;
	409	do {
	410	rf = (rf_max + rf_min) / 2;
	411	mb86a20s_writereg(state, 0x04, 0x1f);
	412	mb86a20s_writereg(state, 0x05, rf >> 8);
	413	mb86a20s_writereg(state, 0x04, 0x20);
	414	mb86a20s_writereg(state, 0x04, rf);
	415
	416	val = mb86a20s_readreg(state, 0x02);
	417	if (val & 0x08)
	418	rf_min = (rf_max + rf_min) / 2;
	419	else
	420	rf_max = (rf_max + rf_min) / 2;
	421	if (rf_max - rf_min < 4) {
	422	strength = (((rf_max + rf_min) / 2) 65535) / 4095;
	423	break;
	424	}
	425	} while (1);
	426
	427	dprintk("signal strength = %d\n", *strength);
	428
	429	return 0;
	430	}
	431
	432	static int mb86a20s_read_status(struct dvb_frontend fe, fe_status_t status)
	433	{
	434	struct mb86a20s_state *state = fe->demodulator_priv;
	435	u8 val;
	436
	437	dprintk("\n");
	438	*status = 0;
	439
	440	val = mb86a20s_readreg(state, 0x0a) & 0xf;
	441
	442	if (val >= 2)
	443	*status \|= FE_HAS_SIGNAL;
	444
	445	if (val >= 4)
	446	*status \|= FE_HAS_CARRIER;
	447
	448	if (val >= 5)
	449	*status \|= FE_HAS_VITERBI;
	450
	451	if (val >= 7)
	452	*status \|= FE_HAS_SYNC;
	453
	454	if (val >= 8) /* Maybe 9? */
	455	*status \|= FE_HAS_LOCK;
	456
	457	dprintk("val = %d, status = 0x%02x\n", val, *status);
	458
459	return 0;
460	}
461
462	static int mb86a20s_set_frontend(struct dvb_frontend *fe,
463	struct dvb_frontend_parameters *p)
464	{
465	struct mb86a20s_state *state = fe->demodulator_priv;
466	int rc;
467
468	dprintk("\n");
469
470	fe->ops.tuner_ops.set_params(fe, p);
471	rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
472
473	return rc;
474	}
475
476	static int mb86a20s_get_frontend(struct dvb_frontend *fe,
477	struct dvb_frontend_parameters *p)
478	{
479
480	/* FIXME: For now, it does nothing */
481
482	fe->dtv_property_cache.bandwidth_hz = 6000000;
483	fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
484	fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
485	fe->dtv_property_cache.isdbt_partial_reception = 0;
486
487	return 0;
488	}
489
490	static int mb86a20s_tune(struct dvb_frontend *fe,
491	struct dvb_frontend_parameters *params,
492	unsigned int mode_flags,
493	unsigned int *delay,
494	fe_status_t *status)
495	{
496	int rc = 0;
497
498	dprintk("\n");
499
500	if (params != NULL)
501	rc = mb86a20s_set_frontend(fe, params);
502
503	if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
504	mb86a20s_read_status(fe, status);
505
506	return rc;
507	}
508
509	static void mb86a20s_release(struct dvb_frontend *fe)
510	{
511	struct mb86a20s_state *state = fe->demodulator_priv;
512
513	dprintk("\n");
514
515	kfree(state);
516	}
517
518	static struct dvb_frontend_ops mb86a20s_ops;
519
520	struct dvb_frontend mb86a20s_attach(const struct mb86a20s_config config,
521	struct i2c_adapter *i2c)
522	{
523	u8 rev;
524
525	/* allocate memory for the internal state */
526	struct mb86a20s_state *state =
527	kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
528
529	dprintk("\n");
530	if (state == NULL) {
531	rc("Unable to kzalloc\n");
532	goto error;
533	}
534
535	/* setup the state */
536	state->config = config;
537	state->i2c = i2c;
538
539	/* create dvb_frontend */
540	memcpy(&state->frontend.ops, &mb86a20s_ops,
541	sizeof(struct dvb_frontend_ops));
542	state->frontend.demodulator_priv = state;
543
544	/* Check if it is a mb86a20s frontend */
545	rev = mb86a20s_readreg(state, 0);
546
547	if (rev == 0x13) {
548	printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
549	} else {
550	printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
551	rev);
552	goto error;
553	}
554
555	return &state->frontend;
556
557	error:
558	kfree(state);
559	return NULL;
560	}
561	EXPORT_SYMBOL(mb86a20s_attach);
562
563	static struct dvb_frontend_ops mb86a20s_ops = {
564	/* Use dib8000 values per default */
565	.info = {
566	.name = "Fujitsu mb86A20s",
567	.type = FE_OFDM,
568	.caps = FE_CAN_INVERSION_AUTO \| FE_CAN_RECOVER \|
569	FE_CAN_FEC_1_2 \| FE_CAN_FEC_2_3 \| FE_CAN_FEC_3_4 \|
570	FE_CAN_FEC_5_6 \| FE_CAN_FEC_7_8 \| FE_CAN_FEC_AUTO \|
571	FE_CAN_QPSK \| FE_CAN_QAM_16 \| FE_CAN_QAM_64 \|
572	FE_CAN_TRANSMISSION_MODE_AUTO \| FE_CAN_QAM_AUTO \|
573	FE_CAN_GUARD_INTERVAL_AUTO \| FE_CAN_HIERARCHY_AUTO,
574	/* Actually, those values depend on the used tuner */
575	.frequency_min = 45000000,
576	.frequency_max = 864000000,
577	.frequency_stepsize = 62500,
578	},
579
580	.release = mb86a20s_release,
581
582	.init = mb86a20s_initfe,
583	.set_frontend = mb86a20s_set_frontend,
584	.get_frontend = mb86a20s_get_frontend,
585	.read_status = mb86a20s_read_status,
586	.read_signal_strength = mb86a20s_read_signal_strength,
587	.tune = mb86a20s_tune,
588	};
589
590	MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
591	MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
592	MODULE_LICENSE("GPL");