[deliverable/linux.git] / drivers / media / dvb / frontends / or51132.c

/*
 *    Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
 *
 *    Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
 *
 *    Based on code from Jack Kelliher (kelliher@xmission.com)
 *                           Copyright (C) 2002 & pcHDTV, inc.
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2 of the License, or
 *    (at your option) any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
*/

/*
 * This driver needs two external firmware files. Please copy
 * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
 * /usr/lib/hotplug/firmware/ or /lib/firmware/
 * (depending on configuration of firmware hotplug).
 */
#define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
#define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <asm/byteorder.h>

#include "dvb_frontend.h"
#include "dvb-pll.h"
#include "or51132.h"

static int debug;
#define dprintk(args...) \
	do { \
		if (debug) printk(KERN_DEBUG "or51132: " args); \
	} while (0)


struct or51132_state
{
	struct i2c_adapter* i2c;
	struct dvb_frontend_ops ops;

	/* Configuration settings */
	const struct or51132_config* config;

	struct dvb_frontend frontend;

	/* Demodulator private data */
	fe_modulation_t current_modulation;

	/* Tuner private data */
	u32 current_frequency;
};

static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
{
	int err;
	struct i2c_msg msg;
	msg.addr  = reg;
	msg.flags = 0;
	msg.len   = len;
	msg.buf   = buf;

	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
		printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
		return -EREMOTEIO;
	}

	return 0;
}

static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
{
	int err;
	struct i2c_msg msg;
	msg.addr   = reg;
	msg.flags = I2C_M_RD;
	msg.len = len;
	msg.buf = buf;

	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
		printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
		return -EREMOTEIO;
	}

	return 0;
}

static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
{
	struct or51132_state* state = fe->demodulator_priv;
	static u8 run_buf[] = {0x7F,0x01};
	static u8 get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
	u8 rec_buf[14];
	u8 cmd_buf[14];
	u32 firmwareAsize, firmwareBsize;
	int i,ret;

	dprintk("Firmware is %Zd bytes\n",fw->size);

	/* Get size of firmware A and B */
	firmwareAsize = le32_to_cpu(*((u32*)fw->data));
	dprintk("FirmwareA is %i bytes\n",firmwareAsize);
	firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
	dprintk("FirmwareB is %i bytes\n",firmwareBsize);

	/* Upload firmware */
	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 &fw->data[8],firmwareAsize))) {
		printk(KERN_WARNING "or51132: load_firmware error 1\n");
		return ret;
	}
	msleep(1); /* 1ms */
	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 &fw->data[8+firmwareAsize],firmwareBsize))) {
		printk(KERN_WARNING "or51132: load_firmware error 2\n");
		return ret;
	}
	msleep(1); /* 1ms */

	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 run_buf,2))) {
		printk(KERN_WARNING "or51132: load_firmware error 3\n");
		return ret;
	}

	/* Wait at least 5 msec */
	msleep(20); /* 10ms */

	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 run_buf,2))) {
		printk(KERN_WARNING "or51132: load_firmware error 4\n");
		return ret;
	}

	/* 50ms for operation to begin */
	msleep(50);

	/* Read back ucode version to besure we loaded correctly and are really up and running */
	/* Get uCode version */
	cmd_buf[0] = 0x10;
	cmd_buf[1] = 0x10;
	cmd_buf[2] = 0x00;
	cmd_buf[3] = 0x00;
	msleep(20); /* 20ms */
	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 cmd_buf,3))) {
		printk(KERN_WARNING "or51132: load_firmware error a\n");
		return ret;
	}

	cmd_buf[0] = 0x04;
	cmd_buf[1] = 0x17;
	cmd_buf[2] = 0x00;
	cmd_buf[3] = 0x00;
	msleep(20); /* 20ms */
	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 cmd_buf,2))) {
		printk(KERN_WARNING "or51132: load_firmware error b\n");
		return ret;
	}

	cmd_buf[0] = 0x00;
	cmd_buf[1] = 0x00;
	cmd_buf[2] = 0x00;
	cmd_buf[3] = 0x00;
	msleep(20); /* 20ms */
	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 cmd_buf,2))) {
		printk(KERN_WARNING "or51132: load_firmware error c\n");
		return ret;
	}

	for(i=0;i<4;i++) {
		msleep(20); /* 20ms */
		get_ver_buf[4] = i+1;
		if ((ret = i2c_readbytes(state,state->config->demod_address,
					&rec_buf[i*2],2))) {
			printk(KERN_WARNING
			       "or51132: load_firmware error d - %d\n",i);
			return ret;
		}
	}

	printk(KERN_WARNING
	       "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
	       rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
	       rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
	       rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
	       rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);

	cmd_buf[0] = 0x10;
	cmd_buf[1] = 0x00;
	cmd_buf[2] = 0x00;
	cmd_buf[3] = 0x00;
	msleep(20); /* 20ms */
	if ((ret = i2c_writebytes(state,state->config->demod_address,
				 cmd_buf,3))) {
		printk(KERN_WARNING "or51132: load_firmware error e\n");
		return ret;
	}
	return 0;
};

static int or51132_init(struct dvb_frontend* fe)
{
	return 0;
}

static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
{
	*ber = 0;
	return 0;
}

static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
{
	*ucblocks = 0;
	return 0;
}

static int or51132_sleep(struct dvb_frontend* fe)
{
	return 0;
}

static int or51132_setmode(struct dvb_frontend* fe)
{
	struct or51132_state* state = fe->demodulator_priv;
	unsigned char cmd_buf[4];

	dprintk("setmode %d\n",(int)state->current_modulation);
	/* set operation mode in Receiver 1 register; */
	cmd_buf[0] = 0x04;
	cmd_buf[1] = 0x01;
	switch (state->current_modulation) {
	case QAM_256:
	case QAM_64:
	case QAM_AUTO:
		/* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
		cmd_buf[2] = 0x5F;
		break;
	case VSB_8:
		/* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
		cmd_buf[2] = 0x50;
		break;
	default:
		printk("setmode:Modulation set to unsupported value\n");
	};
	cmd_buf[3] = 0x00;
	if (i2c_writebytes(state,state->config->demod_address,
			   cmd_buf,3)) {
		printk(KERN_WARNING "or51132: set_mode error 1\n");
		return -1;
	}
	dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);

	/* Set operation mode in Receiver 6 register */
	cmd_buf[0] = 0x1C;
	switch (state->current_modulation) {
	case QAM_AUTO:
		/* REC MODE Normal Carrier Lock */
		cmd_buf[1] = 0x00;
		/* Channel MODE Auto QAM64/256 */
		cmd_buf[2] = 0x4f;
		break;
	case QAM_256:
		/* REC MODE Normal Carrier Lock */
		cmd_buf[1] = 0x00;
		/* Channel MODE QAM256 */
		cmd_buf[2] = 0x45;
		break;
	case QAM_64:
		/* REC MODE Normal Carrier Lock */
		cmd_buf[1] = 0x00;
		/* Channel MODE QAM64 */
		cmd_buf[2] = 0x43;
		break;
	case VSB_8:
		 /* REC MODE inv IF spectrum, Normal */
		cmd_buf[1] = 0x03;
		/* Channel MODE ATSC/VSB8 */
		cmd_buf[2] = 0x06;
		break;
	default:
		printk("setmode: Modulation set to unsupported value\n");
	};
	cmd_buf[3] = 0x00;
	msleep(20); /* 20ms */
	if (i2c_writebytes(state,state->config->demod_address,
			   cmd_buf,3)) {
		printk(KERN_WARNING "or51132: set_mode error 2\n");
		return -1;
	}
	dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);

	return 0;
}

static int or51132_set_parameters(struct dvb_frontend* fe,
				  struct dvb_frontend_parameters *param)
{
	int ret;
	u8 buf[4];
	struct or51132_state* state = fe->demodulator_priv;
	const struct firmware *fw;

	/* Change only if we are actually changing the modulation */
	if (state->current_modulation != param->u.vsb.modulation) {
		switch(param->u.vsb.modulation) {
		case VSB_8:
			dprintk("set_parameters VSB MODE\n");
			printk("or51132: Waiting for firmware upload(%s)...\n",
			       OR51132_VSB_FIRMWARE);
			ret = request_firmware(&fw, OR51132_VSB_FIRMWARE,
					       &state->i2c->dev);
			if (ret){
				printk(KERN_WARNING "or51132: No firmware up"
				       "loaded(timeout or file not found?)\n");
				return ret;
			}
			/* Set non-punctured clock for VSB */
			state->config->set_ts_params(fe, 0);
			break;
		case QAM_AUTO:
		case QAM_64:
		case QAM_256:
			dprintk("set_parameters QAM MODE\n");
			printk("or51132: Waiting for firmware upload(%s)...\n",
			       OR51132_QAM_FIRMWARE);
			ret = request_firmware(&fw, OR51132_QAM_FIRMWARE,
					       &state->i2c->dev);
			if (ret){
				printk(KERN_WARNING "or51132: No firmware up"
				       "loaded(timeout or file not found?)\n");
				return ret;
			}
			/* Set punctured clock for QAM */
			state->config->set_ts_params(fe, 1);
			break;
		default:
			printk("or51132:Modulation type(%d) UNSUPPORTED\n",
			       param->u.vsb.modulation);
			return -1;
		};
		ret = or51132_load_firmware(fe, fw);
		release_firmware(fw);
		if (ret) {
			printk(KERN_WARNING "or51132: Writing firmware to "
			       "device failed!\n");
			return ret;
		}
		printk("or51132: Firmware upload complete.\n");

		state->current_modulation = param->u.vsb.modulation;
		or51132_setmode(fe);
	}

	dvb_pll_configure(state->config->pll_desc, buf,
			  param->frequency, 0);
	dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
		"0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
	if (i2c_writebytes(state, state->config->pll_address ,buf, 4))
		printk(KERN_WARNING "or51132: set_parameters error "
		       "writing to tuner\n");

	/* Set to current mode */
	or51132_setmode(fe);

	/* Update current frequency */
	state->current_frequency = param->frequency;
	return 0;
}

static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
{
	struct or51132_state* state = fe->demodulator_priv;
	unsigned char rec_buf[2];
	unsigned char snd_buf[2];
	*status = 0;

	/* Receiver Status */
	snd_buf[0]=0x04;
	snd_buf[1]=0x00;
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_status write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_status read error\n");
		return -1;
	}
	dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);

	if (rec_buf[1] & 0x01) { /* Receiver Lock */
		*status |= FE_HAS_SIGNAL;
		*status |= FE_HAS_CARRIER;
		*status |= FE_HAS_VITERBI;
		*status |= FE_HAS_SYNC;
		*status |= FE_HAS_LOCK;
	}
	return 0;
}

/* log10-1 table at .5 increments from 1 to 100.5 */
static unsigned int i100x20log10[] = {
     0,  352,  602,  795,  954, 1088, 1204, 1306, 1397, 1480,
  1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
  2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
  2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
  2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
  2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
  2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
  3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
  3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
  3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
  3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
  3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
  3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
  3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
  3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
  3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
  3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
  3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
  3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
  3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
};

static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};

static unsigned int i20Log10(unsigned short val)
{
	unsigned int rntval = 100;
	unsigned int tmp = val;
	unsigned int exp = 1;

	while(tmp > 100) {tmp /= 100; exp++;}

	val = (2 * val)/denom[exp];
	if (exp > 1) rntval = 2000*exp;

	rntval += i100x20log10[val];
	return rntval;
}

static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
	struct or51132_state* state = fe->demodulator_priv;
	unsigned char rec_buf[2];
	unsigned char snd_buf[2];
	u8 rcvr_stat;
	u16 snr_equ;
	int usK;

	snd_buf[0]=0x04;
	snd_buf[1]=0x02; /* SNR after Equalizer */
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_status write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_status read error\n");
		return -1;
	}
	snr_equ = rec_buf[0] | (rec_buf[1] << 8);
	dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);

	/* Receiver Status */
	snd_buf[0]=0x04;
	snd_buf[1]=0x00;
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
		return -1;
	}
	dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
	rcvr_stat = rec_buf[1];
	usK = (rcvr_stat & 0x10) ? 3 : 0;

        /* The value reported back from the frontend will be FFFF=100% 0000=0% */
	*strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
	dprintk("read_signal_strength %i\n",*strength);

	return 0;
}

static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
{
	struct or51132_state* state = fe->demodulator_priv;
	unsigned char rec_buf[2];
	unsigned char snd_buf[2];
	u16 snr_equ;

	snd_buf[0]=0x04;
	snd_buf[1]=0x02; /* SNR after Equalizer */
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_snr write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_snr dvr read error\n");
		return -1;
	}
	snr_equ = rec_buf[0] | (rec_buf[1] << 8);
	dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);

	*snr = 0xFFFF - snr_equ;
	dprintk("read_snr %i\n",*snr);

	return 0;
}

static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
{
	fe_tune_settings->min_delay_ms = 500;
	fe_tune_settings->step_size = 0;
	fe_tune_settings->max_drift = 0;

	return 0;
}

static void or51132_release(struct dvb_frontend* fe)
{
	struct or51132_state* state = fe->demodulator_priv;
	kfree(state);
}

static struct dvb_frontend_ops or51132_ops;

struct dvb_frontend* or51132_attach(const struct or51132_config* config,
				    struct i2c_adapter* i2c)
{
	struct or51132_state* state = NULL;

	/* Allocate memory for the internal state */
	state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
	if (state == NULL)
		goto error;

	/* Setup the state */
	state->config = config;
	state->i2c = i2c;
	memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
	state->current_frequency = -1;
	state->current_modulation = -1;

	/* Create dvb_frontend */
	state->frontend.ops = &state->ops;
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	if (state)
		kfree(state);
	return NULL;
}

static struct dvb_frontend_ops or51132_ops = {

	.info = {
		.name			= "Oren OR51132 VSB/QAM Frontend",
		.type 			= FE_ATSC,
		.frequency_min		= 44000000,
		.frequency_max		= 958000000,
		.frequency_stepsize	= 166666,
		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
			FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
			FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
			FE_CAN_8VSB
	},

	.release = or51132_release,

	.init = or51132_init,
	.sleep = or51132_sleep,

	.set_frontend = or51132_set_parameters,
	.get_tune_settings = or51132_get_tune_settings,

	.read_status = or51132_read_status,
	.read_ber = or51132_read_ber,
	.read_signal_strength = or51132_read_signal_strength,
	.read_snr = or51132_read_snr,
	.read_ucblocks = or51132_read_ucblocks,
};

module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");

MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
MODULE_AUTHOR("Kirk Lapray");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(or51132_attach);

/*
 * Local variables:
 * c-basic-offset: 8
 * End:
 */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
	3	*
	4	* Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
	5	*
	6	* Based on code from Jack Kelliher (kelliher@xmission.com)
	7	* Copyright (C) 2002 & pcHDTV, inc.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	22	*
	23	*/
	24
	25	/*
	26	* This driver needs two external firmware files. Please copy
	27	* "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
	28	* /usr/lib/hotplug/firmware/ or /lib/firmware/
	29	* (depending on configuration of firmware hotplug).
	30	*/
	31	#define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
	32	#define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
	33
	34	#include <linux/kernel.h>
	35	#include <linux/module.h>
	36	#include <linux/moduleparam.h>
	37	#include <linux/init.h>
	38	#include <linux/delay.h>
4e57b681 TS	39	#include <linux/string.h>
4e57b681 TS	40	#include <linux/slab.h>
1da177e4 LT	41	#include <asm/byteorder.h>
	42
	43	#include "dvb_frontend.h"
	44	#include "dvb-pll.h"
	45	#include "or51132.h"
	46
	47	static int debug;
	48	#define dprintk(args...) \
	49	do { \
	50	if (debug) printk(KERN_DEBUG "or51132: " args); \
	51	} while (0)
	52
	53
	54	struct or51132_state
	55	{
	56	struct i2c_adapter* i2c;
	57	struct dvb_frontend_ops ops;
	58
	59	/* Configuration settings */
	60	const struct or51132_config* config;
	61
	62	struct dvb_frontend frontend;
	63
	64	/* Demodulator private data */
	65	fe_modulation_t current_modulation;
	66
	67	/* Tuner private data */
	68	u32 current_frequency;
	69	};
	70
	71	static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
	72	{
	73	int err;
	74	struct i2c_msg msg;
	75	msg.addr = reg;
	76	msg.flags = 0;
	77	msg.len = len;
	78	msg.buf = buf;
	79
	80	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
	81	printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
	82	return -EREMOTEIO;
	83	}
	84
	85	return 0;
	86	}
	87
	88	static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
	89	{
	90	int err;
	91	struct i2c_msg msg;
	92	msg.addr = reg;
	93	msg.flags = I2C_M_RD;
	94	msg.len = len;
	95	msg.buf = buf;
	96
	97	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
	98	printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
	99	return -EREMOTEIO;
	100	}
	101
	102	return 0;
	103	}
	104
105	static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
106	{
b8742700	107	struct or51132_state* state = fe->demodulator_priv;
1da177e4 LT	108	static u8 run_buf[] = {0x7F,0x01};
	109	static u8 get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
	110	u8 rec_buf[14];
	111	u8 cmd_buf[14];
	112	u32 firmwareAsize, firmwareBsize;
	113	int i,ret;
	114
	115	dprintk("Firmware is %Zd bytes\n",fw->size);
	116
	117	/* Get size of firmware A and B */
	118	firmwareAsize = le32_to_cpu(((u32)fw->data));
	119	dprintk("FirmwareA is %i bytes\n",firmwareAsize);
	120	firmwareBsize = le32_to_cpu(((u32)(fw->data+4)));
	121	dprintk("FirmwareB is %i bytes\n",firmwareBsize);
	122
	123	/* Upload firmware */
	124	if ((ret = i2c_writebytes(state,state->config->demod_address,
	125	&fw->data[8],firmwareAsize))) {
	126	printk(KERN_WARNING "or51132: load_firmware error 1\n");
	127	return ret;
	128	}
	129	msleep(1); /* 1ms */
	130	if ((ret = i2c_writebytes(state,state->config->demod_address,
	131	&fw->data[8+firmwareAsize],firmwareBsize))) {
	132	printk(KERN_WARNING "or51132: load_firmware error 2\n");
	133	return ret;
	134	}
	135	msleep(1); /* 1ms */
	136
	137	if ((ret = i2c_writebytes(state,state->config->demod_address,
	138	run_buf,2))) {
	139	printk(KERN_WARNING "or51132: load_firmware error 3\n");
	140	return ret;
	141	}
	142
	143	/* Wait at least 5 msec */
	144	msleep(20); /* 10ms */
	145
	146	if ((ret = i2c_writebytes(state,state->config->demod_address,
	147	run_buf,2))) {
	148	printk(KERN_WARNING "or51132: load_firmware error 4\n");
	149	return ret;
	150	}
	151
	152	/* 50ms for operation to begin */
	153	msleep(50);
	154
	155	/* Read back ucode version to besure we loaded correctly and are really up and running */
	156	/* Get uCode version */
	157	cmd_buf[0] = 0x10;
	158	cmd_buf[1] = 0x10;
	159	cmd_buf[2] = 0x00;
	160	cmd_buf[3] = 0x00;
	161	msleep(20); /* 20ms */
	162	if ((ret = i2c_writebytes(state,state->config->demod_address,
	163	cmd_buf,3))) {
	164	printk(KERN_WARNING "or51132: load_firmware error a\n");
	165	return ret;
	166	}
	167
	168	cmd_buf[0] = 0x04;
	169	cmd_buf[1] = 0x17;
	170	cmd_buf[2] = 0x00;
	171	cmd_buf[3] = 0x00;
172	msleep(20); /* 20ms */
173	if ((ret = i2c_writebytes(state,state->config->demod_address,
174	cmd_buf,2))) {
175	printk(KERN_WARNING "or51132: load_firmware error b\n");
176	return ret;
177	}
178
179	cmd_buf[0] = 0x00;
180	cmd_buf[1] = 0x00;
181	cmd_buf[2] = 0x00;
182	cmd_buf[3] = 0x00;
183	msleep(20); /* 20ms */
184	if ((ret = i2c_writebytes(state,state->config->demod_address,
185	cmd_buf,2))) {
186	printk(KERN_WARNING "or51132: load_firmware error c\n");
187	return ret;
188	}
189
190	for(i=0;i<4;i++) {
191	msleep(20); /* 20ms */
192	get_ver_buf[4] = i+1;
193	if ((ret = i2c_readbytes(state,state->config->demod_address,
194	&rec_buf[i*2],2))) {
195	printk(KERN_WARNING
196	"or51132: load_firmware error d - %d\n",i);
197	return ret;
198	}
199	}
200
201	printk(KERN_WARNING
202	"or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
203	rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
204	rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
205	rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
206	rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
207
208	cmd_buf[0] = 0x10;
209	cmd_buf[1] = 0x00;
210	cmd_buf[2] = 0x00;
211	cmd_buf[3] = 0x00;
212	msleep(20); /* 20ms */
213	if ((ret = i2c_writebytes(state,state->config->demod_address,
214	cmd_buf,3))) {
215	printk(KERN_WARNING "or51132: load_firmware error e\n");
216	return ret;
217	}
218	return 0;
219	};
220
221	static int or51132_init(struct dvb_frontend* fe)
222	{
223	return 0;
224	}
225
226	static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
227	{
228	*ber = 0;
229	return 0;
230	}
231
232	static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
233	{
234	*ucblocks = 0;
235	return 0;
236	}
237
238	static int or51132_sleep(struct dvb_frontend* fe)
239	{
240	return 0;
241	}
242
243	static int or51132_setmode(struct dvb_frontend* fe)
244	{
b8742700	245	struct or51132_state* state = fe->demodulator_priv;
1da177e4 LT	246	unsigned char cmd_buf[4];
	247
	248	dprintk("setmode %d\n",(int)state->current_modulation);
	249	/* set operation mode in Receiver 1 register; */
	250	cmd_buf[0] = 0x04;
	251	cmd_buf[1] = 0x01;
	252	switch (state->current_modulation) {
	253	case QAM_256:
	254	case QAM_64:
	255	case QAM_AUTO:
	256	/* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
	257	cmd_buf[2] = 0x5F;
	258	break;
	259	case VSB_8:
	260	/* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
	261	cmd_buf[2] = 0x50;
	262	break;
	263	default:
	264	printk("setmode:Modulation set to unsupported value\n");
	265	};
	266	cmd_buf[3] = 0x00;
	267	if (i2c_writebytes(state,state->config->demod_address,
	268	cmd_buf,3)) {
	269	printk(KERN_WARNING "or51132: set_mode error 1\n");
	270	return -1;
	271	}
	272	dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
	273
	274	/* Set operation mode in Receiver 6 register */
	275	cmd_buf[0] = 0x1C;
	276	switch (state->current_modulation) {
	277	case QAM_AUTO:
	278	/* REC MODE Normal Carrier Lock */
	279	cmd_buf[1] = 0x00;
	280	/* Channel MODE Auto QAM64/256 */
	281	cmd_buf[2] = 0x4f;
	282	break;
	283	case QAM_256:
	284	/* REC MODE Normal Carrier Lock */
	285	cmd_buf[1] = 0x00;
	286	/* Channel MODE QAM256 */
	287	cmd_buf[2] = 0x45;
	288	break;
	289	case QAM_64:
	290	/* REC MODE Normal Carrier Lock */
	291	cmd_buf[1] = 0x00;
	292	/* Channel MODE QAM64 */
	293	cmd_buf[2] = 0x43;
	294	break;
	295	case VSB_8:
	296	/* REC MODE inv IF spectrum, Normal */
	297	cmd_buf[1] = 0x03;
	298	/* Channel MODE ATSC/VSB8 */
	299	cmd_buf[2] = 0x06;
	300	break;
	301	default:
	302	printk("setmode: Modulation set to unsupported value\n");
	303	};
	304	cmd_buf[3] = 0x00;
	305	msleep(20); /* 20ms */
	306	if (i2c_writebytes(state,state->config->demod_address,
	307	cmd_buf,3)) {
	308	printk(KERN_WARNING "or51132: set_mode error 2\n");
	309	return -1;
310	}
311	dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
312
313	return 0;
314	}
315
316	static int or51132_set_parameters(struct dvb_frontend* fe,
317	struct dvb_frontend_parameters *param)
318	{
319	int ret;
320	u8 buf[4];
b8742700	321	struct or51132_state* state = fe->demodulator_priv;
1da177e4 LT	322	const struct firmware *fw;
	323
	324	/* Change only if we are actually changing the modulation */
	325	if (state->current_modulation != param->u.vsb.modulation) {
	326	switch(param->u.vsb.modulation) {
	327	case VSB_8:
	328	dprintk("set_parameters VSB MODE\n");
	329	printk("or51132: Waiting for firmware upload(%s)...\n",
	330	OR51132_VSB_FIRMWARE);
	331	ret = request_firmware(&fw, OR51132_VSB_FIRMWARE,
	332	&state->i2c->dev);
	333	if (ret){
	334	printk(KERN_WARNING "or51132: No firmware up"
	335	"loaded(timeout or file not found?)\n");
	336	return ret;
	337	}
	338	/* Set non-punctured clock for VSB */
	339	state->config->set_ts_params(fe, 0);
	340	break;
	341	case QAM_AUTO:
	342	case QAM_64:
	343	case QAM_256:
	344	dprintk("set_parameters QAM MODE\n");
	345	printk("or51132: Waiting for firmware upload(%s)...\n",
	346	OR51132_QAM_FIRMWARE);
	347	ret = request_firmware(&fw, OR51132_QAM_FIRMWARE,
	348	&state->i2c->dev);
	349	if (ret){
	350	printk(KERN_WARNING "or51132: No firmware up"
	351	"loaded(timeout or file not found?)\n");
	352	return ret;
	353	}
	354	/* Set punctured clock for QAM */
	355	state->config->set_ts_params(fe, 1);
	356	break;
	357	default:
	358	printk("or51132:Modulation type(%d) UNSUPPORTED\n",
	359	param->u.vsb.modulation);
	360	return -1;
	361	};
	362	ret = or51132_load_firmware(fe, fw);
	363	release_firmware(fw);
	364	if (ret) {
	365	printk(KERN_WARNING "or51132: Writing firmware to "
	366	"device failed!\n");
	367	return ret;
	368	}
	369	printk("or51132: Firmware upload complete.\n");
	370
	371	state->current_modulation = param->u.vsb.modulation;
	372	or51132_setmode(fe);
	373	}
	374
80e27e20 MM	375	dvb_pll_configure(state->config->pll_desc, buf,
	376	param->frequency, 0);
	377	dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
	378	"0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
	379	if (i2c_writebytes(state, state->config->pll_address ,buf, 4))
	380	printk(KERN_WARNING "or51132: set_parameters error "
	381	"writing to tuner\n");
	382
	383	/* Set to current mode */
	384	or51132_setmode(fe);
	385
	386	/* Update current frequency */
	387	state->current_frequency = param->frequency;
1da177e4 LT	388	return 0;
	389	}
	390
	391	static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
	392	{
b8742700	393	struct or51132_state* state = fe->demodulator_priv;
1da177e4 LT	394	unsigned char rec_buf[2];
	395	unsigned char snd_buf[2];
	396	*status = 0;
	397
	398	/* Receiver Status */
	399	snd_buf[0]=0x04;
	400	snd_buf[1]=0x00;
	401	msleep(30); /* 30ms */
	402	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
	403	printk(KERN_WARNING "or51132: read_status write error\n");
	404	return -1;
	405	}
	406	msleep(30); /* 30ms */
	407	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
	408	printk(KERN_WARNING "or51132: read_status read error\n");
	409	return -1;
	410	}
	411	dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
	412
	413	if (rec_buf[1] & 0x01) { /* Receiver Lock */
	414	*status \|= FE_HAS_SIGNAL;
	415	*status \|= FE_HAS_CARRIER;
	416	*status \|= FE_HAS_VITERBI;
	417	*status \|= FE_HAS_SYNC;
	418	*status \|= FE_HAS_LOCK;
	419	}
	420	return 0;
	421	}
	422
	423	/* log10-1 table at .5 increments from 1 to 100.5 */
	424	static unsigned int i100x20log10[] = {
	425	0, 352, 602, 795, 954, 1088, 1204, 1306, 1397, 1480,
	426	1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
	427	2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
	428	2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
	429	2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
	430	2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
	431	2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
	432	3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
	433	3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
	434	3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
	435	3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
	436	3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
	437	3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
	438	3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
	439	3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
	440	3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
	441	3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
	442	3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
	443	3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
	444	3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
	445	};
	446
	447	static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
	448
	449	static unsigned int i20Log10(unsigned short val)
	450	{
	451	unsigned int rntval = 100;
	452	unsigned int tmp = val;
	453	unsigned int exp = 1;
	454
	455	while(tmp > 100) {tmp /= 100; exp++;}
	456
	457	val = (2 * val)/denom[exp];
458	if (exp > 1) rntval = 2000*exp;
459
460	rntval += i100x20log10[val];
461	return rntval;
462	}
463
464	static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
465	{
b8742700	466	struct or51132_state* state = fe->demodulator_priv;
1da177e4 LT	467	unsigned char rec_buf[2];
	468	unsigned char snd_buf[2];
	469	u8 rcvr_stat;
	470	u16 snr_equ;
	471	int usK;
	472
	473	snd_buf[0]=0x04;
	474	snd_buf[1]=0x02; /* SNR after Equalizer */
	475	msleep(30); /* 30ms */
	476	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
	477	printk(KERN_WARNING "or51132: read_status write error\n");
	478	return -1;
	479	}
	480	msleep(30); /* 30ms */
	481	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
	482	printk(KERN_WARNING "or51132: read_status read error\n");
	483	return -1;
	484	}
	485	snr_equ = rec_buf[0] \| (rec_buf[1] << 8);
	486	dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
	487
	488	/* Receiver Status */
	489	snd_buf[0]=0x04;
	490	snd_buf[1]=0x00;
	491	msleep(30); /* 30ms */
	492	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
	493	printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
	494	return -1;
	495	}
	496	msleep(30); /* 30ms */
	497	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
	498	printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
	499	return -1;
	500	}
	501	dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
	502	rcvr_stat = rec_buf[1];
	503	usK = (rcvr_stat & 0x10) ? 3 : 0;
	504
	505	/* The value reported back from the frontend will be FFFF=100% 0000=0% */
	506	strength = (((8952 - i20Log10(snr_equ) - usK100)/3+5)*65535)/1000;
	507	dprintk("read_signal_strength %i\n",*strength);
	508
	509	return 0;
	510	}
	511
	512	static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
	513	{
b8742700	514	struct or51132_state* state = fe->demodulator_priv;
1da177e4 LT	515	unsigned char rec_buf[2];
	516	unsigned char snd_buf[2];
	517	u16 snr_equ;
	518
	519	snd_buf[0]=0x04;
	520	snd_buf[1]=0x02; /* SNR after Equalizer */
	521	msleep(30); /* 30ms */
	522	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
	523	printk(KERN_WARNING "or51132: read_snr write error\n");
	524	return -1;
	525	}
	526	msleep(30); /* 30ms */
	527	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
	528	printk(KERN_WARNING "or51132: read_snr dvr read error\n");
	529	return -1;
	530	}
	531	snr_equ = rec_buf[0] \| (rec_buf[1] << 8);
	532	dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
	533
	534	*snr = 0xFFFF - snr_equ;
	535	dprintk("read_snr %i\n",*snr);
	536
	537	return 0;
	538	}
	539
	540	static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
	541	{
	542	fe_tune_settings->min_delay_ms = 500;
	543	fe_tune_settings->step_size = 0;
	544	fe_tune_settings->max_drift = 0;
	545
	546	return 0;
	547	}
	548
	549	static void or51132_release(struct dvb_frontend* fe)
	550	{
b8742700	551	struct or51132_state* state = fe->demodulator_priv;
1da177e4 LT	552	kfree(state);
	553	}
	554
	555	static struct dvb_frontend_ops or51132_ops;
	556
	557	struct dvb_frontend* or51132_attach(const struct or51132_config* config,
	558	struct i2c_adapter* i2c)
	559	{
	560	struct or51132_state* state = NULL;
	561
	562	/* Allocate memory for the internal state */
	563	state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
	564	if (state == NULL)
	565	goto error;
	566
	567	/* Setup the state */
	568	state->config = config;
	569	state->i2c = i2c;
	570	memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
	571	state->current_frequency = -1;
	572	state->current_modulation = -1;
	573
	574	/* Create dvb_frontend */
	575	state->frontend.ops = &state->ops;
	576	state->frontend.demodulator_priv = state;
	577	return &state->frontend;
	578
	579	error:
	580	if (state)
	581	kfree(state);
	582	return NULL;
	583	}
	584
	585	static struct dvb_frontend_ops or51132_ops = {
	586
	587	.info = {
	588	.name = "Oren OR51132 VSB/QAM Frontend",
	589	.type = FE_ATSC,
	590	.frequency_min = 44000000,
	591	.frequency_max = 958000000,
	592	.frequency_stepsize = 166666,
	593	.caps = FE_CAN_FEC_1_2 \| FE_CAN_FEC_2_3 \| FE_CAN_FEC_3_4 \|
	594	FE_CAN_FEC_5_6 \| FE_CAN_FEC_7_8 \| FE_CAN_FEC_AUTO \|
	595	FE_CAN_QAM_64 \| FE_CAN_QAM_256 \| FE_CAN_QAM_AUTO \|
	596	FE_CAN_8VSB
	597	},
	598
	599	.release = or51132_release,
	600
	601	.init = or51132_init,
	602	.sleep = or51132_sleep,
	603
	604	.set_frontend = or51132_set_parameters,
	605	.get_tune_settings = or51132_get_tune_settings,
	606
	607	.read_status = or51132_read_status,
	608	.read_ber = or51132_read_ber,
	609	.read_signal_strength = or51132_read_signal_strength,
	610	.read_snr = or51132_read_snr,
	611	.read_ucblocks = or51132_read_ucblocks,
	612	};
	613
	614	module_param(debug, int, 0644);
	615	MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
616
617	MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
618	MODULE_AUTHOR("Kirk Lapray");
619	MODULE_LICENSE("GPL");
620
621	EXPORT_SYMBOL(or51132_attach);
622
623	/*
624	* Local variables:
625	* c-basic-offset: 8
626	* End:
627	*/