Commit | Line | Data |
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6bca3580 AQ |
1 | /* |
2 | Driver for Philips tda10086 DVBS Demodulator | |
3 | ||
4 | (c) 2006 Andrew de Quincey | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ||
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | ||
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/module.h> | |
6bca3580 AQ |
25 | #include <linux/device.h> |
26 | #include <linux/jiffies.h> | |
27 | #include <linux/string.h> | |
28 | #include <linux/slab.h> | |
29 | ||
30 | #include "dvb_frontend.h" | |
31 | #include "tda10086.h" | |
32 | ||
33 | #define SACLK 96000000 | |
34 | ||
35 | struct tda10086_state { | |
36 | struct i2c_adapter* i2c; | |
37 | const struct tda10086_config* config; | |
38 | struct dvb_frontend frontend; | |
39 | ||
40 | /* private demod data */ | |
41 | u32 frequency; | |
42 | u32 symbol_rate; | |
c6604150 | 43 | bool has_lock; |
6bca3580 AQ |
44 | }; |
45 | ||
07e19c20 | 46 | static int debug = 0; |
6bca3580 AQ |
47 | #define dprintk(args...) \ |
48 | do { \ | |
49 | if (debug) printk(KERN_DEBUG "tda10086: " args); \ | |
50 | } while (0) | |
51 | ||
52 | static int tda10086_write_byte(struct tda10086_state *state, int reg, int data) | |
53 | { | |
54 | int ret; | |
55 | u8 b0[] = { reg, data }; | |
56 | struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 }; | |
57 | ||
58 | msg.addr = state->config->demod_address; | |
59 | ret = i2c_transfer(state->i2c, &msg, 1); | |
60 | ||
61 | if (ret != 1) | |
62 | dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n", | |
63 | __FUNCTION__, reg, data, ret); | |
64 | ||
65 | return (ret != 1) ? ret : 0; | |
66 | } | |
67 | ||
68 | static int tda10086_read_byte(struct tda10086_state *state, int reg) | |
69 | { | |
70 | int ret; | |
71 | u8 b0[] = { reg }; | |
72 | u8 b1[] = { 0 }; | |
73 | struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 }, | |
74 | { .flags = I2C_M_RD, .buf = b1, .len = 1 }}; | |
75 | ||
76 | msg[0].addr = state->config->demod_address; | |
77 | msg[1].addr = state->config->demod_address; | |
78 | ret = i2c_transfer(state->i2c, msg, 2); | |
79 | ||
80 | if (ret != 2) { | |
81 | dprintk("%s: error reg=0x%x, ret=%i\n", __FUNCTION__, reg, | |
82 | ret); | |
83 | return ret; | |
84 | } | |
85 | ||
86 | return b1[0]; | |
87 | } | |
88 | ||
89 | static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data) | |
90 | { | |
91 | int val; | |
92 | ||
93 | // read a byte and check | |
94 | val = tda10086_read_byte(state, reg); | |
95 | if (val < 0) | |
96 | return val; | |
97 | ||
98 | // mask if off | |
99 | val = val & ~mask; | |
100 | val |= data & 0xff; | |
101 | ||
102 | // write it out again | |
103 | return tda10086_write_byte(state, reg, val); | |
104 | } | |
105 | ||
106 | static int tda10086_init(struct dvb_frontend* fe) | |
107 | { | |
108 | struct tda10086_state* state = fe->demodulator_priv; | |
ea75baf4 | 109 | u8 t22k_off = 0x80; |
6bca3580 AQ |
110 | |
111 | dprintk ("%s\n", __FUNCTION__); | |
112 | ||
ea75baf4 HH |
113 | if (state->config->diseqc_tone) |
114 | t22k_off = 0; | |
6bca3580 AQ |
115 | // reset |
116 | tda10086_write_byte(state, 0x00, 0x00); | |
117 | msleep(10); | |
118 | ||
119 | // misc setup | |
120 | tda10086_write_byte(state, 0x01, 0x94); | |
121 | tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP | |
c6604150 | 122 | tda10086_write_byte(state, 0x03, 0xe4); |
6bca3580 AQ |
123 | tda10086_write_byte(state, 0x04, 0x43); |
124 | tda10086_write_byte(state, 0x0c, 0x0c); | |
125 | tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold | |
126 | tda10086_write_byte(state, 0x20, 0x89); // misc | |
127 | tda10086_write_byte(state, 0x30, 0x04); // acquisition period length | |
128 | tda10086_write_byte(state, 0x32, 0x00); // irq off | |
129 | tda10086_write_byte(state, 0x31, 0x56); // setup AFC | |
130 | ||
131 | // setup PLL (assumes 16Mhz XIN) | |
132 | tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup | |
133 | tda10086_write_byte(state, 0x3a, 0x0b); // M=12 | |
134 | tda10086_write_byte(state, 0x3b, 0x01); // P=2 | |
135 | tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL | |
136 | ||
137 | // setup TS interface | |
138 | tda10086_write_byte(state, 0x11, 0x81); | |
139 | tda10086_write_byte(state, 0x12, 0x81); | |
140 | tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST | |
141 | tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use | |
142 | tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use | |
143 | tda10086_write_byte(state, 0x10, 0x2a); | |
144 | ||
145 | // setup ADC | |
146 | tda10086_write_byte(state, 0x58, 0x61); // ADC setup | |
147 | tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC | |
148 | ||
149 | // setup AGC | |
150 | tda10086_write_byte(state, 0x05, 0x0B); | |
151 | tda10086_write_byte(state, 0x37, 0x63); | |
c6604150 | 152 | tda10086_write_byte(state, 0x3f, 0x0a); // NOTE: flydvb varies it |
6bca3580 AQ |
153 | tda10086_write_byte(state, 0x40, 0x64); |
154 | tda10086_write_byte(state, 0x41, 0x4f); | |
155 | tda10086_write_byte(state, 0x42, 0x43); | |
156 | ||
157 | // setup viterbi | |
158 | tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK | |
159 | ||
160 | // setup carrier recovery | |
161 | tda10086_write_byte(state, 0x3d, 0x80); | |
162 | ||
163 | // setup SEC | |
ea75baf4 | 164 | tda10086_write_byte(state, 0x36, t22k_off); // all SEC off, 22k tone |
6bca3580 AQ |
165 | tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency |
166 | tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // } | |
167 | ||
168 | return 0; | |
169 | } | |
170 | ||
171 | static void tda10086_diseqc_wait(struct tda10086_state *state) | |
172 | { | |
173 | unsigned long timeout = jiffies + msecs_to_jiffies(200); | |
174 | while (!(tda10086_read_byte(state, 0x50) & 0x01)) { | |
175 | if(time_after(jiffies, timeout)) { | |
176 | printk("%s: diseqc queue not ready, command may be lost.\n", __FUNCTION__); | |
177 | break; | |
178 | } | |
179 | msleep(10); | |
180 | } | |
181 | } | |
182 | ||
183 | static int tda10086_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |
184 | { | |
185 | struct tda10086_state* state = fe->demodulator_priv; | |
ea75baf4 | 186 | u8 t22k_off = 0x80; |
6bca3580 AQ |
187 | |
188 | dprintk ("%s\n", __FUNCTION__); | |
189 | ||
ea75baf4 HH |
190 | if (state->config->diseqc_tone) |
191 | t22k_off = 0; | |
192 | ||
33f77714 | 193 | switch (tone) { |
6bca3580 | 194 | case SEC_TONE_OFF: |
ea75baf4 | 195 | tda10086_write_byte(state, 0x36, t22k_off); |
6bca3580 AQ |
196 | break; |
197 | ||
198 | case SEC_TONE_ON: | |
ea75baf4 | 199 | tda10086_write_byte(state, 0x36, 0x01 + t22k_off); |
6bca3580 AQ |
200 | break; |
201 | } | |
202 | ||
203 | return 0; | |
204 | } | |
205 | ||
206 | static int tda10086_send_master_cmd (struct dvb_frontend* fe, | |
207 | struct dvb_diseqc_master_cmd* cmd) | |
208 | { | |
209 | struct tda10086_state* state = fe->demodulator_priv; | |
210 | int i; | |
211 | u8 oldval; | |
ea75baf4 | 212 | u8 t22k_off = 0x80; |
6bca3580 AQ |
213 | |
214 | dprintk ("%s\n", __FUNCTION__); | |
215 | ||
ea75baf4 HH |
216 | if (state->config->diseqc_tone) |
217 | t22k_off = 0; | |
218 | ||
6bca3580 AQ |
219 | if (cmd->msg_len > 6) |
220 | return -EINVAL; | |
221 | oldval = tda10086_read_byte(state, 0x36); | |
222 | ||
223 | for(i=0; i< cmd->msg_len; i++) { | |
224 | tda10086_write_byte(state, 0x48+i, cmd->msg[i]); | |
225 | } | |
ea75baf4 HH |
226 | tda10086_write_byte(state, 0x36, (0x08 + t22k_off) |
227 | | ((cmd->msg_len - 1) << 4)); | |
6bca3580 AQ |
228 | |
229 | tda10086_diseqc_wait(state); | |
230 | ||
231 | tda10086_write_byte(state, 0x36, oldval); | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
236 | static int tda10086_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) | |
237 | { | |
238 | struct tda10086_state* state = fe->demodulator_priv; | |
239 | u8 oldval = tda10086_read_byte(state, 0x36); | |
ea75baf4 | 240 | u8 t22k_off = 0x80; |
6bca3580 AQ |
241 | |
242 | dprintk ("%s\n", __FUNCTION__); | |
243 | ||
ea75baf4 HH |
244 | if (state->config->diseqc_tone) |
245 | t22k_off = 0; | |
246 | ||
6bca3580 AQ |
247 | switch(minicmd) { |
248 | case SEC_MINI_A: | |
ea75baf4 | 249 | tda10086_write_byte(state, 0x36, 0x04 + t22k_off); |
6bca3580 AQ |
250 | break; |
251 | ||
252 | case SEC_MINI_B: | |
ea75baf4 | 253 | tda10086_write_byte(state, 0x36, 0x06 + t22k_off); |
6bca3580 AQ |
254 | break; |
255 | } | |
256 | ||
257 | tda10086_diseqc_wait(state); | |
258 | ||
259 | tda10086_write_byte(state, 0x36, oldval); | |
260 | ||
261 | return 0; | |
262 | } | |
263 | ||
264 | static int tda10086_set_inversion(struct tda10086_state *state, | |
265 | struct dvb_frontend_parameters *fe_params) | |
266 | { | |
267 | u8 invval = 0x80; | |
268 | ||
269 | dprintk ("%s %i %i\n", __FUNCTION__, fe_params->inversion, state->config->invert); | |
270 | ||
271 | switch(fe_params->inversion) { | |
272 | case INVERSION_OFF: | |
273 | if (state->config->invert) | |
274 | invval = 0x40; | |
275 | break; | |
276 | case INVERSION_ON: | |
277 | if (!state->config->invert) | |
278 | invval = 0x40; | |
279 | break; | |
280 | case INVERSION_AUTO: | |
281 | invval = 0x00; | |
282 | break; | |
283 | } | |
284 | tda10086_write_mask(state, 0x0c, 0xc0, invval); | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
289 | static int tda10086_set_symbol_rate(struct tda10086_state *state, | |
290 | struct dvb_frontend_parameters *fe_params) | |
291 | { | |
292 | u8 dfn = 0; | |
293 | u8 afs = 0; | |
294 | u8 byp = 0; | |
295 | u8 reg37 = 0x43; | |
296 | u8 reg42 = 0x43; | |
297 | u64 big; | |
298 | u32 tmp; | |
299 | u32 bdr; | |
300 | u32 bdri; | |
301 | u32 symbol_rate = fe_params->u.qpsk.symbol_rate; | |
302 | ||
303 | dprintk ("%s %i\n", __FUNCTION__, symbol_rate); | |
304 | ||
305 | // setup the decimation and anti-aliasing filters.. | |
306 | if (symbol_rate < (u32) (SACLK * 0.0137)) { | |
307 | dfn=4; | |
308 | afs=1; | |
309 | } else if (symbol_rate < (u32) (SACLK * 0.0208)) { | |
310 | dfn=4; | |
311 | afs=0; | |
312 | } else if (symbol_rate < (u32) (SACLK * 0.0270)) { | |
313 | dfn=3; | |
314 | afs=1; | |
315 | } else if (symbol_rate < (u32) (SACLK * 0.0416)) { | |
316 | dfn=3; | |
317 | afs=0; | |
318 | } else if (symbol_rate < (u32) (SACLK * 0.0550)) { | |
319 | dfn=2; | |
320 | afs=1; | |
321 | } else if (symbol_rate < (u32) (SACLK * 0.0833)) { | |
322 | dfn=2; | |
323 | afs=0; | |
324 | } else if (symbol_rate < (u32) (SACLK * 0.1100)) { | |
325 | dfn=1; | |
326 | afs=1; | |
327 | } else if (symbol_rate < (u32) (SACLK * 0.1666)) { | |
328 | dfn=1; | |
329 | afs=0; | |
330 | } else if (symbol_rate < (u32) (SACLK * 0.2200)) { | |
331 | dfn=0; | |
332 | afs=1; | |
333 | } else if (symbol_rate < (u32) (SACLK * 0.3333)) { | |
334 | dfn=0; | |
335 | afs=0; | |
336 | } else { | |
337 | reg37 = 0x63; | |
338 | reg42 = 0x4f; | |
339 | byp=1; | |
340 | } | |
341 | ||
342 | // calculate BDR | |
343 | big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn); | |
344 | big += ((SACLK/1000ULL)-1ULL); | |
345 | do_div(big, (SACLK/1000ULL)); | |
346 | bdr = big & 0xfffff; | |
347 | ||
348 | // calculate BDRI | |
349 | tmp = (1<<dfn)*(symbol_rate/1000); | |
350 | bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp; | |
351 | ||
352 | tda10086_write_byte(state, 0x21, (afs << 7) | dfn); | |
353 | tda10086_write_mask(state, 0x20, 0x08, byp << 3); | |
354 | tda10086_write_byte(state, 0x06, bdr); | |
355 | tda10086_write_byte(state, 0x07, bdr >> 8); | |
356 | tda10086_write_byte(state, 0x08, bdr >> 16); | |
357 | tda10086_write_byte(state, 0x09, bdri); | |
358 | tda10086_write_byte(state, 0x37, reg37); | |
359 | tda10086_write_byte(state, 0x42, reg42); | |
360 | ||
361 | return 0; | |
362 | } | |
363 | ||
364 | static int tda10086_set_fec(struct tda10086_state *state, | |
365 | struct dvb_frontend_parameters *fe_params) | |
366 | { | |
367 | u8 fecval; | |
368 | ||
369 | dprintk ("%s %i\n", __FUNCTION__, fe_params->u.qpsk.fec_inner); | |
370 | ||
371 | switch(fe_params->u.qpsk.fec_inner) { | |
372 | case FEC_1_2: | |
373 | fecval = 0x00; | |
374 | break; | |
375 | case FEC_2_3: | |
376 | fecval = 0x01; | |
377 | break; | |
378 | case FEC_3_4: | |
379 | fecval = 0x02; | |
380 | break; | |
381 | case FEC_4_5: | |
382 | fecval = 0x03; | |
383 | break; | |
384 | case FEC_5_6: | |
385 | fecval = 0x04; | |
386 | break; | |
387 | case FEC_6_7: | |
388 | fecval = 0x05; | |
389 | break; | |
390 | case FEC_7_8: | |
391 | fecval = 0x06; | |
392 | break; | |
393 | case FEC_8_9: | |
394 | fecval = 0x07; | |
395 | break; | |
396 | case FEC_AUTO: | |
397 | fecval = 0x08; | |
398 | break; | |
399 | default: | |
400 | return -1; | |
401 | } | |
402 | tda10086_write_byte(state, 0x0d, fecval); | |
403 | ||
404 | return 0; | |
405 | } | |
406 | ||
407 | static int tda10086_set_frontend(struct dvb_frontend* fe, | |
408 | struct dvb_frontend_parameters *fe_params) | |
409 | { | |
410 | struct tda10086_state *state = fe->demodulator_priv; | |
411 | int ret; | |
412 | u32 freq = 0; | |
413 | int freqoff; | |
414 | ||
415 | dprintk ("%s\n", __FUNCTION__); | |
416 | ||
c6604150 OE |
417 | // modify parameters for tuning |
418 | tda10086_write_byte(state, 0x02, 0x35); | |
419 | state->has_lock = false; | |
420 | ||
6bca3580 AQ |
421 | // set params |
422 | if (fe->ops.tuner_ops.set_params) { | |
423 | fe->ops.tuner_ops.set_params(fe, fe_params); | |
424 | if (fe->ops.i2c_gate_ctrl) | |
425 | fe->ops.i2c_gate_ctrl(fe, 0); | |
426 | ||
427 | if (fe->ops.tuner_ops.get_frequency) | |
428 | fe->ops.tuner_ops.get_frequency(fe, &freq); | |
429 | if (fe->ops.i2c_gate_ctrl) | |
430 | fe->ops.i2c_gate_ctrl(fe, 0); | |
431 | } | |
432 | ||
433 | // calcluate the frequency offset (in *Hz* not kHz) | |
434 | freqoff = fe_params->frequency - freq; | |
435 | freqoff = ((1<<16) * freqoff) / (SACLK/1000); | |
436 | tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f)); | |
437 | tda10086_write_byte(state, 0x3e, freqoff); | |
438 | ||
439 | if ((ret = tda10086_set_inversion(state, fe_params)) < 0) | |
440 | return ret; | |
441 | if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0) | |
442 | return ret; | |
443 | if ((ret = tda10086_set_fec(state, fe_params)) < 0) | |
444 | return ret; | |
445 | ||
446 | // soft reset + disable TS output until lock | |
447 | tda10086_write_mask(state, 0x10, 0x40, 0x40); | |
448 | tda10086_write_mask(state, 0x00, 0x01, 0x00); | |
449 | ||
450 | state->symbol_rate = fe_params->u.qpsk.symbol_rate; | |
451 | state->frequency = fe_params->frequency; | |
452 | return 0; | |
453 | } | |
454 | ||
455 | static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params) | |
456 | { | |
457 | struct tda10086_state* state = fe->demodulator_priv; | |
458 | u8 val; | |
459 | int tmp; | |
460 | u64 tmp64; | |
461 | ||
462 | dprintk ("%s\n", __FUNCTION__); | |
463 | ||
221a09d5 AQ |
464 | // check for invalid symbol rate |
465 | if (fe_params->u.qpsk.symbol_rate < 500000) | |
466 | return -EINVAL; | |
467 | ||
6bca3580 AQ |
468 | // calculate the updated frequency (note: we convert from Hz->kHz) |
469 | tmp64 = tda10086_read_byte(state, 0x52); | |
470 | tmp64 |= (tda10086_read_byte(state, 0x51) << 8); | |
471 | if (tmp64 & 0x8000) | |
472 | tmp64 |= 0xffffffffffff0000ULL; | |
473 | tmp64 = (tmp64 * (SACLK/1000ULL)); | |
474 | do_div(tmp64, (1ULL<<15) * (1ULL<<1)); | |
475 | fe_params->frequency = (int) state->frequency + (int) tmp64; | |
476 | ||
477 | // the inversion | |
478 | val = tda10086_read_byte(state, 0x0c); | |
479 | if (val & 0x80) { | |
480 | switch(val & 0x40) { | |
481 | case 0x00: | |
482 | fe_params->inversion = INVERSION_OFF; | |
483 | if (state->config->invert) | |
484 | fe_params->inversion = INVERSION_ON; | |
485 | break; | |
486 | default: | |
487 | fe_params->inversion = INVERSION_ON; | |
488 | if (state->config->invert) | |
489 | fe_params->inversion = INVERSION_OFF; | |
490 | break; | |
491 | } | |
492 | } else { | |
493 | tda10086_read_byte(state, 0x0f); | |
494 | switch(val & 0x02) { | |
495 | case 0x00: | |
496 | fe_params->inversion = INVERSION_OFF; | |
497 | if (state->config->invert) | |
498 | fe_params->inversion = INVERSION_ON; | |
499 | break; | |
500 | default: | |
501 | fe_params->inversion = INVERSION_ON; | |
502 | if (state->config->invert) | |
503 | fe_params->inversion = INVERSION_OFF; | |
504 | break; | |
505 | } | |
506 | } | |
507 | ||
508 | // calculate the updated symbol rate | |
509 | tmp = tda10086_read_byte(state, 0x1d); | |
510 | if (tmp & 0x80) | |
511 | tmp |= 0xffffff00; | |
512 | tmp = (tmp * 480 * (1<<1)) / 128; | |
513 | tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000); | |
514 | fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp; | |
515 | ||
516 | // the FEC | |
517 | val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4; | |
518 | switch(val) { | |
519 | case 0x00: | |
520 | fe_params->u.qpsk.fec_inner = FEC_1_2; | |
521 | break; | |
522 | case 0x01: | |
523 | fe_params->u.qpsk.fec_inner = FEC_2_3; | |
524 | break; | |
525 | case 0x02: | |
526 | fe_params->u.qpsk.fec_inner = FEC_3_4; | |
527 | break; | |
528 | case 0x03: | |
529 | fe_params->u.qpsk.fec_inner = FEC_4_5; | |
530 | break; | |
531 | case 0x04: | |
532 | fe_params->u.qpsk.fec_inner = FEC_5_6; | |
533 | break; | |
534 | case 0x05: | |
535 | fe_params->u.qpsk.fec_inner = FEC_6_7; | |
536 | break; | |
537 | case 0x06: | |
538 | fe_params->u.qpsk.fec_inner = FEC_7_8; | |
539 | break; | |
540 | case 0x07: | |
541 | fe_params->u.qpsk.fec_inner = FEC_8_9; | |
542 | break; | |
543 | } | |
544 | ||
545 | return 0; | |
546 | } | |
547 | ||
548 | static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status) | |
549 | { | |
550 | struct tda10086_state* state = fe->demodulator_priv; | |
551 | u8 val; | |
552 | ||
553 | dprintk ("%s\n", __FUNCTION__); | |
554 | ||
555 | val = tda10086_read_byte(state, 0x0e); | |
556 | *fe_status = 0; | |
557 | if (val & 0x01) | |
558 | *fe_status |= FE_HAS_SIGNAL; | |
559 | if (val & 0x02) | |
560 | *fe_status |= FE_HAS_CARRIER; | |
561 | if (val & 0x04) | |
562 | *fe_status |= FE_HAS_VITERBI; | |
563 | if (val & 0x08) | |
564 | *fe_status |= FE_HAS_SYNC; | |
c6604150 | 565 | if (val & 0x10) { |
6bca3580 | 566 | *fe_status |= FE_HAS_LOCK; |
c6604150 OE |
567 | if (!state->has_lock) { |
568 | state->has_lock = true; | |
569 | // modify parameters for stable reception | |
570 | tda10086_write_byte(state, 0x02, 0x00); | |
571 | } | |
572 | } | |
6bca3580 AQ |
573 | |
574 | return 0; | |
575 | } | |
576 | ||
577 | static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal) | |
578 | { | |
579 | struct tda10086_state* state = fe->demodulator_priv; | |
580 | u8 _str; | |
581 | ||
582 | dprintk ("%s\n", __FUNCTION__); | |
583 | ||
c6604150 | 584 | _str = 0xff - tda10086_read_byte(state, 0x43); |
6bca3580 AQ |
585 | *signal = (_str << 8) | _str; |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
590 | static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr) | |
591 | { | |
592 | struct tda10086_state* state = fe->demodulator_priv; | |
593 | u8 _snr; | |
594 | ||
595 | dprintk ("%s\n", __FUNCTION__); | |
596 | ||
c6604150 | 597 | _snr = 0xff - tda10086_read_byte(state, 0x1c); |
6bca3580 AQ |
598 | *snr = (_snr << 8) | _snr; |
599 | ||
600 | return 0; | |
601 | } | |
602 | ||
603 | static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
604 | { | |
605 | struct tda10086_state* state = fe->demodulator_priv; | |
606 | ||
607 | dprintk ("%s\n", __FUNCTION__); | |
608 | ||
609 | // read it | |
610 | *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f; | |
611 | ||
612 | // reset counter | |
613 | tda10086_write_byte(state, 0x18, 0x00); | |
614 | tda10086_write_byte(state, 0x18, 0x80); | |
615 | ||
616 | return 0; | |
617 | } | |
618 | ||
619 | static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber) | |
620 | { | |
621 | struct tda10086_state* state = fe->demodulator_priv; | |
622 | ||
623 | dprintk ("%s\n", __FUNCTION__); | |
624 | ||
625 | // read it | |
626 | *ber = 0; | |
627 | *ber |= tda10086_read_byte(state, 0x15); | |
628 | *ber |= tda10086_read_byte(state, 0x16) << 8; | |
629 | *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16; | |
630 | ||
631 | return 0; | |
632 | } | |
633 | ||
634 | static int tda10086_sleep(struct dvb_frontend* fe) | |
635 | { | |
636 | struct tda10086_state* state = fe->demodulator_priv; | |
637 | ||
638 | dprintk ("%s\n", __FUNCTION__); | |
639 | ||
640 | tda10086_write_mask(state, 0x00, 0x08, 0x08); | |
641 | ||
642 | return 0; | |
643 | } | |
644 | ||
645 | static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) | |
646 | { | |
647 | struct tda10086_state* state = fe->demodulator_priv; | |
648 | ||
649 | dprintk ("%s\n", __FUNCTION__); | |
650 | ||
651 | if (enable) { | |
652 | tda10086_write_mask(state, 0x00, 0x10, 0x10); | |
653 | } else { | |
654 | tda10086_write_mask(state, 0x00, 0x10, 0x00); | |
655 | } | |
656 | ||
657 | return 0; | |
658 | } | |
659 | ||
660 | static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | |
661 | { | |
662 | if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) { | |
663 | fesettings->min_delay_ms = 50; | |
664 | fesettings->step_size = 2000; | |
665 | fesettings->max_drift = 8000; | |
666 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) { | |
667 | fesettings->min_delay_ms = 100; | |
668 | fesettings->step_size = 1500; | |
669 | fesettings->max_drift = 9000; | |
670 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) { | |
671 | fesettings->min_delay_ms = 100; | |
672 | fesettings->step_size = 1000; | |
673 | fesettings->max_drift = 8000; | |
674 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) { | |
675 | fesettings->min_delay_ms = 100; | |
676 | fesettings->step_size = 500; | |
677 | fesettings->max_drift = 7000; | |
678 | } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) { | |
679 | fesettings->min_delay_ms = 200; | |
680 | fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); | |
681 | fesettings->max_drift = 14 * fesettings->step_size; | |
682 | } else { | |
683 | fesettings->min_delay_ms = 200; | |
684 | fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); | |
685 | fesettings->max_drift = 18 * fesettings->step_size; | |
686 | } | |
687 | ||
688 | return 0; | |
689 | } | |
690 | ||
691 | static void tda10086_release(struct dvb_frontend* fe) | |
692 | { | |
693 | struct tda10086_state *state = fe->demodulator_priv; | |
694 | tda10086_sleep(fe); | |
695 | kfree(state); | |
696 | } | |
697 | ||
698 | static struct dvb_frontend_ops tda10086_ops = { | |
699 | ||
700 | .info = { | |
701 | .name = "Philips TDA10086 DVB-S", | |
702 | .type = FE_QPSK, | |
703 | .frequency_min = 950000, | |
704 | .frequency_max = 2150000, | |
705 | .frequency_stepsize = 125, /* kHz for QPSK frontends */ | |
706 | .symbol_rate_min = 1000000, | |
707 | .symbol_rate_max = 45000000, | |
708 | .caps = FE_CAN_INVERSION_AUTO | | |
709 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
710 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
711 | FE_CAN_QPSK | |
712 | }, | |
713 | ||
714 | .release = tda10086_release, | |
715 | ||
716 | .init = tda10086_init, | |
717 | .sleep = tda10086_sleep, | |
718 | .i2c_gate_ctrl = tda10086_i2c_gate_ctrl, | |
719 | ||
720 | .set_frontend = tda10086_set_frontend, | |
721 | .get_frontend = tda10086_get_frontend, | |
722 | .get_tune_settings = tda10086_get_tune_settings, | |
723 | ||
724 | .read_status = tda10086_read_status, | |
725 | .read_ber = tda10086_read_ber, | |
726 | .read_signal_strength = tda10086_read_signal_strength, | |
727 | .read_snr = tda10086_read_snr, | |
728 | .read_ucblocks = tda10086_read_ucblocks, | |
729 | ||
730 | .diseqc_send_master_cmd = tda10086_send_master_cmd, | |
731 | .diseqc_send_burst = tda10086_send_burst, | |
732 | .set_tone = tda10086_set_tone, | |
733 | }; | |
734 | ||
735 | struct dvb_frontend* tda10086_attach(const struct tda10086_config* config, | |
736 | struct i2c_adapter* i2c) | |
737 | { | |
738 | struct tda10086_state *state; | |
739 | ||
740 | dprintk ("%s\n", __FUNCTION__); | |
741 | ||
742 | /* allocate memory for the internal state */ | |
743 | state = kmalloc(sizeof(struct tda10086_state), GFP_KERNEL); | |
744 | if (!state) | |
745 | return NULL; | |
746 | ||
747 | /* setup the state */ | |
748 | state->config = config; | |
749 | state->i2c = i2c; | |
750 | ||
751 | /* check if the demod is there */ | |
752 | if (tda10086_read_byte(state, 0x1e) != 0xe1) { | |
753 | kfree(state); | |
754 | return NULL; | |
755 | } | |
756 | ||
757 | /* create dvb_frontend */ | |
758 | memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops)); | |
759 | state->frontend.demodulator_priv = state; | |
760 | return &state->frontend; | |
761 | } | |
762 | ||
763 | module_param(debug, int, 0644); | |
764 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |
765 | ||
766 | MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator"); | |
767 | MODULE_AUTHOR("Andrew de Quincey"); | |
768 | MODULE_LICENSE("GPL"); | |
769 | ||
770 | EXPORT_SYMBOL(tda10086_attach); |