Commit | Line | Data |
---|---|---|
825b9670 | 1 | /* |
c89f66f6 | 2 | * Afatech AF9013 demodulator driver |
825b9670 AP |
3 | * |
4 | * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> | |
f571e004 | 5 | * Copyright (C) 2011 Antti Palosaari <crope@iki.fi> |
825b9670 AP |
6 | * |
7 | * Thanks to Afatech who kindly provided information. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | */ | |
24 | ||
825b9670 | 25 | #include "af9013_priv.h" |
825b9670 | 26 | |
37ebaf68 MCC |
27 | /* Max transfer size done by I2C transfer functions */ |
28 | #define MAX_XFER_SIZE 64 | |
29 | ||
825b9670 AP |
30 | struct af9013_state { |
31 | struct i2c_adapter *i2c; | |
f571e004 | 32 | struct dvb_frontend fe; |
825b9670 AP |
33 | struct af9013_config config; |
34 | ||
9e35cd22 AP |
35 | /* tuner/demod RF and IF AGC limits used for signal strength calc */ |
36 | u8 signal_strength_en, rf_50, rf_80, if_50, if_80; | |
825b9670 AP |
37 | u16 signal_strength; |
38 | u32 ber; | |
39 | u32 ucblocks; | |
40 | u16 snr; | |
f571e004 AP |
41 | u32 bandwidth_hz; |
42 | fe_status_t fe_status; | |
43 | unsigned long set_frontend_jiffies; | |
44 | unsigned long read_status_jiffies; | |
45 | bool first_tune; | |
46 | bool i2c_gate_state; | |
47 | unsigned int statistics_step:3; | |
48 | struct delayed_work statistics_work; | |
825b9670 AP |
49 | }; |
50 | ||
f571e004 AP |
51 | /* write multiple registers */ |
52 | static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg, | |
53 | const u8 *val, int len) | |
825b9670 | 54 | { |
f571e004 | 55 | int ret; |
37ebaf68 | 56 | u8 buf[MAX_XFER_SIZE]; |
f571e004 AP |
57 | struct i2c_msg msg[1] = { |
58 | { | |
59 | .addr = priv->config.i2c_addr, | |
60 | .flags = 0, | |
37ebaf68 | 61 | .len = 3 + len, |
f571e004 AP |
62 | .buf = buf, |
63 | } | |
64 | }; | |
65 | ||
37ebaf68 MCC |
66 | if (3 + len > sizeof(buf)) { |
67 | dev_warn(&priv->i2c->dev, | |
68 | "%s: i2c wr reg=%04x: len=%d is too big!\n", | |
69 | KBUILD_MODNAME, reg, len); | |
70 | return -EINVAL; | |
71 | } | |
72 | ||
f571e004 AP |
73 | buf[0] = (reg >> 8) & 0xff; |
74 | buf[1] = (reg >> 0) & 0xff; | |
825b9670 AP |
75 | buf[2] = mbox; |
76 | memcpy(&buf[3], val, len); | |
77 | ||
f571e004 AP |
78 | ret = i2c_transfer(priv->i2c, msg, 1); |
79 | if (ret == 1) { | |
80 | ret = 0; | |
81 | } else { | |
8df379c5 AP |
82 | dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%04x " \ |
83 | "len=%d\n", KBUILD_MODNAME, ret, reg, len); | |
f571e004 | 84 | ret = -EREMOTEIO; |
825b9670 | 85 | } |
f571e004 | 86 | return ret; |
825b9670 AP |
87 | } |
88 | ||
f571e004 AP |
89 | /* read multiple registers */ |
90 | static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg, | |
91 | u8 *val, int len) | |
825b9670 | 92 | { |
f571e004 AP |
93 | int ret; |
94 | u8 buf[3]; | |
95 | struct i2c_msg msg[2] = { | |
96 | { | |
97 | .addr = priv->config.i2c_addr, | |
98 | .flags = 0, | |
99 | .len = 3, | |
100 | .buf = buf, | |
101 | }, { | |
102 | .addr = priv->config.i2c_addr, | |
103 | .flags = I2C_M_RD, | |
104 | .len = len, | |
105 | .buf = val, | |
106 | } | |
107 | }; | |
108 | ||
109 | buf[0] = (reg >> 8) & 0xff; | |
110 | buf[1] = (reg >> 0) & 0xff; | |
111 | buf[2] = mbox; | |
112 | ||
113 | ret = i2c_transfer(priv->i2c, msg, 2); | |
114 | if (ret == 2) { | |
115 | ret = 0; | |
116 | } else { | |
8df379c5 AP |
117 | dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%04x " \ |
118 | "len=%d\n", KBUILD_MODNAME, ret, reg, len); | |
f571e004 AP |
119 | ret = -EREMOTEIO; |
120 | } | |
121 | return ret; | |
825b9670 AP |
122 | } |
123 | ||
f571e004 AP |
124 | /* write multiple registers */ |
125 | static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val, | |
126 | int len) | |
825b9670 | 127 | { |
f571e004 AP |
128 | int ret, i; |
129 | u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0); | |
130 | ||
938ca36e DC |
131 | if ((priv->config.ts_mode == AF9013_TS_USB) && |
132 | ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) { | |
f571e004 AP |
133 | mbox |= ((len - 1) << 2); |
134 | ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len); | |
135 | } else { | |
136 | for (i = 0; i < len; i++) { | |
137 | ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1); | |
138 | if (ret) | |
139 | goto err; | |
140 | } | |
141 | } | |
142 | ||
143 | err: | |
144 | return 0; | |
145 | } | |
146 | ||
147 | /* read multiple registers */ | |
148 | static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len) | |
149 | { | |
150 | int ret, i; | |
151 | u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0); | |
152 | ||
938ca36e DC |
153 | if ((priv->config.ts_mode == AF9013_TS_USB) && |
154 | ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) { | |
f571e004 AP |
155 | mbox |= ((len - 1) << 2); |
156 | ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len); | |
157 | } else { | |
158 | for (i = 0; i < len; i++) { | |
159 | ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1); | |
160 | if (ret) | |
161 | goto err; | |
162 | } | |
163 | } | |
164 | ||
165 | err: | |
166 | return 0; | |
825b9670 AP |
167 | } |
168 | ||
169 | /* write single register */ | |
f571e004 | 170 | static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val) |
825b9670 | 171 | { |
f571e004 | 172 | return af9013_wr_regs(priv, reg, &val, 1); |
825b9670 AP |
173 | } |
174 | ||
175 | /* read single register */ | |
f571e004 | 176 | static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val) |
825b9670 | 177 | { |
f571e004 AP |
178 | return af9013_rd_regs(priv, reg, val, 1); |
179 | } | |
825b9670 | 180 | |
f571e004 AP |
181 | static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val, |
182 | u8 len) | |
183 | { | |
184 | u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0); | |
185 | return af9013_wr_regs_i2c(state, mbox, reg, val, len); | |
825b9670 AP |
186 | } |
187 | ||
f571e004 AP |
188 | static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos, |
189 | int len, u8 val) | |
825b9670 AP |
190 | { |
191 | int ret; | |
192 | u8 tmp, mask; | |
193 | ||
f571e004 AP |
194 | /* no need for read if whole reg is written */ |
195 | if (len != 8) { | |
196 | ret = af9013_rd_reg(state, reg, &tmp); | |
197 | if (ret) | |
198 | return ret; | |
825b9670 | 199 | |
f571e004 AP |
200 | mask = (0xff >> (8 - len)) << pos; |
201 | val <<= pos; | |
202 | tmp &= ~mask; | |
203 | val |= tmp; | |
204 | } | |
825b9670 | 205 | |
f571e004 | 206 | return af9013_wr_reg(state, reg, val); |
825b9670 AP |
207 | } |
208 | ||
f571e004 AP |
209 | static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos, |
210 | int len, u8 *val) | |
825b9670 AP |
211 | { |
212 | int ret; | |
213 | u8 tmp; | |
214 | ||
f571e004 | 215 | ret = af9013_rd_reg(state, reg, &tmp); |
825b9670 AP |
216 | if (ret) |
217 | return ret; | |
f571e004 AP |
218 | |
219 | *val = (tmp >> pos); | |
220 | *val &= (0xff >> (8 - len)); | |
221 | ||
825b9670 AP |
222 | return 0; |
223 | } | |
224 | ||
225 | static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval) | |
226 | { | |
227 | int ret; | |
228 | u8 pos; | |
229 | u16 addr; | |
825b9670 | 230 | |
8df379c5 AP |
231 | dev_dbg(&state->i2c->dev, "%s: gpio=%d gpioval=%02x\n", |
232 | __func__, gpio, gpioval); | |
f571e004 AP |
233 | |
234 | /* | |
235 | * GPIO0 & GPIO1 0xd735 | |
236 | * GPIO2 & GPIO3 0xd736 | |
237 | */ | |
825b9670 AP |
238 | |
239 | switch (gpio) { | |
240 | case 0: | |
241 | case 1: | |
242 | addr = 0xd735; | |
243 | break; | |
244 | case 2: | |
245 | case 3: | |
246 | addr = 0xd736; | |
247 | break; | |
248 | ||
249 | default: | |
8df379c5 AP |
250 | dev_err(&state->i2c->dev, "%s: invalid gpio=%d\n", |
251 | KBUILD_MODNAME, gpio); | |
825b9670 | 252 | ret = -EINVAL; |
f571e004 | 253 | goto err; |
c2c1b415 | 254 | } |
825b9670 AP |
255 | |
256 | switch (gpio) { | |
257 | case 0: | |
258 | case 2: | |
259 | pos = 0; | |
260 | break; | |
261 | case 1: | |
262 | case 3: | |
263 | default: | |
264 | pos = 4; | |
265 | break; | |
c2c1b415 | 266 | } |
825b9670 | 267 | |
f571e004 AP |
268 | ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval); |
269 | if (ret) | |
270 | goto err; | |
825b9670 | 271 | |
f571e004 AP |
272 | return ret; |
273 | err: | |
8df379c5 | 274 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
825b9670 AP |
275 | return ret; |
276 | } | |
277 | ||
8df379c5 | 278 | static u32 af9013_div(struct af9013_state *state, u32 a, u32 b, u32 x) |
825b9670 AP |
279 | { |
280 | u32 r = 0, c = 0, i; | |
f571e004 | 281 | |
8df379c5 | 282 | dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d\n", __func__, a, b, x); |
825b9670 AP |
283 | |
284 | if (a > b) { | |
285 | c = a / b; | |
286 | a = a - c * b; | |
287 | } | |
288 | ||
289 | for (i = 0; i < x; i++) { | |
290 | if (a >= b) { | |
291 | r += 1; | |
292 | a -= b; | |
293 | } | |
294 | a <<= 1; | |
295 | r <<= 1; | |
296 | } | |
297 | r = (c << (u32)x) + r; | |
298 | ||
8df379c5 AP |
299 | dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d r=%d r=%x\n", |
300 | __func__, a, b, x, r, r); | |
301 | ||
825b9670 AP |
302 | return r; |
303 | } | |
304 | ||
f571e004 | 305 | static int af9013_power_ctrl(struct af9013_state *state, u8 onoff) |
825b9670 | 306 | { |
f571e004 AP |
307 | int ret, i; |
308 | u8 tmp; | |
9b22edd4 | 309 | |
8df379c5 | 310 | dev_dbg(&state->i2c->dev, "%s: onoff=%d\n", __func__, onoff); |
f571e004 AP |
311 | |
312 | /* enable reset */ | |
313 | ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1); | |
314 | if (ret) | |
315 | goto err; | |
316 | ||
317 | /* start reset mechanism */ | |
318 | ret = af9013_wr_reg(state, 0xaeff, 1); | |
319 | if (ret) | |
320 | goto err; | |
321 | ||
322 | /* wait reset performs */ | |
323 | for (i = 0; i < 150; i++) { | |
324 | ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp); | |
325 | if (ret) | |
326 | goto err; | |
327 | ||
328 | if (tmp) | |
329 | break; /* reset done */ | |
330 | ||
331 | usleep_range(5000, 25000); | |
825b9670 AP |
332 | } |
333 | ||
f571e004 AP |
334 | if (!tmp) |
335 | return -ETIMEDOUT; | |
825b9670 | 336 | |
f571e004 AP |
337 | if (onoff) { |
338 | /* clear reset */ | |
339 | ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0); | |
825b9670 | 340 | if (ret) |
f571e004 AP |
341 | goto err; |
342 | ||
343 | /* disable reset */ | |
344 | ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0); | |
345 | ||
346 | /* power on */ | |
347 | ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0); | |
348 | } else { | |
349 | /* power off */ | |
350 | ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1); | |
825b9670 AP |
351 | } |
352 | ||
f571e004 AP |
353 | return ret; |
354 | err: | |
8df379c5 | 355 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
825b9670 AP |
356 | return ret; |
357 | } | |
358 | ||
f571e004 | 359 | static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe) |
825b9670 | 360 | { |
f571e004 | 361 | struct af9013_state *state = fe->demodulator_priv; |
825b9670 | 362 | int ret; |
825b9670 | 363 | |
8df379c5 | 364 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
825b9670 | 365 | |
f571e004 AP |
366 | /* reset and start BER counter */ |
367 | ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1); | |
368 | if (ret) | |
369 | goto err; | |
370 | ||
371 | return ret; | |
372 | err: | |
8df379c5 | 373 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
f571e004 AP |
374 | return ret; |
375 | } | |
376 | ||
377 | static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe) | |
378 | { | |
379 | struct af9013_state *state = fe->demodulator_priv; | |
380 | int ret; | |
381 | u8 buf[5]; | |
382 | ||
8df379c5 | 383 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
f571e004 AP |
384 | |
385 | /* check if error bit count is ready */ | |
386 | ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]); | |
387 | if (ret) | |
388 | goto err; | |
389 | ||
390 | if (!buf[0]) { | |
8df379c5 | 391 | dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__); |
f571e004 AP |
392 | return 0; |
393 | } | |
394 | ||
395 | ret = af9013_rd_regs(state, 0xd387, buf, 5); | |
396 | if (ret) | |
397 | goto err; | |
398 | ||
399 | state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0]; | |
400 | state->ucblocks += (buf[4] << 8) | buf[3]; | |
401 | ||
402 | return ret; | |
403 | err: | |
8df379c5 | 404 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
f571e004 AP |
405 | return ret; |
406 | } | |
407 | ||
408 | static int af9013_statistics_snr_start(struct dvb_frontend *fe) | |
409 | { | |
410 | struct af9013_state *state = fe->demodulator_priv; | |
411 | int ret; | |
412 | ||
8df379c5 | 413 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
f571e004 AP |
414 | |
415 | /* start SNR meas */ | |
416 | ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1); | |
417 | if (ret) | |
418 | goto err; | |
419 | ||
420 | return ret; | |
421 | err: | |
8df379c5 | 422 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
f571e004 AP |
423 | return ret; |
424 | } | |
425 | ||
426 | static int af9013_statistics_snr_result(struct dvb_frontend *fe) | |
427 | { | |
428 | struct af9013_state *state = fe->demodulator_priv; | |
429 | int ret, i, len; | |
430 | u8 buf[3], tmp; | |
431 | u32 snr_val; | |
432 | const struct af9013_snr *uninitialized_var(snr_lut); | |
433 | ||
8df379c5 | 434 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
f571e004 AP |
435 | |
436 | /* check if SNR ready */ | |
437 | ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp); | |
438 | if (ret) | |
439 | goto err; | |
440 | ||
441 | if (!tmp) { | |
8df379c5 | 442 | dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__); |
f571e004 AP |
443 | return 0; |
444 | } | |
445 | ||
446 | /* read value */ | |
447 | ret = af9013_rd_regs(state, 0xd2e3, buf, 3); | |
448 | if (ret) | |
449 | goto err; | |
450 | ||
451 | snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0]; | |
452 | ||
453 | /* read current modulation */ | |
454 | ret = af9013_rd_reg(state, 0xd3c1, &tmp); | |
455 | if (ret) | |
456 | goto err; | |
457 | ||
458 | switch ((tmp >> 6) & 3) { | |
459 | case 0: | |
460 | len = ARRAY_SIZE(qpsk_snr_lut); | |
461 | snr_lut = qpsk_snr_lut; | |
825b9670 | 462 | break; |
f571e004 AP |
463 | case 1: |
464 | len = ARRAY_SIZE(qam16_snr_lut); | |
465 | snr_lut = qam16_snr_lut; | |
825b9670 | 466 | break; |
f571e004 AP |
467 | case 2: |
468 | len = ARRAY_SIZE(qam64_snr_lut); | |
469 | snr_lut = qam64_snr_lut; | |
825b9670 AP |
470 | break; |
471 | default: | |
f571e004 | 472 | goto err; |
825b9670 AP |
473 | } |
474 | ||
f571e004 AP |
475 | for (i = 0; i < len; i++) { |
476 | tmp = snr_lut[i].snr; | |
825b9670 | 477 | |
f571e004 AP |
478 | if (snr_val < snr_lut[i].val) |
479 | break; | |
480 | } | |
481 | state->snr = tmp * 10; /* dB/10 */ | |
825b9670 | 482 | |
f571e004 AP |
483 | return ret; |
484 | err: | |
8df379c5 | 485 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
f571e004 AP |
486 | return ret; |
487 | } | |
825b9670 | 488 | |
f571e004 AP |
489 | static int af9013_statistics_signal_strength(struct dvb_frontend *fe) |
490 | { | |
491 | struct af9013_state *state = fe->demodulator_priv; | |
492 | int ret = 0; | |
493 | u8 buf[2], rf_gain, if_gain; | |
494 | int signal_strength; | |
495 | ||
8df379c5 | 496 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
f571e004 AP |
497 | |
498 | if (!state->signal_strength_en) | |
499 | return 0; | |
500 | ||
501 | ret = af9013_rd_regs(state, 0xd07c, buf, 2); | |
502 | if (ret) | |
503 | goto err; | |
504 | ||
505 | rf_gain = buf[0]; | |
506 | if_gain = buf[1]; | |
507 | ||
508 | signal_strength = (0xffff / \ | |
509 | (9 * (state->rf_50 + state->if_50) - \ | |
510 | 11 * (state->rf_80 + state->if_80))) * \ | |
511 | (10 * (rf_gain + if_gain) - \ | |
512 | 11 * (state->rf_80 + state->if_80)); | |
513 | if (signal_strength < 0) | |
514 | signal_strength = 0; | |
515 | else if (signal_strength > 0xffff) | |
516 | signal_strength = 0xffff; | |
517 | ||
518 | state->signal_strength = signal_strength; | |
519 | ||
520 | return ret; | |
521 | err: | |
8df379c5 | 522 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
825b9670 AP |
523 | return ret; |
524 | } | |
525 | ||
f571e004 | 526 | static void af9013_statistics_work(struct work_struct *work) |
825b9670 | 527 | { |
f571e004 AP |
528 | struct af9013_state *state = container_of(work, |
529 | struct af9013_state, statistics_work.work); | |
530 | unsigned int next_msec; | |
531 | ||
532 | /* update only signal strength when demod is not locked */ | |
533 | if (!(state->fe_status & FE_HAS_LOCK)) { | |
534 | state->statistics_step = 0; | |
535 | state->ber = 0; | |
536 | state->snr = 0; | |
537 | } | |
538 | ||
539 | switch (state->statistics_step) { | |
540 | default: | |
541 | state->statistics_step = 0; | |
542 | case 0: | |
fdf07b02 | 543 | af9013_statistics_signal_strength(&state->fe); |
f571e004 AP |
544 | state->statistics_step++; |
545 | next_msec = 300; | |
546 | break; | |
547 | case 1: | |
fdf07b02 | 548 | af9013_statistics_snr_start(&state->fe); |
f571e004 AP |
549 | state->statistics_step++; |
550 | next_msec = 200; | |
551 | break; | |
552 | case 2: | |
fdf07b02 | 553 | af9013_statistics_ber_unc_start(&state->fe); |
f571e004 AP |
554 | state->statistics_step++; |
555 | next_msec = 1000; | |
556 | break; | |
557 | case 3: | |
fdf07b02 | 558 | af9013_statistics_snr_result(&state->fe); |
f571e004 AP |
559 | state->statistics_step++; |
560 | next_msec = 400; | |
561 | break; | |
562 | case 4: | |
fdf07b02 | 563 | af9013_statistics_ber_unc_result(&state->fe); |
f571e004 AP |
564 | state->statistics_step++; |
565 | next_msec = 100; | |
566 | break; | |
567 | } | |
568 | ||
569 | schedule_delayed_work(&state->statistics_work, | |
570 | msecs_to_jiffies(next_msec)); | |
f571e004 AP |
571 | } |
572 | ||
573 | static int af9013_get_tune_settings(struct dvb_frontend *fe, | |
574 | struct dvb_frontend_tune_settings *fesettings) | |
575 | { | |
576 | fesettings->min_delay_ms = 800; | |
577 | fesettings->step_size = 0; | |
578 | fesettings->max_drift = 0; | |
579 | ||
580 | return 0; | |
581 | } | |
582 | ||
59d3cc19 | 583 | static int af9013_set_frontend(struct dvb_frontend *fe) |
f571e004 AP |
584 | { |
585 | struct af9013_state *state = fe->demodulator_priv; | |
586 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; | |
587 | int ret, i, sampling_freq; | |
588 | bool auto_mode, spec_inv; | |
589 | u8 buf[6]; | |
590 | u32 if_frequency, freq_cw; | |
591 | ||
8df379c5 AP |
592 | dev_dbg(&state->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n", |
593 | __func__, c->frequency, c->bandwidth_hz); | |
f571e004 AP |
594 | |
595 | /* program tuner */ | |
596 | if (fe->ops.tuner_ops.set_params) | |
14d24d14 | 597 | fe->ops.tuner_ops.set_params(fe); |
f571e004 AP |
598 | |
599 | /* program CFOE coefficients */ | |
600 | if (c->bandwidth_hz != state->bandwidth_hz) { | |
601 | for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) { | |
602 | if (coeff_lut[i].clock == state->config.clock && | |
603 | coeff_lut[i].bandwidth_hz == c->bandwidth_hz) { | |
604 | break; | |
605 | } | |
825b9670 AP |
606 | } |
607 | ||
f571e004 AP |
608 | ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val, |
609 | sizeof(coeff_lut[i].val)); | |
610 | } | |
6d42b218 | 611 | |
f571e004 AP |
612 | /* program frequency control */ |
613 | if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) { | |
6d42b218 AP |
614 | /* get used IF frequency */ |
615 | if (fe->ops.tuner_ops.get_if_frequency) | |
f571e004 | 616 | fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency); |
6d42b218 | 617 | else |
f571e004 | 618 | if_frequency = state->config.if_frequency; |
825b9670 | 619 | |
8df379c5 AP |
620 | dev_dbg(&state->i2c->dev, "%s: if_frequency=%d\n", |
621 | __func__, if_frequency); | |
ab2e06ac | 622 | |
f571e004 | 623 | sampling_freq = if_frequency; |
825b9670 | 624 | |
f571e004 AP |
625 | while (sampling_freq > (state->config.clock / 2)) |
626 | sampling_freq -= state->config.clock; | |
825b9670 | 627 | |
f571e004 AP |
628 | if (sampling_freq < 0) { |
629 | sampling_freq *= -1; | |
630 | spec_inv = state->config.spec_inv; | |
631 | } else { | |
632 | spec_inv = !state->config.spec_inv; | |
633 | } | |
825b9670 | 634 | |
8df379c5 AP |
635 | freq_cw = af9013_div(state, sampling_freq, state->config.clock, |
636 | 23); | |
825b9670 | 637 | |
f571e004 AP |
638 | if (spec_inv) |
639 | freq_cw = 0x800000 - freq_cw; | |
825b9670 | 640 | |
f571e004 AP |
641 | buf[0] = (freq_cw >> 0) & 0xff; |
642 | buf[1] = (freq_cw >> 8) & 0xff; | |
643 | buf[2] = (freq_cw >> 16) & 0x7f; | |
825b9670 | 644 | |
f571e004 | 645 | freq_cw = 0x800000 - freq_cw; |
825b9670 | 646 | |
f571e004 AP |
647 | buf[3] = (freq_cw >> 0) & 0xff; |
648 | buf[4] = (freq_cw >> 8) & 0xff; | |
649 | buf[5] = (freq_cw >> 16) & 0x7f; | |
650 | ||
651 | ret = af9013_wr_regs(state, 0xd140, buf, 3); | |
652 | if (ret) | |
653 | goto err; | |
654 | ||
655 | ret = af9013_wr_regs(state, 0x9be7, buf, 6); | |
656 | if (ret) | |
657 | goto err; | |
825b9670 | 658 | } |
825b9670 | 659 | |
f571e004 AP |
660 | /* clear TPS lock flag */ |
661 | ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1); | |
662 | if (ret) | |
663 | goto err; | |
825b9670 | 664 | |
f571e004 AP |
665 | /* clear MPEG2 lock flag */ |
666 | ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0); | |
667 | if (ret) | |
668 | goto err; | |
a2f5a811 | 669 | |
f571e004 AP |
670 | /* empty channel function */ |
671 | ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0); | |
672 | if (ret) | |
673 | goto err; | |
674 | ||
675 | /* empty DVB-T channel function */ | |
676 | ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0); | |
677 | if (ret) | |
678 | goto err; | |
679 | ||
680 | /* transmission parameters */ | |
681 | auto_mode = false; | |
682 | memset(buf, 0, 3); | |
683 | ||
684 | switch (c->transmission_mode) { | |
825b9670 | 685 | case TRANSMISSION_MODE_AUTO: |
6a5e7fde | 686 | auto_mode = true; |
f571e004 | 687 | break; |
825b9670 AP |
688 | case TRANSMISSION_MODE_2K: |
689 | break; | |
690 | case TRANSMISSION_MODE_8K: | |
691 | buf[0] |= (1 << 0); | |
692 | break; | |
693 | default: | |
8df379c5 AP |
694 | dev_dbg(&state->i2c->dev, "%s: invalid transmission_mode\n", |
695 | __func__); | |
6a5e7fde | 696 | auto_mode = true; |
825b9670 AP |
697 | } |
698 | ||
f571e004 | 699 | switch (c->guard_interval) { |
825b9670 | 700 | case GUARD_INTERVAL_AUTO: |
6a5e7fde | 701 | auto_mode = true; |
f571e004 | 702 | break; |
825b9670 AP |
703 | case GUARD_INTERVAL_1_32: |
704 | break; | |
705 | case GUARD_INTERVAL_1_16: | |
706 | buf[0] |= (1 << 2); | |
707 | break; | |
708 | case GUARD_INTERVAL_1_8: | |
709 | buf[0] |= (2 << 2); | |
710 | break; | |
711 | case GUARD_INTERVAL_1_4: | |
712 | buf[0] |= (3 << 2); | |
713 | break; | |
714 | default: | |
8df379c5 AP |
715 | dev_dbg(&state->i2c->dev, "%s: invalid guard_interval\n", |
716 | __func__); | |
6a5e7fde | 717 | auto_mode = true; |
825b9670 AP |
718 | } |
719 | ||
f571e004 | 720 | switch (c->hierarchy) { |
825b9670 | 721 | case HIERARCHY_AUTO: |
6a5e7fde | 722 | auto_mode = true; |
f571e004 | 723 | break; |
825b9670 AP |
724 | case HIERARCHY_NONE: |
725 | break; | |
726 | case HIERARCHY_1: | |
727 | buf[0] |= (1 << 4); | |
728 | break; | |
729 | case HIERARCHY_2: | |
730 | buf[0] |= (2 << 4); | |
731 | break; | |
732 | case HIERARCHY_4: | |
733 | buf[0] |= (3 << 4); | |
734 | break; | |
735 | default: | |
8df379c5 | 736 | dev_dbg(&state->i2c->dev, "%s: invalid hierarchy\n", __func__); |
6a5e7fde | 737 | auto_mode = true; |
c2c1b415 | 738 | } |
825b9670 | 739 | |
f571e004 | 740 | switch (c->modulation) { |
825b9670 | 741 | case QAM_AUTO: |
6a5e7fde | 742 | auto_mode = true; |
f571e004 | 743 | break; |
825b9670 AP |
744 | case QPSK: |
745 | break; | |
746 | case QAM_16: | |
747 | buf[1] |= (1 << 6); | |
748 | break; | |
749 | case QAM_64: | |
750 | buf[1] |= (2 << 6); | |
751 | break; | |
752 | default: | |
8df379c5 | 753 | dev_dbg(&state->i2c->dev, "%s: invalid modulation\n", __func__); |
6a5e7fde | 754 | auto_mode = true; |
825b9670 AP |
755 | } |
756 | ||
757 | /* Use HP. How and which case we can switch to LP? */ | |
758 | buf[1] |= (1 << 4); | |
759 | ||
f571e004 | 760 | switch (c->code_rate_HP) { |
825b9670 | 761 | case FEC_AUTO: |
6a5e7fde | 762 | auto_mode = true; |
f571e004 | 763 | break; |
825b9670 AP |
764 | case FEC_1_2: |
765 | break; | |
766 | case FEC_2_3: | |
767 | buf[2] |= (1 << 0); | |
768 | break; | |
769 | case FEC_3_4: | |
770 | buf[2] |= (2 << 0); | |
771 | break; | |
772 | case FEC_5_6: | |
773 | buf[2] |= (3 << 0); | |
774 | break; | |
775 | case FEC_7_8: | |
776 | buf[2] |= (4 << 0); | |
777 | break; | |
778 | default: | |
8df379c5 AP |
779 | dev_dbg(&state->i2c->dev, "%s: invalid code_rate_HP\n", |
780 | __func__); | |
6a5e7fde | 781 | auto_mode = true; |
825b9670 AP |
782 | } |
783 | ||
f571e004 | 784 | switch (c->code_rate_LP) { |
825b9670 | 785 | case FEC_AUTO: |
6a5e7fde | 786 | auto_mode = true; |
f571e004 | 787 | break; |
825b9670 AP |
788 | case FEC_1_2: |
789 | break; | |
790 | case FEC_2_3: | |
791 | buf[2] |= (1 << 3); | |
792 | break; | |
793 | case FEC_3_4: | |
794 | buf[2] |= (2 << 3); | |
795 | break; | |
796 | case FEC_5_6: | |
797 | buf[2] |= (3 << 3); | |
798 | break; | |
799 | case FEC_7_8: | |
800 | buf[2] |= (4 << 3); | |
801 | break; | |
802 | case FEC_NONE: | |
f571e004 | 803 | break; |
825b9670 | 804 | default: |
8df379c5 AP |
805 | dev_dbg(&state->i2c->dev, "%s: invalid code_rate_LP\n", |
806 | __func__); | |
6a5e7fde | 807 | auto_mode = true; |
825b9670 AP |
808 | } |
809 | ||
f571e004 AP |
810 | switch (c->bandwidth_hz) { |
811 | case 6000000: | |
825b9670 | 812 | break; |
f571e004 | 813 | case 7000000: |
825b9670 AP |
814 | buf[1] |= (1 << 2); |
815 | break; | |
f571e004 | 816 | case 8000000: |
825b9670 AP |
817 | buf[1] |= (2 << 2); |
818 | break; | |
819 | default: | |
8df379c5 AP |
820 | dev_dbg(&state->i2c->dev, "%s: invalid bandwidth_hz\n", |
821 | __func__); | |
f571e004 AP |
822 | ret = -EINVAL; |
823 | goto err; | |
825b9670 AP |
824 | } |
825 | ||
f571e004 | 826 | ret = af9013_wr_regs(state, 0xd3c0, buf, 3); |
825b9670 | 827 | if (ret) |
f571e004 | 828 | goto err; |
825b9670 | 829 | |
f571e004 AP |
830 | if (auto_mode) { |
831 | /* clear easy mode flag */ | |
832 | ret = af9013_wr_reg(state, 0xaefd, 0); | |
825b9670 | 833 | if (ret) |
f571e004 | 834 | goto err; |
825b9670 | 835 | |
8df379c5 | 836 | dev_dbg(&state->i2c->dev, "%s: auto params\n", __func__); |
825b9670 | 837 | } else { |
f571e004 AP |
838 | /* set easy mode flag */ |
839 | ret = af9013_wr_reg(state, 0xaefd, 1); | |
825b9670 | 840 | if (ret) |
f571e004 | 841 | goto err; |
825b9670 | 842 | |
f571e004 | 843 | ret = af9013_wr_reg(state, 0xaefe, 0); |
825b9670 | 844 | if (ret) |
f571e004 AP |
845 | goto err; |
846 | ||
8df379c5 | 847 | dev_dbg(&state->i2c->dev, "%s: manual params\n", __func__); |
825b9670 | 848 | } |
825b9670 | 849 | |
f571e004 AP |
850 | /* tune */ |
851 | ret = af9013_wr_reg(state, 0xffff, 0); | |
825b9670 | 852 | if (ret) |
f571e004 AP |
853 | goto err; |
854 | ||
855 | state->bandwidth_hz = c->bandwidth_hz; | |
856 | state->set_frontend_jiffies = jiffies; | |
857 | state->first_tune = false; | |
825b9670 | 858 | |
f571e004 AP |
859 | return ret; |
860 | err: | |
8df379c5 | 861 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
825b9670 AP |
862 | return ret; |
863 | } | |
864 | ||
7c61d80a | 865 | static int af9013_get_frontend(struct dvb_frontend *fe) |
825b9670 | 866 | { |
7c61d80a | 867 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
825b9670 AP |
868 | struct af9013_state *state = fe->demodulator_priv; |
869 | int ret; | |
f571e004 | 870 | u8 buf[3]; |
825b9670 | 871 | |
8df379c5 | 872 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
f571e004 AP |
873 | |
874 | ret = af9013_rd_regs(state, 0xd3c0, buf, 3); | |
875 | if (ret) | |
876 | goto err; | |
825b9670 AP |
877 | |
878 | switch ((buf[1] >> 6) & 3) { | |
879 | case 0: | |
f571e004 | 880 | c->modulation = QPSK; |
825b9670 AP |
881 | break; |
882 | case 1: | |
f571e004 | 883 | c->modulation = QAM_16; |
825b9670 AP |
884 | break; |
885 | case 2: | |
f571e004 | 886 | c->modulation = QAM_64; |
825b9670 AP |
887 | break; |
888 | } | |
889 | ||
890 | switch ((buf[0] >> 0) & 3) { | |
891 | case 0: | |
f571e004 | 892 | c->transmission_mode = TRANSMISSION_MODE_2K; |
825b9670 AP |
893 | break; |
894 | case 1: | |
f571e004 | 895 | c->transmission_mode = TRANSMISSION_MODE_8K; |
825b9670 AP |
896 | } |
897 | ||
898 | switch ((buf[0] >> 2) & 3) { | |
899 | case 0: | |
6a2329ad | 900 | c->guard_interval = GUARD_INTERVAL_1_32; |
825b9670 AP |
901 | break; |
902 | case 1: | |
6a2329ad | 903 | c->guard_interval = GUARD_INTERVAL_1_16; |
825b9670 AP |
904 | break; |
905 | case 2: | |
6a2329ad | 906 | c->guard_interval = GUARD_INTERVAL_1_8; |
825b9670 AP |
907 | break; |
908 | case 3: | |
6a2329ad | 909 | c->guard_interval = GUARD_INTERVAL_1_4; |
825b9670 AP |
910 | break; |
911 | } | |
912 | ||
913 | switch ((buf[0] >> 4) & 7) { | |
914 | case 0: | |
f571e004 | 915 | c->hierarchy = HIERARCHY_NONE; |
825b9670 AP |
916 | break; |
917 | case 1: | |
f571e004 | 918 | c->hierarchy = HIERARCHY_1; |
825b9670 AP |
919 | break; |
920 | case 2: | |
f571e004 | 921 | c->hierarchy = HIERARCHY_2; |
825b9670 AP |
922 | break; |
923 | case 3: | |
f571e004 | 924 | c->hierarchy = HIERARCHY_4; |
825b9670 AP |
925 | break; |
926 | } | |
927 | ||
928 | switch ((buf[2] >> 0) & 7) { | |
929 | case 0: | |
f571e004 | 930 | c->code_rate_HP = FEC_1_2; |
825b9670 AP |
931 | break; |
932 | case 1: | |
f571e004 AP |
933 | c->code_rate_HP = FEC_2_3; |
934 | break; | |
935 | case 2: | |
936 | c->code_rate_HP = FEC_3_4; | |
937 | break; | |
938 | case 3: | |
939 | c->code_rate_HP = FEC_5_6; | |
940 | break; | |
941 | case 4: | |
942 | c->code_rate_HP = FEC_7_8; | |
943 | break; | |
825b9670 AP |
944 | } |
945 | ||
f571e004 AP |
946 | switch ((buf[2] >> 3) & 7) { |
947 | case 0: | |
948 | c->code_rate_LP = FEC_1_2; | |
949 | break; | |
950 | case 1: | |
951 | c->code_rate_LP = FEC_2_3; | |
952 | break; | |
953 | case 2: | |
954 | c->code_rate_LP = FEC_3_4; | |
955 | break; | |
956 | case 3: | |
957 | c->code_rate_LP = FEC_5_6; | |
958 | break; | |
959 | case 4: | |
960 | c->code_rate_LP = FEC_7_8; | |
961 | break; | |
962 | } | |
825b9670 | 963 | |
f571e004 AP |
964 | switch ((buf[1] >> 2) & 3) { |
965 | case 0: | |
966 | c->bandwidth_hz = 6000000; | |
967 | break; | |
968 | case 1: | |
969 | c->bandwidth_hz = 7000000; | |
970 | break; | |
971 | case 2: | |
972 | c->bandwidth_hz = 8000000; | |
973 | break; | |
825b9670 AP |
974 | } |
975 | ||
825b9670 | 976 | return ret; |
f571e004 | 977 | err: |
8df379c5 | 978 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
825b9670 AP |
979 | return ret; |
980 | } | |
981 | ||
825b9670 AP |
982 | static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status) |
983 | { | |
984 | struct af9013_state *state = fe->demodulator_priv; | |
f571e004 | 985 | int ret; |
825b9670 | 986 | u8 tmp; |
f571e004 AP |
987 | |
988 | /* | |
989 | * Return status from the cache if it is younger than 2000ms with the | |
990 | * exception of last tune is done during 4000ms. | |
991 | */ | |
992 | if (time_is_after_jiffies( | |
993 | state->read_status_jiffies + msecs_to_jiffies(2000)) && | |
994 | time_is_before_jiffies( | |
995 | state->set_frontend_jiffies + msecs_to_jiffies(4000)) | |
996 | ) { | |
997 | *status = state->fe_status; | |
998 | return 0; | |
999 | } else { | |
1000 | *status = 0; | |
1001 | } | |
825b9670 | 1002 | |
825b9670 | 1003 | /* MPEG2 lock */ |
f571e004 | 1004 | ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp); |
825b9670 | 1005 | if (ret) |
f571e004 AP |
1006 | goto err; |
1007 | ||
825b9670 | 1008 | if (tmp) |
8af5e381 AP |
1009 | *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | |
1010 | FE_HAS_SYNC | FE_HAS_LOCK; | |
825b9670 | 1011 | |
8af5e381 AP |
1012 | if (!*status) { |
1013 | /* TPS lock */ | |
f571e004 | 1014 | ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp); |
825b9670 | 1015 | if (ret) |
f571e004 AP |
1016 | goto err; |
1017 | ||
825b9670 | 1018 | if (tmp) |
8af5e381 AP |
1019 | *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | |
1020 | FE_HAS_VITERBI; | |
825b9670 AP |
1021 | } |
1022 | ||
f571e004 AP |
1023 | state->fe_status = *status; |
1024 | state->read_status_jiffies = jiffies; | |
825b9670 | 1025 | |
f571e004 AP |
1026 | return ret; |
1027 | err: | |
8df379c5 | 1028 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
825b9670 AP |
1029 | return ret; |
1030 | } | |
1031 | ||
f571e004 | 1032 | static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr) |
825b9670 AP |
1033 | { |
1034 | struct af9013_state *state = fe->demodulator_priv; | |
f571e004 AP |
1035 | *snr = state->snr; |
1036 | return 0; | |
825b9670 AP |
1037 | } |
1038 | ||
1039 | static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength) | |
1040 | { | |
1041 | struct af9013_state *state = fe->demodulator_priv; | |
825b9670 | 1042 | *strength = state->signal_strength; |
f571e004 | 1043 | return 0; |
825b9670 AP |
1044 | } |
1045 | ||
f571e004 | 1046 | static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber) |
825b9670 AP |
1047 | { |
1048 | struct af9013_state *state = fe->demodulator_priv; | |
f571e004 AP |
1049 | *ber = state->ber; |
1050 | return 0; | |
825b9670 AP |
1051 | } |
1052 | ||
1053 | static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) | |
1054 | { | |
1055 | struct af9013_state *state = fe->demodulator_priv; | |
825b9670 | 1056 | *ucblocks = state->ucblocks; |
f571e004 | 1057 | return 0; |
825b9670 AP |
1058 | } |
1059 | ||
1060 | static int af9013_init(struct dvb_frontend *fe) | |
1061 | { | |
1062 | struct af9013_state *state = fe->demodulator_priv; | |
1063 | int ret, i, len; | |
f571e004 AP |
1064 | u8 buf[3], tmp; |
1065 | u32 adc_cw; | |
1066 | const struct af9013_reg_bit *init; | |
825b9670 | 1067 | |
8df379c5 | 1068 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
825b9670 AP |
1069 | |
1070 | /* power on */ | |
1071 | ret = af9013_power_ctrl(state, 1); | |
1072 | if (ret) | |
f571e004 | 1073 | goto err; |
825b9670 AP |
1074 | |
1075 | /* enable ADC */ | |
f571e004 | 1076 | ret = af9013_wr_reg(state, 0xd73a, 0xa4); |
825b9670 | 1077 | if (ret) |
f571e004 | 1078 | goto err; |
825b9670 AP |
1079 | |
1080 | /* write API version to firmware */ | |
f571e004 AP |
1081 | ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4); |
1082 | if (ret) | |
1083 | goto err; | |
825b9670 AP |
1084 | |
1085 | /* program ADC control */ | |
f571e004 AP |
1086 | switch (state->config.clock) { |
1087 | case 28800000: /* 28.800 MHz */ | |
1088 | tmp = 0; | |
1089 | break; | |
1090 | case 20480000: /* 20.480 MHz */ | |
1091 | tmp = 1; | |
1092 | break; | |
1093 | case 28000000: /* 28.000 MHz */ | |
1094 | tmp = 2; | |
1095 | break; | |
1096 | case 25000000: /* 25.000 MHz */ | |
1097 | tmp = 3; | |
1098 | break; | |
1099 | default: | |
8df379c5 AP |
1100 | dev_err(&state->i2c->dev, "%s: invalid clock\n", |
1101 | KBUILD_MODNAME); | |
f571e004 AP |
1102 | return -EINVAL; |
1103 | } | |
1104 | ||
8df379c5 | 1105 | adc_cw = af9013_div(state, state->config.clock, 1000000ul, 19); |
f571e004 AP |
1106 | buf[0] = (adc_cw >> 0) & 0xff; |
1107 | buf[1] = (adc_cw >> 8) & 0xff; | |
1108 | buf[2] = (adc_cw >> 16) & 0xff; | |
1109 | ||
1110 | ret = af9013_wr_regs(state, 0xd180, buf, 3); | |
1111 | if (ret) | |
1112 | goto err; | |
1113 | ||
1114 | ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp); | |
825b9670 | 1115 | if (ret) |
f571e004 | 1116 | goto err; |
825b9670 AP |
1117 | |
1118 | /* set I2C master clock */ | |
f571e004 | 1119 | ret = af9013_wr_reg(state, 0xd416, 0x14); |
825b9670 | 1120 | if (ret) |
f571e004 | 1121 | goto err; |
825b9670 AP |
1122 | |
1123 | /* set 16 embx */ | |
f571e004 | 1124 | ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1); |
825b9670 | 1125 | if (ret) |
f571e004 | 1126 | goto err; |
825b9670 AP |
1127 | |
1128 | /* set no trigger */ | |
f571e004 | 1129 | ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0); |
825b9670 | 1130 | if (ret) |
f571e004 | 1131 | goto err; |
825b9670 AP |
1132 | |
1133 | /* set read-update bit for constellation */ | |
f571e004 | 1134 | ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1); |
825b9670 | 1135 | if (ret) |
f571e004 | 1136 | goto err; |
825b9670 | 1137 | |
f571e004 AP |
1138 | /* settings for mp2if */ |
1139 | if (state->config.ts_mode == AF9013_TS_USB) { | |
1140 | /* AF9015 split PSB to 1.5k + 0.5k */ | |
1141 | ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1); | |
1142 | if (ret) | |
1143 | goto err; | |
1144 | } else { | |
1145 | /* AF9013 change the output bit to data7 */ | |
1146 | ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1); | |
1147 | if (ret) | |
1148 | goto err; | |
1149 | ||
1150 | /* AF9013 set mpeg to full speed */ | |
1151 | ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1); | |
1152 | if (ret) | |
1153 | goto err; | |
1154 | } | |
1155 | ||
1156 | ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1); | |
825b9670 | 1157 | if (ret) |
f571e004 | 1158 | goto err; |
825b9670 AP |
1159 | |
1160 | /* load OFSM settings */ | |
8df379c5 | 1161 | dev_dbg(&state->i2c->dev, "%s: load ofsm settings\n", __func__); |
825b9670 AP |
1162 | len = ARRAY_SIZE(ofsm_init); |
1163 | init = ofsm_init; | |
1164 | for (i = 0; i < len; i++) { | |
f571e004 | 1165 | ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos, |
825b9670 AP |
1166 | init[i].len, init[i].val); |
1167 | if (ret) | |
f571e004 | 1168 | goto err; |
825b9670 AP |
1169 | } |
1170 | ||
1171 | /* load tuner specific settings */ | |
8df379c5 AP |
1172 | dev_dbg(&state->i2c->dev, "%s: load tuner specific settings\n", |
1173 | __func__); | |
825b9670 AP |
1174 | switch (state->config.tuner) { |
1175 | case AF9013_TUNER_MXL5003D: | |
1176 | len = ARRAY_SIZE(tuner_init_mxl5003d); | |
1177 | init = tuner_init_mxl5003d; | |
1178 | break; | |
1179 | case AF9013_TUNER_MXL5005D: | |
1180 | case AF9013_TUNER_MXL5005R: | |
a4f31d0d | 1181 | case AF9013_TUNER_MXL5007T: |
825b9670 AP |
1182 | len = ARRAY_SIZE(tuner_init_mxl5005); |
1183 | init = tuner_init_mxl5005; | |
1184 | break; | |
1185 | case AF9013_TUNER_ENV77H11D5: | |
1186 | len = ARRAY_SIZE(tuner_init_env77h11d5); | |
1187 | init = tuner_init_env77h11d5; | |
1188 | break; | |
1189 | case AF9013_TUNER_MT2060: | |
1190 | len = ARRAY_SIZE(tuner_init_mt2060); | |
1191 | init = tuner_init_mt2060; | |
1192 | break; | |
1193 | case AF9013_TUNER_MC44S803: | |
1194 | len = ARRAY_SIZE(tuner_init_mc44s803); | |
1195 | init = tuner_init_mc44s803; | |
1196 | break; | |
1197 | case AF9013_TUNER_QT1010: | |
1198 | case AF9013_TUNER_QT1010A: | |
1199 | len = ARRAY_SIZE(tuner_init_qt1010); | |
1200 | init = tuner_init_qt1010; | |
1201 | break; | |
1202 | case AF9013_TUNER_MT2060_2: | |
1203 | len = ARRAY_SIZE(tuner_init_mt2060_2); | |
1204 | init = tuner_init_mt2060_2; | |
1205 | break; | |
1206 | case AF9013_TUNER_TDA18271: | |
2158e509 | 1207 | case AF9013_TUNER_TDA18218: |
825b9670 AP |
1208 | len = ARRAY_SIZE(tuner_init_tda18271); |
1209 | init = tuner_init_tda18271; | |
1210 | break; | |
1211 | case AF9013_TUNER_UNKNOWN: | |
1212 | default: | |
1213 | len = ARRAY_SIZE(tuner_init_unknown); | |
1214 | init = tuner_init_unknown; | |
1215 | break; | |
1216 | } | |
1217 | ||
1218 | for (i = 0; i < len; i++) { | |
f571e004 | 1219 | ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos, |
825b9670 AP |
1220 | init[i].len, init[i].val); |
1221 | if (ret) | |
f571e004 | 1222 | goto err; |
825b9670 AP |
1223 | } |
1224 | ||
f571e004 AP |
1225 | /* TS mode */ |
1226 | ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode); | |
825b9670 | 1227 | if (ret) |
f571e004 | 1228 | goto err; |
825b9670 AP |
1229 | |
1230 | /* enable lock led */ | |
f571e004 | 1231 | ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1); |
825b9670 | 1232 | if (ret) |
f571e004 | 1233 | goto err; |
825b9670 | 1234 | |
f571e004 AP |
1235 | /* check if we support signal strength */ |
1236 | if (!state->signal_strength_en) { | |
1237 | ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1, | |
1238 | &state->signal_strength_en); | |
1239 | if (ret) | |
1240 | goto err; | |
1241 | } | |
9e35cd22 | 1242 | |
f571e004 AP |
1243 | /* read values needed for signal strength calculation */ |
1244 | if (state->signal_strength_en && !state->rf_50) { | |
1245 | ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50); | |
9e35cd22 | 1246 | if (ret) |
f571e004 AP |
1247 | goto err; |
1248 | ||
1249 | ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80); | |
9e35cd22 | 1250 | if (ret) |
f571e004 AP |
1251 | goto err; |
1252 | ||
1253 | ret = af9013_rd_reg(state, 0x9be2, &state->if_50); | |
9e35cd22 | 1254 | if (ret) |
f571e004 AP |
1255 | goto err; |
1256 | ||
1257 | ret = af9013_rd_reg(state, 0x9be4, &state->if_80); | |
9e35cd22 | 1258 | if (ret) |
f571e004 | 1259 | goto err; |
9e35cd22 AP |
1260 | } |
1261 | ||
f571e004 AP |
1262 | /* SNR */ |
1263 | ret = af9013_wr_reg(state, 0xd2e2, 1); | |
1264 | if (ret) | |
1265 | goto err; | |
1266 | ||
1267 | /* BER / UCB */ | |
1268 | buf[0] = (10000 >> 0) & 0xff; | |
1269 | buf[1] = (10000 >> 8) & 0xff; | |
1270 | ret = af9013_wr_regs(state, 0xd385, buf, 2); | |
1271 | if (ret) | |
1272 | goto err; | |
1273 | ||
1274 | /* enable FEC monitor */ | |
1275 | ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1); | |
1276 | if (ret) | |
1277 | goto err; | |
1278 | ||
1279 | state->first_tune = true; | |
1280 | schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400)); | |
1281 | ||
1282 | return ret; | |
1283 | err: | |
8df379c5 | 1284 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
f571e004 AP |
1285 | return ret; |
1286 | } | |
1287 | ||
1288 | static int af9013_sleep(struct dvb_frontend *fe) | |
1289 | { | |
1290 | struct af9013_state *state = fe->demodulator_priv; | |
1291 | int ret; | |
1292 | ||
8df379c5 | 1293 | dev_dbg(&state->i2c->dev, "%s:\n", __func__); |
f571e004 AP |
1294 | |
1295 | /* stop statistics polling */ | |
1296 | cancel_delayed_work_sync(&state->statistics_work); | |
1297 | ||
1298 | /* disable lock led */ | |
1299 | ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0); | |
1300 | if (ret) | |
1301 | goto err; | |
1302 | ||
1303 | /* power off */ | |
1304 | ret = af9013_power_ctrl(state, 0); | |
1305 | if (ret) | |
1306 | goto err; | |
1307 | ||
1308 | return ret; | |
1309 | err: | |
8df379c5 | 1310 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
f571e004 AP |
1311 | return ret; |
1312 | } | |
1313 | ||
1314 | static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) | |
1315 | { | |
1316 | int ret; | |
1317 | struct af9013_state *state = fe->demodulator_priv; | |
1318 | ||
8df379c5 | 1319 | dev_dbg(&state->i2c->dev, "%s: enable=%d\n", __func__, enable); |
f571e004 AP |
1320 | |
1321 | /* gate already open or close */ | |
1322 | if (state->i2c_gate_state == enable) | |
1323 | return 0; | |
1324 | ||
1325 | if (state->config.ts_mode == AF9013_TS_USB) | |
1326 | ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable); | |
1327 | else | |
1328 | ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable); | |
1329 | if (ret) | |
1330 | goto err; | |
1331 | ||
1332 | state->i2c_gate_state = enable; | |
1333 | ||
1334 | return ret; | |
1335 | err: | |
8df379c5 | 1336 | dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); |
825b9670 AP |
1337 | return ret; |
1338 | } | |
1339 | ||
f571e004 AP |
1340 | static void af9013_release(struct dvb_frontend *fe) |
1341 | { | |
1342 | struct af9013_state *state = fe->demodulator_priv; | |
1343 | kfree(state); | |
1344 | } | |
1345 | ||
825b9670 AP |
1346 | static struct dvb_frontend_ops af9013_ops; |
1347 | ||
1348 | static int af9013_download_firmware(struct af9013_state *state) | |
1349 | { | |
6ed9d560 | 1350 | int i, len, remaining, ret; |
825b9670 | 1351 | const struct firmware *fw; |
825b9670 AP |
1352 | u16 checksum = 0; |
1353 | u8 val; | |
1354 | u8 fw_params[4]; | |
a71103a6 | 1355 | u8 *fw_file = AF9013_FIRMWARE; |
825b9670 AP |
1356 | |
1357 | msleep(100); | |
1358 | /* check whether firmware is already running */ | |
f571e004 | 1359 | ret = af9013_rd_reg(state, 0x98be, &val); |
825b9670 | 1360 | if (ret) |
f571e004 | 1361 | goto err; |
825b9670 | 1362 | else |
8df379c5 AP |
1363 | dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n", |
1364 | __func__, val); | |
825b9670 AP |
1365 | |
1366 | if (val == 0x0c) /* fw is running, no need for download */ | |
1367 | goto exit; | |
1368 | ||
8df379c5 AP |
1369 | dev_info(&state->i2c->dev, "%s: found a '%s' in cold state, will try " \ |
1370 | "to load a firmware\n", | |
1371 | KBUILD_MODNAME, af9013_ops.info.name); | |
825b9670 AP |
1372 | |
1373 | /* request the firmware, this will block and timeout */ | |
e9785250 | 1374 | ret = request_firmware(&fw, fw_file, state->i2c->dev.parent); |
825b9670 | 1375 | if (ret) { |
8df379c5 AP |
1376 | dev_info(&state->i2c->dev, "%s: did not find the firmware " \ |
1377 | "file. (%s) Please see linux/Documentation/dvb/ for " \ | |
1378 | "more details on firmware-problems. (%d)\n", | |
1379 | KBUILD_MODNAME, fw_file, ret); | |
f571e004 | 1380 | goto err; |
825b9670 AP |
1381 | } |
1382 | ||
8df379c5 AP |
1383 | dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s'\n", |
1384 | KBUILD_MODNAME, fw_file); | |
825b9670 AP |
1385 | |
1386 | /* calc checksum */ | |
1387 | for (i = 0; i < fw->size; i++) | |
1388 | checksum += fw->data[i]; | |
1389 | ||
1390 | fw_params[0] = checksum >> 8; | |
1391 | fw_params[1] = checksum & 0xff; | |
1392 | fw_params[2] = fw->size >> 8; | |
1393 | fw_params[3] = fw->size & 0xff; | |
1394 | ||
1395 | /* write fw checksum & size */ | |
1396 | ret = af9013_write_ofsm_regs(state, 0x50fc, | |
1397 | fw_params, sizeof(fw_params)); | |
1398 | if (ret) | |
f571e004 | 1399 | goto err_release; |
825b9670 | 1400 | |
6ed9d560 AP |
1401 | #define FW_ADDR 0x5100 /* firmware start address */ |
1402 | #define LEN_MAX 16 /* max packet size */ | |
1403 | for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) { | |
1404 | len = remaining; | |
1405 | if (len > LEN_MAX) | |
1406 | len = LEN_MAX; | |
825b9670 | 1407 | |
6ed9d560 AP |
1408 | ret = af9013_write_ofsm_regs(state, |
1409 | FW_ADDR + fw->size - remaining, | |
1410 | (u8 *) &fw->data[fw->size - remaining], len); | |
825b9670 | 1411 | if (ret) { |
8df379c5 AP |
1412 | dev_err(&state->i2c->dev, |
1413 | "%s: firmware download failed=%d\n", | |
1414 | KBUILD_MODNAME, ret); | |
f571e004 | 1415 | goto err_release; |
825b9670 AP |
1416 | } |
1417 | } | |
1418 | ||
825b9670 | 1419 | /* request boot firmware */ |
f571e004 | 1420 | ret = af9013_wr_reg(state, 0xe205, 1); |
825b9670 | 1421 | if (ret) |
f571e004 | 1422 | goto err_release; |
825b9670 AP |
1423 | |
1424 | for (i = 0; i < 15; i++) { | |
1425 | msleep(100); | |
1426 | ||
1427 | /* check firmware status */ | |
f571e004 | 1428 | ret = af9013_rd_reg(state, 0x98be, &val); |
825b9670 | 1429 | if (ret) |
f571e004 | 1430 | goto err_release; |
825b9670 | 1431 | |
8df379c5 AP |
1432 | dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n", |
1433 | __func__, val); | |
825b9670 AP |
1434 | |
1435 | if (val == 0x0c || val == 0x04) /* success or fail */ | |
1436 | break; | |
1437 | } | |
1438 | ||
1439 | if (val == 0x04) { | |
8df379c5 AP |
1440 | dev_err(&state->i2c->dev, "%s: firmware did not run\n", |
1441 | KBUILD_MODNAME); | |
f571e004 | 1442 | ret = -ENODEV; |
825b9670 | 1443 | } else if (val != 0x0c) { |
8df379c5 AP |
1444 | dev_err(&state->i2c->dev, "%s: firmware boot timeout\n", |
1445 | KBUILD_MODNAME); | |
f571e004 | 1446 | ret = -ENODEV; |
825b9670 AP |
1447 | } |
1448 | ||
f571e004 | 1449 | err_release: |
825b9670 | 1450 | release_firmware(fw); |
f571e004 | 1451 | err: |
825b9670 AP |
1452 | exit: |
1453 | if (!ret) | |
8df379c5 AP |
1454 | dev_info(&state->i2c->dev, "%s: found a '%s' in warm state\n", |
1455 | KBUILD_MODNAME, af9013_ops.info.name); | |
825b9670 AP |
1456 | return ret; |
1457 | } | |
1458 | ||
825b9670 AP |
1459 | struct dvb_frontend *af9013_attach(const struct af9013_config *config, |
1460 | struct i2c_adapter *i2c) | |
1461 | { | |
1462 | int ret; | |
1463 | struct af9013_state *state = NULL; | |
ce99efa5 | 1464 | u8 buf[4], i; |
825b9670 AP |
1465 | |
1466 | /* allocate memory for the internal state */ | |
1467 | state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL); | |
1468 | if (state == NULL) | |
f571e004 | 1469 | goto err; |
825b9670 AP |
1470 | |
1471 | /* setup the state */ | |
1472 | state->i2c = i2c; | |
1473 | memcpy(&state->config, config, sizeof(struct af9013_config)); | |
1474 | ||
825b9670 | 1475 | /* download firmware */ |
f571e004 | 1476 | if (state->config.ts_mode != AF9013_TS_USB) { |
825b9670 AP |
1477 | ret = af9013_download_firmware(state); |
1478 | if (ret) | |
f571e004 | 1479 | goto err; |
825b9670 AP |
1480 | } |
1481 | ||
1482 | /* firmware version */ | |
f571e004 | 1483 | ret = af9013_rd_regs(state, 0x5103, buf, 4); |
109a2990 | 1484 | if (ret) |
f571e004 | 1485 | goto err; |
109a2990 | 1486 | |
8df379c5 AP |
1487 | dev_info(&state->i2c->dev, "%s: firmware version %d.%d.%d.%d\n", |
1488 | KBUILD_MODNAME, buf[0], buf[1], buf[2], buf[3]); | |
825b9670 AP |
1489 | |
1490 | /* set GPIOs */ | |
1491 | for (i = 0; i < sizeof(state->config.gpio); i++) { | |
1492 | ret = af9013_set_gpio(state, i, state->config.gpio[i]); | |
1493 | if (ret) | |
f571e004 | 1494 | goto err; |
825b9670 AP |
1495 | } |
1496 | ||
1497 | /* create dvb_frontend */ | |
f571e004 | 1498 | memcpy(&state->fe.ops, &af9013_ops, |
825b9670 | 1499 | sizeof(struct dvb_frontend_ops)); |
f571e004 AP |
1500 | state->fe.demodulator_priv = state; |
1501 | ||
1502 | INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work); | |
825b9670 | 1503 | |
f571e004 AP |
1504 | return &state->fe; |
1505 | err: | |
825b9670 AP |
1506 | kfree(state); |
1507 | return NULL; | |
1508 | } | |
1509 | EXPORT_SYMBOL(af9013_attach); | |
1510 | ||
1511 | static struct dvb_frontend_ops af9013_ops = { | |
59d3cc19 | 1512 | .delsys = { SYS_DVBT }, |
825b9670 | 1513 | .info = { |
f571e004 | 1514 | .name = "Afatech AF9013", |
825b9670 AP |
1515 | .frequency_min = 174000000, |
1516 | .frequency_max = 862000000, | |
1517 | .frequency_stepsize = 250000, | |
1518 | .frequency_tolerance = 0, | |
f571e004 AP |
1519 | .caps = FE_CAN_FEC_1_2 | |
1520 | FE_CAN_FEC_2_3 | | |
1521 | FE_CAN_FEC_3_4 | | |
1522 | FE_CAN_FEC_5_6 | | |
1523 | FE_CAN_FEC_7_8 | | |
1524 | FE_CAN_FEC_AUTO | | |
1525 | FE_CAN_QPSK | | |
1526 | FE_CAN_QAM_16 | | |
1527 | FE_CAN_QAM_64 | | |
1528 | FE_CAN_QAM_AUTO | | |
825b9670 AP |
1529 | FE_CAN_TRANSMISSION_MODE_AUTO | |
1530 | FE_CAN_GUARD_INTERVAL_AUTO | | |
1531 | FE_CAN_HIERARCHY_AUTO | | |
1532 | FE_CAN_RECOVER | | |
1533 | FE_CAN_MUTE_TS | |
1534 | }, | |
1535 | ||
1536 | .release = af9013_release, | |
f571e004 | 1537 | |
825b9670 AP |
1538 | .init = af9013_init, |
1539 | .sleep = af9013_sleep, | |
825b9670 | 1540 | |
f571e004 | 1541 | .get_tune_settings = af9013_get_tune_settings, |
59d3cc19 MCC |
1542 | .set_frontend = af9013_set_frontend, |
1543 | .get_frontend = af9013_get_frontend, | |
825b9670 | 1544 | |
825b9670 | 1545 | .read_status = af9013_read_status, |
825b9670 | 1546 | .read_snr = af9013_read_snr, |
f571e004 AP |
1547 | .read_signal_strength = af9013_read_signal_strength, |
1548 | .read_ber = af9013_read_ber, | |
825b9670 | 1549 | .read_ucblocks = af9013_read_ucblocks, |
825b9670 | 1550 | |
f571e004 AP |
1551 | .i2c_gate_ctrl = af9013_i2c_gate_ctrl, |
1552 | }; | |
825b9670 AP |
1553 | |
1554 | MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); | |
1555 | MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver"); | |
1556 | MODULE_LICENSE("GPL"); | |
a71103a6 | 1557 | MODULE_FIRMWARE(AF9013_FIRMWARE); |