Merge tag 'topic/drm-fixes-2015-07-16' of git://anongit.freedesktop.org/drm-intel...
[deliverable/linux.git] / drivers / media / i2c / saa6588.c
CommitLineData
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MCC
1/*
2 Driver for SAA6588 RDS decoder
3
4 (c) 2005 Hans J. Koch
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/i2c.h>
25#include <linux/types.h>
7f6adeaf 26#include <linux/videodev2.h>
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MCC
27#include <linux/init.h>
28#include <linux/errno.h>
29#include <linux/slab.h>
30#include <linux/poll.h>
31#include <linux/wait.h>
32#include <asm/uaccess.h>
33
b9218f2f 34#include <media/saa6588.h>
c3fda7f8 35#include <media/v4l2-device.h>
10b89ee3 36
10b89ee3
MCC
37
38/* insmod options */
ff699e6b
DSL
39static unsigned int debug;
40static unsigned int xtal;
3c86cf7a 41static unsigned int mmbs;
ff699e6b 42static unsigned int plvl;
10b89ee3
MCC
43static unsigned int bufblocks = 100;
44
9b565eb7 45module_param(debug, int, 0644);
10b89ee3 46MODULE_PARM_DESC(debug, "enable debug messages");
9b565eb7 47module_param(xtal, int, 0);
10b89ee3 48MODULE_PARM_DESC(xtal, "select oscillator frequency (0..3), default 0");
3c86cf7a
HV
49module_param(mmbs, int, 0);
50MODULE_PARM_DESC(mmbs, "enable MMBS mode: 0=off (default), 1=on");
9b565eb7 51module_param(plvl, int, 0);
10b89ee3 52MODULE_PARM_DESC(plvl, "select pause level (0..3), default 0");
9b565eb7 53module_param(bufblocks, int, 0);
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MCC
54MODULE_PARM_DESC(bufblocks, "number of buffered blocks, default 100");
55
56MODULE_DESCRIPTION("v4l2 driver module for SAA6588 RDS decoder");
57MODULE_AUTHOR("Hans J. Koch <koch@hjk-az.de>");
58
59MODULE_LICENSE("GPL");
60
61/* ---------------------------------------------------------------------- */
62
63#define UNSET (-1U)
64#define PREFIX "saa6588: "
65#define dprintk if (debug) printk
66
67struct saa6588 {
c3fda7f8 68 struct v4l2_subdev sd;
fb6991d4 69 struct delayed_work work;
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70 spinlock_t lock;
71 unsigned char *buffer;
72 unsigned int buf_size;
73 unsigned int rd_index;
74 unsigned int wr_index;
75 unsigned int block_count;
76 unsigned char last_blocknum;
77 wait_queue_head_t read_queue;
78 int data_available_for_read;
3c86cf7a 79 u8 sync;
10b89ee3
MCC
80};
81
c3fda7f8
HV
82static inline struct saa6588 *to_saa6588(struct v4l2_subdev *sd)
83{
84 return container_of(sd, struct saa6588, sd);
85}
86
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87/* ---------------------------------------------------------------------- */
88
89/*
90 * SAA6588 defines
91 */
92
93/* Initialization and mode control byte (0w) */
94
95/* bit 0+1 (DAC0/DAC1) */
96#define cModeStandard 0x00
97#define cModeFastPI 0x01
98#define cModeReducedRequest 0x02
99#define cModeInvalid 0x03
100
101/* bit 2 (RBDS) */
102#define cProcessingModeRDS 0x00
103#define cProcessingModeRBDS 0x04
104
105/* bit 3+4 (SYM0/SYM1) */
106#define cErrCorrectionNone 0x00
107#define cErrCorrection2Bits 0x08
108#define cErrCorrection5Bits 0x10
109#define cErrCorrectionNoneRBDS 0x18
110
111/* bit 5 (NWSY) */
112#define cSyncNormal 0x00
113#define cSyncRestart 0x20
114
115/* bit 6 (TSQD) */
116#define cSigQualityDetectOFF 0x00
117#define cSigQualityDetectON 0x40
118
119/* bit 7 (SQCM) */
120#define cSigQualityTriggered 0x00
121#define cSigQualityContinous 0x80
122
123/* Pause level and flywheel control byte (1w) */
124
125/* bits 0..5 (FEB0..FEB5) */
126#define cFlywheelMaxBlocksMask 0x3F
127#define cFlywheelDefault 0x20
128
129/* bits 6+7 (PL0/PL1) */
130#define cPauseLevel_11mV 0x00
131#define cPauseLevel_17mV 0x40
132#define cPauseLevel_27mV 0x80
133#define cPauseLevel_43mV 0xC0
134
135/* Pause time/oscillator frequency/quality detector control byte (1w) */
136
137/* bits 0..4 (SQS0..SQS4) */
138#define cQualityDetectSensMask 0x1F
139#define cQualityDetectDefault 0x0F
140
141/* bit 5 (SOSC) */
142#define cSelectOscFreqOFF 0x00
143#define cSelectOscFreqON 0x20
144
145/* bit 6+7 (PTF0/PTF1) */
146#define cOscFreq_4332kHz 0x00
147#define cOscFreq_8664kHz 0x40
148#define cOscFreq_12996kHz 0x80
149#define cOscFreq_17328kHz 0xC0
150
151/* ---------------------------------------------------------------------- */
152
09092787 153static bool block_from_buf(struct saa6588 *s, unsigned char *buf)
10b89ee3
MCC
154{
155 int i;
156
157 if (s->rd_index == s->wr_index) {
158 if (debug > 2)
159 dprintk(PREFIX "Read: buffer empty.\n");
09092787 160 return false;
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MCC
161 }
162
163 if (debug > 2) {
164 dprintk(PREFIX "Read: ");
165 for (i = s->rd_index; i < s->rd_index + 3; i++)
166 dprintk("0x%02x ", s->buffer[i]);
167 }
168
09092787 169 memcpy(buf, &s->buffer[s->rd_index], 3);
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170
171 s->rd_index += 3;
172 if (s->rd_index >= s->buf_size)
173 s->rd_index = 0;
174 s->block_count--;
175
176 if (debug > 2)
177 dprintk("%d blocks total.\n", s->block_count);
178
09092787 179 return true;
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180}
181
b9218f2f 182static void read_from_buf(struct saa6588 *s, struct saa6588_command *a)
10b89ee3 183{
ae8aed03 184 unsigned char __user *buf_ptr = a->buffer;
09092787
HV
185 unsigned char buf[3];
186 unsigned long flags;
10b89ee3 187 unsigned int rd_blocks;
09092787 188 unsigned int i;
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MCC
189
190 a->result = 0;
191 if (!a->buffer)
192 return;
193
09092787 194 while (!a->nonblocking && !s->data_available_for_read) {
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MCC
195 int ret = wait_event_interruptible(s->read_queue,
196 s->data_available_for_read);
197 if (ret == -ERESTARTSYS) {
198 a->result = -EINTR;
199 return;
200 }
201 }
202
10b89ee3 203 rd_blocks = a->block_count;
09092787 204 spin_lock_irqsave(&s->lock, flags);
10b89ee3
MCC
205 if (rd_blocks > s->block_count)
206 rd_blocks = s->block_count;
09092787 207 spin_unlock_irqrestore(&s->lock, flags);
10b89ee3 208
09092787 209 if (!rd_blocks)
10b89ee3
MCC
210 return;
211
212 for (i = 0; i < rd_blocks; i++) {
09092787
HV
213 bool got_block;
214
215 spin_lock_irqsave(&s->lock, flags);
216 got_block = block_from_buf(s, buf);
217 spin_unlock_irqrestore(&s->lock, flags);
218 if (!got_block)
10b89ee3 219 break;
09092787
HV
220 if (copy_to_user(buf_ptr, buf, 3)) {
221 a->result = -EFAULT;
222 return;
223 }
224 buf_ptr += 3;
225 a->result += 3;
10b89ee3 226 }
09092787 227 spin_lock_irqsave(&s->lock, flags);
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228 s->data_available_for_read = (s->block_count > 0);
229 spin_unlock_irqrestore(&s->lock, flags);
230}
231
232static void block_to_buf(struct saa6588 *s, unsigned char *blockbuf)
233{
234 unsigned int i;
235
236 if (debug > 3)
237 dprintk(PREFIX "New block: ");
238
239 for (i = 0; i < 3; ++i) {
240 if (debug > 3)
241 dprintk("0x%02x ", blockbuf[i]);
242 s->buffer[s->wr_index] = blockbuf[i];
243 s->wr_index++;
244 }
245
246 if (s->wr_index >= s->buf_size)
247 s->wr_index = 0;
248
249 if (s->wr_index == s->rd_index) {
6c3d67ab 250 s->rd_index += 3;
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MCC
251 if (s->rd_index >= s->buf_size)
252 s->rd_index = 0;
253 } else
254 s->block_count++;
255
256 if (debug > 3)
257 dprintk("%d blocks total.\n", s->block_count);
258}
259
260static void saa6588_i2c_poll(struct saa6588 *s)
261{
c3fda7f8 262 struct i2c_client *client = v4l2_get_subdevdata(&s->sd);
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263 unsigned long flags;
264 unsigned char tmpbuf[6];
265 unsigned char blocknum;
266 unsigned char tmp;
267
268 /* Although we only need 3 bytes, we have to read at least 6.
3c86cf7a 269 SAA6588 returns garbage otherwise. */
c3fda7f8 270 if (6 != i2c_master_recv(client, &tmpbuf[0], 6)) {
10b89ee3
MCC
271 if (debug > 1)
272 dprintk(PREFIX "read error!\n");
273 return;
274 }
275
3c86cf7a
HV
276 s->sync = tmpbuf[0] & 0x10;
277 if (!s->sync)
278 return;
10b89ee3
MCC
279 blocknum = tmpbuf[0] >> 5;
280 if (blocknum == s->last_blocknum) {
281 if (debug > 3)
282 dprintk("Saw block %d again.\n", blocknum);
283 return;
284 }
285
286 s->last_blocknum = blocknum;
287
288 /*
289 Byte order according to v4l2 specification:
290
291 Byte 0: Least Significant Byte of RDS Block
292 Byte 1: Most Significant Byte of RDS Block
293 Byte 2 Bit 7: Error bit. Indicates that an uncorrectable error
294 occurred during reception of this block.
295 Bit 6: Corrected bit. Indicates that an error was
296 corrected for this data block.
3c86cf7a
HV
297 Bits 5-3: Same as bits 0-2.
298 Bits 2-0: Block number.
10b89ee3
MCC
299
300 SAA6588 byte order is Status-MSB-LSB, so we have to swap the
301 first and the last of the 3 bytes block.
302 */
303
304 tmp = tmpbuf[2];
305 tmpbuf[2] = tmpbuf[0];
306 tmpbuf[0] = tmp;
307
3c86cf7a
HV
308 /* Map 'Invalid block E' to 'Invalid Block' */
309 if (blocknum == 6)
310 blocknum = V4L2_RDS_BLOCK_INVALID;
311 /* And if are not in mmbs mode, then 'Block E' is also mapped
312 to 'Invalid Block'. As far as I can tell MMBS is discontinued,
313 and if there is ever a need to support E blocks, then please
314 contact the linux-media mailinglist. */
315 else if (!mmbs && blocknum == 5)
316 blocknum = V4L2_RDS_BLOCK_INVALID;
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MCC
317 tmp = blocknum;
318 tmp |= blocknum << 3; /* Received offset == Offset Name (OK ?) */
319 if ((tmpbuf[2] & 0x03) == 0x03)
3c86cf7a 320 tmp |= V4L2_RDS_BLOCK_ERROR; /* uncorrectable error */
10b89ee3 321 else if ((tmpbuf[2] & 0x03) != 0x00)
3c86cf7a 322 tmp |= V4L2_RDS_BLOCK_CORRECTED; /* corrected error */
10b89ee3
MCC
323 tmpbuf[2] = tmp; /* Is this enough ? Should we also check other bits ? */
324
325 spin_lock_irqsave(&s->lock, flags);
326 block_to_buf(s, tmpbuf);
327 spin_unlock_irqrestore(&s->lock, flags);
328 s->data_available_for_read = 1;
329 wake_up_interruptible(&s->read_queue);
330}
331
c4028958 332static void saa6588_work(struct work_struct *work)
10b89ee3 333{
fb6991d4 334 struct saa6588 *s = container_of(work, struct saa6588, work.work);
10b89ee3
MCC
335
336 saa6588_i2c_poll(s);
fb6991d4 337 schedule_delayed_work(&s->work, msecs_to_jiffies(20));
10b89ee3
MCC
338}
339
3c86cf7a 340static void saa6588_configure(struct saa6588 *s)
10b89ee3 341{
c3fda7f8 342 struct i2c_client *client = v4l2_get_subdevdata(&s->sd);
10b89ee3
MCC
343 unsigned char buf[3];
344 int rc;
345
346 buf[0] = cSyncRestart;
3c86cf7a 347 if (mmbs)
10b89ee3
MCC
348 buf[0] |= cProcessingModeRBDS;
349
350 buf[1] = cFlywheelDefault;
351 switch (plvl) {
352 case 0:
353 buf[1] |= cPauseLevel_11mV;
354 break;
355 case 1:
356 buf[1] |= cPauseLevel_17mV;
357 break;
358 case 2:
359 buf[1] |= cPauseLevel_27mV;
360 break;
361 case 3:
362 buf[1] |= cPauseLevel_43mV;
363 break;
364 default: /* nothing */
365 break;
366 }
367
368 buf[2] = cQualityDetectDefault | cSelectOscFreqON;
369
370 switch (xtal) {
371 case 0:
372 buf[2] |= cOscFreq_4332kHz;
373 break;
374 case 1:
375 buf[2] |= cOscFreq_8664kHz;
376 break;
377 case 2:
378 buf[2] |= cOscFreq_12996kHz;
379 break;
380 case 3:
381 buf[2] |= cOscFreq_17328kHz;
382 break;
383 default: /* nothing */
384 break;
385 }
386
387 dprintk(PREFIX "writing: 0w=0x%02x 1w=0x%02x 2w=0x%02x\n",
388 buf[0], buf[1], buf[2]);
389
c3fda7f8 390 rc = i2c_master_send(client, buf, 3);
b5ffc223 391 if (rc != 3)
10b89ee3 392 printk(PREFIX "i2c i/o error: rc == %d (should be 3)\n", rc);
10b89ee3
MCC
393}
394
395/* ---------------------------------------------------------------------- */
396
c3fda7f8
HV
397static long saa6588_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
398{
399 struct saa6588 *s = to_saa6588(sd);
b9218f2f 400 struct saa6588_command *a = arg;
c3fda7f8
HV
401
402 switch (cmd) {
c3fda7f8 403 /* --- close() for /dev/radio --- */
b9218f2f 404 case SAA6588_CMD_CLOSE:
c3fda7f8
HV
405 s->data_available_for_read = 1;
406 wake_up_interruptible(&s->read_queue);
af2c5deb 407 s->data_available_for_read = 0;
c3fda7f8
HV
408 a->result = 0;
409 break;
410 /* --- read() for /dev/radio --- */
b9218f2f 411 case SAA6588_CMD_READ:
c3fda7f8
HV
412 read_from_buf(s, a);
413 break;
414 /* --- poll() for /dev/radio --- */
b9218f2f 415 case SAA6588_CMD_POLL:
c3fda7f8 416 a->result = 0;
09092787 417 if (s->data_available_for_read)
c3fda7f8 418 a->result |= POLLIN | POLLRDNORM;
c3fda7f8
HV
419 poll_wait(a->instance, &s->read_queue, a->event_list);
420 break;
421
422 default:
423 /* nothing */
424 return -ENOIOCTLCMD;
425 }
426 return 0;
427}
428
3c86cf7a
HV
429static int saa6588_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
430{
431 struct saa6588 *s = to_saa6588(sd);
432
cb0ed222 433 vt->capability |= V4L2_TUNER_CAP_RDS | V4L2_TUNER_CAP_RDS_BLOCK_IO;
3c86cf7a
HV
434 if (s->sync)
435 vt->rxsubchans |= V4L2_TUNER_SUB_RDS;
436 return 0;
437}
438
2f73c7c5 439static int saa6588_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt)
3c86cf7a
HV
440{
441 struct saa6588 *s = to_saa6588(sd);
442
443 saa6588_configure(s);
444 return 0;
445}
446
c3fda7f8
HV
447/* ----------------------------------------------------------------------- */
448
449static const struct v4l2_subdev_core_ops saa6588_core_ops = {
450 .ioctl = saa6588_ioctl,
451};
452
3c86cf7a
HV
453static const struct v4l2_subdev_tuner_ops saa6588_tuner_ops = {
454 .g_tuner = saa6588_g_tuner,
455 .s_tuner = saa6588_s_tuner,
456};
457
c3fda7f8
HV
458static const struct v4l2_subdev_ops saa6588_ops = {
459 .core = &saa6588_core_ops,
3c86cf7a 460 .tuner = &saa6588_tuner_ops,
c3fda7f8
HV
461};
462
463/* ---------------------------------------------------------------------- */
464
b5ffc223
HV
465static int saa6588_probe(struct i2c_client *client,
466 const struct i2c_device_id *id)
10b89ee3
MCC
467{
468 struct saa6588 *s;
c3fda7f8 469 struct v4l2_subdev *sd;
10b89ee3 470
b5ffc223
HV
471 v4l_info(client, "saa6588 found @ 0x%x (%s)\n",
472 client->addr << 1, client->adapter->name);
10b89ee3 473
c02b211d 474 s = devm_kzalloc(&client->dev, sizeof(*s), GFP_KERNEL);
b5ffc223 475 if (s == NULL)
10b89ee3
MCC
476 return -ENOMEM;
477
478 s->buf_size = bufblocks * 3;
479
c02b211d
LP
480 s->buffer = devm_kzalloc(&client->dev, s->buf_size, GFP_KERNEL);
481 if (s->buffer == NULL)
10b89ee3 482 return -ENOMEM;
c3fda7f8
HV
483 sd = &s->sd;
484 v4l2_i2c_subdev_init(sd, client, &saa6588_ops);
588005e1 485 spin_lock_init(&s->lock);
10b89ee3
MCC
486 s->block_count = 0;
487 s->wr_index = 0;
488 s->rd_index = 0;
489 s->last_blocknum = 0xff;
490 init_waitqueue_head(&s->read_queue);
491 s->data_available_for_read = 0;
10b89ee3
MCC
492
493 saa6588_configure(s);
494
495 /* start polling via eventd */
fb6991d4
JD
496 INIT_DELAYED_WORK(&s->work, saa6588_work);
497 schedule_delayed_work(&s->work, 0);
10b89ee3
MCC
498 return 0;
499}
500
b5ffc223 501static int saa6588_remove(struct i2c_client *client)
10b89ee3 502{
c3fda7f8
HV
503 struct v4l2_subdev *sd = i2c_get_clientdata(client);
504 struct saa6588 *s = to_saa6588(sd);
505
506 v4l2_device_unregister_subdev(sd);
10b89ee3 507
fb6991d4 508 cancel_delayed_work_sync(&s->work);
10b89ee3 509
10b89ee3
MCC
510 return 0;
511}
512
10b89ee3
MCC
513/* ----------------------------------------------------------------------- */
514
b5ffc223
HV
515static const struct i2c_device_id saa6588_id[] = {
516 { "saa6588", 0 },
517 { }
10b89ee3 518};
b5ffc223 519MODULE_DEVICE_TABLE(i2c, saa6588_id);
10b89ee3 520
440d0516
HV
521static struct i2c_driver saa6588_driver = {
522 .driver = {
523 .owner = THIS_MODULE,
524 .name = "saa6588",
525 },
526 .probe = saa6588_probe,
527 .remove = saa6588_remove,
528 .id_table = saa6588_id,
10b89ee3 529};
440d0516 530
c6e8d86f 531module_i2c_driver(saa6588_driver);
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