Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
33b687cf | 10 | #include <linux/videodev2.h> |
cd4665c5 | 11 | #include <linux/delay.h> |
7a707b89 | 12 | #include <linux/module.h> |
6b8fe025 | 13 | #include <media/v4l2-device.h> |
c7c0b34c | 14 | #include <media/tvp5150.h> |
6c45ec71 | 15 | #include <media/v4l2-ctrls.h> |
cd4665c5 MCC |
16 | |
17 | #include "tvp5150_reg.h" | |
18 | ||
785a3de1 PZ |
19 | #define TVP5150_H_MAX 720U |
20 | #define TVP5150_V_MAX_525_60 480U | |
21 | #define TVP5150_V_MAX_OTHERS 576U | |
963ddc63 JM |
22 | #define TVP5150_MAX_CROP_LEFT 511 |
23 | #define TVP5150_MAX_CROP_TOP 127 | |
24 | #define TVP5150_CROP_SHIFT 2 | |
25 | ||
6ac48b45 | 26 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
27 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
28 | MODULE_LICENSE("GPL"); | |
29 | ||
cd4665c5 | 30 | |
ff699e6b | 31 | static int debug; |
2a0489d3 | 32 | module_param(debug, int, 0644); |
6b8fe025 | 33 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 MCC |
34 | |
35 | struct tvp5150 { | |
6b8fe025 | 36 | struct v4l2_subdev sd; |
6c45ec71 | 37 | struct v4l2_ctrl_handler hdl; |
963ddc63 | 38 | struct v4l2_rect rect; |
84486d53 | 39 | |
3ad96835 | 40 | v4l2_std_id norm; /* Current set standard */ |
5325b427 HV |
41 | u32 input; |
42 | u32 output; | |
84486d53 | 43 | int enable; |
cd4665c5 MCC |
44 | }; |
45 | ||
6b8fe025 | 46 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 47 | { |
6b8fe025 HV |
48 | return container_of(sd, struct tvp5150, sd); |
49 | } | |
50 | ||
6c45ec71 HV |
51 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) |
52 | { | |
53 | return &container_of(ctrl->handler, struct tvp5150, hdl)->sd; | |
54 | } | |
55 | ||
6b8fe025 HV |
56 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) |
57 | { | |
58 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 MCC |
59 | unsigned char buffer[1]; |
60 | int rc; | |
8de531b0 MCC |
61 | struct i2c_msg msg[] = { |
62 | { .addr = c->addr, .flags = 0, | |
63 | .buf = &addr, .len = 1 }, | |
64 | { .addr = c->addr, .flags = I2C_M_RD, | |
65 | .buf = buffer, .len = 1 } | |
66 | }; | |
67 | ||
68 | rc = i2c_transfer(c->adapter, msg, 2); | |
69 | if (rc < 0 || rc != 2) { | |
70 | v4l2_err(sd, "i2c i/o error: rc == %d (should be 2)\n", rc); | |
71 | return rc < 0 ? rc : -EIO; | |
8cd0d4ca | 72 | } |
e1bc80ad | 73 | |
6b8fe025 | 74 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]); |
cd4665c5 MCC |
75 | |
76 | return (buffer[0]); | |
77 | } | |
78 | ||
6b8fe025 | 79 | static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 80 | unsigned char value) |
cd4665c5 | 81 | { |
6b8fe025 | 82 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 MCC |
83 | unsigned char buffer[2]; |
84 | int rc; | |
cd4665c5 MCC |
85 | |
86 | buffer[0] = addr; | |
84486d53 | 87 | buffer[1] = value; |
6b8fe025 | 88 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]); |
cd4665c5 | 89 | if (2 != (rc = i2c_master_send(c, buffer, 2))) |
6b8fe025 | 90 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 2)\n", rc); |
cd4665c5 MCC |
91 | } |
92 | ||
6b8fe025 HV |
93 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
94 | const u8 end, int max_line) | |
3ad96835 | 95 | { |
6b8fe025 | 96 | int i = 0; |
3ad96835 | 97 | |
6b8fe025 HV |
98 | while (init != (u8)(end + 1)) { |
99 | if ((i % max_line) == 0) { | |
100 | if (i > 0) | |
3ad96835 | 101 | printk("\n"); |
6b8fe025 | 102 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 103 | } |
6b8fe025 | 104 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
105 | |
106 | init++; | |
107 | i++; | |
108 | } | |
109 | printk("\n"); | |
110 | } | |
111 | ||
6b8fe025 | 112 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 113 | { |
84486d53 | 114 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 115 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 116 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 117 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 118 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 119 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 120 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 121 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 122 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 123 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 124 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 125 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 126 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
127 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
128 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
129 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 130 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 131 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 132 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 133 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 134 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 135 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 136 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 137 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 138 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 139 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 140 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 141 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 142 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
143 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
144 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 145 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
146 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
147 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 148 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 149 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 150 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 151 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 152 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 153 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 154 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 155 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 156 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
157 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
158 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 159 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 160 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 161 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 162 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 163 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 164 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 165 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 166 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 167 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
168 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
169 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 170 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 171 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 172 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 173 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 174 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 175 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 176 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
177 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
178 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 179 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
180 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
181 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 182 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
183 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
184 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 185 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 186 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 187 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 188 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 189 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
190 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
191 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
192 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
193 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
194 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 195 | |
6b8fe025 HV |
196 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
197 | TVP5150_TELETEXT_FIL1_END, 8); | |
198 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
199 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 200 | |
84486d53 | 201 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 202 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 203 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 204 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 205 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 206 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 207 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 208 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 209 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 210 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 211 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 212 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 213 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 214 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 215 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 216 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 217 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 218 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 219 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
220 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
221 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 222 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 223 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 224 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 225 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 226 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 227 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 228 | |
6b8fe025 HV |
229 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
230 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 231 | |
6b8fe025 HV |
232 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
233 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 234 | |
6b8fe025 HV |
235 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
236 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 237 | |
6b8fe025 HV |
238 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
239 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 240 | |
6b8fe025 HV |
241 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
242 | TVP5150_LINE_MODE_END, 8); | |
243 | return 0; | |
cd4665c5 MCC |
244 | } |
245 | ||
246 | /**************************************************************************** | |
247 | Basic functions | |
248 | ****************************************************************************/ | |
cd4665c5 | 249 | |
6b8fe025 | 250 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 251 | { |
2962fc01 | 252 | int opmode = 0; |
6b8fe025 | 253 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 254 | int input = 0; |
afcc8e8c | 255 | int val; |
84486d53 | 256 | |
5325b427 | 257 | if ((decoder->output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
c7c0b34c | 258 | input = 8; |
4c86f973 | 259 | |
5325b427 | 260 | switch (decoder->input) { |
c7c0b34c HV |
261 | case TVP5150_COMPOSITE1: |
262 | input |= 2; | |
263 | /* fall through */ | |
264 | case TVP5150_COMPOSITE0: | |
c0477ad9 | 265 | break; |
c7c0b34c | 266 | case TVP5150_SVIDEO: |
c0477ad9 | 267 | default: |
c7c0b34c | 268 | input |= 1; |
c0477ad9 MCC |
269 | break; |
270 | } | |
271 | ||
6b8fe025 | 272 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 | 273 | "=> tvp5150 input=%i, opmode=%i\n", |
5325b427 HV |
274 | decoder->input, decoder->output, |
275 | input, opmode); | |
12500f07 | 276 | |
6b8fe025 HV |
277 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
278 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
279 | |
280 | /* Svideo should enable YCrCb output and disable GPCL output | |
281 | * For Composite and TV, it should be the reverse | |
282 | */ | |
6b8fe025 | 283 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
8cd0d4ca DL |
284 | if (val < 0) { |
285 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, val); | |
286 | return; | |
287 | } | |
288 | ||
5325b427 | 289 | if (decoder->input == TVP5150_SVIDEO) |
f4b8b3ae MCC |
290 | val = (val & ~0x40) | 0x10; |
291 | else | |
292 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 293 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
294 | }; |
295 | ||
e1bc80ad MCC |
296 | struct i2c_reg_value { |
297 | unsigned char reg; | |
298 | unsigned char value; | |
299 | }; | |
300 | ||
301 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
302 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
303 | { /* 0x00 */ | |
304 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
305 | }, | |
306 | { /* 0x01 */ | |
307 | TVP5150_ANAL_CHL_CTL,0x15 | |
308 | }, | |
309 | { /* 0x02 */ | |
310 | TVP5150_OP_MODE_CTL,0x00 | |
311 | }, | |
312 | { /* 0x03 */ | |
313 | TVP5150_MISC_CTL,0x01 | |
314 | }, | |
315 | { /* 0x06 */ | |
316 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
317 | }, | |
318 | { /* 0x07 */ | |
319 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
320 | }, | |
321 | { /* 0x08 */ | |
322 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
323 | }, | |
324 | { /* 0x09 */ | |
325 | TVP5150_BRIGHT_CTL,0x80 | |
326 | }, | |
327 | { /* 0x0a */ | |
328 | TVP5150_SATURATION_CTL,0x80 | |
329 | }, | |
330 | { /* 0x0b */ | |
331 | TVP5150_HUE_CTL,0x00 | |
332 | }, | |
333 | { /* 0x0c */ | |
334 | TVP5150_CONTRAST_CTL,0x80 | |
335 | }, | |
336 | { /* 0x0d */ | |
337 | TVP5150_DATA_RATE_SEL,0x47 | |
338 | }, | |
339 | { /* 0x0e */ | |
340 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
341 | }, | |
342 | { /* 0x0f */ | |
343 | TVP5150_CONF_SHARED_PIN,0x08 | |
344 | }, | |
345 | { /* 0x11 */ | |
346 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
347 | }, | |
348 | { /* 0x12 */ | |
349 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
350 | }, | |
351 | { /* 0x13 */ | |
352 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
353 | }, | |
354 | { /* 0x14 */ | |
355 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
356 | }, | |
357 | { /* 0x15 */ | |
358 | TVP5150_GENLOCK,0x01 | |
359 | }, | |
360 | { /* 0x16 */ | |
361 | TVP5150_HORIZ_SYNC_START,0x80 | |
362 | }, | |
363 | { /* 0x18 */ | |
364 | TVP5150_VERT_BLANKING_START,0x00 | |
365 | }, | |
366 | { /* 0x19 */ | |
367 | TVP5150_VERT_BLANKING_STOP,0x00 | |
368 | }, | |
369 | { /* 0x1a */ | |
370 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
371 | }, | |
372 | { /* 0x1b */ | |
373 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
374 | }, | |
375 | { /* 0x1c */ | |
376 | TVP5150_INT_RESET_REG_B,0x00 | |
377 | }, | |
378 | { /* 0x1d */ | |
379 | TVP5150_INT_ENABLE_REG_B,0x00 | |
380 | }, | |
381 | { /* 0x1e */ | |
382 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
383 | }, | |
384 | { /* 0x28 */ | |
385 | TVP5150_VIDEO_STD,0x00 | |
386 | }, | |
387 | { /* 0x2e */ | |
388 | TVP5150_MACROVISION_ON_CTR,0x0f | |
389 | }, | |
390 | { /* 0x2f */ | |
391 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
392 | }, | |
393 | { /* 0xbb */ | |
394 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
395 | }, | |
396 | { /* 0xc0 */ | |
397 | TVP5150_INT_STATUS_REG_A,0x00 | |
398 | }, | |
399 | { /* 0xc1 */ | |
400 | TVP5150_INT_ENABLE_REG_A,0x00 | |
401 | }, | |
402 | { /* 0xc2 */ | |
403 | TVP5150_INT_CONF,0x04 | |
404 | }, | |
405 | { /* 0xc8 */ | |
406 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
407 | }, | |
408 | { /* 0xc9 */ | |
409 | TVP5150_FIFO_RESET,0x00 | |
410 | }, | |
411 | { /* 0xca */ | |
412 | TVP5150_LINE_NUMBER_INT,0x00 | |
413 | }, | |
414 | { /* 0xcb */ | |
415 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
416 | }, | |
417 | { /* 0xcc */ | |
418 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
419 | }, | |
420 | { /* 0xcd */ | |
421 | TVP5150_FIFO_OUT_CTRL,0x01 | |
422 | }, | |
423 | { /* 0xcf */ | |
3ad96835 | 424 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
425 | }, |
426 | { /* 0xd0 */ | |
3ad96835 | 427 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
428 | }, |
429 | { /* 0xfc */ | |
430 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
431 | }, | |
432 | { /* end of data */ | |
433 | 0xff,0xff | |
434 | } | |
435 | }; | |
436 | ||
437 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
438 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
439 | { | |
440 | TVP5150_CONF_SHARED_PIN, 2 | |
441 | },{ /* Automatic offset and AGC enabled */ | |
442 | TVP5150_ANAL_CHL_CTL, 0x15 | |
443 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
444 | TVP5150_MISC_CTL, 0x6f | |
445 | },{ /* Activates video std autodetection for all standards */ | |
446 | TVP5150_AUTOSW_MSK, 0x0 | |
447 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
448 | TVP5150_DATA_RATE_SEL, 0x47 | |
449 | },{ | |
450 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
451 | },{ | |
452 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
453 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
454 | 0x27, 0x20 | |
455 | },{ | |
456 | 0xff,0xff | |
457 | } | |
458 | }; | |
459 | ||
6ac48b45 MCC |
460 | struct tvp5150_vbi_type { |
461 | unsigned int vbi_type; | |
462 | unsigned int ini_line; | |
463 | unsigned int end_line; | |
464 | unsigned int by_field :1; | |
465 | }; | |
466 | ||
e1bc80ad MCC |
467 | struct i2c_vbi_ram_value { |
468 | u16 reg; | |
6ac48b45 MCC |
469 | struct tvp5150_vbi_type type; |
470 | unsigned char values[16]; | |
e1bc80ad MCC |
471 | }; |
472 | ||
6ac48b45 MCC |
473 | /* This struct have the values for each supported VBI Standard |
474 | * by | |
475 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
476 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
477 | * and so on. There are 16 possible locations from 0 to 15. | |
478 | */ | |
3ad96835 | 479 | |
a9cff90e | 480 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 481 | { |
9bc7400a HV |
482 | /* FIXME: Current api doesn't handle all VBI types, those not |
483 | yet supported are placed under #if 0 */ | |
484 | #if 0 | |
6ac48b45 MCC |
485 | {0x010, /* Teletext, SECAM, WST System A */ |
486 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
487 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
488 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 489 | }, |
9bc7400a | 490 | #endif |
6ac48b45 | 491 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 492 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
493 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
494 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 495 | }, |
9bc7400a | 496 | #if 0 |
6ac48b45 MCC |
497 | {0x050, /* Teletext, PAL, WST System C */ |
498 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
499 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
500 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 501 | }, |
6ac48b45 MCC |
502 | {0x070, /* Teletext, NTSC, WST System B */ |
503 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
504 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
505 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 506 | }, |
6ac48b45 MCC |
507 | {0x090, /* Tetetext, NTSC NABTS System C */ |
508 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
509 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
510 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 511 | }, |
6ac48b45 MCC |
512 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
513 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
514 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
515 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 516 | }, |
6ac48b45 MCC |
517 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
518 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
519 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
520 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 521 | }, |
9bc7400a | 522 | #endif |
6ac48b45 MCC |
523 | {0x0f0, /* Closed Caption, NTSC */ |
524 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
525 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
526 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 527 | }, |
6ac48b45 | 528 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 529 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
530 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
531 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 532 | }, |
9bc7400a | 533 | #if 0 |
6ac48b45 MCC |
534 | {0x130, /* Wide Screen Signal, NTSC C */ |
535 | {V4L2_SLICED_WSS_525,20,20,1}, | |
536 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
537 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 538 | }, |
6ac48b45 MCC |
539 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
540 | {V4l2_SLICED_VITC_625,6,22,0}, | |
541 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
542 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 543 | }, |
6ac48b45 MCC |
544 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
545 | {V4l2_SLICED_VITC_525,10,20,0}, | |
546 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
547 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 548 | }, |
9bc7400a | 549 | #endif |
6ac48b45 MCC |
550 | {0x190, /* Video Program System (VPS), PAL */ |
551 | {V4L2_SLICED_VPS,16,16,0}, | |
552 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
553 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 554 | }, |
6ac48b45 MCC |
555 | /* 0x1d0 User programmable */ |
556 | ||
557 | /* End of struct */ | |
558 | { (u16)-1 } | |
e1bc80ad | 559 | }; |
4c86f973 | 560 | |
6b8fe025 | 561 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 562 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
563 | { |
564 | while (regs->reg != 0xff) { | |
6b8fe025 | 565 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
566 | regs++; |
567 | } | |
568 | return 0; | |
569 | } | |
84486d53 | 570 | |
6b8fe025 | 571 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 572 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
573 | { |
574 | unsigned int i; | |
cd4665c5 | 575 | |
e1bc80ad | 576 | /* Disable Full Field */ |
6b8fe025 | 577 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 578 | |
e1bc80ad | 579 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
580 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
581 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 582 | |
e1bc80ad | 583 | /* Load Ram Table */ |
6b8fe025 HV |
584 | while (regs->reg != (u16)-1) { |
585 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
586 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 587 | |
6b8fe025 HV |
588 | for (i = 0; i < 16; i++) |
589 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 590 | |
e1bc80ad MCC |
591 | regs++; |
592 | } | |
593 | return 0; | |
594 | } | |
cd4665c5 | 595 | |
6ac48b45 | 596 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 597 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
598 | struct v4l2_sliced_vbi_cap *cap) |
599 | { | |
6b8fe025 | 600 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
601 | int line; |
602 | ||
bccfa449 | 603 | v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n"); |
6ac48b45 MCC |
604 | memset(cap, 0, sizeof *cap); |
605 | ||
606 | while (regs->reg != (u16)-1 ) { | |
607 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
608 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
609 | } | |
610 | cap->service_set |= regs->type.vbi_type; | |
611 | ||
612 | regs++; | |
613 | } | |
6b8fe025 | 614 | return 0; |
6ac48b45 MCC |
615 | } |
616 | ||
3ad96835 MCC |
617 | /* Set vbi processing |
618 | * type - one of tvp5150_vbi_types | |
619 | * line - line to gather data | |
620 | * fields: bit 0 field1, bit 1, field2 | |
621 | * flags (default=0xf0) is a bitmask, were set means: | |
622 | * bit 7: enable filtering null bytes on CC | |
623 | * bit 6: send data also to FIFO | |
624 | * bit 5: don't allow data with errors on FIFO | |
625 | * bit 4: enable ECC when possible | |
626 | * pix_align = pix alignment: | |
627 | * LSB = field1 | |
628 | * MSB = field2 | |
629 | */ | |
6b8fe025 | 630 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
631 | const struct i2c_vbi_ram_value *regs, |
632 | unsigned int type,u8 flags, int line, | |
633 | const int fields) | |
3ad96835 | 634 | { |
6b8fe025 HV |
635 | struct tvp5150 *decoder = to_tvp5150(sd); |
636 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 637 | u8 reg; |
2701dacb | 638 | int pos=0; |
3ad96835 MCC |
639 | |
640 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 641 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 642 | return 0; |
7d5b7b98 | 643 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
644 | /* Don't follow NTSC Line number convension */ |
645 | line += 3; | |
646 | } | |
647 | ||
648 | if (line<6||line>27) | |
2701dacb MCC |
649 | return 0; |
650 | ||
651 | while (regs->reg != (u16)-1 ) { | |
652 | if ((type & regs->type.vbi_type) && | |
653 | (line>=regs->type.ini_line) && | |
654 | (line<=regs->type.end_line)) { | |
655 | type=regs->type.vbi_type; | |
656 | break; | |
657 | } | |
658 | ||
659 | regs++; | |
660 | pos++; | |
661 | } | |
662 | if (regs->reg == (u16)-1) | |
663 | return 0; | |
3ad96835 | 664 | |
2701dacb | 665 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
666 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
667 | ||
668 | if (fields&1) { | |
6b8fe025 | 669 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
670 | } |
671 | ||
672 | if (fields&2) { | |
6b8fe025 | 673 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
674 | } |
675 | ||
2701dacb | 676 | return type; |
3ad96835 MCC |
677 | } |
678 | ||
6b8fe025 | 679 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
680 | const struct i2c_vbi_ram_value *regs, int line) |
681 | { | |
6b8fe025 HV |
682 | struct tvp5150 *decoder = to_tvp5150(sd); |
683 | v4l2_std_id std = decoder->norm; | |
12db5607 | 684 | u8 reg; |
6b8fe025 | 685 | int pos, type = 0; |
8cd0d4ca | 686 | int i, ret = 0; |
12db5607 MCC |
687 | |
688 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 689 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 690 | return 0; |
7d5b7b98 | 691 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
692 | /* Don't follow NTSC Line number convension */ |
693 | line += 3; | |
694 | } | |
695 | ||
6b8fe025 | 696 | if (line < 6 || line > 27) |
12db5607 MCC |
697 | return 0; |
698 | ||
6b8fe025 | 699 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 700 | |
8cd0d4ca DL |
701 | for (i = 0; i <= 1; i++) { |
702 | ret = tvp5150_read(sd, reg + i); | |
703 | if (ret < 0) { | |
704 | v4l2_err(sd, "%s: failed with error = %d\n", | |
705 | __func__, ret); | |
706 | return 0; | |
707 | } | |
708 | pos = ret & 0x0f; | |
709 | if (pos < 0x0f) | |
710 | type |= regs[pos].type.vbi_type; | |
711 | } | |
12db5607 MCC |
712 | |
713 | return type; | |
714 | } | |
6b8fe025 HV |
715 | |
716 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 717 | { |
6b8fe025 HV |
718 | struct tvp5150 *decoder = to_tvp5150(sd); |
719 | int fmt = 0; | |
e1bc80ad | 720 | |
6b8fe025 | 721 | decoder->norm = std; |
e1bc80ad MCC |
722 | |
723 | /* First tests should be against specific std */ | |
724 | ||
26811ae0 | 725 | if (std == V4L2_STD_NTSC_443) { |
2da12fcb | 726 | fmt = VIDEO_STD_NTSC_4_43_BIT; |
26811ae0 | 727 | } else if (std == V4L2_STD_PAL_M) { |
2da12fcb | 728 | fmt = VIDEO_STD_PAL_M_BIT; |
26811ae0 | 729 | } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) { |
2da12fcb | 730 | fmt = VIDEO_STD_PAL_COMBINATION_N_BIT; |
e1bc80ad MCC |
731 | } else { |
732 | /* Then, test against generic ones */ | |
6b8fe025 | 733 | if (std & V4L2_STD_NTSC) |
2da12fcb | 734 | fmt = VIDEO_STD_NTSC_MJ_BIT; |
6b8fe025 | 735 | else if (std & V4L2_STD_PAL) |
2da12fcb | 736 | fmt = VIDEO_STD_PAL_BDGHIN_BIT; |
6b8fe025 | 737 | else if (std & V4L2_STD_SECAM) |
2da12fcb | 738 | fmt = VIDEO_STD_SECAM_BIT; |
e1bc80ad | 739 | } |
84486d53 | 740 | |
6b8fe025 HV |
741 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
742 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
743 | return 0; |
744 | } | |
745 | ||
6b8fe025 HV |
746 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
747 | { | |
748 | struct tvp5150 *decoder = to_tvp5150(sd); | |
749 | ||
750 | if (decoder->norm == std) | |
751 | return 0; | |
752 | ||
963ddc63 JM |
753 | /* Change cropping height limits */ |
754 | if (std & V4L2_STD_525_60) | |
755 | decoder->rect.height = TVP5150_V_MAX_525_60; | |
756 | else | |
757 | decoder->rect.height = TVP5150_V_MAX_OTHERS; | |
758 | ||
759 | ||
6b8fe025 HV |
760 | return tvp5150_set_std(sd, std); |
761 | } | |
762 | ||
763 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 764 | { |
6b8fe025 | 765 | struct tvp5150 *decoder = to_tvp5150(sd); |
84486d53 | 766 | |
e1bc80ad | 767 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 768 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
769 | |
770 | /* Initializes VDP registers */ | |
6b8fe025 | 771 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
772 | |
773 | /* Selects decoder input */ | |
6b8fe025 | 774 | tvp5150_selmux(sd); |
e1bc80ad MCC |
775 | |
776 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 777 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
778 | |
779 | /* Initialize image preferences */ | |
6c45ec71 | 780 | v4l2_ctrl_handler_setup(&decoder->hdl); |
e1bc80ad | 781 | |
6b8fe025 HV |
782 | tvp5150_set_std(sd, decoder->norm); |
783 | return 0; | |
cd4665c5 MCC |
784 | }; |
785 | ||
6c45ec71 | 786 | static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl) |
a6c2ba28 | 787 | { |
6c45ec71 | 788 | struct v4l2_subdev *sd = to_sd(ctrl); |
a6c2ba28 | 789 | |
790 | switch (ctrl->id) { | |
791 | case V4L2_CID_BRIGHTNESS: | |
6c45ec71 | 792 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->val); |
a6c2ba28 | 793 | return 0; |
794 | case V4L2_CID_CONTRAST: | |
6c45ec71 | 795 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->val); |
a6c2ba28 | 796 | return 0; |
797 | case V4L2_CID_SATURATION: | |
6c45ec71 | 798 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->val); |
a6c2ba28 | 799 | return 0; |
800 | case V4L2_CID_HUE: | |
6c45ec71 | 801 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->val); |
a6c2ba28 | 802 | return 0; |
a6c2ba28 | 803 | } |
c0477ad9 | 804 | return -EINVAL; |
a6c2ba28 | 805 | } |
806 | ||
ec2c4f3f JM |
807 | static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd) |
808 | { | |
809 | int val = tvp5150_read(sd, TVP5150_STATUS_REG_5); | |
810 | ||
811 | switch (val & 0x0F) { | |
812 | case 0x01: | |
813 | return V4L2_STD_NTSC; | |
814 | case 0x03: | |
815 | return V4L2_STD_PAL; | |
816 | case 0x05: | |
817 | return V4L2_STD_PAL_M; | |
818 | case 0x07: | |
819 | return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc; | |
820 | case 0x09: | |
821 | return V4L2_STD_NTSC_443; | |
822 | case 0xb: | |
823 | return V4L2_STD_SECAM; | |
824 | default: | |
825 | return V4L2_STD_UNKNOWN; | |
826 | } | |
827 | } | |
828 | ||
829 | static int tvp5150_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index, | |
830 | enum v4l2_mbus_pixelcode *code) | |
831 | { | |
832 | if (index) | |
833 | return -EINVAL; | |
834 | ||
002eaf90 | 835 | *code = V4L2_MBUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
836 | return 0; |
837 | } | |
838 | ||
839 | static int tvp5150_mbus_fmt(struct v4l2_subdev *sd, | |
840 | struct v4l2_mbus_framefmt *f) | |
841 | { | |
842 | struct tvp5150 *decoder = to_tvp5150(sd); | |
ec2c4f3f JM |
843 | |
844 | if (f == NULL) | |
845 | return -EINVAL; | |
846 | ||
847 | tvp5150_reset(sd, 0); | |
848 | ||
963ddc63 JM |
849 | f->width = decoder->rect.width; |
850 | f->height = decoder->rect.height; | |
ec2c4f3f | 851 | |
002eaf90 | 852 | f->code = V4L2_MBUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
853 | f->field = V4L2_FIELD_SEQ_TB; |
854 | f->colorspace = V4L2_COLORSPACE_SMPTE170M; | |
855 | ||
856 | v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width, | |
857 | f->height); | |
858 | return 0; | |
859 | } | |
860 | ||
4f996594 | 861 | static int tvp5150_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a) |
963ddc63 JM |
862 | { |
863 | struct v4l2_rect rect = a->c; | |
864 | struct tvp5150 *decoder = to_tvp5150(sd); | |
865 | v4l2_std_id std; | |
f90580ca | 866 | unsigned int hmax; |
963ddc63 JM |
867 | |
868 | v4l2_dbg(1, debug, sd, "%s left=%d, top=%d, width=%d, height=%d\n", | |
869 | __func__, rect.left, rect.top, rect.width, rect.height); | |
870 | ||
871 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
872 | return -EINVAL; | |
873 | ||
874 | /* tvp5150 has some special limits */ | |
875 | rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT); | |
f90580ca RR |
876 | rect.width = clamp_t(unsigned int, rect.width, |
877 | TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left, | |
878 | TVP5150_H_MAX - rect.left); | |
963ddc63 JM |
879 | rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP); |
880 | ||
881 | /* Calculate height based on current standard */ | |
882 | if (decoder->norm == V4L2_STD_ALL) | |
883 | std = tvp5150_read_std(sd); | |
884 | else | |
885 | std = decoder->norm; | |
886 | ||
887 | if (std & V4L2_STD_525_60) | |
888 | hmax = TVP5150_V_MAX_525_60; | |
889 | else | |
890 | hmax = TVP5150_V_MAX_OTHERS; | |
891 | ||
f90580ca RR |
892 | rect.height = clamp_t(unsigned int, rect.height, |
893 | hmax - TVP5150_MAX_CROP_TOP - rect.top, | |
894 | hmax - rect.top); | |
963ddc63 JM |
895 | |
896 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, rect.top); | |
897 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, | |
898 | rect.top + rect.height - hmax); | |
899 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_MSB, | |
900 | rect.left >> TVP5150_CROP_SHIFT); | |
901 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_LSB, | |
902 | rect.left | (1 << TVP5150_CROP_SHIFT)); | |
903 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_MSB, | |
904 | (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >> | |
905 | TVP5150_CROP_SHIFT); | |
906 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_LSB, | |
907 | rect.left + rect.width - TVP5150_MAX_CROP_LEFT); | |
908 | ||
909 | decoder->rect = rect; | |
910 | ||
911 | return 0; | |
912 | } | |
913 | ||
914 | static int tvp5150_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
915 | { | |
12bd10c7 | 916 | struct tvp5150 *decoder = to_tvp5150(sd); |
963ddc63 JM |
917 | |
918 | a->c = decoder->rect; | |
919 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
920 | ||
921 | return 0; | |
922 | } | |
923 | ||
924 | static int tvp5150_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
925 | { | |
12bd10c7 | 926 | struct tvp5150 *decoder = to_tvp5150(sd); |
963ddc63 JM |
927 | v4l2_std_id std; |
928 | ||
929 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
930 | return -EINVAL; | |
931 | ||
932 | a->bounds.left = 0; | |
933 | a->bounds.top = 0; | |
934 | a->bounds.width = TVP5150_H_MAX; | |
935 | ||
936 | /* Calculate height based on current standard */ | |
937 | if (decoder->norm == V4L2_STD_ALL) | |
938 | std = tvp5150_read_std(sd); | |
939 | else | |
940 | std = decoder->norm; | |
941 | ||
942 | if (std & V4L2_STD_525_60) | |
943 | a->bounds.height = TVP5150_V_MAX_525_60; | |
944 | else | |
945 | a->bounds.height = TVP5150_V_MAX_OTHERS; | |
946 | ||
947 | a->defrect = a->bounds; | |
948 | a->pixelaspect.numerator = 1; | |
949 | a->pixelaspect.denominator = 1; | |
950 | ||
951 | return 0; | |
952 | } | |
953 | ||
84486d53 MCC |
954 | /**************************************************************************** |
955 | I2C Command | |
956 | ****************************************************************************/ | |
c7c0b34c | 957 | |
5325b427 HV |
958 | static int tvp5150_s_routing(struct v4l2_subdev *sd, |
959 | u32 input, u32 output, u32 config) | |
6b8fe025 HV |
960 | { |
961 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 962 | |
5325b427 HV |
963 | decoder->input = input; |
964 | decoder->output = output; | |
6b8fe025 HV |
965 | tvp5150_selmux(sd); |
966 | return 0; | |
967 | } | |
6ac48b45 | 968 | |
d37dad49 HV |
969 | static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt) |
970 | { | |
971 | /* this is for capturing 36 raw vbi lines | |
972 | if there's a way to cut off the beginning 2 vbi lines | |
973 | with the tvp5150 then the vbi line count could be lowered | |
974 | to 17 lines/field again, although I couldn't find a register | |
975 | which could do that cropping */ | |
976 | if (fmt->sample_format == V4L2_PIX_FMT_GREY) | |
977 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
978 | if (fmt->count[0] == 18 && fmt->count[1] == 18) { | |
979 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
980 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
981 | } | |
982 | return 0; | |
983 | } | |
984 | ||
985 | static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) | |
6b8fe025 | 986 | { |
6b8fe025 HV |
987 | int i; |
988 | ||
6b8fe025 HV |
989 | if (svbi->service_set != 0) { |
990 | for (i = 0; i <= 23; i++) { | |
991 | svbi->service_lines[1][i] = 0; | |
992 | svbi->service_lines[0][i] = | |
993 | tvp5150_set_vbi(sd, vbi_ram_default, | |
994 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 995 | } |
6b8fe025 HV |
996 | /* Enables FIFO */ |
997 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
998 | } else { | |
999 | /* Disables FIFO*/ | |
1000 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 1001 | |
6b8fe025 HV |
1002 | /* Disable Full Field */ |
1003 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 1004 | |
6b8fe025 HV |
1005 | /* Disable Line modes */ |
1006 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
1007 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 1008 | } |
6b8fe025 HV |
1009 | return 0; |
1010 | } | |
12db5607 | 1011 | |
d37dad49 HV |
1012 | static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) |
1013 | { | |
1014 | int i, mask = 0; | |
1015 | ||
30634e8e | 1016 | memset(svbi->service_lines, 0, sizeof(svbi->service_lines)); |
12db5607 | 1017 | |
6b8fe025 HV |
1018 | for (i = 0; i <= 23; i++) { |
1019 | svbi->service_lines[0][i] = | |
1020 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
1021 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 1022 | } |
6b8fe025 HV |
1023 | svbi->service_set = mask; |
1024 | return 0; | |
1025 | } | |
1026 | ||
21dcd8cc | 1027 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 1028 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 | 1029 | { |
8cd0d4ca DL |
1030 | int res; |
1031 | ||
8cd0d4ca DL |
1032 | res = tvp5150_read(sd, reg->reg & 0xff); |
1033 | if (res < 0) { | |
1034 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, res); | |
1035 | return res; | |
1036 | } | |
1037 | ||
1038 | reg->val = res; | |
aecde8b5 | 1039 | reg->size = 1; |
6b8fe025 HV |
1040 | return 0; |
1041 | } | |
84486d53 | 1042 | |
977ba3b1 | 1043 | static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) |
6b8fe025 | 1044 | { |
6b8fe025 HV |
1045 | tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); |
1046 | return 0; | |
1047 | } | |
1048 | #endif | |
a6c2ba28 | 1049 | |
6b8fe025 HV |
1050 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1051 | { | |
1052 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 1053 | |
6b8fe025 HV |
1054 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
1055 | return 0; | |
1056 | } | |
a6c2ba28 | 1057 | |
6b8fe025 HV |
1058 | /* ----------------------------------------------------------------------- */ |
1059 | ||
6c45ec71 HV |
1060 | static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = { |
1061 | .s_ctrl = tvp5150_s_ctrl, | |
1062 | }; | |
1063 | ||
6b8fe025 HV |
1064 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { |
1065 | .log_status = tvp5150_log_status, | |
6b8fe025 HV |
1066 | .reset = tvp5150_reset, |
1067 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1068 | .g_register = tvp5150_g_register, | |
1069 | .s_register = tvp5150_s_register, | |
1070 | #endif | |
1071 | }; | |
1072 | ||
1073 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
6b8fe025 HV |
1074 | .g_tuner = tvp5150_g_tuner, |
1075 | }; | |
1076 | ||
1077 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
8774bed9 | 1078 | .s_std = tvp5150_s_std, |
6b8fe025 | 1079 | .s_routing = tvp5150_s_routing, |
ec2c4f3f JM |
1080 | .enum_mbus_fmt = tvp5150_enum_mbus_fmt, |
1081 | .s_mbus_fmt = tvp5150_mbus_fmt, | |
1082 | .try_mbus_fmt = tvp5150_mbus_fmt, | |
0f67a03f | 1083 | .g_mbus_fmt = tvp5150_mbus_fmt, |
963ddc63 JM |
1084 | .s_crop = tvp5150_s_crop, |
1085 | .g_crop = tvp5150_g_crop, | |
1086 | .cropcap = tvp5150_cropcap, | |
32cd527f HV |
1087 | }; |
1088 | ||
1089 | static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { | |
6b8fe025 | 1090 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, |
d37dad49 HV |
1091 | .g_sliced_fmt = tvp5150_g_sliced_fmt, |
1092 | .s_sliced_fmt = tvp5150_s_sliced_fmt, | |
1093 | .s_raw_fmt = tvp5150_s_raw_fmt, | |
6b8fe025 HV |
1094 | }; |
1095 | ||
1096 | static const struct v4l2_subdev_ops tvp5150_ops = { | |
1097 | .core = &tvp5150_core_ops, | |
1098 | .tuner = &tvp5150_tuner_ops, | |
1099 | .video = &tvp5150_video_ops, | |
32cd527f | 1100 | .vbi = &tvp5150_vbi_ops, |
6b8fe025 HV |
1101 | }; |
1102 | ||
1103 | ||
cd4665c5 MCC |
1104 | /**************************************************************************** |
1105 | I2C Client & Driver | |
1106 | ****************************************************************************/ | |
cd4665c5 | 1107 | |
6b8fe025 HV |
1108 | static int tvp5150_probe(struct i2c_client *c, |
1109 | const struct i2c_device_id *id) | |
cd4665c5 | 1110 | { |
cd4665c5 | 1111 | struct tvp5150 *core; |
6b8fe025 | 1112 | struct v4l2_subdev *sd; |
8cd0d4ca DL |
1113 | int tvp5150_id[4]; |
1114 | int i, res; | |
cd4665c5 MCC |
1115 | |
1116 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1117 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1118 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1119 | return -EIO; |
cd4665c5 | 1120 | |
c02b211d LP |
1121 | core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL); |
1122 | if (!core) | |
cd4665c5 | 1123 | return -ENOMEM; |
6b8fe025 HV |
1124 | sd = &core->sd; |
1125 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); | |
8cd0d4ca DL |
1126 | |
1127 | /* | |
1128 | * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID, | |
1129 | * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER | |
1130 | */ | |
1131 | for (i = 0; i < 4; i++) { | |
1132 | res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i); | |
1133 | if (res < 0) | |
c02b211d | 1134 | return res; |
8cd0d4ca DL |
1135 | tvp5150_id[i] = res; |
1136 | } | |
1137 | ||
6b8fe025 HV |
1138 | v4l_info(c, "chip found @ 0x%02x (%s)\n", |
1139 | c->addr << 1, c->adapter->name); | |
cd4665c5 | 1140 | |
8cd0d4ca DL |
1141 | if (tvp5150_id[2] == 4 && tvp5150_id[3] == 0) { /* Is TVP5150AM1 */ |
1142 | v4l2_info(sd, "tvp%02x%02xam1 detected.\n", | |
1143 | tvp5150_id[0], tvp5150_id[1]); | |
0e09a3c9 MCC |
1144 | |
1145 | /* ITU-T BT.656.4 timing */ | |
1146 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); | |
1147 | } else { | |
8cd0d4ca DL |
1148 | /* Is TVP5150A */ |
1149 | if (tvp5150_id[2] == 3 || tvp5150_id[3] == 0x21) { | |
1150 | v4l2_info(sd, "tvp%02x%02xa detected.\n", | |
1151 | tvp5150_id[2], tvp5150_id[3]); | |
0e09a3c9 MCC |
1152 | } else { |
1153 | v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n", | |
8cd0d4ca DL |
1154 | tvp5150_id[2], tvp5150_id[3]); |
1155 | v4l2_info(sd, "*** Rom ver is %d.%d\n", | |
1156 | tvp5150_id[2], tvp5150_id[3]); | |
0e09a3c9 MCC |
1157 | } |
1158 | } | |
1159 | ||
3ad96835 | 1160 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
5325b427 | 1161 | core->input = TVP5150_COMPOSITE1; |
4c86f973 | 1162 | core->enable = 1; |
6c45ec71 HV |
1163 | |
1164 | v4l2_ctrl_handler_init(&core->hdl, 4); | |
1165 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1166 | V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); | |
1167 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1168 | V4L2_CID_CONTRAST, 0, 255, 1, 128); | |
1169 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1170 | V4L2_CID_SATURATION, 0, 255, 1, 128); | |
1171 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1172 | V4L2_CID_HUE, -128, 127, 1, 0); | |
1173 | sd->ctrl_handler = &core->hdl; | |
1174 | if (core->hdl.error) { | |
8cd0d4ca | 1175 | res = core->hdl.error; |
6c45ec71 | 1176 | v4l2_ctrl_handler_free(&core->hdl); |
c02b211d | 1177 | return res; |
6c45ec71 HV |
1178 | } |
1179 | v4l2_ctrl_handler_setup(&core->hdl); | |
4c86f973 | 1180 | |
963ddc63 JM |
1181 | /* Default is no cropping */ |
1182 | core->rect.top = 0; | |
1183 | if (tvp5150_read_std(sd) & V4L2_STD_525_60) | |
1184 | core->rect.height = TVP5150_V_MAX_525_60; | |
1185 | else | |
1186 | core->rect.height = TVP5150_V_MAX_OTHERS; | |
1187 | core->rect.left = 0; | |
1188 | core->rect.width = TVP5150_H_MAX; | |
1189 | ||
f1e5ee45 | 1190 | if (debug > 1) |
6b8fe025 | 1191 | tvp5150_log_status(sd); |
cd4665c5 MCC |
1192 | return 0; |
1193 | } | |
1194 | ||
6b8fe025 | 1195 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1196 | { |
6b8fe025 | 1197 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
6c45ec71 | 1198 | struct tvp5150 *decoder = to_tvp5150(sd); |
cd4665c5 | 1199 | |
6b8fe025 | 1200 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1201 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1202 | c->addr << 1); | |
1203 | ||
6b8fe025 | 1204 | v4l2_device_unregister_subdev(sd); |
6c45ec71 | 1205 | v4l2_ctrl_handler_free(&decoder->hdl); |
cd4665c5 MCC |
1206 | return 0; |
1207 | } | |
1208 | ||
1209 | /* ----------------------------------------------------------------------- */ | |
1210 | ||
6b8fe025 HV |
1211 | static const struct i2c_device_id tvp5150_id[] = { |
1212 | { "tvp5150", 0 }, | |
1213 | { } | |
1214 | }; | |
1215 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1216 | |
c771145b HV |
1217 | static struct i2c_driver tvp5150_driver = { |
1218 | .driver = { | |
1219 | .owner = THIS_MODULE, | |
1220 | .name = "tvp5150", | |
1221 | }, | |
1222 | .probe = tvp5150_probe, | |
1223 | .remove = tvp5150_remove, | |
1224 | .id_table = tvp5150_id, | |
cd4665c5 | 1225 | }; |
c771145b | 1226 | |
c6e8d86f | 1227 | module_i2c_driver(tvp5150_driver); |