Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
33b687cf | 10 | #include <linux/videodev2.h> |
cd4665c5 | 11 | #include <linux/delay.h> |
7a707b89 | 12 | #include <linux/module.h> |
6b8fe025 | 13 | #include <media/v4l2-device.h> |
c7c0b34c | 14 | #include <media/tvp5150.h> |
6c45ec71 | 15 | #include <media/v4l2-ctrls.h> |
cd4665c5 MCC |
16 | |
17 | #include "tvp5150_reg.h" | |
18 | ||
785a3de1 PZ |
19 | #define TVP5150_H_MAX 720U |
20 | #define TVP5150_V_MAX_525_60 480U | |
21 | #define TVP5150_V_MAX_OTHERS 576U | |
963ddc63 JM |
22 | #define TVP5150_MAX_CROP_LEFT 511 |
23 | #define TVP5150_MAX_CROP_TOP 127 | |
24 | #define TVP5150_CROP_SHIFT 2 | |
25 | ||
6ac48b45 | 26 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
27 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
28 | MODULE_LICENSE("GPL"); | |
29 | ||
cd4665c5 | 30 | |
ff699e6b | 31 | static int debug; |
2a0489d3 | 32 | module_param(debug, int, 0644); |
6b8fe025 | 33 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 MCC |
34 | |
35 | struct tvp5150 { | |
6b8fe025 | 36 | struct v4l2_subdev sd; |
6c45ec71 | 37 | struct v4l2_ctrl_handler hdl; |
963ddc63 | 38 | struct v4l2_rect rect; |
84486d53 | 39 | |
3ad96835 | 40 | v4l2_std_id norm; /* Current set standard */ |
5325b427 HV |
41 | u32 input; |
42 | u32 output; | |
84486d53 | 43 | int enable; |
cd4665c5 MCC |
44 | }; |
45 | ||
6b8fe025 | 46 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 47 | { |
6b8fe025 HV |
48 | return container_of(sd, struct tvp5150, sd); |
49 | } | |
50 | ||
6c45ec71 HV |
51 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) |
52 | { | |
53 | return &container_of(ctrl->handler, struct tvp5150, hdl)->sd; | |
54 | } | |
55 | ||
6b8fe025 HV |
56 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) |
57 | { | |
58 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 | 59 | int rc; |
e35ce2e4 LP |
60 | |
61 | rc = i2c_smbus_read_byte_data(c, addr); | |
62 | if (rc < 0) { | |
63 | v4l2_err(sd, "i2c i/o error: rc == %d\n", rc); | |
64 | return rc; | |
8cd0d4ca | 65 | } |
e1bc80ad | 66 | |
e35ce2e4 | 67 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, rc); |
cd4665c5 | 68 | |
e35ce2e4 | 69 | return rc; |
cd4665c5 MCC |
70 | } |
71 | ||
6b8fe025 | 72 | static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 73 | unsigned char value) |
cd4665c5 | 74 | { |
6b8fe025 | 75 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 | 76 | int rc; |
cd4665c5 | 77 | |
e35ce2e4 LP |
78 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", addr, value); |
79 | rc = i2c_smbus_write_byte_data(c, addr, value); | |
80 | if (rc < 0) | |
81 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d\n", rc); | |
cd4665c5 MCC |
82 | } |
83 | ||
6b8fe025 HV |
84 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
85 | const u8 end, int max_line) | |
3ad96835 | 86 | { |
6b8fe025 | 87 | int i = 0; |
3ad96835 | 88 | |
6b8fe025 HV |
89 | while (init != (u8)(end + 1)) { |
90 | if ((i % max_line) == 0) { | |
91 | if (i > 0) | |
3ad96835 | 92 | printk("\n"); |
6b8fe025 | 93 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 94 | } |
6b8fe025 | 95 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
96 | |
97 | init++; | |
98 | i++; | |
99 | } | |
100 | printk("\n"); | |
101 | } | |
102 | ||
6b8fe025 | 103 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 104 | { |
84486d53 | 105 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 106 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 107 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 108 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 109 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 110 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 111 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 112 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 113 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 114 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 115 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 116 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 117 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
118 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
119 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
120 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 121 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 122 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 123 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 124 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 125 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 126 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 127 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 128 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 129 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 130 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 131 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 132 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 133 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
134 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
135 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 136 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
137 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
138 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 139 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 140 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 141 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 142 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 143 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 144 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 145 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 146 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 147 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
148 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
149 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 150 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 151 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 152 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 153 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 154 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 155 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 156 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 157 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 158 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
159 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
160 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 161 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 162 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 163 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 164 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 165 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 166 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 167 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
168 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
169 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 170 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
171 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
172 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 173 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
174 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
175 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 176 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 177 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 178 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 179 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 180 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
181 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
182 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
183 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
184 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
185 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 186 | |
6b8fe025 HV |
187 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
188 | TVP5150_TELETEXT_FIL1_END, 8); | |
189 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
190 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 191 | |
84486d53 | 192 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 193 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 194 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 195 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 196 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 197 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 198 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 199 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 200 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 201 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 202 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 203 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 204 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 205 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 206 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 207 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 208 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 209 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 210 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
211 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
212 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 213 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 214 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 215 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 216 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 217 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 218 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 219 | |
6b8fe025 HV |
220 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
221 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 222 | |
6b8fe025 HV |
223 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
224 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 225 | |
6b8fe025 HV |
226 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
227 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 228 | |
6b8fe025 HV |
229 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
230 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 231 | |
6b8fe025 HV |
232 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
233 | TVP5150_LINE_MODE_END, 8); | |
234 | return 0; | |
cd4665c5 MCC |
235 | } |
236 | ||
237 | /**************************************************************************** | |
238 | Basic functions | |
239 | ****************************************************************************/ | |
cd4665c5 | 240 | |
6b8fe025 | 241 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 242 | { |
2962fc01 | 243 | int opmode = 0; |
6b8fe025 | 244 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 245 | int input = 0; |
afcc8e8c | 246 | int val; |
84486d53 | 247 | |
5325b427 | 248 | if ((decoder->output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
c7c0b34c | 249 | input = 8; |
4c86f973 | 250 | |
5325b427 | 251 | switch (decoder->input) { |
c7c0b34c HV |
252 | case TVP5150_COMPOSITE1: |
253 | input |= 2; | |
254 | /* fall through */ | |
255 | case TVP5150_COMPOSITE0: | |
c0477ad9 | 256 | break; |
c7c0b34c | 257 | case TVP5150_SVIDEO: |
c0477ad9 | 258 | default: |
c7c0b34c | 259 | input |= 1; |
c0477ad9 MCC |
260 | break; |
261 | } | |
262 | ||
6b8fe025 | 263 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 | 264 | "=> tvp5150 input=%i, opmode=%i\n", |
5325b427 HV |
265 | decoder->input, decoder->output, |
266 | input, opmode); | |
12500f07 | 267 | |
6b8fe025 HV |
268 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
269 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
270 | |
271 | /* Svideo should enable YCrCb output and disable GPCL output | |
272 | * For Composite and TV, it should be the reverse | |
273 | */ | |
6b8fe025 | 274 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
8cd0d4ca DL |
275 | if (val < 0) { |
276 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, val); | |
277 | return; | |
278 | } | |
279 | ||
5325b427 | 280 | if (decoder->input == TVP5150_SVIDEO) |
f4b8b3ae MCC |
281 | val = (val & ~0x40) | 0x10; |
282 | else | |
283 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 284 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
285 | }; |
286 | ||
e1bc80ad MCC |
287 | struct i2c_reg_value { |
288 | unsigned char reg; | |
289 | unsigned char value; | |
290 | }; | |
291 | ||
292 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
293 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
294 | { /* 0x00 */ | |
295 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
296 | }, | |
297 | { /* 0x01 */ | |
298 | TVP5150_ANAL_CHL_CTL,0x15 | |
299 | }, | |
300 | { /* 0x02 */ | |
301 | TVP5150_OP_MODE_CTL,0x00 | |
302 | }, | |
303 | { /* 0x03 */ | |
304 | TVP5150_MISC_CTL,0x01 | |
305 | }, | |
306 | { /* 0x06 */ | |
307 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
308 | }, | |
309 | { /* 0x07 */ | |
310 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
311 | }, | |
312 | { /* 0x08 */ | |
313 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
314 | }, | |
315 | { /* 0x09 */ | |
316 | TVP5150_BRIGHT_CTL,0x80 | |
317 | }, | |
318 | { /* 0x0a */ | |
319 | TVP5150_SATURATION_CTL,0x80 | |
320 | }, | |
321 | { /* 0x0b */ | |
322 | TVP5150_HUE_CTL,0x00 | |
323 | }, | |
324 | { /* 0x0c */ | |
325 | TVP5150_CONTRAST_CTL,0x80 | |
326 | }, | |
327 | { /* 0x0d */ | |
328 | TVP5150_DATA_RATE_SEL,0x47 | |
329 | }, | |
330 | { /* 0x0e */ | |
331 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
332 | }, | |
333 | { /* 0x0f */ | |
334 | TVP5150_CONF_SHARED_PIN,0x08 | |
335 | }, | |
336 | { /* 0x11 */ | |
337 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
338 | }, | |
339 | { /* 0x12 */ | |
340 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
341 | }, | |
342 | { /* 0x13 */ | |
343 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
344 | }, | |
345 | { /* 0x14 */ | |
346 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
347 | }, | |
348 | { /* 0x15 */ | |
349 | TVP5150_GENLOCK,0x01 | |
350 | }, | |
351 | { /* 0x16 */ | |
352 | TVP5150_HORIZ_SYNC_START,0x80 | |
353 | }, | |
354 | { /* 0x18 */ | |
355 | TVP5150_VERT_BLANKING_START,0x00 | |
356 | }, | |
357 | { /* 0x19 */ | |
358 | TVP5150_VERT_BLANKING_STOP,0x00 | |
359 | }, | |
360 | { /* 0x1a */ | |
361 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
362 | }, | |
363 | { /* 0x1b */ | |
364 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
365 | }, | |
366 | { /* 0x1c */ | |
367 | TVP5150_INT_RESET_REG_B,0x00 | |
368 | }, | |
369 | { /* 0x1d */ | |
370 | TVP5150_INT_ENABLE_REG_B,0x00 | |
371 | }, | |
372 | { /* 0x1e */ | |
373 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
374 | }, | |
375 | { /* 0x28 */ | |
376 | TVP5150_VIDEO_STD,0x00 | |
377 | }, | |
378 | { /* 0x2e */ | |
379 | TVP5150_MACROVISION_ON_CTR,0x0f | |
380 | }, | |
381 | { /* 0x2f */ | |
382 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
383 | }, | |
384 | { /* 0xbb */ | |
385 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
386 | }, | |
387 | { /* 0xc0 */ | |
388 | TVP5150_INT_STATUS_REG_A,0x00 | |
389 | }, | |
390 | { /* 0xc1 */ | |
391 | TVP5150_INT_ENABLE_REG_A,0x00 | |
392 | }, | |
393 | { /* 0xc2 */ | |
394 | TVP5150_INT_CONF,0x04 | |
395 | }, | |
396 | { /* 0xc8 */ | |
397 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
398 | }, | |
399 | { /* 0xc9 */ | |
400 | TVP5150_FIFO_RESET,0x00 | |
401 | }, | |
402 | { /* 0xca */ | |
403 | TVP5150_LINE_NUMBER_INT,0x00 | |
404 | }, | |
405 | { /* 0xcb */ | |
406 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
407 | }, | |
408 | { /* 0xcc */ | |
409 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
410 | }, | |
411 | { /* 0xcd */ | |
412 | TVP5150_FIFO_OUT_CTRL,0x01 | |
413 | }, | |
414 | { /* 0xcf */ | |
3ad96835 | 415 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
416 | }, |
417 | { /* 0xd0 */ | |
3ad96835 | 418 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
419 | }, |
420 | { /* 0xfc */ | |
421 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
422 | }, | |
423 | { /* end of data */ | |
424 | 0xff,0xff | |
425 | } | |
426 | }; | |
427 | ||
428 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
429 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
430 | { | |
431 | TVP5150_CONF_SHARED_PIN, 2 | |
432 | },{ /* Automatic offset and AGC enabled */ | |
433 | TVP5150_ANAL_CHL_CTL, 0x15 | |
434 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
435 | TVP5150_MISC_CTL, 0x6f | |
436 | },{ /* Activates video std autodetection for all standards */ | |
437 | TVP5150_AUTOSW_MSK, 0x0 | |
438 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
439 | TVP5150_DATA_RATE_SEL, 0x47 | |
440 | },{ | |
441 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
442 | },{ | |
443 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
444 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
445 | 0x27, 0x20 | |
446 | },{ | |
447 | 0xff,0xff | |
448 | } | |
449 | }; | |
450 | ||
6ac48b45 MCC |
451 | struct tvp5150_vbi_type { |
452 | unsigned int vbi_type; | |
453 | unsigned int ini_line; | |
454 | unsigned int end_line; | |
455 | unsigned int by_field :1; | |
456 | }; | |
457 | ||
e1bc80ad MCC |
458 | struct i2c_vbi_ram_value { |
459 | u16 reg; | |
6ac48b45 MCC |
460 | struct tvp5150_vbi_type type; |
461 | unsigned char values[16]; | |
e1bc80ad MCC |
462 | }; |
463 | ||
6ac48b45 MCC |
464 | /* This struct have the values for each supported VBI Standard |
465 | * by | |
466 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
467 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
468 | * and so on. There are 16 possible locations from 0 to 15. | |
469 | */ | |
3ad96835 | 470 | |
a9cff90e | 471 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 472 | { |
9bc7400a HV |
473 | /* FIXME: Current api doesn't handle all VBI types, those not |
474 | yet supported are placed under #if 0 */ | |
475 | #if 0 | |
6ac48b45 MCC |
476 | {0x010, /* Teletext, SECAM, WST System A */ |
477 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
478 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
479 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 480 | }, |
9bc7400a | 481 | #endif |
6ac48b45 | 482 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 483 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
484 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
485 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 486 | }, |
9bc7400a | 487 | #if 0 |
6ac48b45 MCC |
488 | {0x050, /* Teletext, PAL, WST System C */ |
489 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
490 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
491 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 492 | }, |
6ac48b45 MCC |
493 | {0x070, /* Teletext, NTSC, WST System B */ |
494 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
495 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
496 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 497 | }, |
6ac48b45 MCC |
498 | {0x090, /* Tetetext, NTSC NABTS System C */ |
499 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
500 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
501 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 502 | }, |
6ac48b45 MCC |
503 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
504 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
505 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
506 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 507 | }, |
6ac48b45 MCC |
508 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
509 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
510 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
511 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 512 | }, |
9bc7400a | 513 | #endif |
6ac48b45 MCC |
514 | {0x0f0, /* Closed Caption, NTSC */ |
515 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
516 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
517 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 518 | }, |
6ac48b45 | 519 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 520 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
521 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
522 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 523 | }, |
9bc7400a | 524 | #if 0 |
6ac48b45 MCC |
525 | {0x130, /* Wide Screen Signal, NTSC C */ |
526 | {V4L2_SLICED_WSS_525,20,20,1}, | |
527 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
528 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 529 | }, |
6ac48b45 MCC |
530 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
531 | {V4l2_SLICED_VITC_625,6,22,0}, | |
532 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
533 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 534 | }, |
6ac48b45 MCC |
535 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
536 | {V4l2_SLICED_VITC_525,10,20,0}, | |
537 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
538 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 539 | }, |
9bc7400a | 540 | #endif |
6ac48b45 MCC |
541 | {0x190, /* Video Program System (VPS), PAL */ |
542 | {V4L2_SLICED_VPS,16,16,0}, | |
543 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
544 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 545 | }, |
6ac48b45 MCC |
546 | /* 0x1d0 User programmable */ |
547 | ||
548 | /* End of struct */ | |
549 | { (u16)-1 } | |
e1bc80ad | 550 | }; |
4c86f973 | 551 | |
6b8fe025 | 552 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 553 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
554 | { |
555 | while (regs->reg != 0xff) { | |
6b8fe025 | 556 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
557 | regs++; |
558 | } | |
559 | return 0; | |
560 | } | |
84486d53 | 561 | |
6b8fe025 | 562 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 563 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
564 | { |
565 | unsigned int i; | |
cd4665c5 | 566 | |
e1bc80ad | 567 | /* Disable Full Field */ |
6b8fe025 | 568 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 569 | |
e1bc80ad | 570 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
571 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
572 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 573 | |
e1bc80ad | 574 | /* Load Ram Table */ |
6b8fe025 HV |
575 | while (regs->reg != (u16)-1) { |
576 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
577 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 578 | |
6b8fe025 HV |
579 | for (i = 0; i < 16; i++) |
580 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 581 | |
e1bc80ad MCC |
582 | regs++; |
583 | } | |
584 | return 0; | |
585 | } | |
cd4665c5 | 586 | |
6ac48b45 | 587 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 588 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
589 | struct v4l2_sliced_vbi_cap *cap) |
590 | { | |
6b8fe025 | 591 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
592 | int line; |
593 | ||
bccfa449 | 594 | v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n"); |
6ac48b45 MCC |
595 | memset(cap, 0, sizeof *cap); |
596 | ||
597 | while (regs->reg != (u16)-1 ) { | |
598 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
599 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
600 | } | |
601 | cap->service_set |= regs->type.vbi_type; | |
602 | ||
603 | regs++; | |
604 | } | |
6b8fe025 | 605 | return 0; |
6ac48b45 MCC |
606 | } |
607 | ||
3ad96835 MCC |
608 | /* Set vbi processing |
609 | * type - one of tvp5150_vbi_types | |
610 | * line - line to gather data | |
611 | * fields: bit 0 field1, bit 1, field2 | |
612 | * flags (default=0xf0) is a bitmask, were set means: | |
613 | * bit 7: enable filtering null bytes on CC | |
614 | * bit 6: send data also to FIFO | |
615 | * bit 5: don't allow data with errors on FIFO | |
616 | * bit 4: enable ECC when possible | |
617 | * pix_align = pix alignment: | |
618 | * LSB = field1 | |
619 | * MSB = field2 | |
620 | */ | |
6b8fe025 | 621 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
622 | const struct i2c_vbi_ram_value *regs, |
623 | unsigned int type,u8 flags, int line, | |
624 | const int fields) | |
3ad96835 | 625 | { |
6b8fe025 HV |
626 | struct tvp5150 *decoder = to_tvp5150(sd); |
627 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 628 | u8 reg; |
2701dacb | 629 | int pos=0; |
3ad96835 MCC |
630 | |
631 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 632 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 633 | return 0; |
7d5b7b98 | 634 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
635 | /* Don't follow NTSC Line number convension */ |
636 | line += 3; | |
637 | } | |
638 | ||
639 | if (line<6||line>27) | |
2701dacb MCC |
640 | return 0; |
641 | ||
642 | while (regs->reg != (u16)-1 ) { | |
643 | if ((type & regs->type.vbi_type) && | |
644 | (line>=regs->type.ini_line) && | |
645 | (line<=regs->type.end_line)) { | |
646 | type=regs->type.vbi_type; | |
647 | break; | |
648 | } | |
649 | ||
650 | regs++; | |
651 | pos++; | |
652 | } | |
653 | if (regs->reg == (u16)-1) | |
654 | return 0; | |
3ad96835 | 655 | |
2701dacb | 656 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
657 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
658 | ||
659 | if (fields&1) { | |
6b8fe025 | 660 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
661 | } |
662 | ||
663 | if (fields&2) { | |
6b8fe025 | 664 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
665 | } |
666 | ||
2701dacb | 667 | return type; |
3ad96835 MCC |
668 | } |
669 | ||
6b8fe025 | 670 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
671 | const struct i2c_vbi_ram_value *regs, int line) |
672 | { | |
6b8fe025 HV |
673 | struct tvp5150 *decoder = to_tvp5150(sd); |
674 | v4l2_std_id std = decoder->norm; | |
12db5607 | 675 | u8 reg; |
6b8fe025 | 676 | int pos, type = 0; |
8cd0d4ca | 677 | int i, ret = 0; |
12db5607 MCC |
678 | |
679 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 680 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 681 | return 0; |
7d5b7b98 | 682 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
683 | /* Don't follow NTSC Line number convension */ |
684 | line += 3; | |
685 | } | |
686 | ||
6b8fe025 | 687 | if (line < 6 || line > 27) |
12db5607 MCC |
688 | return 0; |
689 | ||
6b8fe025 | 690 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 691 | |
8cd0d4ca DL |
692 | for (i = 0; i <= 1; i++) { |
693 | ret = tvp5150_read(sd, reg + i); | |
694 | if (ret < 0) { | |
695 | v4l2_err(sd, "%s: failed with error = %d\n", | |
696 | __func__, ret); | |
697 | return 0; | |
698 | } | |
699 | pos = ret & 0x0f; | |
700 | if (pos < 0x0f) | |
701 | type |= regs[pos].type.vbi_type; | |
702 | } | |
12db5607 MCC |
703 | |
704 | return type; | |
705 | } | |
6b8fe025 HV |
706 | |
707 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 708 | { |
6b8fe025 HV |
709 | struct tvp5150 *decoder = to_tvp5150(sd); |
710 | int fmt = 0; | |
e1bc80ad | 711 | |
6b8fe025 | 712 | decoder->norm = std; |
e1bc80ad MCC |
713 | |
714 | /* First tests should be against specific std */ | |
715 | ||
26811ae0 | 716 | if (std == V4L2_STD_NTSC_443) { |
2da12fcb | 717 | fmt = VIDEO_STD_NTSC_4_43_BIT; |
26811ae0 | 718 | } else if (std == V4L2_STD_PAL_M) { |
2da12fcb | 719 | fmt = VIDEO_STD_PAL_M_BIT; |
26811ae0 | 720 | } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) { |
2da12fcb | 721 | fmt = VIDEO_STD_PAL_COMBINATION_N_BIT; |
e1bc80ad MCC |
722 | } else { |
723 | /* Then, test against generic ones */ | |
6b8fe025 | 724 | if (std & V4L2_STD_NTSC) |
2da12fcb | 725 | fmt = VIDEO_STD_NTSC_MJ_BIT; |
6b8fe025 | 726 | else if (std & V4L2_STD_PAL) |
2da12fcb | 727 | fmt = VIDEO_STD_PAL_BDGHIN_BIT; |
6b8fe025 | 728 | else if (std & V4L2_STD_SECAM) |
2da12fcb | 729 | fmt = VIDEO_STD_SECAM_BIT; |
e1bc80ad | 730 | } |
84486d53 | 731 | |
6b8fe025 HV |
732 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
733 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
734 | return 0; |
735 | } | |
736 | ||
6b8fe025 HV |
737 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
738 | { | |
739 | struct tvp5150 *decoder = to_tvp5150(sd); | |
740 | ||
741 | if (decoder->norm == std) | |
742 | return 0; | |
743 | ||
963ddc63 JM |
744 | /* Change cropping height limits */ |
745 | if (std & V4L2_STD_525_60) | |
746 | decoder->rect.height = TVP5150_V_MAX_525_60; | |
747 | else | |
748 | decoder->rect.height = TVP5150_V_MAX_OTHERS; | |
749 | ||
750 | ||
6b8fe025 HV |
751 | return tvp5150_set_std(sd, std); |
752 | } | |
753 | ||
754 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 755 | { |
6b8fe025 | 756 | struct tvp5150 *decoder = to_tvp5150(sd); |
84486d53 | 757 | |
e1bc80ad | 758 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 759 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
760 | |
761 | /* Initializes VDP registers */ | |
6b8fe025 | 762 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
763 | |
764 | /* Selects decoder input */ | |
6b8fe025 | 765 | tvp5150_selmux(sd); |
e1bc80ad MCC |
766 | |
767 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 768 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
769 | |
770 | /* Initialize image preferences */ | |
6c45ec71 | 771 | v4l2_ctrl_handler_setup(&decoder->hdl); |
e1bc80ad | 772 | |
6b8fe025 HV |
773 | tvp5150_set_std(sd, decoder->norm); |
774 | return 0; | |
cd4665c5 MCC |
775 | }; |
776 | ||
6c45ec71 | 777 | static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl) |
a6c2ba28 | 778 | { |
6c45ec71 | 779 | struct v4l2_subdev *sd = to_sd(ctrl); |
a6c2ba28 | 780 | |
781 | switch (ctrl->id) { | |
782 | case V4L2_CID_BRIGHTNESS: | |
6c45ec71 | 783 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->val); |
a6c2ba28 | 784 | return 0; |
785 | case V4L2_CID_CONTRAST: | |
6c45ec71 | 786 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->val); |
a6c2ba28 | 787 | return 0; |
788 | case V4L2_CID_SATURATION: | |
6c45ec71 | 789 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->val); |
a6c2ba28 | 790 | return 0; |
791 | case V4L2_CID_HUE: | |
6c45ec71 | 792 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->val); |
a6c2ba28 | 793 | return 0; |
a6c2ba28 | 794 | } |
c0477ad9 | 795 | return -EINVAL; |
a6c2ba28 | 796 | } |
797 | ||
ec2c4f3f JM |
798 | static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd) |
799 | { | |
800 | int val = tvp5150_read(sd, TVP5150_STATUS_REG_5); | |
801 | ||
802 | switch (val & 0x0F) { | |
803 | case 0x01: | |
804 | return V4L2_STD_NTSC; | |
805 | case 0x03: | |
806 | return V4L2_STD_PAL; | |
807 | case 0x05: | |
808 | return V4L2_STD_PAL_M; | |
809 | case 0x07: | |
810 | return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc; | |
811 | case 0x09: | |
812 | return V4L2_STD_NTSC_443; | |
813 | case 0xb: | |
814 | return V4L2_STD_SECAM; | |
815 | default: | |
816 | return V4L2_STD_UNKNOWN; | |
817 | } | |
818 | } | |
819 | ||
ebcff5fc HV |
820 | static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd, |
821 | struct v4l2_subdev_pad_config *cfg, | |
822 | struct v4l2_subdev_mbus_code_enum *code) | |
ec2c4f3f | 823 | { |
ebcff5fc | 824 | if (code->pad || code->index) |
ec2c4f3f JM |
825 | return -EINVAL; |
826 | ||
ebcff5fc | 827 | code->code = MEDIA_BUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
828 | return 0; |
829 | } | |
830 | ||
da298c6d HV |
831 | static int tvp5150_fill_fmt(struct v4l2_subdev *sd, |
832 | struct v4l2_subdev_pad_config *cfg, | |
833 | struct v4l2_subdev_format *format) | |
ec2c4f3f | 834 | { |
da298c6d | 835 | struct v4l2_mbus_framefmt *f; |
ec2c4f3f | 836 | struct tvp5150 *decoder = to_tvp5150(sd); |
ec2c4f3f | 837 | |
da298c6d | 838 | if (!format || format->pad) |
ec2c4f3f JM |
839 | return -EINVAL; |
840 | ||
da298c6d HV |
841 | f = &format->format; |
842 | ||
ec2c4f3f JM |
843 | tvp5150_reset(sd, 0); |
844 | ||
963ddc63 JM |
845 | f->width = decoder->rect.width; |
846 | f->height = decoder->rect.height; | |
ec2c4f3f | 847 | |
f5fe58fd | 848 | f->code = MEDIA_BUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
849 | f->field = V4L2_FIELD_SEQ_TB; |
850 | f->colorspace = V4L2_COLORSPACE_SMPTE170M; | |
851 | ||
852 | v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width, | |
853 | f->height); | |
854 | return 0; | |
855 | } | |
856 | ||
4f996594 | 857 | static int tvp5150_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a) |
963ddc63 JM |
858 | { |
859 | struct v4l2_rect rect = a->c; | |
860 | struct tvp5150 *decoder = to_tvp5150(sd); | |
861 | v4l2_std_id std; | |
f90580ca | 862 | unsigned int hmax; |
963ddc63 JM |
863 | |
864 | v4l2_dbg(1, debug, sd, "%s left=%d, top=%d, width=%d, height=%d\n", | |
865 | __func__, rect.left, rect.top, rect.width, rect.height); | |
866 | ||
867 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
868 | return -EINVAL; | |
869 | ||
870 | /* tvp5150 has some special limits */ | |
871 | rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT); | |
f90580ca RR |
872 | rect.width = clamp_t(unsigned int, rect.width, |
873 | TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left, | |
874 | TVP5150_H_MAX - rect.left); | |
963ddc63 JM |
875 | rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP); |
876 | ||
877 | /* Calculate height based on current standard */ | |
878 | if (decoder->norm == V4L2_STD_ALL) | |
879 | std = tvp5150_read_std(sd); | |
880 | else | |
881 | std = decoder->norm; | |
882 | ||
883 | if (std & V4L2_STD_525_60) | |
884 | hmax = TVP5150_V_MAX_525_60; | |
885 | else | |
886 | hmax = TVP5150_V_MAX_OTHERS; | |
887 | ||
f90580ca RR |
888 | rect.height = clamp_t(unsigned int, rect.height, |
889 | hmax - TVP5150_MAX_CROP_TOP - rect.top, | |
890 | hmax - rect.top); | |
963ddc63 JM |
891 | |
892 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, rect.top); | |
893 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, | |
894 | rect.top + rect.height - hmax); | |
895 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_MSB, | |
896 | rect.left >> TVP5150_CROP_SHIFT); | |
897 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_LSB, | |
898 | rect.left | (1 << TVP5150_CROP_SHIFT)); | |
899 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_MSB, | |
900 | (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >> | |
901 | TVP5150_CROP_SHIFT); | |
902 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_LSB, | |
903 | rect.left + rect.width - TVP5150_MAX_CROP_LEFT); | |
904 | ||
905 | decoder->rect = rect; | |
906 | ||
907 | return 0; | |
908 | } | |
909 | ||
910 | static int tvp5150_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
911 | { | |
12bd10c7 | 912 | struct tvp5150 *decoder = to_tvp5150(sd); |
963ddc63 JM |
913 | |
914 | a->c = decoder->rect; | |
915 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
916 | ||
917 | return 0; | |
918 | } | |
919 | ||
920 | static int tvp5150_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
921 | { | |
12bd10c7 | 922 | struct tvp5150 *decoder = to_tvp5150(sd); |
963ddc63 JM |
923 | v4l2_std_id std; |
924 | ||
925 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
926 | return -EINVAL; | |
927 | ||
928 | a->bounds.left = 0; | |
929 | a->bounds.top = 0; | |
930 | a->bounds.width = TVP5150_H_MAX; | |
931 | ||
932 | /* Calculate height based on current standard */ | |
933 | if (decoder->norm == V4L2_STD_ALL) | |
934 | std = tvp5150_read_std(sd); | |
935 | else | |
936 | std = decoder->norm; | |
937 | ||
938 | if (std & V4L2_STD_525_60) | |
939 | a->bounds.height = TVP5150_V_MAX_525_60; | |
940 | else | |
941 | a->bounds.height = TVP5150_V_MAX_OTHERS; | |
942 | ||
943 | a->defrect = a->bounds; | |
944 | a->pixelaspect.numerator = 1; | |
945 | a->pixelaspect.denominator = 1; | |
946 | ||
947 | return 0; | |
948 | } | |
949 | ||
84486d53 MCC |
950 | /**************************************************************************** |
951 | I2C Command | |
952 | ****************************************************************************/ | |
c7c0b34c | 953 | |
5325b427 HV |
954 | static int tvp5150_s_routing(struct v4l2_subdev *sd, |
955 | u32 input, u32 output, u32 config) | |
6b8fe025 HV |
956 | { |
957 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 958 | |
5325b427 HV |
959 | decoder->input = input; |
960 | decoder->output = output; | |
6b8fe025 HV |
961 | tvp5150_selmux(sd); |
962 | return 0; | |
963 | } | |
6ac48b45 | 964 | |
d37dad49 HV |
965 | static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt) |
966 | { | |
967 | /* this is for capturing 36 raw vbi lines | |
968 | if there's a way to cut off the beginning 2 vbi lines | |
969 | with the tvp5150 then the vbi line count could be lowered | |
970 | to 17 lines/field again, although I couldn't find a register | |
971 | which could do that cropping */ | |
972 | if (fmt->sample_format == V4L2_PIX_FMT_GREY) | |
973 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
974 | if (fmt->count[0] == 18 && fmt->count[1] == 18) { | |
975 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
976 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
977 | } | |
978 | return 0; | |
979 | } | |
980 | ||
981 | static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) | |
6b8fe025 | 982 | { |
6b8fe025 HV |
983 | int i; |
984 | ||
6b8fe025 HV |
985 | if (svbi->service_set != 0) { |
986 | for (i = 0; i <= 23; i++) { | |
987 | svbi->service_lines[1][i] = 0; | |
988 | svbi->service_lines[0][i] = | |
989 | tvp5150_set_vbi(sd, vbi_ram_default, | |
990 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 991 | } |
6b8fe025 HV |
992 | /* Enables FIFO */ |
993 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
994 | } else { | |
995 | /* Disables FIFO*/ | |
996 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 997 | |
6b8fe025 HV |
998 | /* Disable Full Field */ |
999 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 1000 | |
6b8fe025 HV |
1001 | /* Disable Line modes */ |
1002 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
1003 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 1004 | } |
6b8fe025 HV |
1005 | return 0; |
1006 | } | |
12db5607 | 1007 | |
d37dad49 HV |
1008 | static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) |
1009 | { | |
1010 | int i, mask = 0; | |
1011 | ||
30634e8e | 1012 | memset(svbi->service_lines, 0, sizeof(svbi->service_lines)); |
12db5607 | 1013 | |
6b8fe025 HV |
1014 | for (i = 0; i <= 23; i++) { |
1015 | svbi->service_lines[0][i] = | |
1016 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
1017 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 1018 | } |
6b8fe025 HV |
1019 | svbi->service_set = mask; |
1020 | return 0; | |
1021 | } | |
1022 | ||
21dcd8cc | 1023 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 1024 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 | 1025 | { |
8cd0d4ca DL |
1026 | int res; |
1027 | ||
8cd0d4ca DL |
1028 | res = tvp5150_read(sd, reg->reg & 0xff); |
1029 | if (res < 0) { | |
1030 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, res); | |
1031 | return res; | |
1032 | } | |
1033 | ||
1034 | reg->val = res; | |
aecde8b5 | 1035 | reg->size = 1; |
6b8fe025 HV |
1036 | return 0; |
1037 | } | |
84486d53 | 1038 | |
977ba3b1 | 1039 | static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) |
6b8fe025 | 1040 | { |
6b8fe025 HV |
1041 | tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); |
1042 | return 0; | |
1043 | } | |
1044 | #endif | |
a6c2ba28 | 1045 | |
6b8fe025 HV |
1046 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1047 | { | |
1048 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 1049 | |
6b8fe025 HV |
1050 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
1051 | return 0; | |
1052 | } | |
a6c2ba28 | 1053 | |
6b8fe025 HV |
1054 | /* ----------------------------------------------------------------------- */ |
1055 | ||
6c45ec71 HV |
1056 | static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = { |
1057 | .s_ctrl = tvp5150_s_ctrl, | |
1058 | }; | |
1059 | ||
6b8fe025 HV |
1060 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { |
1061 | .log_status = tvp5150_log_status, | |
6b8fe025 HV |
1062 | .reset = tvp5150_reset, |
1063 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1064 | .g_register = tvp5150_g_register, | |
1065 | .s_register = tvp5150_s_register, | |
1066 | #endif | |
1067 | }; | |
1068 | ||
1069 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
6b8fe025 HV |
1070 | .g_tuner = tvp5150_g_tuner, |
1071 | }; | |
1072 | ||
1073 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
8774bed9 | 1074 | .s_std = tvp5150_s_std, |
6b8fe025 | 1075 | .s_routing = tvp5150_s_routing, |
963ddc63 JM |
1076 | .s_crop = tvp5150_s_crop, |
1077 | .g_crop = tvp5150_g_crop, | |
1078 | .cropcap = tvp5150_cropcap, | |
32cd527f HV |
1079 | }; |
1080 | ||
1081 | static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { | |
6b8fe025 | 1082 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, |
d37dad49 HV |
1083 | .g_sliced_fmt = tvp5150_g_sliced_fmt, |
1084 | .s_sliced_fmt = tvp5150_s_sliced_fmt, | |
1085 | .s_raw_fmt = tvp5150_s_raw_fmt, | |
6b8fe025 HV |
1086 | }; |
1087 | ||
ebcff5fc HV |
1088 | static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = { |
1089 | .enum_mbus_code = tvp5150_enum_mbus_code, | |
da298c6d HV |
1090 | .set_fmt = tvp5150_fill_fmt, |
1091 | .get_fmt = tvp5150_fill_fmt, | |
ebcff5fc HV |
1092 | }; |
1093 | ||
6b8fe025 HV |
1094 | static const struct v4l2_subdev_ops tvp5150_ops = { |
1095 | .core = &tvp5150_core_ops, | |
1096 | .tuner = &tvp5150_tuner_ops, | |
1097 | .video = &tvp5150_video_ops, | |
32cd527f | 1098 | .vbi = &tvp5150_vbi_ops, |
ebcff5fc | 1099 | .pad = &tvp5150_pad_ops, |
6b8fe025 HV |
1100 | }; |
1101 | ||
1102 | ||
cd4665c5 MCC |
1103 | /**************************************************************************** |
1104 | I2C Client & Driver | |
1105 | ****************************************************************************/ | |
cd4665c5 | 1106 | |
6b8fe025 HV |
1107 | static int tvp5150_probe(struct i2c_client *c, |
1108 | const struct i2c_device_id *id) | |
cd4665c5 | 1109 | { |
cd4665c5 | 1110 | struct tvp5150 *core; |
6b8fe025 | 1111 | struct v4l2_subdev *sd; |
8cd0d4ca DL |
1112 | int tvp5150_id[4]; |
1113 | int i, res; | |
cd4665c5 MCC |
1114 | |
1115 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1116 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1117 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1118 | return -EIO; |
cd4665c5 | 1119 | |
c02b211d LP |
1120 | core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL); |
1121 | if (!core) | |
cd4665c5 | 1122 | return -ENOMEM; |
6b8fe025 HV |
1123 | sd = &core->sd; |
1124 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); | |
8cd0d4ca DL |
1125 | |
1126 | /* | |
1127 | * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID, | |
1128 | * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER | |
1129 | */ | |
1130 | for (i = 0; i < 4; i++) { | |
1131 | res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i); | |
1132 | if (res < 0) | |
c02b211d | 1133 | return res; |
8cd0d4ca DL |
1134 | tvp5150_id[i] = res; |
1135 | } | |
1136 | ||
6b8fe025 HV |
1137 | v4l_info(c, "chip found @ 0x%02x (%s)\n", |
1138 | c->addr << 1, c->adapter->name); | |
cd4665c5 | 1139 | |
8cd0d4ca DL |
1140 | if (tvp5150_id[2] == 4 && tvp5150_id[3] == 0) { /* Is TVP5150AM1 */ |
1141 | v4l2_info(sd, "tvp%02x%02xam1 detected.\n", | |
1142 | tvp5150_id[0], tvp5150_id[1]); | |
0e09a3c9 MCC |
1143 | |
1144 | /* ITU-T BT.656.4 timing */ | |
1145 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); | |
1146 | } else { | |
8cd0d4ca DL |
1147 | /* Is TVP5150A */ |
1148 | if (tvp5150_id[2] == 3 || tvp5150_id[3] == 0x21) { | |
1149 | v4l2_info(sd, "tvp%02x%02xa detected.\n", | |
385dded8 | 1150 | tvp5150_id[0], tvp5150_id[1]); |
0e09a3c9 MCC |
1151 | } else { |
1152 | v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n", | |
385dded8 | 1153 | tvp5150_id[0], tvp5150_id[1]); |
8cd0d4ca DL |
1154 | v4l2_info(sd, "*** Rom ver is %d.%d\n", |
1155 | tvp5150_id[2], tvp5150_id[3]); | |
0e09a3c9 MCC |
1156 | } |
1157 | } | |
1158 | ||
3ad96835 | 1159 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
5325b427 | 1160 | core->input = TVP5150_COMPOSITE1; |
4c86f973 | 1161 | core->enable = 1; |
6c45ec71 HV |
1162 | |
1163 | v4l2_ctrl_handler_init(&core->hdl, 4); | |
1164 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1165 | V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); | |
1166 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1167 | V4L2_CID_CONTRAST, 0, 255, 1, 128); | |
1168 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1169 | V4L2_CID_SATURATION, 0, 255, 1, 128); | |
1170 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1171 | V4L2_CID_HUE, -128, 127, 1, 0); | |
1172 | sd->ctrl_handler = &core->hdl; | |
1173 | if (core->hdl.error) { | |
8cd0d4ca | 1174 | res = core->hdl.error; |
6c45ec71 | 1175 | v4l2_ctrl_handler_free(&core->hdl); |
c02b211d | 1176 | return res; |
6c45ec71 HV |
1177 | } |
1178 | v4l2_ctrl_handler_setup(&core->hdl); | |
4c86f973 | 1179 | |
963ddc63 JM |
1180 | /* Default is no cropping */ |
1181 | core->rect.top = 0; | |
1182 | if (tvp5150_read_std(sd) & V4L2_STD_525_60) | |
1183 | core->rect.height = TVP5150_V_MAX_525_60; | |
1184 | else | |
1185 | core->rect.height = TVP5150_V_MAX_OTHERS; | |
1186 | core->rect.left = 0; | |
1187 | core->rect.width = TVP5150_H_MAX; | |
1188 | ||
f1e5ee45 | 1189 | if (debug > 1) |
6b8fe025 | 1190 | tvp5150_log_status(sd); |
cd4665c5 MCC |
1191 | return 0; |
1192 | } | |
1193 | ||
6b8fe025 | 1194 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1195 | { |
6b8fe025 | 1196 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
6c45ec71 | 1197 | struct tvp5150 *decoder = to_tvp5150(sd); |
cd4665c5 | 1198 | |
6b8fe025 | 1199 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1200 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1201 | c->addr << 1); | |
1202 | ||
6b8fe025 | 1203 | v4l2_device_unregister_subdev(sd); |
6c45ec71 | 1204 | v4l2_ctrl_handler_free(&decoder->hdl); |
cd4665c5 MCC |
1205 | return 0; |
1206 | } | |
1207 | ||
1208 | /* ----------------------------------------------------------------------- */ | |
1209 | ||
6b8fe025 HV |
1210 | static const struct i2c_device_id tvp5150_id[] = { |
1211 | { "tvp5150", 0 }, | |
1212 | { } | |
1213 | }; | |
1214 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1215 | |
c771145b HV |
1216 | static struct i2c_driver tvp5150_driver = { |
1217 | .driver = { | |
1218 | .owner = THIS_MODULE, | |
1219 | .name = "tvp5150", | |
1220 | }, | |
1221 | .probe = tvp5150_probe, | |
1222 | .remove = tvp5150_remove, | |
1223 | .id_table = tvp5150_id, | |
cd4665c5 | 1224 | }; |
c771145b | 1225 | |
c6e8d86f | 1226 | module_i2c_driver(tvp5150_driver); |