[deliverable/linux.git] / drivers / media / pci / cx18 / cx23418.h

/*
 *  cx18 header containing common defines.
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 *  02111-1307  USA
 */

#ifndef CX23418_H
#define CX23418_H

#include <media/drv-intf/cx2341x.h>

#define MGR_CMD_MASK            		0x40000000
/* The MSB of the command code indicates that this is the completion of a
   command */
#define MGR_CMD_MASK_ACK        		(MGR_CMD_MASK | 0x80000000)

/* Description: This command creates a new instance of a certain task
   IN[0]  - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
	    the processor on which the task YYY will be created
   OUT[0] - Task handle. This handle is passed along with commands to
	    dispatch to the right instance of the task
   ReturnCode - One of the ERR_SYS_... */
#define CX18_CREATE_TASK      			(MGR_CMD_MASK | 0x0001)

/* Description: This command destroys an instance of a task
   IN[0] - Task handle. Hanlde of the task to destroy
   ReturnCode - One of the ERR_SYS_... */
#define CX18_DESTROY_TASK     			(MGR_CMD_MASK | 0x0002)

/* All commands for CPU have the following mask set */
#define CPU_CMD_MASK                        	0x20000000
#define CPU_CMD_MASK_DEBUG       		(CPU_CMD_MASK | 0x00000000)
#define CPU_CMD_MASK_ACK                    	(CPU_CMD_MASK | 0x80000000)
#define CPU_CMD_MASK_CAPTURE                	(CPU_CMD_MASK | 0x00020000)
#define CPU_CMD_MASK_TS                     	(CPU_CMD_MASK | 0x00040000)

#define EPU_CMD_MASK                        	0x02000000
#define EPU_CMD_MASK_DEBUG       		(EPU_CMD_MASK | 0x000000)
#define EPU_CMD_MASK_DE                     	(EPU_CMD_MASK | 0x040000)

#define APU_CMD_MASK 				0x10000000
#define APU_CMD_MASK_ACK 			(APU_CMD_MASK | 0x80000000)

#define CX18_APU_ENCODING_METHOD_MPEG		(0 << 28)
#define CX18_APU_ENCODING_METHOD_AC3		(1 << 28)

/* Description: Command APU to start audio
   IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?)
   IN[1] - caller buffer address, or 0
   ReturnCode - ??? */
#define CX18_APU_START				(APU_CMD_MASK | 0x01)

/* Description: Command APU to stop audio
   IN[0] - encoding method to stop
   ReturnCode - ??? */
#define CX18_APU_STOP				(APU_CMD_MASK | 0x02)

/* Description: Command APU to reset the AI
   ReturnCode - ??? */
#define CX18_APU_RESETAI 			(APU_CMD_MASK | 0x05)

/* Description: This command indicates that a Memory Descriptor List has been
   filled with the requested channel type
   IN[0] - Task handle. Handle of the task
   IN[1] - Offset of the MDL_ACK from the beginning of the local DDR.
   IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1]
   ReturnCode - One of the ERR_DE_... */
#define CX18_EPU_DMA_DONE              		(EPU_CMD_MASK_DE | 0x0001)

/* Something interesting happened
   IN[0] - A value to log
   IN[1] - An offset of a string in the MiniMe memory;
	   0/zero/NULL means "I have nothing to say" */
#define CX18_EPU_DEBUG 				(EPU_CMD_MASK_DEBUG | 0x0003)

/* Reads memory/registers (32-bit)
   IN[0] - Address
   OUT[1] - Value */
#define CX18_CPU_DEBUG_PEEK32			(CPU_CMD_MASK_DEBUG | 0x0003)

/* Description: This command starts streaming with the set channel type
   IN[0] - Task handle. Handle of the task to start
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_CAPTURE_START               	(CPU_CMD_MASK_CAPTURE | 0x0002)

/* Description: This command stops streaming with the set channel type
   IN[0] - Task handle. Handle of the task to stop
   IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only)
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_CAPTURE_STOP                	(CPU_CMD_MASK_CAPTURE | 0x0003)

/* Description: This command pauses streaming with the set channel type
   IN[0] - Task handle. Handle of the task to pause
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_CAPTURE_PAUSE               	(CPU_CMD_MASK_CAPTURE | 0x0007)

/* Description: This command resumes streaming with the set channel type
   IN[0] - Task handle. Handle of the task to resume
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_CAPTURE_RESUME              	(CPU_CMD_MASK_CAPTURE | 0x0008)

#define CAPTURE_CHANNEL_TYPE_NONE  		0
#define CAPTURE_CHANNEL_TYPE_MPEG  		1
#define CAPTURE_CHANNEL_TYPE_INDEX 		2
#define CAPTURE_CHANNEL_TYPE_YUV   		3
#define CAPTURE_CHANNEL_TYPE_PCM   		4
#define CAPTURE_CHANNEL_TYPE_VBI   		5
#define CAPTURE_CHANNEL_TYPE_SLICED_VBI		6
#define CAPTURE_CHANNEL_TYPE_TS			7
#define CAPTURE_CHANNEL_TYPE_MAX   		15

/* Description: This command sets the channel type. This can only be done
   when stopped.
   IN[0] - Task handle. Handle of the task to start
   IN[1] - Channel Type. See Below.
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_CHANNEL_TYPE      		(CPU_CMD_MASK_CAPTURE + 1)

/* Description: Set stream output type
   IN[0] - task handle. Handle of the task to start
   IN[1] - type
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_STREAM_OUTPUT_TYPE		(CPU_CMD_MASK_CAPTURE | 0x0012)

/* Description: Set video input resolution and frame rate
   IN[0] - task handle
   IN[1] - reserved
   IN[2] - reserved
   IN[3] - reserved
   IN[4] - reserved
   IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_VIDEO_IN                	(CPU_CMD_MASK_CAPTURE | 0x0004)

/* Description: Set video frame rate
   IN[0] - task handle. Handle of the task to start
   IN[1] - video bit rate mode
   IN[2] - video average rate
   IN[3] - video peak rate
   IN[4] - system mux rate
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_VIDEO_RATE              	(CPU_CMD_MASK_CAPTURE | 0x0005)

/* Description: Set video output resolution
   IN[0] - task handle
   IN[1] - horizontal size
   IN[2] - vertical size
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_VIDEO_RESOLUTION		(CPU_CMD_MASK_CAPTURE | 0x0006)

/* Description: This command set filter parameters
   IN[0] - Task handle. Handle of the task
   IN[1] - type, 0 - temporal, 1 - spatial, 2 - median
   IN[2] - mode,  temporal/spatial: 0 - disable, 1 - static, 2 - dynamic
			median:	0 = disable, 1 = horizontal, 2 = vertical,
				3 = horizontal/vertical, 4 = diagonal
   IN[3] - strength, temporal 0 - 31, spatial 0 - 15
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_FILTER_PARAM            	(CPU_CMD_MASK_CAPTURE | 0x0009)

/* Description: This command set spatial filter type
   IN[0] - Task handle.
   IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only,
		      3 = 2D H/V separable, 4 = 2D symmetric non-separable
   IN[2] - chroma type: 0 - disable, 1 = 1D horizontal
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_SPATIAL_FILTER_TYPE     	(CPU_CMD_MASK_CAPTURE | 0x000C)

/* Description: This command set coring levels for median filter
   IN[0] - Task handle.
   IN[1] - luma_high
   IN[2] - luma_low
   IN[3] - chroma_high
   IN[4] - chroma_low
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_MEDIAN_CORING           	(CPU_CMD_MASK_CAPTURE | 0x000E)

/* Description: This command set the picture type mask for index file
   IN[0] - Task handle (ignored by firmware)
   IN[1] - 	0 = disable index file output
			1 = output I picture
			2 = P picture
			4 = B picture
			other = illegal */
#define CX18_CPU_SET_INDEXTABLE         	(CPU_CMD_MASK_CAPTURE | 0x0010)

/* Description: Set audio parameters
   IN[0] - task handle. Handle of the task to start
   IN[1] - audio parameter
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_AUDIO_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0011)

/* Description: Set video mute
   IN[0] - task handle. Handle of the task to start
   IN[1] - bit31-24: muteYvalue
	   bit23-16: muteUvalue
	   bit15-8:  muteVvalue
	   bit0:     1:mute, 0: unmute
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_VIDEO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0013)

/* Description: Set audio mute
   IN[0] - task handle. Handle of the task to start
   IN[1] - mute/unmute
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_AUDIO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0014)

/* Description: Set stream output type
   IN[0] - task handle. Handle of the task to start
   IN[1] - subType
	    SET_INITIAL_SCR      		1
	    SET_QUALITY_MODE            2
	    SET_VIM_PROTECT_MODE        3
	    SET_PTS_CORRECTION          4
	    SET_USB_FLUSH_MODE          5
	    SET_MERAQPAR_ENABLE         6
	    SET_NAV_PACK_INSERTION      7
	    SET_SCENE_CHANGE_ENABLE     8
   IN[2] - parameter 1
   IN[3] - parameter 2
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_MISC_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0015)

/* Description: Set raw VBI parameters
   IN[0] - Task handle
   IN[1] - No. of input lines per field:
				bit[15:0]: field 1,
				bit[31:16]: field 2
   IN[2] - No. of input bytes per line
   IN[3] - No. of output frames per transfer
   IN[4] - start code
   IN[5] - stop code
   ReturnCode */
#define CX18_CPU_SET_RAW_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0016)

/* Description: Set capture line No.
   IN[0] - task handle. Handle of the task to start
   IN[1] - height1
   IN[2] - height2
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_CAPTURE_LINE_NO		(CPU_CMD_MASK_CAPTURE | 0x0017)

/* Description: Set copyright
   IN[0] - task handle. Handle of the task to start
   IN[1] - copyright
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_COPYRIGHT			(CPU_CMD_MASK_CAPTURE | 0x0018)

/* Description: Set audio PID
   IN[0] - task handle. Handle of the task to start
   IN[1] - PID
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_AUDIO_PID			(CPU_CMD_MASK_CAPTURE | 0x0019)

/* Description: Set video PID
   IN[0] - task handle. Handle of the task to start
   IN[1] - PID
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_VIDEO_PID			(CPU_CMD_MASK_CAPTURE | 0x001A)

/* Description: Set Vertical Crop Line
   IN[0] - task handle. Handle of the task to start
   IN[1] - Line
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_VER_CROP_LINE		(CPU_CMD_MASK_CAPTURE | 0x001B)

/* Description: Set COP structure
   IN[0] - task handle. Handle of the task to start
   IN[1] - M
   IN[2] - N
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_GOP_STRUCTURE		(CPU_CMD_MASK_CAPTURE | 0x001C)

/* Description: Set Scene Change Detection
   IN[0] - task handle. Handle of the task to start
   IN[1] - scene change
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_SCENE_CHANGE_DETECTION	(CPU_CMD_MASK_CAPTURE | 0x001D)

/* Description: Set Aspect Ratio
   IN[0] - task handle. Handle of the task to start
   IN[1] - AspectRatio
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_ASPECT_RATIO		(CPU_CMD_MASK_CAPTURE | 0x001E)

/* Description: Set Skip Input Frame
   IN[0] - task handle. Handle of the task to start
   IN[1] - skip input frames
   ReturnCode - One of the ERR_CAPTURE_... */
#define CX18_CPU_SET_SKIP_INPUT_FRAME		(CPU_CMD_MASK_CAPTURE | 0x001F)

/* Description: Set sliced VBI parameters -
   Note This API will only apply to MPEG and Sliced VBI Channels
   IN[0] - Task handle
   IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext
   IN[2] - start / stop line
			bit[15:0] start line number
			bit[31:16] stop line number
   IN[3] - number of output frames per interrupt
   IN[4] - VBI insertion mode
			bit 0:	output user data, 1 - enable
			bit 1:	output private stream, 1 - enable
			bit 2:	mux option, 0 - in GOP, 1 - in picture
			bit[7:0] 	private stream ID
   IN[5] - insertion period while mux option is in picture
   ReturnCode - VBI data offset */
#define CX18_CPU_SET_SLICED_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0020)

/* Description: Set the user data place holder
   IN[0] - type of data (0 for user)
   IN[1] - Stuffing period
   IN[2] - ID data size in word (less than 10)
   IN[3] - Pointer to ID buffer */
#define CX18_CPU_SET_USERDATA_PLACE_HOLDER	(CPU_CMD_MASK_CAPTURE | 0x0021)


/* Description:
   In[0] Task Handle
   return parameter:
   Out[0]  Reserved
   Out[1]  Video PTS bit[32:2] of last output video frame.
   Out[2]  Video PTS bit[ 1:0] of last output video frame.
   Out[3]  Hardware Video PTS counter bit[31:0],
	     these bits get incremented on every 90kHz clock tick.
   Out[4]  Hardware Video PTS counter bit32,
	     these bits get incremented on every 90kHz clock tick.
   ReturnCode */
#define CX18_CPU_GET_ENC_PTS			(CPU_CMD_MASK_CAPTURE | 0x0022)

/* Description: Set VFC parameters
   IN[0] - task handle
   IN[1] - VFC enable flag, 1 - enable, 0 - disable
*/
#define CX18_CPU_SET_VFC_PARAM                  (CPU_CMD_MASK_CAPTURE | 0x0023)

/* Below is the list of commands related to the data exchange */
#define CPU_CMD_MASK_DE 			(CPU_CMD_MASK | 0x040000)

/* Description: This command provides the physical base address of the local
   DDR as viewed by EPU
   IN[0] - Physical offset where EPU has the local DDR mapped
   ReturnCode - One of the ERR_DE_... */
#define CPU_CMD_DE_SetBase 			(CPU_CMD_MASK_DE | 0x0001)

/* Description: This command provides the offsets in the device memory where
   the 2 cx18_mdl_ack blocks reside
   IN[0] - Task handle. Handle of the task to start
   IN[1] - Offset of the first cx18_mdl_ack from the beginning of the
	   local DDR.
   IN[2] - Offset of the second cx18_mdl_ack from the beginning of the
	   local DDR.
   ReturnCode - One of the ERR_DE_... */
#define CX18_CPU_DE_SET_MDL_ACK                	(CPU_CMD_MASK_DE | 0x0002)

/* Description: This command provides the offset to a Memory Descriptor List
   IN[0] - Task handle. Handle of the task to start
   IN[1] - Offset of the MDL from the beginning of the local DDR.
   IN[2] - Number of cx18_mdl_ent structures in the array pointed to by IN[1]
   IN[3] - Buffer ID
   IN[4] - Total buffer length
   ReturnCode - One of the ERR_DE_... */
#define CX18_CPU_DE_SET_MDL                   	(CPU_CMD_MASK_DE | 0x0005)

/* Description: This command requests return of all current Memory
   Descriptor Lists to the driver
   IN[0] - Task handle. Handle of the task to start
   ReturnCode - One of the ERR_DE_... */
#define CX18_CPU_DE_RELEASE_MDL               	(CPU_CMD_MASK_DE | 0x0006)

/* Description: This command signals the cpu that the dat buffer has been
   consumed and ready for re-use.
   IN[0] - Task handle. Handle of the task
   IN[1] - Offset of the data block from the beginning of the local DDR.
   IN[2] - Number of bytes in the data block
   ReturnCode - One of the ERR_DE_... */
/* #define CX18_CPU_DE_RELEASE_BUFFER           (CPU_CMD_MASK_DE | 0x0007) */

/* No Error / Success */
#define CNXT_OK                 0x000000

/* Received unknown command */
#define CXERR_UNK_CMD           0x000001

/* First parameter in the command is invalid */
#define CXERR_INVALID_PARAM1    0x000002

/* Second parameter in the command is invalid */
#define CXERR_INVALID_PARAM2    0x000003

/* Device interface is not open/found */
#define CXERR_DEV_NOT_FOUND     0x000004

/* Requested function is not implemented/available */
#define CXERR_NOTSUPPORTED      0x000005

/* Invalid pointer is provided */
#define CXERR_BADPTR            0x000006

/* Unable to allocate memory */
#define CXERR_NOMEM             0x000007

/* Object/Link not found */
#define CXERR_LINK              0x000008

/* Device busy, command cannot be executed */
#define CXERR_BUSY              0x000009

/* File/device/handle is not open. */
#define CXERR_NOT_OPEN          0x00000A

/* Value is out of range */
#define CXERR_OUTOFRANGE        0x00000B

/* Buffer overflow */
#define CXERR_OVERFLOW          0x00000C

/* Version mismatch */
#define CXERR_BADVER            0x00000D

/* Operation timed out */
#define CXERR_TIMEOUT           0x00000E

/* Operation aborted */
#define CXERR_ABORT             0x00000F

/* Specified I2C device not found for read/write */
#define CXERR_I2CDEV_NOTFOUND   0x000010

/* Error in I2C data xfer (but I2C device is present) */
#define CXERR_I2CDEV_XFERERR    0x000011

/* Chanel changing component not ready */
#define CXERR_CHANNELNOTREADY   0x000012

/* PPU (Presensation/Decoder) mail box is corrupted */
#define CXERR_PPU_MB_CORRUPT    0x000013

/* CPU (Capture/Encoder) mail box is corrupted */
#define CXERR_CPU_MB_CORRUPT    0x000014

/* APU (Audio) mail box is corrupted */
#define CXERR_APU_MB_CORRUPT    0x000015

/* Unable to open file for reading */
#define CXERR_FILE_OPEN_READ    0x000016

/* Unable to open file for writing */
#define CXERR_FILE_OPEN_WRITE   0x000017

/* Unable to find the I2C section specified */
#define CXERR_I2C_BADSECTION    0x000018

/* Error in I2C data xfer (but I2C device is present) */
#define CXERR_I2CDEV_DATALOW    0x000019

/* Error in I2C data xfer (but I2C device is present) */
#define CXERR_I2CDEV_CLOCKLOW   0x00001A

/* No Interrupt received from HW (for I2C access) */
#define CXERR_NO_HW_I2C_INTR    0x00001B

/* RPU is not ready to accept commands! */
#define CXERR_RPU_NOT_READY     0x00001C

/* RPU is not ready to accept commands! */
#define CXERR_RPU_NO_ACK        0x00001D

/* The are no buffers ready. Try again soon! */
#define CXERR_NODATA_AGAIN      0x00001E

/* The stream is stopping. Function not allowed now! */
#define CXERR_STOPPING_STATUS   0x00001F

/* Trying to access hardware when the power is turned OFF */
#define CXERR_DEVPOWER_OFF      0x000020

#endif /* CX23418_H */
Commit	Line	Data
1c1e45d1 HV	1	/*
	2	* cx18 header containing common defines.
	3	*
	4	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	19	* 02111-1307 USA
	20	*/
	21
	22	#ifndef CX23418_H
	23	#define CX23418_H
	24
d647f0b7	25	#include <media/drv-intf/cx2341x.h>
1c1e45d1 HV	26
	27	#define MGR_CMD_MASK 0x40000000
	28	/* The MSB of the command code indicates that this is the completion of a
	29	command */
	30	#define MGR_CMD_MASK_ACK (MGR_CMD_MASK \| 0x80000000)
	31
	32	/* Description: This command creates a new instance of a certain task
	33	IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
	34	the processor on which the task YYY will be created
	35	OUT[0] - Task handle. This handle is passed along with commands to
	36	dispatch to the right instance of the task
	37	ReturnCode - One of the ERR_SYS_... */
	38	#define CX18_CREATE_TASK (MGR_CMD_MASK \| 0x0001)
	39
	40	/* Description: This command destroys an instance of a task
	41	IN[0] - Task handle. Hanlde of the task to destroy
	42	ReturnCode - One of the ERR_SYS_... */
	43	#define CX18_DESTROY_TASK (MGR_CMD_MASK \| 0x0002)
	44
	45	/* All commands for CPU have the following mask set */
	46	#define CPU_CMD_MASK 0x20000000
fd6b9c97	47	#define CPU_CMD_MASK_DEBUG (CPU_CMD_MASK \| 0x00000000)
1c1e45d1 HV	48	#define CPU_CMD_MASK_ACK (CPU_CMD_MASK \| 0x80000000)
	49	#define CPU_CMD_MASK_CAPTURE (CPU_CMD_MASK \| 0x00020000)
	50	#define CPU_CMD_MASK_TS (CPU_CMD_MASK \| 0x00040000)
	51
	52	#define EPU_CMD_MASK 0x02000000
	53	#define EPU_CMD_MASK_DEBUG (EPU_CMD_MASK \| 0x000000)
	54	#define EPU_CMD_MASK_DE (EPU_CMD_MASK \| 0x040000)
	55
81cb727d HV	56	#define APU_CMD_MASK 0x10000000
	57	#define APU_CMD_MASK_ACK (APU_CMD_MASK \| 0x80000000)
	58
350145a4 AW	59	#define CX18_APU_ENCODING_METHOD_MPEG (0 << 28)
	60	#define CX18_APU_ENCODING_METHOD_AC3 (1 << 28)
	61
	62	/* Description: Command APU to start audio
	63	IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?)
	64	IN[1] - caller buffer address, or 0
	65	ReturnCode - ??? */
	66	#define CX18_APU_START (APU_CMD_MASK \| 0x01)
	67
	68	/* Description: Command APU to stop audio
	69	IN[0] - encoding method to stop
	70	ReturnCode - ??? */
	71	#define CX18_APU_STOP (APU_CMD_MASK \| 0x02)
	72
	73	/* Description: Command APU to reset the AI
	74	ReturnCode - ??? */
81cb727d HV	75	#define CX18_APU_RESETAI (APU_CMD_MASK \| 0x05)
81cb727d HV	76
1c1e45d1 HV	77	/* Description: This command indicates that a Memory Descriptor List has been
	78	filled with the requested channel type
	79	IN[0] - Task handle. Handle of the task
	80	IN[1] - Offset of the MDL_ACK from the beginning of the local DDR.
	81	IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1]
	82	ReturnCode - One of the ERR_DE_... */
	83	#define CX18_EPU_DMA_DONE (EPU_CMD_MASK_DE \| 0x0001)
	84
	85	/* Something interesting happened
	86	IN[0] - A value to log
	87	IN[1] - An offset of a string in the MiniMe memory;
	88	0/zero/NULL means "I have nothing to say" */
	89	#define CX18_EPU_DEBUG (EPU_CMD_MASK_DEBUG \| 0x0003)
	90
fd6b9c97 AW	91	/* Reads memory/registers (32-bit)
	92	IN[0] - Address
	93	OUT[1] - Value */
	94	#define CX18_CPU_DEBUG_PEEK32 (CPU_CMD_MASK_DEBUG \| 0x0003)
	95
1c1e45d1 HV	96	/* Description: This command starts streaming with the set channel type
	97	IN[0] - Task handle. Handle of the task to start
	98	ReturnCode - One of the ERR_CAPTURE_... */
	99	#define CX18_CPU_CAPTURE_START (CPU_CMD_MASK_CAPTURE \| 0x0002)
	100
	101	/* Description: This command stops streaming with the set channel type
	102	IN[0] - Task handle. Handle of the task to stop
	103	IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only)
	104	ReturnCode - One of the ERR_CAPTURE_... */
	105	#define CX18_CPU_CAPTURE_STOP (CPU_CMD_MASK_CAPTURE \| 0x0003)
	106
	107	/* Description: This command pauses streaming with the set channel type
	108	IN[0] - Task handle. Handle of the task to pause
	109	ReturnCode - One of the ERR_CAPTURE_... */
	110	#define CX18_CPU_CAPTURE_PAUSE (CPU_CMD_MASK_CAPTURE \| 0x0007)
	111
	112	/* Description: This command resumes streaming with the set channel type
	113	IN[0] - Task handle. Handle of the task to resume
	114	ReturnCode - One of the ERR_CAPTURE_... */
	115	#define CX18_CPU_CAPTURE_RESUME (CPU_CMD_MASK_CAPTURE \| 0x0008)
	116
	117	#define CAPTURE_CHANNEL_TYPE_NONE 0
	118	#define CAPTURE_CHANNEL_TYPE_MPEG 1
	119	#define CAPTURE_CHANNEL_TYPE_INDEX 2
	120	#define CAPTURE_CHANNEL_TYPE_YUV 3
	121	#define CAPTURE_CHANNEL_TYPE_PCM 4
	122	#define CAPTURE_CHANNEL_TYPE_VBI 5
	123	#define CAPTURE_CHANNEL_TYPE_SLICED_VBI 6
	124	#define CAPTURE_CHANNEL_TYPE_TS 7
	125	#define CAPTURE_CHANNEL_TYPE_MAX 15
	126
	127	/* Description: This command sets the channel type. This can only be done
	128	when stopped.
	129	IN[0] - Task handle. Handle of the task to start
	130	IN[1] - Channel Type. See Below.
	131	ReturnCode - One of the ERR_CAPTURE_... */
	132	#define CX18_CPU_SET_CHANNEL_TYPE (CPU_CMD_MASK_CAPTURE + 1)
	133
	134	/* Description: Set stream output type
	135	IN[0] - task handle. Handle of the task to start
	136	IN[1] - type
	137	ReturnCode - One of the ERR_CAPTURE_... */
	138	#define CX18_CPU_SET_STREAM_OUTPUT_TYPE (CPU_CMD_MASK_CAPTURE \| 0x0012)
	139
	140	/* Description: Set video input resolution and frame rate
	141	IN[0] - task handle
	142	IN[1] - reserved
	143	IN[2] - reserved
	144	IN[3] - reserved
	145	IN[4] - reserved
	146	IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s
	147	ReturnCode - One of the ERR_CAPTURE_... */
	148	#define CX18_CPU_SET_VIDEO_IN (CPU_CMD_MASK_CAPTURE \| 0x0004)
	149
	150	/* Description: Set video frame rate
	151	IN[0] - task handle. Handle of the task to start
	152	IN[1] - video bit rate mode
	153	IN[2] - video average rate
	154	IN[3] - video peak rate
	155	IN[4] - system mux rate
	156	ReturnCode - One of the ERR_CAPTURE_... */
	157	#define CX18_CPU_SET_VIDEO_RATE (CPU_CMD_MASK_CAPTURE \| 0x0005)
	158
	159	/* Description: Set video output resolution
160	IN[0] - task handle
161	IN[1] - horizontal size
162	IN[2] - vertical size
163	ReturnCode - One of the ERR_CAPTURE_... */
164	#define CX18_CPU_SET_VIDEO_RESOLUTION (CPU_CMD_MASK_CAPTURE \| 0x0006)
165
166	/* Description: This command set filter parameters
167	IN[0] - Task handle. Handle of the task
168	IN[1] - type, 0 - temporal, 1 - spatial, 2 - median
169	IN[2] - mode, temporal/spatial: 0 - disable, 1 - static, 2 - dynamic
170	median: 0 = disable, 1 = horizontal, 2 = vertical,
171	3 = horizontal/vertical, 4 = diagonal
172	IN[3] - strength, temporal 0 - 31, spatial 0 - 15
173	ReturnCode - One of the ERR_CAPTURE_... */
174	#define CX18_CPU_SET_FILTER_PARAM (CPU_CMD_MASK_CAPTURE \| 0x0009)
175
176	/* Description: This command set spatial filter type
177	IN[0] - Task handle.
178	IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only,
179	3 = 2D H/V separable, 4 = 2D symmetric non-separable
eb78bd7d	180	IN[2] - chroma type: 0 - disable, 1 = 1D horizontal
1c1e45d1 HV	181	ReturnCode - One of the ERR_CAPTURE_... */
	182	#define CX18_CPU_SET_SPATIAL_FILTER_TYPE (CPU_CMD_MASK_CAPTURE \| 0x000C)
	183
	184	/* Description: This command set coring levels for median filter
	185	IN[0] - Task handle.
	186	IN[1] - luma_high
	187	IN[2] - luma_low
	188	IN[3] - chroma_high
	189	IN[4] - chroma_low
	190	ReturnCode - One of the ERR_CAPTURE_... */
	191	#define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE \| 0x000E)
	192
	193	/* Description: This command set the picture type mask for index file
5ada5773 AW	194	IN[0] - Task handle (ignored by firmware)
5ada5773 AW	195	IN[1] - 0 = disable index file output
1c1e45d1 HV	196	1 = output I picture
	197	2 = P picture
	198	4 = B picture
	199	other = illegal */
	200	#define CX18_CPU_SET_INDEXTABLE (CPU_CMD_MASK_CAPTURE \| 0x0010)
	201
	202	/* Description: Set audio parameters
	203	IN[0] - task handle. Handle of the task to start
	204	IN[1] - audio parameter
	205	ReturnCode - One of the ERR_CAPTURE_... */
	206	#define CX18_CPU_SET_AUDIO_PARAMETERS (CPU_CMD_MASK_CAPTURE \| 0x0011)
	207
	208	/* Description: Set video mute
	209	IN[0] - task handle. Handle of the task to start
	210	IN[1] - bit31-24: muteYvalue
	211	bit23-16: muteUvalue
	212	bit15-8: muteVvalue
	213	bit0: 1:mute, 0: unmute
	214	ReturnCode - One of the ERR_CAPTURE_... */
	215	#define CX18_CPU_SET_VIDEO_MUTE (CPU_CMD_MASK_CAPTURE \| 0x0013)
	216
	217	/* Description: Set audio mute
	218	IN[0] - task handle. Handle of the task to start
	219	IN[1] - mute/unmute
	220	ReturnCode - One of the ERR_CAPTURE_... */
	221	#define CX18_CPU_SET_AUDIO_MUTE (CPU_CMD_MASK_CAPTURE \| 0x0014)
	222
	223	/* Description: Set stream output type
	224	IN[0] - task handle. Handle of the task to start
	225	IN[1] - subType
	226	SET_INITIAL_SCR 1
	227	SET_QUALITY_MODE 2
	228	SET_VIM_PROTECT_MODE 3
	229	SET_PTS_CORRECTION 4
	230	SET_USB_FLUSH_MODE 5
	231	SET_MERAQPAR_ENABLE 6
	232	SET_NAV_PACK_INSERTION 7
	233	SET_SCENE_CHANGE_ENABLE 8
	234	IN[2] - parameter 1
	235	IN[3] - parameter 2
	236	ReturnCode - One of the ERR_CAPTURE_... */
	237	#define CX18_CPU_SET_MISC_PARAMETERS (CPU_CMD_MASK_CAPTURE \| 0x0015)
	238
	239	/* Description: Set raw VBI parameters
	240	IN[0] - Task handle
	241	IN[1] - No. of input lines per field:
	242	bit[15:0]: field 1,
	243	bit[31:16]: field 2
	244	IN[2] - No. of input bytes per line
	245	IN[3] - No. of output frames per transfer
	246	IN[4] - start code
	247	IN[5] - stop code
	248	ReturnCode */
	249	#define CX18_CPU_SET_RAW_VBI_PARAM (CPU_CMD_MASK_CAPTURE \| 0x0016)
	250
	251	/* Description: Set capture line No.
	252	IN[0] - task handle. Handle of the task to start
	253	IN[1] - height1
	254	IN[2] - height2
	255	ReturnCode - One of the ERR_CAPTURE_... */
	256	#define CX18_CPU_SET_CAPTURE_LINE_NO (CPU_CMD_MASK_CAPTURE \| 0x0017)
	257
	258	/* Description: Set copyright
	259	IN[0] - task handle. Handle of the task to start
260	IN[1] - copyright
261	ReturnCode - One of the ERR_CAPTURE_... */
262	#define CX18_CPU_SET_COPYRIGHT (CPU_CMD_MASK_CAPTURE \| 0x0018)
263
264	/* Description: Set audio PID
265	IN[0] - task handle. Handle of the task to start
266	IN[1] - PID
267	ReturnCode - One of the ERR_CAPTURE_... */
268	#define CX18_CPU_SET_AUDIO_PID (CPU_CMD_MASK_CAPTURE \| 0x0019)
269
270	/* Description: Set video PID
271	IN[0] - task handle. Handle of the task to start
272	IN[1] - PID
273	ReturnCode - One of the ERR_CAPTURE_... */
274	#define CX18_CPU_SET_VIDEO_PID (CPU_CMD_MASK_CAPTURE \| 0x001A)
275
276	/* Description: Set Vertical Crop Line
277	IN[0] - task handle. Handle of the task to start
278	IN[1] - Line
279	ReturnCode - One of the ERR_CAPTURE_... */
280	#define CX18_CPU_SET_VER_CROP_LINE (CPU_CMD_MASK_CAPTURE \| 0x001B)
281
282	/* Description: Set COP structure
283	IN[0] - task handle. Handle of the task to start
284	IN[1] - M
285	IN[2] - N
286	ReturnCode - One of the ERR_CAPTURE_... */
287	#define CX18_CPU_SET_GOP_STRUCTURE (CPU_CMD_MASK_CAPTURE \| 0x001C)
288
289	/* Description: Set Scene Change Detection
290	IN[0] - task handle. Handle of the task to start
291	IN[1] - scene change
292	ReturnCode - One of the ERR_CAPTURE_... */
293	#define CX18_CPU_SET_SCENE_CHANGE_DETECTION (CPU_CMD_MASK_CAPTURE \| 0x001D)
294
295	/* Description: Set Aspect Ratio
296	IN[0] - task handle. Handle of the task to start
297	IN[1] - AspectRatio
298	ReturnCode - One of the ERR_CAPTURE_... */
299	#define CX18_CPU_SET_ASPECT_RATIO (CPU_CMD_MASK_CAPTURE \| 0x001E)
300
301	/* Description: Set Skip Input Frame
302	IN[0] - task handle. Handle of the task to start
303	IN[1] - skip input frames
304	ReturnCode - One of the ERR_CAPTURE_... */
305	#define CX18_CPU_SET_SKIP_INPUT_FRAME (CPU_CMD_MASK_CAPTURE \| 0x001F)
306
307	/* Description: Set sliced VBI parameters -
308	Note This API will only apply to MPEG and Sliced VBI Channels
309	IN[0] - Task handle
310	IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext
311	IN[2] - start / stop line
312	bit[15:0] start line number
313	bit[31:16] stop line number
314	IN[3] - number of output frames per interrupt
315	IN[4] - VBI insertion mode
316	bit 0: output user data, 1 - enable
317	bit 1: output private stream, 1 - enable
318	bit 2: mux option, 0 - in GOP, 1 - in picture
319	bit[7:0] private stream ID
320	IN[5] - insertion period while mux option is in picture
321	ReturnCode - VBI data offset */
322	#define CX18_CPU_SET_SLICED_VBI_PARAM (CPU_CMD_MASK_CAPTURE \| 0x0020)
323
324	/* Description: Set the user data place holder
325	IN[0] - type of data (0 for user)
326	IN[1] - Stuffing period
327	IN[2] - ID data size in word (less than 10)
328	IN[3] - Pointer to ID buffer */
329	#define CX18_CPU_SET_USERDATA_PLACE_HOLDER (CPU_CMD_MASK_CAPTURE \| 0x0021)
330
331
332	/* Description:
333	In[0] Task Handle
334	return parameter:
335	Out[0] Reserved
336	Out[1] Video PTS bit[32:2] of last output video frame.
337	Out[2] Video PTS bit[ 1:0] of last output video frame.
338	Out[3] Hardware Video PTS counter bit[31:0],
339	these bits get incremented on every 90kHz clock tick.
340	Out[4] Hardware Video PTS counter bit32,
341	these bits get incremented on every 90kHz clock tick.
342	ReturnCode */
343	#define CX18_CPU_GET_ENC_PTS (CPU_CMD_MASK_CAPTURE \| 0x0022)
344
b7101de3 ST	345	/* Description: Set VFC parameters
	346	IN[0] - task handle
	347	IN[1] - VFC enable flag, 1 - enable, 0 - disable
	348	*/
	349	#define CX18_CPU_SET_VFC_PARAM (CPU_CMD_MASK_CAPTURE \| 0x0023)
	350
1c1e45d1 HV	351	/* Below is the list of commands related to the data exchange */
	352	#define CPU_CMD_MASK_DE (CPU_CMD_MASK \| 0x040000)
	353
	354	/* Description: This command provides the physical base address of the local
	355	DDR as viewed by EPU
	356	IN[0] - Physical offset where EPU has the local DDR mapped
	357	ReturnCode - One of the ERR_DE_... */
	358	#define CPU_CMD_DE_SetBase (CPU_CMD_MASK_DE \| 0x0001)
	359
	360	/* Description: This command provides the offsets in the device memory where
	361	the 2 cx18_mdl_ack blocks reside
	362	IN[0] - Task handle. Handle of the task to start
	363	IN[1] - Offset of the first cx18_mdl_ack from the beginning of the
	364	local DDR.
	365	IN[2] - Offset of the second cx18_mdl_ack from the beginning of the
	366	local DDR.
	367	ReturnCode - One of the ERR_DE_... */
	368	#define CX18_CPU_DE_SET_MDL_ACK (CPU_CMD_MASK_DE \| 0x0002)
	369
	370	/* Description: This command provides the offset to a Memory Descriptor List
	371	IN[0] - Task handle. Handle of the task to start
	372	IN[1] - Offset of the MDL from the beginning of the local DDR.
f0076e60	373	IN[2] - Number of cx18_mdl_ent structures in the array pointed to by IN[1]
1c1e45d1 HV	374	IN[3] - Buffer ID
	375	IN[4] - Total buffer length
	376	ReturnCode - One of the ERR_DE_... */
	377	#define CX18_CPU_DE_SET_MDL (CPU_CMD_MASK_DE \| 0x0005)
	378
	379	/* Description: This command requests return of all current Memory
	380	Descriptor Lists to the driver
	381	IN[0] - Task handle. Handle of the task to start
	382	ReturnCode - One of the ERR_DE_... */
3b5df8ea	383	#define CX18_CPU_DE_RELEASE_MDL (CPU_CMD_MASK_DE \| 0x0006)
1c1e45d1 HV	384
	385	/* Description: This command signals the cpu that the dat buffer has been
	386	consumed and ready for re-use.
	387	IN[0] - Task handle. Handle of the task
	388	IN[1] - Offset of the data block from the beginning of the local DDR.
	389	IN[2] - Number of bytes in the data block
	390	ReturnCode - One of the ERR_DE_... */
	391	/* #define CX18_CPU_DE_RELEASE_BUFFER (CPU_CMD_MASK_DE \| 0x0007) */
	392
	393	/* No Error / Success */
	394	#define CNXT_OK 0x000000
	395
	396	/* Received unknown command */
	397	#define CXERR_UNK_CMD 0x000001
	398
	399	/* First parameter in the command is invalid */
	400	#define CXERR_INVALID_PARAM1 0x000002
	401
	402	/* Second parameter in the command is invalid */
	403	#define CXERR_INVALID_PARAM2 0x000003
	404
	405	/* Device interface is not open/found */
	406	#define CXERR_DEV_NOT_FOUND 0x000004
	407
	408	/* Requested function is not implemented/available */
	409	#define CXERR_NOTSUPPORTED 0x000005
	410
	411	/* Invalid pointer is provided */
	412	#define CXERR_BADPTR 0x000006
	413
	414	/* Unable to allocate memory */
	415	#define CXERR_NOMEM 0x000007
	416
	417	/* Object/Link not found */
	418	#define CXERR_LINK 0x000008
	419
	420	/* Device busy, command cannot be executed */
	421	#define CXERR_BUSY 0x000009
	422
	423	/* File/device/handle is not open. */
	424	#define CXERR_NOT_OPEN 0x00000A
	425
	426	/* Value is out of range */
	427	#define CXERR_OUTOFRANGE 0x00000B
	428
	429	/* Buffer overflow */
	430	#define CXERR_OVERFLOW 0x00000C
	431
	432	/* Version mismatch */
	433	#define CXERR_BADVER 0x00000D
	434
	435	/* Operation timed out */
	436	#define CXERR_TIMEOUT 0x00000E
	437
	438	/* Operation aborted */
	439	#define CXERR_ABORT 0x00000F
	440
	441	/* Specified I2C device not found for read/write */
	442	#define CXERR_I2CDEV_NOTFOUND 0x000010
	443
	444	/* Error in I2C data xfer (but I2C device is present) */
	445	#define CXERR_I2CDEV_XFERERR 0x000011
	446
	447	/* Chanel changing component not ready */
448	#define CXERR_CHANNELNOTREADY 0x000012
449
450	/* PPU (Presensation/Decoder) mail box is corrupted */
451	#define CXERR_PPU_MB_CORRUPT 0x000013
452
453	/* CPU (Capture/Encoder) mail box is corrupted */
454	#define CXERR_CPU_MB_CORRUPT 0x000014
455
456	/* APU (Audio) mail box is corrupted */
457	#define CXERR_APU_MB_CORRUPT 0x000015
458
459	/* Unable to open file for reading */
460	#define CXERR_FILE_OPEN_READ 0x000016
461
462	/* Unable to open file for writing */
463	#define CXERR_FILE_OPEN_WRITE 0x000017
464
465	/* Unable to find the I2C section specified */
466	#define CXERR_I2C_BADSECTION 0x000018
467
468	/* Error in I2C data xfer (but I2C device is present) */
469	#define CXERR_I2CDEV_DATALOW 0x000019
470
471	/* Error in I2C data xfer (but I2C device is present) */
472	#define CXERR_I2CDEV_CLOCKLOW 0x00001A
473
474	/* No Interrupt received from HW (for I2C access) */
475	#define CXERR_NO_HW_I2C_INTR 0x00001B
476
477	/* RPU is not ready to accept commands! */
478	#define CXERR_RPU_NOT_READY 0x00001C
479
480	/* RPU is not ready to accept commands! */
481	#define CXERR_RPU_NO_ACK 0x00001D
482
483	/* The are no buffers ready. Try again soon! */
484	#define CXERR_NODATA_AGAIN 0x00001E
485
f41e4e99	486	/* The stream is stopping. Function not allowed now! */
1c1e45d1 HV	487	#define CXERR_STOPPING_STATUS 0x00001F
	488
	489	/* Trying to access hardware when the power is turned OFF */
	490	#define CXERR_DEVPOWER_OFF 0x000020
	491
	492	#endif /* CX23418_H */