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[media] siano: Use the default firmware for Stellar
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885.h
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/pci.h>
23#include <linux/i2c.h>
d19770e5 24#include <linux/kdev_t.h>
5a0e3ad6 25#include <linux/slab.h>
d19770e5 26
c0714f6c 27#include <media/v4l2-device.h>
d19770e5
ST		 28#include <media/tuner.h>
29#include <media/tveeprom.h>
409d84f8
TP		 30#include <media/videobuf-dma-sg.h>
31#include <media/videobuf-dvb.h>
6bda9644 32#include <media/rc-core.h>
d19770e5
ST		 33
34#include "btcx-risc.h"
35#include "cx23885-reg.h"
b1b81f1d 36#include "media/cx2341x.h"
d19770e5 37
d19770e5
ST		 38#include <linux/mutex.h>
39
1990d50b 40#define CX23885_VERSION "0.0.3"
d19770e5
ST		 41
42#define UNSET (-1U)
43
44#define CX23885_MAXBOARDS 8
45
d19770e5
ST		 46/* Max number of inputs by card */
47#define MAX_CX23885_INPUT 8
7b888014
ST		 48#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49#define RESOURCE_OVERLAY 1
50#define RESOURCE_VIDEO 2
51#define RESOURCE_VBI 4
d19770e5 52
d19770e5
ST		 53#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54
55#define CX23885_BOARD_NOAUTO UNSET
56#define CX23885_BOARD_UNKNOWN 0
57#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
58#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
a77743bc 59#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
9bc37caa 60#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
d1987d55 61#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
07b4a835 62#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
b3ea0166 63#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
a780a31c 64#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66762373 65#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
335377b7 66#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
aef2d186 67#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
4c56b04a 68#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
9bb1b7e8 69#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
96318d0c 70#define CX23885_BOARD_TBS_6920 14
579943f5 71#define CX23885_BOARD_TEVII_S470 15
c9b8b04b 72#define CX23885_BOARD_DVBWORLD_2005 16
5a23b076 73#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
2074dffa 74#define CX23885_BOARD_HAUPPAUGE_HVR1270 18
d099becb 75#define CX23885_BOARD_HAUPPAUGE_HVR1275 19
19bc5796 76#define CX23885_BOARD_HAUPPAUGE_HVR1255 20
6b926eca 77#define CX23885_BOARD_HAUPPAUGE_HVR1210 21
493b7127 78#define CX23885_BOARD_MYGICA_X8506 22
2365b2d3 79#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
13697380 80#define CX23885_BOARD_HAUPPAUGE_HVR1850 24
34e383dd 81#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
aee0b24c 82#define CX23885_BOARD_HAUPPAUGE_HVR1290 26
ea5697fe 83#define CX23885_BOARD_MYGICA_X8558PRO 27
0b32d65c 84#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
9028f58f 85#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
78db8547 86#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
0cf8af57 87#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
2cb9ccd4 88#define CX23885_BOARD_MPX885 32
87988753 89#define CX23885_BOARD_MYGICA_X8507 33
722c90eb 90#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
7b134e85 91#define CX23885_BOARD_TEVII_S471 35
0ac60acb 92#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
f667190b 93#define CX23885_BOARD_PROF_8000 37
7c62f5a1 94#define CX23885_BOARD_HAUPPAUGE_HVR4400 38
e8d42373 95#define CX23885_BOARD_AVERMEDIA_HC81R 39
e6001482
LA		 96#define CX23885_BOARD_TBS_6981 40
97#define CX23885_BOARD_TBS_6980 41
d19770e5 98
6f8bee9b
ST		 99#define GPIO_0 0x00000001
100#define GPIO_1 0x00000002
101#define GPIO_2 0x00000004
102#define GPIO_3 0x00000008
103#define GPIO_4 0x00000010
104#define GPIO_5 0x00000020
105#define GPIO_6 0x00000040
106#define GPIO_7 0x00000080
107#define GPIO_8 0x00000100
108#define GPIO_9 0x00000200
f659c513
ST		 109#define GPIO_10 0x00000400
110#define GPIO_11 0x00000800
111#define GPIO_12 0x00001000
112#define GPIO_13 0x00002000
113#define GPIO_14 0x00004000
114#define GPIO_15 0x00008000
6f8bee9b 115
7b888014
ST		 116/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
117#define CX23885_NORMS (\
118 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
119 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
120 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
121 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
122
123struct cx23885_fmt {
124 char *name;
125 u32 fourcc; /* v4l2 format id */
126 int depth;
127 int flags;
128 u32 cxformat;
129};
130
131struct cx23885_ctrl {
132 struct v4l2_queryctrl v;
133 u32 off;
134 u32 reg;
135 u32 mask;
136 u32 shift;
137};
138
139struct cx23885_tvnorm {
140 char *name;
141 v4l2_std_id id;
142 u32 cxiformat;
143 u32 cxoformat;
144};
145
146struct cx23885_fh {
147 struct cx23885_dev *dev;
148 enum v4l2_buf_type type;
149 int radio;
150 u32 resources;
151
152 /* video overlay */
153 struct v4l2_window win;
154 struct v4l2_clip *clips;
155 unsigned int nclips;
156
157 /* video capture */
158 struct cx23885_fmt *fmt;
159 unsigned int width, height;
160
161 /* vbi capture */
162 struct videobuf_queue vidq;
163 struct videobuf_queue vbiq;
164
165 /* MPEG Encoder specifics ONLY */
166 struct videobuf_queue mpegq;
167 atomic_t v4l_reading;
168};
169
d19770e5
ST		 170enum cx23885_itype {
171 CX23885_VMUX_COMPOSITE1 = 1,
172 CX23885_VMUX_COMPOSITE2,
173 CX23885_VMUX_COMPOSITE3,
174 CX23885_VMUX_COMPOSITE4,
175 CX23885_VMUX_SVIDEO,
dac65fa1 176 CX23885_VMUX_COMPONENT,
d19770e5
ST		 177 CX23885_VMUX_TELEVISION,
178 CX23885_VMUX_CABLE,
179 CX23885_VMUX_DVB,
180 CX23885_VMUX_DEBUG,
181 CX23885_RADIO,
182};
183
579f1163
ST		 184enum cx23885_src_sel_type {
185 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
186 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
187};
188
d19770e5
ST		 189/* buffer for one video frame */
190struct cx23885_buffer {
191 /* common v4l buffer stuff -- must be first */
192 struct videobuf_buffer vb;
193
194 /* cx23885 specific */
195 unsigned int bpl;
196 struct btcx_riscmem risc;
197 struct cx23885_fmt *fmt;
198 u32 count;
199};
200
201struct cx23885_input {
202 enum cx23885_itype type;
203 unsigned int vmux;
8304be88 204 unsigned int amux;
d19770e5
ST		 205 u32 gpio0, gpio1, gpio2, gpio3;
206};
207
661c7e44
ST		 208typedef enum {
209 CX23885_MPEG_UNDEFINED = 0,
7b888014
ST		 210 CX23885_MPEG_DVB,
211 CX23885_ANALOG_VIDEO,
b1b81f1d 212 CX23885_MPEG_ENCODER,
661c7e44
ST		 213} port_t;
214
d19770e5
ST		 215struct cx23885_board {
216 char *name;
7b888014 217 port_t porta, portb, portc;
10d0dcd7 218 int num_fds_portb, num_fds_portc;
7b888014
ST		 219 unsigned int tuner_type;
220 unsigned int radio_type;
221 unsigned char tuner_addr;
222 unsigned char radio_addr;
557f48d5 223 unsigned int tuner_bus;
c7712613
ST		 224
225 /* Vendors can and do run the PCIe bridge at different
226 * clock rates, driven physically by crystals on the PCBs.
25985edc 227 * The core has to accommodate this. This allows the user
c7712613
ST		 228 * to add new boards with new frequencys. The value is
229 * expressed in Hz.
230 *
231 * The core framework will default this value based on
232 * current designs, but it can vary.
233 */
234 u32 clk_freq;
d19770e5 235 struct cx23885_input input[MAX_CX23885_INPUT];
78db8547 236 int ci_type; /* for NetUP */
35045137
ST		 237 /* Force bottom field first during DMA (888 workaround) */
238 u32 force_bff;
d19770e5
ST		 239};
240
241struct cx23885_subid {
242 u16 subvendor;
243 u16 subdevice;
244 u32 card;
245};
246
247struct cx23885_i2c {
248 struct cx23885_dev *dev;
249
250 int nr;
251
252 /* i2c i/o */
253 struct i2c_adapter i2c_adap;
d19770e5
ST		 254 struct i2c_client i2c_client;
255 u32 i2c_rc;
256
257 /* 885 registers used for raw addess */
258 u32 i2c_period;
259 u32 reg_ctrl;
260 u32 reg_stat;
261 u32 reg_addr;
262 u32 reg_rdata;
263 u32 reg_wdata;
264};
265
266struct cx23885_dmaqueue {
267 struct list_head active;
268 struct list_head queued;
269 struct timer_list timeout;
270 struct btcx_riscmem stopper;
271 u32 count;
272};
273
274struct cx23885_tsport {
275 struct cx23885_dev *dev;
276
277 int nr;
278 int sram_chno;
279
363c35fc 280 struct videobuf_dvb_frontends frontends;
d19770e5
ST		 281
282 /* dma queues */
283 struct cx23885_dmaqueue mpegq;
284 u32 ts_packet_size;
285 u32 ts_packet_count;
286
287 int width;
288 int height;
289
290 spinlock_t slock;
291
292 /* registers */
293 u32 reg_gpcnt;
294 u32 reg_gpcnt_ctl;
295 u32 reg_dma_ctl;
296 u32 reg_lngth;
297 u32 reg_hw_sop_ctrl;
298 u32 reg_gen_ctrl;
299 u32 reg_bd_pkt_status;
300 u32 reg_sop_status;
301 u32 reg_fifo_ovfl_stat;
302 u32 reg_vld_misc;
303 u32 reg_ts_clk_en;
304 u32 reg_ts_int_msk;
a6a3f140 305 u32 reg_ts_int_stat;
579f1163 306 u32 reg_src_sel;
d19770e5
ST		 307
308 /* Default register vals */
309 int pci_irqmask;
310 u32 dma_ctl_val;
311 u32 ts_int_msk_val;
312 u32 gen_ctrl_val;
313 u32 ts_clk_en_val;
579f1163 314 u32 src_sel_val;
b1b81f1d
ST		 315 u32 vld_misc_val;
316 u32 hw_sop_ctrl_val;
a739a7e4
ST		 317
318 /* Allow a single tsport to have multiple frontends */
319 u32 num_frontends;
78db8547 320 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
5a23b076 321 void *port_priv;
35045137
ST		 322
323 /* Workaround for a temp dvb_frontend that the tuner can attached to */
324 struct dvb_frontend analog_fe;
15472faf
MCC		 325
326 int (*set_frontend)(struct dvb_frontend *fe);
d19770e5
ST		 327};
328
43c24078
AW		 329struct cx23885_kernel_ir {
330 struct cx23885_dev *cx;
eeefae53
AW		 331 char *name;
332 char *phys;
333
d8b4b582 334 struct rc_dev *rc;
eeefae53
AW		 335};
336
9e44d632
MM		 337struct cx23885_audio_buffer {
338 unsigned int bpl;
339 struct btcx_riscmem risc;
340 struct videobuf_dmabuf dma;
341};
342
343struct cx23885_audio_dev {
344 struct cx23885_dev *dev;
345
346 struct pci_dev *pci;
347
348 struct snd_card *card;
349
350 spinlock_t lock;
351
352 atomic_t count;
353
354 unsigned int dma_size;
355 unsigned int period_size;
356 unsigned int num_periods;
357
358 struct videobuf_dmabuf *dma_risc;
359
360 struct cx23885_audio_buffer *buf;
361
362 struct snd_pcm_substream *substream;
363};
364
d19770e5 365struct cx23885_dev {
d19770e5 366 atomic_t refcount;
c0714f6c 367 struct v4l2_device v4l2_dev;
d19770e5
ST		 368
369 /* pci stuff */
370 struct pci_dev *pci;
371 unsigned char pci_rev, pci_lat;
372 int pci_bus, pci_slot;
373 u32 __iomem *lmmio;
374 u8 __iomem *bmmio;
d19770e5 375 int pci_irqmask;
dbe83a3b 376 spinlock_t pci_irqmask_lock; /* protects mask reg too */
0ac5881a 377 int hwrevision;
d19770e5 378
c7712613
ST		 379 /* This valud is board specific and is used to configure the
380 * AV core so we see nice clean and stable video and audio. */
381 u32 clk_freq;
382
44a6481d 383 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
d19770e5
ST		 384 struct cx23885_i2c i2c_bus[3];
385
386 int nr;
387 struct mutex lock;
8386c27f 388 struct mutex gpio_lock;
d19770e5
ST		 389
390 /* board details */
391 unsigned int board;
392 char name[32];
393
a6a3f140 394 struct cx23885_tsport ts1, ts2;
d19770e5
ST		 395
396 /* sram configuration */
397 struct sram_channel *sram_channels;
e133be0f
ST		 398
399 enum {
400 CX23885_BRIDGE_UNDEFINED = 0,
401 CX23885_BRIDGE_885 = 885,
402 CX23885_BRIDGE_887 = 887,
25ea66e2 403 CX23885_BRIDGE_888 = 888,
e133be0f 404 } bridge;
7b888014
ST		 405
406 /* Analog video */
407 u32 resources;
408 unsigned int input;
fc1a889d 409 unsigned int audinput; /* Selectable audio input */
7b888014
ST		 410 u32 tvaudio;
411 v4l2_std_id tvnorm;
412 unsigned int tuner_type;
413 unsigned char tuner_addr;
557f48d5 414 unsigned int tuner_bus;
7b888014
ST		 415 unsigned int radio_type;
416 unsigned char radio_addr;
417 unsigned int has_radio;
0d5a19f1 418 struct v4l2_subdev *sd_cx25840;
e5514f10 419 struct work_struct cx25840_work;
f59ad611
AW		 420
421 /* Infrared */
422 struct v4l2_subdev *sd_ir;
423 struct work_struct ir_rx_work;
424 unsigned long ir_rx_notifications;
425 struct work_struct ir_tx_work;
426 unsigned long ir_tx_notifications;
7b888014 427
43c24078 428 struct cx23885_kernel_ir *kernel_ir;
dbda8f70
AW		 429 atomic_t ir_input_stopping;
430
7b888014
ST		 431 /* V4l */
432 u32 freq;
433 struct video_device *video_dev;
434 struct video_device *vbi_dev;
435 struct video_device *radio_dev;
436
437 struct cx23885_dmaqueue vidq;
438 struct cx23885_dmaqueue vbiq;
439 spinlock_t slock;
b1b81f1d
ST		 440
441 /* MPEG Encoder ONLY settings */
442 u32 cx23417_mailbox;
443 struct cx2341x_mpeg_params mpeg_params;
444 struct video_device *v4l_device;
445 atomic_t v4l_reader_count;
446 struct cx23885_tvnorm encodernorm;
447
9e44d632
MM		 448 /* Analog raw audio */
449 struct cx23885_audio_dev *audio_dev;
450
d19770e5
ST		 451};
452
c0714f6c
HV		 453static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
454{
455 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
456}
457
0d5a19f1
HV		 458#define call_all(dev, o, f, args...) \
459 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
460
d6b1850d
AW		 461#define CX23885_HW_888_IR (1 << 0)
462#define CX23885_HW_AV_CORE (1 << 1)
29f8a0a5
AW		 463
464#define call_hw(dev, grpid, o, f, args...) \
465 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
466
467extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
468
d19770e5
ST		 469#define SRAM_CH01 0 /* Video A */
470#define SRAM_CH02 1 /* VBI A */
471#define SRAM_CH03 2 /* Video B */
472#define SRAM_CH04 3 /* Transport via B */
473#define SRAM_CH05 4 /* VBI B */
474#define SRAM_CH06 5 /* Video C */
475#define SRAM_CH07 6 /* Transport via C */
476#define SRAM_CH08 7 /* Audio Internal A */
477#define SRAM_CH09 8 /* Audio Internal B */
478#define SRAM_CH10 9 /* Audio External */
479#define SRAM_CH11 10 /* COMB_3D_N */
480#define SRAM_CH12 11 /* Comb 3D N1 */
481#define SRAM_CH13 12 /* Comb 3D N2 */
482#define SRAM_CH14 13 /* MOE Vid */
483#define SRAM_CH15 14 /* MOE RSLT */
484
485struct sram_channel {
486 char *name;
487 u32 cmds_start;
488 u32 ctrl_start;
489 u32 cdt;
1ebcad77 490 u32 fifo_start;
d19770e5
ST		 491 u32 fifo_size;
492 u32 ptr1_reg;
493 u32 ptr2_reg;
494 u32 cnt1_reg;
495 u32 cnt2_reg;
496 u32 jumponly;
497};
498
499/* ----------------------------------------------------------- */
500
501#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
9c8ced51 502#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
d19770e5 503
9c8ced51 504#define cx_andor(reg, mask, value) \
d19770e5
ST		 505 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
506 ((value) & (mask)), dev->lmmio+((reg)>>2))
507
9c8ced51
ST		 508#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
509#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
d19770e5 510
d19770e5 511/* ----------------------------------------------------------- */
7b888014
ST		 512/* cx23885-core.c */
513
514extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
515 struct sram_channel *ch,
516 unsigned int bpl, u32 risc);
517
518extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
519 struct sram_channel *ch);
d19770e5 520
7b888014
ST		 521extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
522 u32 reg, u32 mask, u32 value);
523
524extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
525 struct scatterlist *sglist,
526 unsigned int top_offset, unsigned int bottom_offset,
527 unsigned int bpl, unsigned int padding, unsigned int lines);
528
5ab27e6d
ST		 529extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
530 struct btcx_riscmem *risc, struct scatterlist *sglist,
531 unsigned int top_offset, unsigned int bottom_offset,
532 unsigned int bpl, unsigned int padding, unsigned int lines);
533
7b888014
ST		 534void cx23885_cancel_buffers(struct cx23885_tsport *port);
535
536extern int cx23885_restart_queue(struct cx23885_tsport *port,
537 struct cx23885_dmaqueue *q);
538
539extern void cx23885_wakeup(struct cx23885_tsport *port,
540 struct cx23885_dmaqueue *q, u32 count);
541
6f8bee9b
ST		 542extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
543extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
09ea33e5 544extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
6f8bee9b
ST		 545extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
546 int asoutput);
547
dbe83a3b
AW		 548extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
549extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
550extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
551extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
7b888014
ST		 552
553/* ----------------------------------------------------------- */
554/* cx23885-cards.c */
d19770e5
ST		 555extern struct cx23885_board cx23885_boards[];
556extern const unsigned int cx23885_bcount;
557
558extern struct cx23885_subid cx23885_subids[];
559extern const unsigned int cx23885_idcount;
560
9c8ced51
ST		 561extern int cx23885_tuner_callback(void *priv, int component,
562 int command, int arg);
d19770e5 563extern void cx23885_card_list(struct cx23885_dev *dev);
a6a3f140 564extern int cx23885_ir_init(struct cx23885_dev *dev);
f59ad611
AW		 565extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
566extern void cx23885_ir_fini(struct cx23885_dev *dev);
a6a3f140 567extern void cx23885_gpio_setup(struct cx23885_dev *dev);
d19770e5
ST		 568extern void cx23885_card_setup(struct cx23885_dev *dev);
569extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
570
571extern int cx23885_dvb_register(struct cx23885_tsport *port);
572extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
573
44a6481d
MK		 574extern int cx23885_buf_prepare(struct videobuf_queue *q,
575 struct cx23885_tsport *port,
576 struct cx23885_buffer *buf,
577 enum v4l2_field field);
44a6481d
MK		 578extern void cx23885_buf_queue(struct cx23885_tsport *port,
579 struct cx23885_buffer *buf);
580extern void cx23885_free_buffer(struct videobuf_queue *q,
581 struct cx23885_buffer *buf);
d19770e5
ST		 582
583/* ----------------------------------------------------------- */
7b888014
ST		 584/* cx23885-video.c */
585/* Video */
586extern int cx23885_video_register(struct cx23885_dev *dev);
587extern void cx23885_video_unregister(struct cx23885_dev *dev);
588extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
b5f74050
ST		 589extern void cx23885_video_wakeup(struct cx23885_dev *dev,
590 struct cx23885_dmaqueue *q, u32 count);
35045137
ST		 591int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
592int cx23885_set_input(struct file *file, void *priv, unsigned int i);
593int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
b530a447 594int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
35045137
ST		 595int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
596int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
597int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
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ST		 598
599/* ----------------------------------------------------------- */
600/* cx23885-vbi.c */
601extern int cx23885_vbi_fmt(struct file *file, void *priv,
602 struct v4l2_format *f);
603extern void cx23885_vbi_timeout(unsigned long data);
604extern struct videobuf_queue_ops cx23885_vbi_qops;
b5f74050
ST		 605extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
606 struct cx23885_dmaqueue *q);
607extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
7b888014 608
d19770e5
ST		 609/* cx23885-i2c.c */
610extern int cx23885_i2c_register(struct cx23885_i2c *bus);
611extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
a589b665 612extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
d19770e5 613
b1b81f1d
ST		 614/* ----------------------------------------------------------- */
615/* cx23885-417.c */
616extern int cx23885_417_register(struct cx23885_dev *dev);
617extern void cx23885_417_unregister(struct cx23885_dev *dev);
618extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
619extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
620extern void cx23885_mc417_init(struct cx23885_dev *dev);
621extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
622extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
74618244
AW		 623extern int mc417_register_read(struct cx23885_dev *dev,
624 u16 address, u32 *value);
625extern int mc417_register_write(struct cx23885_dev *dev,
626 u16 address, u32 value);
f659c513
ST		 627extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
628extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
629extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
b1b81f1d 630
9e44d632
MM		 631/* ----------------------------------------------------------- */
632/* cx23885-alsa.c */
efa762f5
ST		 633extern struct cx23885_audio_dev *cx23885_audio_register(
634 struct cx23885_dev *dev);
635extern void cx23885_audio_unregister(struct cx23885_dev *dev);
9e44d632
MM		 636extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
637extern int cx23885_risc_databuffer(struct pci_dev *pci,
638 struct btcx_riscmem *risc,
639 struct scatterlist *sglist,
640 unsigned int bpl,
641 unsigned int lines,
642 unsigned int lpi);
b1b81f1d 643
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ST		 644/* ----------------------------------------------------------- */
645/* tv norms */
646
647static inline unsigned int norm_maxw(v4l2_std_id norm)
648{
649 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
650}
651
652static inline unsigned int norm_maxh(v4l2_std_id norm)
653{
654 return (norm & V4L2_STD_625_50) ? 576 : 480;
655}
656
657static inline unsigned int norm_swidth(v4l2_std_id norm)
658{
659 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
660}
Linux kernel - Deliverables
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