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95c5d605 AG |
1 | /* |
2 | * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * Freescale VIU video driver | |
5 | * | |
6 | * Authors: Hongjun Chen <hong-jun.chen@freescale.com> | |
7 | * Porting to 2.6.35 by DENX Software Engineering, | |
8 | * Anatolij Gustschin <agust@denx.de> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | * | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/io.h> | |
5af50730 RH |
24 | #include <linux/of_address.h> |
25 | #include <linux/of_irq.h> | |
95c5d605 | 26 | #include <linux/of_platform.h> |
e69e34e9 | 27 | #include <linux/slab.h> |
95c5d605 AG |
28 | #include <media/v4l2-common.h> |
29 | #include <media/v4l2-device.h> | |
30 | #include <media/v4l2-ioctl.h> | |
1fea3d60 | 31 | #include <media/v4l2-ctrls.h> |
7fe0b3d7 HV |
32 | #include <media/v4l2-fh.h> |
33 | #include <media/v4l2-event.h> | |
95c5d605 AG |
34 | #include <media/videobuf-dma-contig.h> |
35 | ||
36 | #define DRV_NAME "fsl_viu" | |
64dc3c1a | 37 | #define VIU_VERSION "0.5.1" |
95c5d605 AG |
38 | |
39 | #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */ | |
40 | ||
41 | #define VIU_VID_MEM_LIMIT 4 /* Video memory limit, in Mb */ | |
42 | ||
43 | /* I2C address of video decoder chip is 0x4A */ | |
44 | #define VIU_VIDEO_DECODER_ADDR 0x25 | |
45 | ||
95c5d605 AG |
46 | static int info_level; |
47 | ||
48 | #define dprintk(level, fmt, arg...) \ | |
49 | do { \ | |
50 | if (level <= info_level) \ | |
51 | printk(KERN_DEBUG "viu: " fmt , ## arg); \ | |
52 | } while (0) | |
53 | ||
54 | /* | |
55 | * Basic structures | |
56 | */ | |
57 | struct viu_fmt { | |
95c5d605 AG |
58 | u32 fourcc; /* v4l2 format id */ |
59 | u32 pixelformat; | |
60 | int depth; | |
61 | }; | |
62 | ||
63 | static struct viu_fmt formats[] = { | |
64 | { | |
95c5d605 AG |
65 | .fourcc = V4L2_PIX_FMT_RGB565, |
66 | .pixelformat = V4L2_PIX_FMT_RGB565, | |
67 | .depth = 16, | |
68 | }, { | |
95c5d605 AG |
69 | .fourcc = V4L2_PIX_FMT_RGB32, |
70 | .pixelformat = V4L2_PIX_FMT_RGB32, | |
71 | .depth = 32, | |
72 | } | |
73 | }; | |
74 | ||
75 | struct viu_dev; | |
76 | struct viu_buf; | |
77 | ||
78 | /* buffer for one video frame */ | |
79 | struct viu_buf { | |
80 | /* common v4l buffer stuff -- must be first */ | |
81 | struct videobuf_buffer vb; | |
82 | struct viu_fmt *fmt; | |
83 | }; | |
84 | ||
85 | struct viu_dmaqueue { | |
86 | struct viu_dev *dev; | |
87 | struct list_head active; | |
88 | struct list_head queued; | |
89 | struct timer_list timeout; | |
90 | }; | |
91 | ||
92 | struct viu_status { | |
93 | u32 field_irq; | |
94 | u32 vsync_irq; | |
95 | u32 hsync_irq; | |
96 | u32 vstart_irq; | |
97 | u32 dma_end_irq; | |
98 | u32 error_irq; | |
99 | }; | |
100 | ||
101 | struct viu_reg { | |
102 | u32 status_cfg; | |
103 | u32 luminance; | |
104 | u32 chroma_r; | |
105 | u32 chroma_g; | |
106 | u32 chroma_b; | |
107 | u32 field_base_addr; | |
108 | u32 dma_inc; | |
109 | u32 picture_count; | |
110 | u32 req_alarm; | |
111 | u32 alpha; | |
112 | } __attribute__ ((packed)); | |
113 | ||
114 | struct viu_dev { | |
115 | struct v4l2_device v4l2_dev; | |
1fea3d60 | 116 | struct v4l2_ctrl_handler hdl; |
95c5d605 AG |
117 | struct mutex lock; |
118 | spinlock_t slock; | |
119 | int users; | |
120 | ||
121 | struct device *dev; | |
122 | /* various device info */ | |
123 | struct video_device *vdev; | |
124 | struct viu_dmaqueue vidq; | |
125 | enum v4l2_field capfield; | |
126 | int field; | |
127 | int first; | |
128 | int dma_done; | |
129 | ||
130 | /* Hardware register area */ | |
131 | struct viu_reg *vr; | |
132 | ||
133 | /* Interrupt vector */ | |
134 | int irq; | |
135 | struct viu_status irqs; | |
136 | ||
137 | /* video overlay */ | |
138 | struct v4l2_framebuffer ovbuf; | |
139 | struct viu_fmt *ovfmt; | |
140 | unsigned int ovenable; | |
141 | enum v4l2_field ovfield; | |
142 | ||
143 | /* crop */ | |
144 | struct v4l2_rect crop_current; | |
145 | ||
146 | /* clock pointer */ | |
147 | struct clk *clk; | |
148 | ||
149 | /* decoder */ | |
150 | struct v4l2_subdev *decoder; | |
50155c25 AG |
151 | |
152 | v4l2_std_id std; | |
95c5d605 AG |
153 | }; |
154 | ||
155 | struct viu_fh { | |
7fe0b3d7 HV |
156 | /* must remain the first field of this struct */ |
157 | struct v4l2_fh fh; | |
95c5d605 AG |
158 | struct viu_dev *dev; |
159 | ||
160 | /* video capture */ | |
161 | struct videobuf_queue vb_vidq; | |
162 | spinlock_t vbq_lock; /* spinlock for the videobuf queue */ | |
163 | ||
164 | /* video overlay */ | |
165 | struct v4l2_window win; | |
166 | struct v4l2_clip clips[1]; | |
167 | ||
168 | /* video capture */ | |
169 | struct viu_fmt *fmt; | |
170 | int width, height, sizeimage; | |
171 | enum v4l2_buf_type type; | |
172 | }; | |
173 | ||
174 | static struct viu_reg reg_val; | |
175 | ||
176 | /* | |
177 | * Macro definitions of VIU registers | |
178 | */ | |
179 | ||
180 | /* STATUS_CONFIG register */ | |
181 | enum status_config { | |
182 | SOFT_RST = 1 << 0, | |
183 | ||
184 | ERR_MASK = 0x0f << 4, /* Error code mask */ | |
185 | ERR_NO = 0x00, /* No error */ | |
186 | ERR_DMA_V = 0x01 << 4, /* DMA in vertical active */ | |
187 | ERR_DMA_VB = 0x02 << 4, /* DMA in vertical blanking */ | |
188 | ERR_LINE_TOO_LONG = 0x04 << 4, /* Line too long */ | |
189 | ERR_TOO_MANG_LINES = 0x05 << 4, /* Too many lines in field */ | |
190 | ERR_LINE_TOO_SHORT = 0x06 << 4, /* Line too short */ | |
191 | ERR_NOT_ENOUGH_LINE = 0x07 << 4, /* Not enough lines in field */ | |
192 | ERR_FIFO_OVERFLOW = 0x08 << 4, /* FIFO overflow */ | |
193 | ERR_FIFO_UNDERFLOW = 0x09 << 4, /* FIFO underflow */ | |
194 | ERR_1bit_ECC = 0x0a << 4, /* One bit ECC error */ | |
195 | ERR_MORE_ECC = 0x0b << 4, /* Two/more bits ECC error */ | |
196 | ||
197 | INT_FIELD_EN = 0x01 << 8, /* Enable field interrupt */ | |
198 | INT_VSYNC_EN = 0x01 << 9, /* Enable vsync interrupt */ | |
199 | INT_HSYNC_EN = 0x01 << 10, /* Enable hsync interrupt */ | |
200 | INT_VSTART_EN = 0x01 << 11, /* Enable vstart interrupt */ | |
201 | INT_DMA_END_EN = 0x01 << 12, /* Enable DMA end interrupt */ | |
202 | INT_ERROR_EN = 0x01 << 13, /* Enable error interrupt */ | |
203 | INT_ECC_EN = 0x01 << 14, /* Enable ECC interrupt */ | |
204 | ||
205 | INT_FIELD_STATUS = 0x01 << 16, /* field interrupt status */ | |
206 | INT_VSYNC_STATUS = 0x01 << 17, /* vsync interrupt status */ | |
207 | INT_HSYNC_STATUS = 0x01 << 18, /* hsync interrupt status */ | |
208 | INT_VSTART_STATUS = 0x01 << 19, /* vstart interrupt status */ | |
209 | INT_DMA_END_STATUS = 0x01 << 20, /* DMA end interrupt status */ | |
210 | INT_ERROR_STATUS = 0x01 << 21, /* error interrupt status */ | |
211 | ||
212 | DMA_ACT = 0x01 << 27, /* Enable DMA transfer */ | |
213 | FIELD_NO = 0x01 << 28, /* Field number */ | |
214 | DITHER_ON = 0x01 << 29, /* Dithering is on */ | |
215 | ROUND_ON = 0x01 << 30, /* Round is on */ | |
216 | MODE_32BIT = 0x01 << 31, /* Data in RGBa888, | |
217 | * 0 in RGB565 | |
218 | */ | |
219 | }; | |
220 | ||
221 | #define norm_maxw() 720 | |
222 | #define norm_maxh() 576 | |
223 | ||
224 | #define INT_ALL_STATUS (INT_FIELD_STATUS | INT_VSYNC_STATUS | \ | |
225 | INT_HSYNC_STATUS | INT_VSTART_STATUS | \ | |
226 | INT_DMA_END_STATUS | INT_ERROR_STATUS) | |
227 | ||
228 | #define NUM_FORMATS ARRAY_SIZE(formats) | |
229 | ||
230 | static irqreturn_t viu_intr(int irq, void *dev_id); | |
231 | ||
232 | struct viu_fmt *format_by_fourcc(int fourcc) | |
233 | { | |
234 | int i; | |
235 | ||
236 | for (i = 0; i < NUM_FORMATS; i++) { | |
237 | if (formats[i].pixelformat == fourcc) | |
238 | return formats + i; | |
239 | } | |
240 | ||
241 | dprintk(0, "unknown pixelformat:'%4.4s'\n", (char *)&fourcc); | |
242 | return NULL; | |
243 | } | |
244 | ||
245 | void viu_start_dma(struct viu_dev *dev) | |
246 | { | |
247 | struct viu_reg *vr = dev->vr; | |
248 | ||
249 | dev->field = 0; | |
250 | ||
251 | /* Enable DMA operation */ | |
252 | out_be32(&vr->status_cfg, SOFT_RST); | |
253 | out_be32(&vr->status_cfg, INT_FIELD_EN); | |
254 | } | |
255 | ||
256 | void viu_stop_dma(struct viu_dev *dev) | |
257 | { | |
258 | struct viu_reg *vr = dev->vr; | |
259 | int cnt = 100; | |
260 | u32 status_cfg; | |
261 | ||
262 | out_be32(&vr->status_cfg, 0); | |
263 | ||
264 | /* Clear pending interrupts */ | |
265 | status_cfg = in_be32(&vr->status_cfg); | |
266 | if (status_cfg & 0x3f0000) | |
267 | out_be32(&vr->status_cfg, status_cfg & 0x3f0000); | |
268 | ||
269 | if (status_cfg & DMA_ACT) { | |
270 | do { | |
271 | status_cfg = in_be32(&vr->status_cfg); | |
272 | if (status_cfg & INT_DMA_END_STATUS) | |
273 | break; | |
274 | } while (cnt--); | |
275 | ||
276 | if (cnt < 0) { | |
277 | /* timed out, issue soft reset */ | |
278 | out_be32(&vr->status_cfg, SOFT_RST); | |
279 | out_be32(&vr->status_cfg, 0); | |
280 | } else { | |
281 | /* clear DMA_END and other pending irqs */ | |
282 | out_be32(&vr->status_cfg, status_cfg & 0x3f0000); | |
283 | } | |
284 | } | |
285 | ||
286 | dev->field = 0; | |
287 | } | |
288 | ||
289 | static int restart_video_queue(struct viu_dmaqueue *vidq) | |
290 | { | |
291 | struct viu_buf *buf, *prev; | |
292 | ||
293 | dprintk(1, "%s vidq=0x%08lx\n", __func__, (unsigned long)vidq); | |
294 | if (!list_empty(&vidq->active)) { | |
295 | buf = list_entry(vidq->active.next, struct viu_buf, vb.queue); | |
296 | dprintk(2, "restart_queue [%p/%d]: restart dma\n", | |
297 | buf, buf->vb.i); | |
298 | ||
299 | viu_stop_dma(vidq->dev); | |
300 | ||
301 | /* cancel all outstanding capture requests */ | |
302 | list_for_each_entry_safe(buf, prev, &vidq->active, vb.queue) { | |
303 | list_del(&buf->vb.queue); | |
304 | buf->vb.state = VIDEOBUF_ERROR; | |
305 | wake_up(&buf->vb.done); | |
306 | } | |
307 | mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT); | |
308 | return 0; | |
309 | } | |
310 | ||
311 | prev = NULL; | |
312 | for (;;) { | |
313 | if (list_empty(&vidq->queued)) | |
314 | return 0; | |
315 | buf = list_entry(vidq->queued.next, struct viu_buf, vb.queue); | |
316 | if (prev == NULL) { | |
0666c6b8 | 317 | list_move_tail(&buf->vb.queue, &vidq->active); |
95c5d605 AG |
318 | |
319 | dprintk(1, "Restarting video dma\n"); | |
320 | viu_stop_dma(vidq->dev); | |
321 | viu_start_dma(vidq->dev); | |
322 | ||
323 | buf->vb.state = VIDEOBUF_ACTIVE; | |
324 | mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT); | |
325 | dprintk(2, "[%p/%d] restart_queue - first active\n", | |
326 | buf, buf->vb.i); | |
327 | ||
328 | } else if (prev->vb.width == buf->vb.width && | |
329 | prev->vb.height == buf->vb.height && | |
330 | prev->fmt == buf->fmt) { | |
0666c6b8 | 331 | list_move_tail(&buf->vb.queue, &vidq->active); |
95c5d605 AG |
332 | buf->vb.state = VIDEOBUF_ACTIVE; |
333 | dprintk(2, "[%p/%d] restart_queue - move to active\n", | |
334 | buf, buf->vb.i); | |
335 | } else { | |
336 | return 0; | |
337 | } | |
338 | prev = buf; | |
339 | } | |
340 | } | |
341 | ||
342 | static void viu_vid_timeout(unsigned long data) | |
343 | { | |
344 | struct viu_dev *dev = (struct viu_dev *)data; | |
345 | struct viu_buf *buf; | |
346 | struct viu_dmaqueue *vidq = &dev->vidq; | |
347 | ||
348 | while (!list_empty(&vidq->active)) { | |
349 | buf = list_entry(vidq->active.next, struct viu_buf, vb.queue); | |
350 | list_del(&buf->vb.queue); | |
351 | buf->vb.state = VIDEOBUF_ERROR; | |
352 | wake_up(&buf->vb.done); | |
353 | dprintk(1, "viu/0: [%p/%d] timeout\n", buf, buf->vb.i); | |
354 | } | |
355 | ||
356 | restart_video_queue(vidq); | |
357 | } | |
358 | ||
359 | /* | |
360 | * Videobuf operations | |
361 | */ | |
362 | static int buffer_setup(struct videobuf_queue *vq, unsigned int *count, | |
363 | unsigned int *size) | |
364 | { | |
365 | struct viu_fh *fh = vq->priv_data; | |
366 | ||
367 | *size = fh->width * fh->height * fh->fmt->depth >> 3; | |
368 | if (*count == 0) | |
369 | *count = 32; | |
370 | ||
371 | while (*size * *count > VIU_VID_MEM_LIMIT * 1024 * 1024) | |
372 | (*count)--; | |
373 | ||
374 | dprintk(1, "%s, count=%d, size=%d\n", __func__, *count, *size); | |
375 | return 0; | |
376 | } | |
377 | ||
378 | static void free_buffer(struct videobuf_queue *vq, struct viu_buf *buf) | |
379 | { | |
380 | struct videobuf_buffer *vb = &buf->vb; | |
381 | void *vaddr = NULL; | |
382 | ||
383 | BUG_ON(in_interrupt()); | |
384 | ||
0e0809a5 | 385 | videobuf_waiton(vq, &buf->vb, 0, 0); |
95c5d605 AG |
386 | |
387 | if (vq->int_ops && vq->int_ops->vaddr) | |
388 | vaddr = vq->int_ops->vaddr(vb); | |
389 | ||
390 | if (vaddr) | |
391 | videobuf_dma_contig_free(vq, &buf->vb); | |
392 | ||
393 | buf->vb.state = VIDEOBUF_NEEDS_INIT; | |
394 | } | |
395 | ||
396 | inline int buffer_activate(struct viu_dev *dev, struct viu_buf *buf) | |
397 | { | |
398 | struct viu_reg *vr = dev->vr; | |
399 | int bpp; | |
400 | ||
401 | /* setup the DMA base address */ | |
402 | reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb); | |
403 | ||
404 | dprintk(1, "buffer_activate [%p/%d]: dma addr 0x%lx\n", | |
405 | buf, buf->vb.i, (unsigned long)reg_val.field_base_addr); | |
406 | ||
407 | /* interlace is on by default, set horizontal DMA increment */ | |
408 | reg_val.status_cfg = 0; | |
409 | bpp = buf->fmt->depth >> 3; | |
410 | switch (bpp) { | |
411 | case 2: | |
412 | reg_val.status_cfg &= ~MODE_32BIT; | |
413 | reg_val.dma_inc = buf->vb.width * 2; | |
414 | break; | |
415 | case 4: | |
416 | reg_val.status_cfg |= MODE_32BIT; | |
417 | reg_val.dma_inc = buf->vb.width * 4; | |
418 | break; | |
419 | default: | |
420 | dprintk(0, "doesn't support color depth(%d)\n", | |
421 | bpp * 8); | |
422 | return -EINVAL; | |
423 | } | |
424 | ||
425 | /* setup picture_count register */ | |
426 | reg_val.picture_count = (buf->vb.height / 2) << 16 | | |
427 | buf->vb.width; | |
428 | ||
429 | reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN; | |
430 | ||
431 | buf->vb.state = VIDEOBUF_ACTIVE; | |
432 | dev->capfield = buf->vb.field; | |
433 | ||
434 | /* reset dma increment if needed */ | |
435 | if (!V4L2_FIELD_HAS_BOTH(buf->vb.field)) | |
436 | reg_val.dma_inc = 0; | |
437 | ||
438 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
439 | out_be32(&vr->picture_count, reg_val.picture_count); | |
440 | out_be32(&vr->field_base_addr, reg_val.field_base_addr); | |
441 | mod_timer(&dev->vidq.timeout, jiffies + BUFFER_TIMEOUT); | |
442 | return 0; | |
443 | } | |
444 | ||
445 | static int buffer_prepare(struct videobuf_queue *vq, | |
446 | struct videobuf_buffer *vb, | |
447 | enum v4l2_field field) | |
448 | { | |
449 | struct viu_fh *fh = vq->priv_data; | |
450 | struct viu_buf *buf = container_of(vb, struct viu_buf, vb); | |
451 | int rc; | |
452 | ||
453 | BUG_ON(fh->fmt == NULL); | |
454 | ||
455 | if (fh->width < 48 || fh->width > norm_maxw() || | |
456 | fh->height < 32 || fh->height > norm_maxh()) | |
457 | return -EINVAL; | |
458 | buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3; | |
459 | if (buf->vb.baddr != 0 && buf->vb.bsize < buf->vb.size) | |
460 | return -EINVAL; | |
461 | ||
462 | if (buf->fmt != fh->fmt || | |
463 | buf->vb.width != fh->width || | |
464 | buf->vb.height != fh->height || | |
465 | buf->vb.field != field) { | |
466 | buf->fmt = fh->fmt; | |
467 | buf->vb.width = fh->width; | |
468 | buf->vb.height = fh->height; | |
469 | buf->vb.field = field; | |
470 | } | |
471 | ||
472 | if (buf->vb.state == VIDEOBUF_NEEDS_INIT) { | |
473 | rc = videobuf_iolock(vq, &buf->vb, NULL); | |
474 | if (rc != 0) | |
475 | goto fail; | |
476 | ||
477 | buf->vb.width = fh->width; | |
478 | buf->vb.height = fh->height; | |
479 | buf->vb.field = field; | |
480 | buf->fmt = fh->fmt; | |
481 | } | |
482 | ||
483 | buf->vb.state = VIDEOBUF_PREPARED; | |
484 | return 0; | |
485 | ||
486 | fail: | |
487 | free_buffer(vq, buf); | |
488 | return rc; | |
489 | } | |
490 | ||
491 | static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) | |
492 | { | |
493 | struct viu_buf *buf = container_of(vb, struct viu_buf, vb); | |
494 | struct viu_fh *fh = vq->priv_data; | |
495 | struct viu_dev *dev = fh->dev; | |
496 | struct viu_dmaqueue *vidq = &dev->vidq; | |
497 | struct viu_buf *prev; | |
498 | ||
499 | if (!list_empty(&vidq->queued)) { | |
500 | dprintk(1, "adding vb queue=0x%08lx\n", | |
501 | (unsigned long)&buf->vb.queue); | |
502 | dprintk(1, "vidq pointer 0x%p, queued 0x%p\n", | |
503 | vidq, &vidq->queued); | |
504 | dprintk(1, "dev %p, queued: self %p, next %p, head %p\n", | |
505 | dev, &vidq->queued, vidq->queued.next, | |
506 | vidq->queued.prev); | |
507 | list_add_tail(&buf->vb.queue, &vidq->queued); | |
508 | buf->vb.state = VIDEOBUF_QUEUED; | |
509 | dprintk(2, "[%p/%d] buffer_queue - append to queued\n", | |
510 | buf, buf->vb.i); | |
511 | } else if (list_empty(&vidq->active)) { | |
512 | dprintk(1, "adding vb active=0x%08lx\n", | |
513 | (unsigned long)&buf->vb.queue); | |
514 | list_add_tail(&buf->vb.queue, &vidq->active); | |
515 | buf->vb.state = VIDEOBUF_ACTIVE; | |
516 | mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT); | |
517 | dprintk(2, "[%p/%d] buffer_queue - first active\n", | |
518 | buf, buf->vb.i); | |
519 | ||
520 | buffer_activate(dev, buf); | |
521 | } else { | |
522 | dprintk(1, "adding vb queue2=0x%08lx\n", | |
523 | (unsigned long)&buf->vb.queue); | |
524 | prev = list_entry(vidq->active.prev, struct viu_buf, vb.queue); | |
525 | if (prev->vb.width == buf->vb.width && | |
526 | prev->vb.height == buf->vb.height && | |
527 | prev->fmt == buf->fmt) { | |
528 | list_add_tail(&buf->vb.queue, &vidq->active); | |
529 | buf->vb.state = VIDEOBUF_ACTIVE; | |
530 | dprintk(2, "[%p/%d] buffer_queue - append to active\n", | |
531 | buf, buf->vb.i); | |
532 | } else { | |
533 | list_add_tail(&buf->vb.queue, &vidq->queued); | |
534 | buf->vb.state = VIDEOBUF_QUEUED; | |
535 | dprintk(2, "[%p/%d] buffer_queue - first queued\n", | |
536 | buf, buf->vb.i); | |
537 | } | |
538 | } | |
539 | } | |
540 | ||
541 | static void buffer_release(struct videobuf_queue *vq, | |
542 | struct videobuf_buffer *vb) | |
543 | { | |
544 | struct viu_buf *buf = container_of(vb, struct viu_buf, vb); | |
545 | struct viu_fh *fh = vq->priv_data; | |
546 | struct viu_dev *dev = (struct viu_dev *)fh->dev; | |
547 | ||
548 | viu_stop_dma(dev); | |
549 | free_buffer(vq, buf); | |
550 | } | |
551 | ||
552 | static struct videobuf_queue_ops viu_video_qops = { | |
553 | .buf_setup = buffer_setup, | |
554 | .buf_prepare = buffer_prepare, | |
555 | .buf_queue = buffer_queue, | |
556 | .buf_release = buffer_release, | |
557 | }; | |
558 | ||
559 | /* | |
560 | * IOCTL vidioc handling | |
561 | */ | |
562 | static int vidioc_querycap(struct file *file, void *priv, | |
563 | struct v4l2_capability *cap) | |
564 | { | |
565 | strcpy(cap->driver, "viu"); | |
566 | strcpy(cap->card, "viu"); | |
282b3fb8 | 567 | strcpy(cap->bus_info, "platform:viu"); |
a020c747 | 568 | cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | |
95c5d605 AG |
569 | V4L2_CAP_STREAMING | |
570 | V4L2_CAP_VIDEO_OVERLAY | | |
571 | V4L2_CAP_READWRITE; | |
a020c747 | 572 | cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; |
95c5d605 AG |
573 | return 0; |
574 | } | |
575 | ||
576 | static int vidioc_enum_fmt(struct file *file, void *priv, | |
577 | struct v4l2_fmtdesc *f) | |
578 | { | |
579 | int index = f->index; | |
580 | ||
9acc8093 | 581 | if (f->index >= NUM_FORMATS) |
95c5d605 AG |
582 | return -EINVAL; |
583 | ||
95c5d605 AG |
584 | f->pixelformat = formats[index].fourcc; |
585 | return 0; | |
586 | } | |
587 | ||
588 | static int vidioc_g_fmt_cap(struct file *file, void *priv, | |
589 | struct v4l2_format *f) | |
590 | { | |
591 | struct viu_fh *fh = priv; | |
592 | ||
593 | f->fmt.pix.width = fh->width; | |
594 | f->fmt.pix.height = fh->height; | |
595 | f->fmt.pix.field = fh->vb_vidq.field; | |
596 | f->fmt.pix.pixelformat = fh->fmt->pixelformat; | |
597 | f->fmt.pix.bytesperline = | |
598 | (f->fmt.pix.width * fh->fmt->depth) >> 3; | |
599 | f->fmt.pix.sizeimage = fh->sizeimage; | |
e299bc99 | 600 | f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; |
95c5d605 AG |
601 | return 0; |
602 | } | |
603 | ||
604 | static int vidioc_try_fmt_cap(struct file *file, void *priv, | |
605 | struct v4l2_format *f) | |
606 | { | |
607 | struct viu_fmt *fmt; | |
95c5d605 AG |
608 | unsigned int maxw, maxh; |
609 | ||
610 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
611 | if (!fmt) { | |
612 | dprintk(1, "Fourcc format (0x%08x) invalid.", | |
613 | f->fmt.pix.pixelformat); | |
614 | return -EINVAL; | |
615 | } | |
616 | ||
95c5d605 AG |
617 | maxw = norm_maxw(); |
618 | maxh = norm_maxh(); | |
619 | ||
e299bc99 | 620 | f->fmt.pix.field = V4L2_FIELD_INTERLACED; |
95c5d605 AG |
621 | if (f->fmt.pix.height < 32) |
622 | f->fmt.pix.height = 32; | |
623 | if (f->fmt.pix.height > maxh) | |
624 | f->fmt.pix.height = maxh; | |
625 | if (f->fmt.pix.width < 48) | |
626 | f->fmt.pix.width = 48; | |
627 | if (f->fmt.pix.width > maxw) | |
628 | f->fmt.pix.width = maxw; | |
629 | f->fmt.pix.width &= ~0x03; | |
630 | f->fmt.pix.bytesperline = | |
631 | (f->fmt.pix.width * fmt->depth) >> 3; | |
9acc8093 | 632 | f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline; |
e299bc99 | 633 | f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; |
95c5d605 AG |
634 | |
635 | return 0; | |
636 | } | |
637 | ||
638 | static int vidioc_s_fmt_cap(struct file *file, void *priv, | |
639 | struct v4l2_format *f) | |
640 | { | |
641 | struct viu_fh *fh = priv; | |
642 | int ret; | |
643 | ||
644 | ret = vidioc_try_fmt_cap(file, fh, f); | |
645 | if (ret < 0) | |
646 | return ret; | |
647 | ||
648 | fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
649 | fh->width = f->fmt.pix.width; | |
650 | fh->height = f->fmt.pix.height; | |
651 | fh->sizeimage = f->fmt.pix.sizeimage; | |
652 | fh->vb_vidq.field = f->fmt.pix.field; | |
653 | fh->type = f->type; | |
95c5d605 AG |
654 | return 0; |
655 | } | |
656 | ||
657 | static int vidioc_g_fmt_overlay(struct file *file, void *priv, | |
658 | struct v4l2_format *f) | |
659 | { | |
660 | struct viu_fh *fh = priv; | |
661 | ||
662 | f->fmt.win = fh->win; | |
663 | return 0; | |
664 | } | |
665 | ||
666 | static int verify_preview(struct viu_dev *dev, struct v4l2_window *win) | |
667 | { | |
668 | enum v4l2_field field; | |
669 | int maxw, maxh; | |
670 | ||
671 | if (dev->ovbuf.base == NULL) | |
672 | return -EINVAL; | |
673 | if (dev->ovfmt == NULL) | |
674 | return -EINVAL; | |
675 | if (win->w.width < 48 || win->w.height < 32) | |
676 | return -EINVAL; | |
677 | ||
678 | field = win->field; | |
679 | maxw = dev->crop_current.width; | |
680 | maxh = dev->crop_current.height; | |
681 | ||
682 | if (field == V4L2_FIELD_ANY) { | |
683 | field = (win->w.height > maxh/2) | |
684 | ? V4L2_FIELD_INTERLACED | |
685 | : V4L2_FIELD_TOP; | |
686 | } | |
687 | switch (field) { | |
688 | case V4L2_FIELD_TOP: | |
689 | case V4L2_FIELD_BOTTOM: | |
690 | maxh = maxh / 2; | |
691 | break; | |
692 | case V4L2_FIELD_INTERLACED: | |
693 | break; | |
694 | default: | |
695 | return -EINVAL; | |
696 | } | |
697 | ||
698 | win->field = field; | |
699 | if (win->w.width > maxw) | |
700 | win->w.width = maxw; | |
701 | if (win->w.height > maxh) | |
702 | win->w.height = maxh; | |
703 | return 0; | |
704 | } | |
705 | ||
706 | inline void viu_activate_overlay(struct viu_reg *viu_reg) | |
707 | { | |
708 | struct viu_reg *vr = viu_reg; | |
709 | ||
710 | out_be32(&vr->field_base_addr, reg_val.field_base_addr); | |
711 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
712 | out_be32(&vr->picture_count, reg_val.picture_count); | |
713 | } | |
714 | ||
791ae699 | 715 | static int viu_setup_preview(struct viu_dev *dev, struct viu_fh *fh) |
95c5d605 AG |
716 | { |
717 | int bpp; | |
718 | ||
0a6b9b04 HV |
719 | dprintk(1, "%s %dx%d\n", __func__, |
720 | fh->win.w.width, fh->win.w.height); | |
95c5d605 AG |
721 | |
722 | reg_val.status_cfg = 0; | |
723 | ||
724 | /* setup window */ | |
725 | reg_val.picture_count = (fh->win.w.height / 2) << 16 | | |
726 | fh->win.w.width; | |
727 | ||
728 | /* setup color depth and dma increment */ | |
729 | bpp = dev->ovfmt->depth / 8; | |
730 | switch (bpp) { | |
731 | case 2: | |
732 | reg_val.status_cfg &= ~MODE_32BIT; | |
733 | reg_val.dma_inc = fh->win.w.width * 2; | |
734 | break; | |
735 | case 4: | |
736 | reg_val.status_cfg |= MODE_32BIT; | |
737 | reg_val.dma_inc = fh->win.w.width * 4; | |
738 | break; | |
739 | default: | |
740 | dprintk(0, "device doesn't support color depth(%d)\n", | |
741 | bpp * 8); | |
742 | return -EINVAL; | |
743 | } | |
744 | ||
745 | dev->ovfield = fh->win.field; | |
746 | if (!V4L2_FIELD_HAS_BOTH(dev->ovfield)) | |
747 | reg_val.dma_inc = 0; | |
748 | ||
749 | reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN; | |
750 | ||
751 | /* setup the base address of the overlay buffer */ | |
752 | reg_val.field_base_addr = (u32)dev->ovbuf.base; | |
753 | ||
95c5d605 AG |
754 | return 0; |
755 | } | |
756 | ||
757 | static int vidioc_s_fmt_overlay(struct file *file, void *priv, | |
758 | struct v4l2_format *f) | |
759 | { | |
760 | struct viu_fh *fh = priv; | |
761 | struct viu_dev *dev = (struct viu_dev *)fh->dev; | |
762 | unsigned long flags; | |
763 | int err; | |
764 | ||
765 | err = verify_preview(dev, &f->fmt.win); | |
766 | if (err) | |
767 | return err; | |
768 | ||
95c5d605 AG |
769 | fh->win = f->fmt.win; |
770 | ||
771 | spin_lock_irqsave(&dev->slock, flags); | |
791ae699 | 772 | viu_setup_preview(dev, fh); |
95c5d605 | 773 | spin_unlock_irqrestore(&dev->slock, flags); |
95c5d605 AG |
774 | return 0; |
775 | } | |
776 | ||
777 | static int vidioc_try_fmt_overlay(struct file *file, void *priv, | |
778 | struct v4l2_format *f) | |
779 | { | |
780 | return 0; | |
781 | } | |
782 | ||
791ae699 AG |
783 | static int vidioc_overlay(struct file *file, void *priv, unsigned int on) |
784 | { | |
785 | struct viu_fh *fh = priv; | |
786 | struct viu_dev *dev = (struct viu_dev *)fh->dev; | |
787 | unsigned long flags; | |
788 | ||
789 | if (on) { | |
790 | spin_lock_irqsave(&dev->slock, flags); | |
791 | viu_activate_overlay(dev->vr); | |
792 | dev->ovenable = 1; | |
793 | ||
794 | /* start dma */ | |
795 | viu_start_dma(dev); | |
796 | spin_unlock_irqrestore(&dev->slock, flags); | |
797 | } else { | |
798 | viu_stop_dma(dev); | |
799 | dev->ovenable = 0; | |
800 | } | |
801 | ||
802 | return 0; | |
803 | } | |
804 | ||
95c5d605 AG |
805 | int vidioc_g_fbuf(struct file *file, void *priv, struct v4l2_framebuffer *arg) |
806 | { | |
807 | struct viu_fh *fh = priv; | |
808 | struct viu_dev *dev = fh->dev; | |
809 | struct v4l2_framebuffer *fb = arg; | |
810 | ||
811 | *fb = dev->ovbuf; | |
812 | fb->capability = V4L2_FBUF_CAP_LIST_CLIPPING; | |
813 | return 0; | |
814 | } | |
815 | ||
e6eb28c2 | 816 | int vidioc_s_fbuf(struct file *file, void *priv, const struct v4l2_framebuffer *arg) |
95c5d605 AG |
817 | { |
818 | struct viu_fh *fh = priv; | |
819 | struct viu_dev *dev = fh->dev; | |
99b32b24 | 820 | const struct v4l2_framebuffer *fb = arg; |
95c5d605 AG |
821 | struct viu_fmt *fmt; |
822 | ||
823 | if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO)) | |
824 | return -EPERM; | |
825 | ||
826 | /* check args */ | |
827 | fmt = format_by_fourcc(fb->fmt.pixelformat); | |
828 | if (fmt == NULL) | |
829 | return -EINVAL; | |
830 | ||
831 | /* ok, accept it */ | |
832 | dev->ovbuf = *fb; | |
833 | dev->ovfmt = fmt; | |
834 | if (dev->ovbuf.fmt.bytesperline == 0) { | |
835 | dev->ovbuf.fmt.bytesperline = | |
836 | dev->ovbuf.fmt.width * fmt->depth / 8; | |
837 | } | |
838 | return 0; | |
839 | } | |
840 | ||
841 | static int vidioc_reqbufs(struct file *file, void *priv, | |
842 | struct v4l2_requestbuffers *p) | |
843 | { | |
844 | struct viu_fh *fh = priv; | |
845 | ||
846 | return videobuf_reqbufs(&fh->vb_vidq, p); | |
847 | } | |
848 | ||
849 | static int vidioc_querybuf(struct file *file, void *priv, | |
850 | struct v4l2_buffer *p) | |
851 | { | |
852 | struct viu_fh *fh = priv; | |
853 | ||
854 | return videobuf_querybuf(&fh->vb_vidq, p); | |
855 | } | |
856 | ||
857 | static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *p) | |
858 | { | |
859 | struct viu_fh *fh = priv; | |
860 | ||
861 | return videobuf_qbuf(&fh->vb_vidq, p); | |
862 | } | |
863 | ||
864 | static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p) | |
865 | { | |
866 | struct viu_fh *fh = priv; | |
867 | ||
868 | return videobuf_dqbuf(&fh->vb_vidq, p, | |
869 | file->f_flags & O_NONBLOCK); | |
870 | } | |
871 | ||
872 | static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i) | |
873 | { | |
874 | struct viu_fh *fh = priv; | |
f3b1af19 | 875 | struct viu_dev *dev = fh->dev; |
95c5d605 AG |
876 | |
877 | if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
878 | return -EINVAL; | |
879 | if (fh->type != i) | |
880 | return -EINVAL; | |
881 | ||
f3b1af19 AG |
882 | if (dev->ovenable) |
883 | dev->ovenable = 0; | |
884 | ||
c3353330 AG |
885 | viu_start_dma(fh->dev); |
886 | ||
95c5d605 AG |
887 | return videobuf_streamon(&fh->vb_vidq); |
888 | } | |
889 | ||
890 | static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i) | |
891 | { | |
892 | struct viu_fh *fh = priv; | |
893 | ||
894 | if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
895 | return -EINVAL; | |
896 | if (fh->type != i) | |
897 | return -EINVAL; | |
898 | ||
c3353330 AG |
899 | viu_stop_dma(fh->dev); |
900 | ||
95c5d605 AG |
901 | return videobuf_streamoff(&fh->vb_vidq); |
902 | } | |
903 | ||
904 | #define decoder_call(viu, o, f, args...) \ | |
905 | v4l2_subdev_call(viu->decoder, o, f, ##args) | |
906 | ||
50155c25 AG |
907 | static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std_id) |
908 | { | |
909 | struct viu_fh *fh = priv; | |
910 | ||
911 | decoder_call(fh->dev, video, querystd, std_id); | |
912 | return 0; | |
913 | } | |
914 | ||
314527ac | 915 | static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id) |
95c5d605 AG |
916 | { |
917 | struct viu_fh *fh = priv; | |
918 | ||
314527ac | 919 | fh->dev->std = id; |
8774bed9 | 920 | decoder_call(fh->dev, video, s_std, id); |
95c5d605 AG |
921 | return 0; |
922 | } | |
923 | ||
50155c25 AG |
924 | static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std_id) |
925 | { | |
926 | struct viu_fh *fh = priv; | |
927 | ||
928 | *std_id = fh->dev->std; | |
929 | return 0; | |
930 | } | |
931 | ||
95c5d605 AG |
932 | /* only one input in this driver */ |
933 | static int vidioc_enum_input(struct file *file, void *priv, | |
934 | struct v4l2_input *inp) | |
935 | { | |
936 | struct viu_fh *fh = priv; | |
937 | ||
938 | if (inp->index != 0) | |
939 | return -EINVAL; | |
940 | ||
941 | inp->type = V4L2_INPUT_TYPE_CAMERA; | |
942 | inp->std = fh->dev->vdev->tvnorms; | |
943 | strcpy(inp->name, "Camera"); | |
944 | return 0; | |
945 | } | |
946 | ||
947 | static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) | |
948 | { | |
949 | *i = 0; | |
950 | return 0; | |
951 | } | |
952 | ||
953 | static int vidioc_s_input(struct file *file, void *priv, unsigned int i) | |
954 | { | |
955 | struct viu_fh *fh = priv; | |
956 | ||
9acc8093 | 957 | if (i) |
95c5d605 AG |
958 | return -EINVAL; |
959 | ||
960 | decoder_call(fh->dev, video, s_routing, i, 0, 0); | |
961 | return 0; | |
962 | } | |
963 | ||
95c5d605 AG |
964 | inline void viu_activate_next_buf(struct viu_dev *dev, |
965 | struct viu_dmaqueue *viuq) | |
966 | { | |
967 | struct viu_dmaqueue *vidq = viuq; | |
968 | struct viu_buf *buf; | |
969 | ||
970 | /* launch another DMA operation for an active/queued buffer */ | |
971 | if (!list_empty(&vidq->active)) { | |
972 | buf = list_entry(vidq->active.next, struct viu_buf, | |
973 | vb.queue); | |
974 | dprintk(1, "start another queued buffer: 0x%p\n", buf); | |
975 | buffer_activate(dev, buf); | |
976 | } else if (!list_empty(&vidq->queued)) { | |
977 | buf = list_entry(vidq->queued.next, struct viu_buf, | |
978 | vb.queue); | |
979 | list_del(&buf->vb.queue); | |
980 | ||
981 | dprintk(1, "start another queued buffer: 0x%p\n", buf); | |
982 | list_add_tail(&buf->vb.queue, &vidq->active); | |
983 | buf->vb.state = VIDEOBUF_ACTIVE; | |
984 | buffer_activate(dev, buf); | |
985 | } | |
986 | } | |
987 | ||
988 | inline void viu_default_settings(struct viu_reg *viu_reg) | |
989 | { | |
990 | struct viu_reg *vr = viu_reg; | |
991 | ||
992 | out_be32(&vr->luminance, 0x9512A254); | |
993 | out_be32(&vr->chroma_r, 0x03310000); | |
994 | out_be32(&vr->chroma_g, 0x06600F38); | |
995 | out_be32(&vr->chroma_b, 0x00000409); | |
996 | out_be32(&vr->alpha, 0x000000ff); | |
997 | out_be32(&vr->req_alarm, 0x00000090); | |
998 | dprintk(1, "status reg: 0x%08x, field base: 0x%08x\n", | |
999 | in_be32(&vr->status_cfg), in_be32(&vr->field_base_addr)); | |
1000 | } | |
1001 | ||
1002 | static void viu_overlay_intr(struct viu_dev *dev, u32 status) | |
1003 | { | |
1004 | struct viu_reg *vr = dev->vr; | |
1005 | ||
1006 | if (status & INT_DMA_END_STATUS) | |
1007 | dev->dma_done = 1; | |
1008 | ||
1009 | if (status & INT_FIELD_STATUS) { | |
1010 | if (dev->dma_done) { | |
1011 | u32 addr = reg_val.field_base_addr; | |
1012 | ||
1013 | dev->dma_done = 0; | |
1014 | if (status & FIELD_NO) | |
1015 | addr += reg_val.dma_inc; | |
1016 | ||
1017 | out_be32(&vr->field_base_addr, addr); | |
1018 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
1019 | out_be32(&vr->status_cfg, | |
1020 | (status & 0xffc0ffff) | | |
1021 | (status & INT_ALL_STATUS) | | |
1022 | reg_val.status_cfg); | |
1023 | } else if (status & INT_VSYNC_STATUS) { | |
1024 | out_be32(&vr->status_cfg, | |
1025 | (status & 0xffc0ffff) | | |
1026 | (status & INT_ALL_STATUS) | | |
1027 | reg_val.status_cfg); | |
1028 | } | |
1029 | } | |
1030 | } | |
1031 | ||
1032 | static void viu_capture_intr(struct viu_dev *dev, u32 status) | |
1033 | { | |
1034 | struct viu_dmaqueue *vidq = &dev->vidq; | |
1035 | struct viu_reg *vr = dev->vr; | |
1036 | struct viu_buf *buf; | |
1037 | int field_num; | |
1038 | int need_two; | |
1039 | int dma_done = 0; | |
1040 | ||
1041 | field_num = status & FIELD_NO; | |
1042 | need_two = V4L2_FIELD_HAS_BOTH(dev->capfield); | |
1043 | ||
1044 | if (status & INT_DMA_END_STATUS) { | |
1045 | dma_done = 1; | |
1046 | if (((field_num == 0) && (dev->field == 0)) || | |
1047 | (field_num && (dev->field == 1))) | |
1048 | dev->field++; | |
1049 | } | |
1050 | ||
1051 | if (status & INT_FIELD_STATUS) { | |
1052 | dprintk(1, "irq: field %d, done %d\n", | |
1053 | !!field_num, dma_done); | |
1054 | if (unlikely(dev->first)) { | |
1055 | if (field_num == 0) { | |
1056 | dev->first = 0; | |
1057 | dprintk(1, "activate first buf\n"); | |
1058 | viu_activate_next_buf(dev, vidq); | |
1059 | } else | |
1060 | dprintk(1, "wait field 0\n"); | |
1061 | return; | |
1062 | } | |
1063 | ||
1064 | /* setup buffer address for next dma operation */ | |
1065 | if (!list_empty(&vidq->active)) { | |
1066 | u32 addr = reg_val.field_base_addr; | |
1067 | ||
1068 | if (field_num && need_two) { | |
1069 | addr += reg_val.dma_inc; | |
1070 | dprintk(1, "field 1, 0x%lx, dev field %d\n", | |
1071 | (unsigned long)addr, dev->field); | |
1072 | } | |
1073 | out_be32(&vr->field_base_addr, addr); | |
1074 | out_be32(&vr->dma_inc, reg_val.dma_inc); | |
1075 | out_be32(&vr->status_cfg, | |
1076 | (status & 0xffc0ffff) | | |
1077 | (status & INT_ALL_STATUS) | | |
1078 | reg_val.status_cfg); | |
1079 | return; | |
1080 | } | |
1081 | } | |
1082 | ||
1083 | if (dma_done && field_num && (dev->field == 2)) { | |
1084 | dev->field = 0; | |
1085 | buf = list_entry(vidq->active.next, | |
1086 | struct viu_buf, vb.queue); | |
1087 | dprintk(1, "viu/0: [%p/%d] 0x%lx/0x%lx: dma complete\n", | |
1088 | buf, buf->vb.i, | |
1089 | (unsigned long)videobuf_to_dma_contig(&buf->vb), | |
1090 | (unsigned long)in_be32(&vr->field_base_addr)); | |
1091 | ||
1092 | if (waitqueue_active(&buf->vb.done)) { | |
1093 | list_del(&buf->vb.queue); | |
8e6057b5 | 1094 | v4l2_get_timestamp(&buf->vb.ts); |
95c5d605 AG |
1095 | buf->vb.state = VIDEOBUF_DONE; |
1096 | buf->vb.field_count++; | |
1097 | wake_up(&buf->vb.done); | |
1098 | } | |
1099 | /* activate next dma buffer */ | |
1100 | viu_activate_next_buf(dev, vidq); | |
1101 | } | |
1102 | } | |
1103 | ||
1104 | static irqreturn_t viu_intr(int irq, void *dev_id) | |
1105 | { | |
1106 | struct viu_dev *dev = (struct viu_dev *)dev_id; | |
1107 | struct viu_reg *vr = dev->vr; | |
1108 | u32 status; | |
1109 | u32 error; | |
1110 | ||
1111 | status = in_be32(&vr->status_cfg); | |
1112 | ||
1113 | if (status & INT_ERROR_STATUS) { | |
1114 | dev->irqs.error_irq++; | |
1115 | error = status & ERR_MASK; | |
1116 | if (error) | |
1117 | dprintk(1, "Err: error(%d), times:%d!\n", | |
1118 | error >> 4, dev->irqs.error_irq); | |
1119 | /* Clear interrupt error bit and error flags */ | |
1120 | out_be32(&vr->status_cfg, | |
1121 | (status & 0xffc0ffff) | INT_ERROR_STATUS); | |
1122 | } | |
1123 | ||
1124 | if (status & INT_DMA_END_STATUS) { | |
1125 | dev->irqs.dma_end_irq++; | |
1126 | dev->dma_done = 1; | |
1127 | dprintk(2, "VIU DMA end interrupt times: %d\n", | |
1128 | dev->irqs.dma_end_irq); | |
1129 | } | |
1130 | ||
1131 | if (status & INT_HSYNC_STATUS) | |
1132 | dev->irqs.hsync_irq++; | |
1133 | ||
1134 | if (status & INT_FIELD_STATUS) { | |
1135 | dev->irqs.field_irq++; | |
1136 | dprintk(2, "VIU field interrupt times: %d\n", | |
1137 | dev->irqs.field_irq); | |
1138 | } | |
1139 | ||
1140 | if (status & INT_VSTART_STATUS) | |
1141 | dev->irqs.vstart_irq++; | |
1142 | ||
1143 | if (status & INT_VSYNC_STATUS) { | |
1144 | dev->irqs.vsync_irq++; | |
1145 | dprintk(2, "VIU vsync interrupt times: %d\n", | |
1146 | dev->irqs.vsync_irq); | |
1147 | } | |
1148 | ||
1149 | /* clear all pending irqs */ | |
1150 | status = in_be32(&vr->status_cfg); | |
1151 | out_be32(&vr->status_cfg, | |
1152 | (status & 0xffc0ffff) | (status & INT_ALL_STATUS)); | |
1153 | ||
1154 | if (dev->ovenable) { | |
1155 | viu_overlay_intr(dev, status); | |
1156 | return IRQ_HANDLED; | |
1157 | } | |
1158 | ||
1159 | /* Capture mode */ | |
1160 | viu_capture_intr(dev, status); | |
1161 | return IRQ_HANDLED; | |
1162 | } | |
1163 | ||
1164 | /* | |
1165 | * File operations for the device | |
1166 | */ | |
1167 | static int viu_open(struct file *file) | |
1168 | { | |
1169 | struct video_device *vdev = video_devdata(file); | |
1170 | struct viu_dev *dev = video_get_drvdata(vdev); | |
1171 | struct viu_fh *fh; | |
1172 | struct viu_reg *vr; | |
1173 | int minor = vdev->minor; | |
1174 | u32 status_cfg; | |
95c5d605 AG |
1175 | |
1176 | dprintk(1, "viu: open (minor=%d)\n", minor); | |
1177 | ||
1178 | dev->users++; | |
1179 | if (dev->users > 1) { | |
1180 | dev->users--; | |
1181 | return -EBUSY; | |
1182 | } | |
1183 | ||
1184 | vr = dev->vr; | |
1185 | ||
1186 | dprintk(1, "open minor=%d type=%s users=%d\n", minor, | |
1187 | v4l2_type_names[V4L2_BUF_TYPE_VIDEO_CAPTURE], dev->users); | |
1188 | ||
87cb0278 HV |
1189 | if (mutex_lock_interruptible(&dev->lock)) { |
1190 | dev->users--; | |
1191 | return -ERESTARTSYS; | |
1192 | } | |
1193 | ||
95c5d605 AG |
1194 | /* allocate and initialize per filehandle data */ |
1195 | fh = kzalloc(sizeof(*fh), GFP_KERNEL); | |
1196 | if (!fh) { | |
1197 | dev->users--; | |
87cb0278 | 1198 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1199 | return -ENOMEM; |
1200 | } | |
1201 | ||
7fe0b3d7 | 1202 | v4l2_fh_init(&fh->fh, vdev); |
95c5d605 AG |
1203 | file->private_data = fh; |
1204 | fh->dev = dev; | |
1205 | ||
1206 | fh->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
1207 | fh->fmt = format_by_fourcc(V4L2_PIX_FMT_RGB32); | |
1208 | fh->width = norm_maxw(); | |
1209 | fh->height = norm_maxh(); | |
1210 | dev->crop_current.width = fh->width; | |
1211 | dev->crop_current.height = fh->height; | |
1212 | ||
95c5d605 AG |
1213 | dprintk(1, "Open: fh=0x%08lx, dev=0x%08lx, dev->vidq=0x%08lx\n", |
1214 | (unsigned long)fh, (unsigned long)dev, | |
1215 | (unsigned long)&dev->vidq); | |
1216 | dprintk(1, "Open: list_empty queued=%d\n", | |
1217 | list_empty(&dev->vidq.queued)); | |
1218 | dprintk(1, "Open: list_empty active=%d\n", | |
1219 | list_empty(&dev->vidq.active)); | |
1220 | ||
1221 | viu_default_settings(vr); | |
1222 | ||
1223 | status_cfg = in_be32(&vr->status_cfg); | |
1224 | out_be32(&vr->status_cfg, | |
1225 | status_cfg & ~(INT_VSYNC_EN | INT_HSYNC_EN | | |
1226 | INT_FIELD_EN | INT_VSTART_EN | | |
1227 | INT_DMA_END_EN | INT_ERROR_EN | INT_ECC_EN)); | |
1228 | ||
1229 | status_cfg = in_be32(&vr->status_cfg); | |
1230 | out_be32(&vr->status_cfg, status_cfg | INT_ALL_STATUS); | |
1231 | ||
1232 | spin_lock_init(&fh->vbq_lock); | |
1233 | videobuf_queue_dma_contig_init(&fh->vb_vidq, &viu_video_qops, | |
1234 | dev->dev, &fh->vbq_lock, | |
1235 | fh->type, V4L2_FIELD_INTERLACED, | |
2f970006 AG |
1236 | sizeof(struct viu_buf), fh, |
1237 | &fh->dev->lock); | |
7fe0b3d7 | 1238 | v4l2_fh_add(&fh->fh); |
87cb0278 | 1239 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1240 | return 0; |
1241 | } | |
1242 | ||
1243 | static ssize_t viu_read(struct file *file, char __user *data, size_t count, | |
1244 | loff_t *ppos) | |
1245 | { | |
1246 | struct viu_fh *fh = file->private_data; | |
1247 | struct viu_dev *dev = fh->dev; | |
1248 | int ret = 0; | |
1249 | ||
1250 | dprintk(2, "%s\n", __func__); | |
1251 | if (dev->ovenable) | |
1252 | dev->ovenable = 0; | |
1253 | ||
1254 | if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { | |
87cb0278 HV |
1255 | if (mutex_lock_interruptible(&dev->lock)) |
1256 | return -ERESTARTSYS; | |
95c5d605 AG |
1257 | viu_start_dma(dev); |
1258 | ret = videobuf_read_stream(&fh->vb_vidq, data, count, | |
1259 | ppos, 0, file->f_flags & O_NONBLOCK); | |
87cb0278 | 1260 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1261 | return ret; |
1262 | } | |
1263 | return 0; | |
1264 | } | |
1265 | ||
1266 | static unsigned int viu_poll(struct file *file, struct poll_table_struct *wait) | |
1267 | { | |
1268 | struct viu_fh *fh = file->private_data; | |
1269 | struct videobuf_queue *q = &fh->vb_vidq; | |
87cb0278 | 1270 | struct viu_dev *dev = fh->dev; |
7fe0b3d7 HV |
1271 | unsigned long req_events = poll_requested_events(wait); |
1272 | unsigned int res = v4l2_ctrl_poll(file, wait); | |
95c5d605 AG |
1273 | |
1274 | if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type) | |
1275 | return POLLERR; | |
1276 | ||
7fe0b3d7 HV |
1277 | if (!(req_events & (POLLIN | POLLRDNORM))) |
1278 | return res; | |
1279 | ||
87cb0278 | 1280 | mutex_lock(&dev->lock); |
7fe0b3d7 | 1281 | res |= videobuf_poll_stream(file, q, wait); |
87cb0278 HV |
1282 | mutex_unlock(&dev->lock); |
1283 | return res; | |
95c5d605 AG |
1284 | } |
1285 | ||
1286 | static int viu_release(struct file *file) | |
1287 | { | |
1288 | struct viu_fh *fh = file->private_data; | |
1289 | struct viu_dev *dev = fh->dev; | |
1290 | int minor = video_devdata(file)->minor; | |
1291 | ||
87cb0278 | 1292 | mutex_lock(&dev->lock); |
95c5d605 AG |
1293 | viu_stop_dma(dev); |
1294 | videobuf_stop(&fh->vb_vidq); | |
c3353330 | 1295 | videobuf_mmap_free(&fh->vb_vidq); |
7fe0b3d7 HV |
1296 | v4l2_fh_del(&fh->fh); |
1297 | v4l2_fh_exit(&fh->fh); | |
87cb0278 | 1298 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1299 | |
1300 | kfree(fh); | |
1301 | ||
1302 | dev->users--; | |
1303 | dprintk(1, "close (minor=%d, users=%d)\n", | |
1304 | minor, dev->users); | |
1305 | return 0; | |
1306 | } | |
1307 | ||
1308 | void viu_reset(struct viu_reg *reg) | |
1309 | { | |
1310 | out_be32(®->status_cfg, 0); | |
1311 | out_be32(®->luminance, 0x9512a254); | |
1312 | out_be32(®->chroma_r, 0x03310000); | |
1313 | out_be32(®->chroma_g, 0x06600f38); | |
1314 | out_be32(®->chroma_b, 0x00000409); | |
1315 | out_be32(®->field_base_addr, 0); | |
1316 | out_be32(®->dma_inc, 0); | |
1317 | out_be32(®->picture_count, 0x01e002d0); | |
1318 | out_be32(®->req_alarm, 0x00000090); | |
1319 | out_be32(®->alpha, 0x000000ff); | |
1320 | } | |
1321 | ||
1322 | static int viu_mmap(struct file *file, struct vm_area_struct *vma) | |
1323 | { | |
1324 | struct viu_fh *fh = file->private_data; | |
87cb0278 | 1325 | struct viu_dev *dev = fh->dev; |
95c5d605 AG |
1326 | int ret; |
1327 | ||
1328 | dprintk(1, "mmap called, vma=0x%08lx\n", (unsigned long)vma); | |
1329 | ||
87cb0278 HV |
1330 | if (mutex_lock_interruptible(&dev->lock)) |
1331 | return -ERESTARTSYS; | |
95c5d605 | 1332 | ret = videobuf_mmap_mapper(&fh->vb_vidq, vma); |
87cb0278 | 1333 | mutex_unlock(&dev->lock); |
95c5d605 AG |
1334 | |
1335 | dprintk(1, "vma start=0x%08lx, size=%ld, ret=%d\n", | |
1336 | (unsigned long)vma->vm_start, | |
1337 | (unsigned long)vma->vm_end-(unsigned long)vma->vm_start, | |
1338 | ret); | |
1339 | ||
1340 | return ret; | |
1341 | } | |
1342 | ||
1343 | static struct v4l2_file_operations viu_fops = { | |
1344 | .owner = THIS_MODULE, | |
1345 | .open = viu_open, | |
1346 | .release = viu_release, | |
1347 | .read = viu_read, | |
1348 | .poll = viu_poll, | |
2f970006 | 1349 | .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ |
95c5d605 AG |
1350 | .mmap = viu_mmap, |
1351 | }; | |
1352 | ||
1353 | static const struct v4l2_ioctl_ops viu_ioctl_ops = { | |
1354 | .vidioc_querycap = vidioc_querycap, | |
1355 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt, | |
1356 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt_cap, | |
1357 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_cap, | |
1358 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_cap, | |
1359 | .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt, | |
1360 | .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_overlay, | |
1361 | .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_overlay, | |
1362 | .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_overlay, | |
791ae699 | 1363 | .vidioc_overlay = vidioc_overlay, |
95c5d605 AG |
1364 | .vidioc_g_fbuf = vidioc_g_fbuf, |
1365 | .vidioc_s_fbuf = vidioc_s_fbuf, | |
1366 | .vidioc_reqbufs = vidioc_reqbufs, | |
1367 | .vidioc_querybuf = vidioc_querybuf, | |
1368 | .vidioc_qbuf = vidioc_qbuf, | |
1369 | .vidioc_dqbuf = vidioc_dqbuf, | |
50155c25 | 1370 | .vidioc_g_std = vidioc_g_std, |
95c5d605 | 1371 | .vidioc_s_std = vidioc_s_std, |
50155c25 | 1372 | .vidioc_querystd = vidioc_querystd, |
95c5d605 AG |
1373 | .vidioc_enum_input = vidioc_enum_input, |
1374 | .vidioc_g_input = vidioc_g_input, | |
1375 | .vidioc_s_input = vidioc_s_input, | |
95c5d605 AG |
1376 | .vidioc_streamon = vidioc_streamon, |
1377 | .vidioc_streamoff = vidioc_streamoff, | |
7fe0b3d7 HV |
1378 | .vidioc_log_status = v4l2_ctrl_log_status, |
1379 | .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, | |
1380 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | |
95c5d605 AG |
1381 | }; |
1382 | ||
1383 | static struct video_device viu_template = { | |
1384 | .name = "FSL viu", | |
1385 | .fops = &viu_fops, | |
1386 | .minor = -1, | |
1387 | .ioctl_ops = &viu_ioctl_ops, | |
1388 | .release = video_device_release, | |
1389 | ||
1390 | .tvnorms = V4L2_STD_NTSC_M | V4L2_STD_PAL, | |
95c5d605 AG |
1391 | }; |
1392 | ||
4c62e976 | 1393 | static int viu_of_probe(struct platform_device *op) |
95c5d605 AG |
1394 | { |
1395 | struct viu_dev *viu_dev; | |
1396 | struct video_device *vdev; | |
1397 | struct resource r; | |
1398 | struct viu_reg __iomem *viu_regs; | |
1399 | struct i2c_adapter *ad; | |
1400 | int ret, viu_irq; | |
a5d7a6de | 1401 | struct clk *clk; |
95c5d605 AG |
1402 | |
1403 | ret = of_address_to_resource(op->dev.of_node, 0, &r); | |
1404 | if (ret) { | |
1405 | dev_err(&op->dev, "Can't parse device node resource\n"); | |
1406 | return -ENODEV; | |
1407 | } | |
1408 | ||
1409 | viu_irq = irq_of_parse_and_map(op->dev.of_node, 0); | |
1410 | if (viu_irq == NO_IRQ) { | |
1411 | dev_err(&op->dev, "Error while mapping the irq\n"); | |
1412 | return -EINVAL; | |
1413 | } | |
1414 | ||
1415 | /* request mem region */ | |
1416 | if (!devm_request_mem_region(&op->dev, r.start, | |
1417 | sizeof(struct viu_reg), DRV_NAME)) { | |
1418 | dev_err(&op->dev, "Error while requesting mem region\n"); | |
1419 | ret = -EBUSY; | |
1420 | goto err; | |
1421 | } | |
1422 | ||
1423 | /* remap registers */ | |
1424 | viu_regs = devm_ioremap(&op->dev, r.start, sizeof(struct viu_reg)); | |
1425 | if (!viu_regs) { | |
1426 | dev_err(&op->dev, "Can't map register set\n"); | |
1427 | ret = -ENOMEM; | |
1428 | goto err; | |
1429 | } | |
1430 | ||
1431 | /* Prepare our private structure */ | |
1432 | viu_dev = devm_kzalloc(&op->dev, sizeof(struct viu_dev), GFP_ATOMIC); | |
1433 | if (!viu_dev) { | |
1434 | dev_err(&op->dev, "Can't allocate private structure\n"); | |
1435 | ret = -ENOMEM; | |
1436 | goto err; | |
1437 | } | |
1438 | ||
1439 | viu_dev->vr = viu_regs; | |
1440 | viu_dev->irq = viu_irq; | |
1441 | viu_dev->dev = &op->dev; | |
1442 | ||
1443 | /* init video dma queues */ | |
1444 | INIT_LIST_HEAD(&viu_dev->vidq.active); | |
1445 | INIT_LIST_HEAD(&viu_dev->vidq.queued); | |
1446 | ||
95c5d605 AG |
1447 | snprintf(viu_dev->v4l2_dev.name, |
1448 | sizeof(viu_dev->v4l2_dev.name), "%s", "VIU"); | |
1449 | ret = v4l2_device_register(viu_dev->dev, &viu_dev->v4l2_dev); | |
1450 | if (ret < 0) { | |
1451 | dev_err(&op->dev, "v4l2_device_register() failed: %d\n", ret); | |
1452 | goto err; | |
1453 | } | |
1454 | ||
1455 | ad = i2c_get_adapter(0); | |
1fea3d60 HV |
1456 | |
1457 | v4l2_ctrl_handler_init(&viu_dev->hdl, 5); | |
1458 | if (viu_dev->hdl.error) { | |
1459 | ret = viu_dev->hdl.error; | |
1460 | dev_err(&op->dev, "couldn't register control\n"); | |
1461 | goto err_vdev; | |
1462 | } | |
1463 | /* This control handler will inherit the control(s) from the | |
1464 | sub-device(s). */ | |
1465 | viu_dev->v4l2_dev.ctrl_handler = &viu_dev->hdl; | |
95c5d605 | 1466 | viu_dev->decoder = v4l2_i2c_new_subdev(&viu_dev->v4l2_dev, ad, |
9a1f8b34 | 1467 | "saa7113", VIU_VIDEO_DECODER_ADDR, NULL); |
95c5d605 AG |
1468 | |
1469 | viu_dev->vidq.timeout.function = viu_vid_timeout; | |
1470 | viu_dev->vidq.timeout.data = (unsigned long)viu_dev; | |
1471 | init_timer(&viu_dev->vidq.timeout); | |
28221f88 | 1472 | viu_dev->std = V4L2_STD_NTSC_M; |
95c5d605 AG |
1473 | viu_dev->first = 1; |
1474 | ||
1475 | /* Allocate memory for video device */ | |
1476 | vdev = video_device_alloc(); | |
1477 | if (vdev == NULL) { | |
1478 | ret = -ENOMEM; | |
1479 | goto err_vdev; | |
1480 | } | |
1481 | ||
7fe0b3d7 | 1482 | *vdev = viu_template; |
95c5d605 AG |
1483 | |
1484 | vdev->v4l2_dev = &viu_dev->v4l2_dev; | |
1485 | ||
1486 | viu_dev->vdev = vdev; | |
1487 | ||
2f970006 AG |
1488 | /* initialize locks */ |
1489 | mutex_init(&viu_dev->lock); | |
1490 | viu_dev->vdev->lock = &viu_dev->lock; | |
1491 | spin_lock_init(&viu_dev->slock); | |
1492 | ||
95c5d605 AG |
1493 | video_set_drvdata(viu_dev->vdev, viu_dev); |
1494 | ||
2f970006 AG |
1495 | mutex_lock(&viu_dev->lock); |
1496 | ||
95c5d605 AG |
1497 | ret = video_register_device(viu_dev->vdev, VFL_TYPE_GRABBER, -1); |
1498 | if (ret < 0) { | |
1499 | video_device_release(viu_dev->vdev); | |
1500 | goto err_vdev; | |
1501 | } | |
1502 | ||
1503 | /* enable VIU clock */ | |
17552189 | 1504 | clk = devm_clk_get(&op->dev, "ipg"); |
a5d7a6de GS |
1505 | if (IS_ERR(clk)) { |
1506 | dev_err(&op->dev, "failed to lookup the clock!\n"); | |
1507 | ret = PTR_ERR(clk); | |
1508 | goto err_clk; | |
1509 | } | |
1510 | ret = clk_prepare_enable(clk); | |
1511 | if (ret) { | |
1512 | dev_err(&op->dev, "failed to enable the clock!\n"); | |
95c5d605 | 1513 | goto err_clk; |
95c5d605 | 1514 | } |
a5d7a6de | 1515 | viu_dev->clk = clk; |
95c5d605 AG |
1516 | |
1517 | /* reset VIU module */ | |
1518 | viu_reset(viu_dev->vr); | |
1519 | ||
1520 | /* install interrupt handler */ | |
1521 | if (request_irq(viu_dev->irq, viu_intr, 0, "viu", (void *)viu_dev)) { | |
1522 | dev_err(&op->dev, "Request VIU IRQ failed.\n"); | |
1523 | ret = -ENODEV; | |
1524 | goto err_irq; | |
1525 | } | |
1526 | ||
2f970006 AG |
1527 | mutex_unlock(&viu_dev->lock); |
1528 | ||
95c5d605 AG |
1529 | dev_info(&op->dev, "Freescale VIU Video Capture Board\n"); |
1530 | return ret; | |
1531 | ||
1532 | err_irq: | |
a5d7a6de | 1533 | clk_disable_unprepare(viu_dev->clk); |
95c5d605 AG |
1534 | err_clk: |
1535 | video_unregister_device(viu_dev->vdev); | |
1536 | err_vdev: | |
1fea3d60 | 1537 | v4l2_ctrl_handler_free(&viu_dev->hdl); |
2f970006 | 1538 | mutex_unlock(&viu_dev->lock); |
95c5d605 AG |
1539 | i2c_put_adapter(ad); |
1540 | v4l2_device_unregister(&viu_dev->v4l2_dev); | |
1541 | err: | |
1542 | irq_dispose_mapping(viu_irq); | |
1543 | return ret; | |
1544 | } | |
1545 | ||
4c62e976 | 1546 | static int viu_of_remove(struct platform_device *op) |
95c5d605 AG |
1547 | { |
1548 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev); | |
1549 | struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev); | |
1550 | struct v4l2_subdev *sdev = list_entry(v4l2_dev->subdevs.next, | |
1551 | struct v4l2_subdev, list); | |
1552 | struct i2c_client *client = v4l2_get_subdevdata(sdev); | |
1553 | ||
1554 | free_irq(dev->irq, (void *)dev); | |
1555 | irq_dispose_mapping(dev->irq); | |
1556 | ||
a5d7a6de | 1557 | clk_disable_unprepare(dev->clk); |
95c5d605 | 1558 | |
1fea3d60 | 1559 | v4l2_ctrl_handler_free(&dev->hdl); |
95c5d605 AG |
1560 | video_unregister_device(dev->vdev); |
1561 | i2c_put_adapter(client->adapter); | |
1562 | v4l2_device_unregister(&dev->v4l2_dev); | |
1563 | return 0; | |
1564 | } | |
1565 | ||
1566 | #ifdef CONFIG_PM | |
2dc11581 | 1567 | static int viu_suspend(struct platform_device *op, pm_message_t state) |
95c5d605 AG |
1568 | { |
1569 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev); | |
1570 | struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev); | |
1571 | ||
1572 | clk_disable(dev->clk); | |
1573 | return 0; | |
1574 | } | |
1575 | ||
2dc11581 | 1576 | static int viu_resume(struct platform_device *op) |
95c5d605 AG |
1577 | { |
1578 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev); | |
1579 | struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev); | |
1580 | ||
1581 | clk_enable(dev->clk); | |
1582 | return 0; | |
1583 | } | |
1584 | #endif | |
1585 | ||
1586 | /* | |
1587 | * Initialization and module stuff | |
1588 | */ | |
7f099a75 | 1589 | static const struct of_device_id mpc512x_viu_of_match[] = { |
95c5d605 AG |
1590 | { |
1591 | .compatible = "fsl,mpc5121-viu", | |
1592 | }, | |
1593 | {}, | |
1594 | }; | |
1595 | MODULE_DEVICE_TABLE(of, mpc512x_viu_of_match); | |
1596 | ||
1c48a5c9 | 1597 | static struct platform_driver viu_of_platform_driver = { |
95c5d605 | 1598 | .probe = viu_of_probe, |
4c62e976 | 1599 | .remove = viu_of_remove, |
95c5d605 AG |
1600 | #ifdef CONFIG_PM |
1601 | .suspend = viu_suspend, | |
1602 | .resume = viu_resume, | |
1603 | #endif | |
1604 | .driver = { | |
1605 | .name = DRV_NAME, | |
95c5d605 AG |
1606 | .of_match_table = mpc512x_viu_of_match, |
1607 | }, | |
1608 | }; | |
1609 | ||
1d6629b1 | 1610 | module_platform_driver(viu_of_platform_driver); |
95c5d605 AG |
1611 | |
1612 | MODULE_DESCRIPTION("Freescale Video-In(VIU)"); | |
1613 | MODULE_AUTHOR("Hongjun Chen"); | |
1614 | MODULE_LICENSE("GPL"); | |
64dc3c1a | 1615 | MODULE_VERSION(VIU_VERSION); |