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v4l2-mc.h: Add stubs for the V4L2 PM/pipeline routines
[deliverable/linux.git] / drivers / media / platform / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
448de7e7
SA		 43 */
44
45#include <asm/cacheflush.h>
46
47#include <linux/clk.h>
9b28ee3c 48#include <linux/clkdev.h>
448de7e7
SA		 49#include <linux/delay.h>
50#include <linux/device.h>
51#include <linux/dma-mapping.h>
52#include <linux/i2c.h>
53#include <linux/interrupt.h>
503596a1 54#include <linux/mfd/syscon.h>
448de7e7 55#include <linux/module.h>
c8d35c84 56#include <linux/omap-iommu.h>
448de7e7
SA		 57#include <linux/platform_device.h>
58#include <linux/regulator/consumer.h>
59#include <linux/slab.h>
60#include <linux/sched.h>
61#include <linux/vmalloc.h>
62
2a0a5472
LP		 63#include <asm/dma-iommu.h>
64
448de7e7
SA		 65#include <media/v4l2-common.h>
66#include <media/v4l2-device.h>
da7f3843 67#include <media/v4l2-of.h>
448de7e7
SA		 68
69#include "isp.h"
70#include "ispreg.h"
71#include "ispccdc.h"
72#include "isppreview.h"
73#include "ispresizer.h"
74#include "ispcsi2.h"
75#include "ispccp2.h"
76#include "isph3a.h"
77#include "isphist.h"
78
79static unsigned int autoidle;
80module_param(autoidle, int, 0444);
81MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
82
83static void isp_save_ctx(struct isp_device *isp);
84
85static void isp_restore_ctx(struct isp_device *isp);
86
87static const struct isp_res_mapping isp_res_maps[] = {
88 {
89 .isp_rev = ISP_REVISION_2_0,
8644cdf9
SA		 90 .offset = {
91 /* first MMIO area */
92 0x0000, /* base, len 0x0070 */
93 0x0400, /* ccp2, len 0x01f0 */
94 0x0600, /* ccdc, len 0x00a8 */
95 0x0a00, /* hist, len 0x0048 */
96 0x0c00, /* h3a, len 0x0060 */
97 0x0e00, /* preview, len 0x00a0 */
98 0x1000, /* resizer, len 0x00ac */
99 0x1200, /* sbl, len 0x00fc */
100 /* second MMIO area */
101 0x0000, /* csi2a, len 0x0170 */
102 0x0170, /* csiphy2, len 0x000c */
103 },
503596a1 104 .phy_type = ISP_PHY_TYPE_3430,
448de7e7
SA		 105 },
106 {
107 .isp_rev = ISP_REVISION_15_0,
8644cdf9
SA		 108 .offset = {
109 /* first MMIO area */
110 0x0000, /* base, len 0x0070 */
111 0x0400, /* ccp2, len 0x01f0 */
112 0x0600, /* ccdc, len 0x00a8 */
113 0x0a00, /* hist, len 0x0048 */
114 0x0c00, /* h3a, len 0x0060 */
115 0x0e00, /* preview, len 0x00a0 */
116 0x1000, /* resizer, len 0x00ac */
117 0x1200, /* sbl, len 0x00fc */
118 /* second MMIO area */
119 0x0000, /* csi2a, len 0x0170 (1st area) */
120 0x0170, /* csiphy2, len 0x000c */
121 0x01c0, /* csi2a, len 0x0040 (2nd area) */
122 0x0400, /* csi2c, len 0x0170 (1st area) */
123 0x0570, /* csiphy1, len 0x000c */
124 0x05c0, /* csi2c, len 0x0040 (2nd area) */
125 },
503596a1 126 .phy_type = ISP_PHY_TYPE_3630,
448de7e7
SA		 127 },
128};
129
130/* Structure for saving/restoring ISP module registers */
131static struct isp_reg isp_reg_list[] = {
132 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
133 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
135 {0, ISP_TOK_TERM, 0}
136};
137
138/*
139 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
140 * @isp: OMAP3 ISP device
141 *
142 * In order to force posting of pending writes, we need to write and
143 * readback the same register, in this case the revision register.
144 *
145 * See this link for reference:
146 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
147 */
148void omap3isp_flush(struct isp_device *isp)
149{
150 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
151 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152}
153
9b28ee3c
LP		 154/* -----------------------------------------------------------------------------
155 * XCLK
156 */
157
158#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
159
160static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
161{
162 switch (xclk->id) {
163 case ISP_XCLK_A:
164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
165 ISPTCTRL_CTRL_DIVA_MASK,
166 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
167 break;
168 case ISP_XCLK_B:
169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
170 ISPTCTRL_CTRL_DIVB_MASK,
171 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
172 break;
173 }
174}
175
176static int isp_xclk_prepare(struct clk_hw *hw)
177{
178 struct isp_xclk *xclk = to_isp_xclk(hw);
179
180 omap3isp_get(xclk->isp);
181
182 return 0;
183}
184
185static void isp_xclk_unprepare(struct clk_hw *hw)
186{
187 struct isp_xclk *xclk = to_isp_xclk(hw);
188
189 omap3isp_put(xclk->isp);
190}
191
192static int isp_xclk_enable(struct clk_hw *hw)
193{
194 struct isp_xclk *xclk = to_isp_xclk(hw);
195 unsigned long flags;
196
197 spin_lock_irqsave(&xclk->lock, flags);
198 isp_xclk_update(xclk, xclk->divider);
199 xclk->enabled = true;
200 spin_unlock_irqrestore(&xclk->lock, flags);
201
202 return 0;
203}
204
205static void isp_xclk_disable(struct clk_hw *hw)
206{
207 struct isp_xclk *xclk = to_isp_xclk(hw);
208 unsigned long flags;
209
210 spin_lock_irqsave(&xclk->lock, flags);
211 isp_xclk_update(xclk, 0);
212 xclk->enabled = false;
213 spin_unlock_irqrestore(&xclk->lock, flags);
214}
215
216static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
217 unsigned long parent_rate)
218{
219 struct isp_xclk *xclk = to_isp_xclk(hw);
220
221 return parent_rate / xclk->divider;
222}
223
224static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
225{
226 u32 divider;
227
228 if (*rate >= parent_rate) {
229 *rate = parent_rate;
230 return ISPTCTRL_CTRL_DIV_BYPASS;
231 }
232
aadec012
LP		 233 if (*rate == 0)
234 *rate = 1;
235
9b28ee3c
LP		 236 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
237 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
238 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
239
240 *rate = parent_rate / divider;
241 return divider;
242}
243
244static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
245 unsigned long *parent_rate)
246{
247 isp_xclk_calc_divider(&rate, *parent_rate);
248 return rate;
249}
250
251static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
252 unsigned long parent_rate)
253{
254 struct isp_xclk *xclk = to_isp_xclk(hw);
255 unsigned long flags;
256 u32 divider;
257
258 divider = isp_xclk_calc_divider(&rate, parent_rate);
259
260 spin_lock_irqsave(&xclk->lock, flags);
261
262 xclk->divider = divider;
263 if (xclk->enabled)
264 isp_xclk_update(xclk, divider);
265
266 spin_unlock_irqrestore(&xclk->lock, flags);
267
268 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
269 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
270 return 0;
271}
272
273static const struct clk_ops isp_xclk_ops = {
274 .prepare = isp_xclk_prepare,
275 .unprepare = isp_xclk_unprepare,
276 .enable = isp_xclk_enable,
277 .disable = isp_xclk_disable,
278 .recalc_rate = isp_xclk_recalc_rate,
279 .round_rate = isp_xclk_round_rate,
280 .set_rate = isp_xclk_set_rate,
281};
282
283static const char *isp_xclk_parent_name = "cam_mclk";
284
285static const struct clk_init_data isp_xclk_init_data = {
286 .name = "cam_xclk",
287 .ops = &isp_xclk_ops,
288 .parent_names = &isp_xclk_parent_name,
289 .num_parents = 1,
290};
291
64904b57
LP		 292static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
293{
294 unsigned int idx = clkspec->args[0];
295 struct isp_device *isp = data;
296
297 if (idx >= ARRAY_SIZE(isp->xclks))
298 return ERR_PTR(-ENOENT);
299
300 return isp->xclks[idx].clk;
301}
302
9b28ee3c
LP		 303static int isp_xclk_init(struct isp_device *isp)
304{
64904b57 305 struct device_node *np = isp->dev->of_node;
9b28ee3c
LP		 306 struct clk_init_data init;
307 unsigned int i;
308
f8e2ff26
SN		 309 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
310 isp->xclks[i].clk = ERR_PTR(-EINVAL);
311
9b28ee3c
LP		 312 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
313 struct isp_xclk *xclk = &isp->xclks[i];
9b28ee3c
LP		 314
315 xclk->isp = isp;
316 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
317 xclk->divider = 1;
318 spin_lock_init(&xclk->lock);
319
320 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
321 init.ops = &isp_xclk_ops;
322 init.parent_names = &isp_xclk_parent_name;
323 init.num_parents = 1;
324
325 xclk->hw.init = &init;
f8e2ff26
SN		 326 /*
327 * The first argument is NULL in order to avoid circular
328 * reference, as this driver takes reference on the
329 * sensor subdevice modules and the sensors would take
330 * reference on this module through clk_get().
331 */
332 xclk->clk = clk_register(NULL, &xclk->hw);
333 if (IS_ERR(xclk->clk))
334 return PTR_ERR(xclk->clk);
9b28ee3c
LP		 335 }
336
64904b57
LP		 337 if (np)
338 of_clk_add_provider(np, isp_xclk_src_get, isp);
339
9b28ee3c
LP		 340 return 0;
341}
342
343static void isp_xclk_cleanup(struct isp_device *isp)
344{
64904b57 345 struct device_node *np = isp->dev->of_node;
9b28ee3c
LP		 346 unsigned int i;
347
64904b57
LP		 348 if (np)
349 of_clk_del_provider(np);
350
9b28ee3c
LP		 351 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
352 struct isp_xclk *xclk = &isp->xclks[i];
353
f8e2ff26
SN		 354 if (!IS_ERR(xclk->clk))
355 clk_unregister(xclk->clk);
9b28ee3c
LP		 356 }
357}
358
359/* -----------------------------------------------------------------------------
360 * Interrupts
361 */
362
448de7e7
SA		 363/*
364 * isp_enable_interrupts - Enable ISP interrupts.
365 * @isp: OMAP3 ISP device
366 */
367static void isp_enable_interrupts(struct isp_device *isp)
368{
369 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
370 | IRQ0ENABLE_CSIB_IRQ
371 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
372 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
373 | IRQ0ENABLE_CCDC_VD0_IRQ
374 | IRQ0ENABLE_CCDC_VD1_IRQ
375 | IRQ0ENABLE_HS_VS_IRQ
376 | IRQ0ENABLE_HIST_DONE_IRQ
377 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
378 | IRQ0ENABLE_H3A_AF_DONE_IRQ
379 | IRQ0ENABLE_PRV_DONE_IRQ
380 | IRQ0ENABLE_RSZ_DONE_IRQ;
381
382 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
383 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
384}
385
386/*
387 * isp_disable_interrupts - Disable ISP interrupts.
388 * @isp: OMAP3 ISP device
389 */
390static void isp_disable_interrupts(struct isp_device *isp)
391{
392 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
393}
394
448de7e7 395/*
96d62ae2 396 * isp_core_init - ISP core settings
448de7e7
SA		 397 * @isp: OMAP3 ISP device
398 * @idle: Consider idle state.
399 *
25aeb418 400 * Set the power settings for the ISP and SBL bus and configure the HS/VS
96d62ae2
LP		 401 * interrupt source.
402 *
403 * We need to configure the HS/VS interrupt source before interrupts get
404 * enabled, as the sensor might be free-running and the ISP default setting
405 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 406 */
96d62ae2 407static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA		 408{
409 isp_reg_writel(isp,
410 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
411 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
412 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
413 ((isp->revision == ISP_REVISION_15_0) ?
414 ISP_SYSCONFIG_AUTOIDLE : 0),
415 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
416
96d62ae2
LP		 417 isp_reg_writel(isp,
418 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
419 ISPCTRL_SYNC_DETECT_VSRISE,
420 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA		 421}
422
423/*
424 * Configure the bridge and lane shifter. Valid inputs are
425 *
426 * CCDC_INPUT_PARALLEL: Parallel interface
427 * CCDC_INPUT_CSI2A: CSI2a receiver
428 * CCDC_INPUT_CCP2B: CCP2b receiver
429 * CCDC_INPUT_CSI2C: CSI2c receiver
430 *
431 * The bridge and lane shifter are configured according to the selected input
432 * and the ISP platform data.
433 */
434void omap3isp_configure_bridge(struct isp_device *isp,
435 enum ccdc_input_entity input,
68908747 436 const struct isp_parallel_cfg *parcfg,
c51364ca 437 unsigned int shift, unsigned int bridge)
448de7e7
SA		 438{
439 u32 ispctrl_val;
440
441 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
442 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
443 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
444 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
445 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 446 ispctrl_val |= bridge;
448de7e7
SA		 447
448 switch (input) {
449 case CCDC_INPUT_PARALLEL:
450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
68908747 451 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
74d1e7c0 452 shift += parcfg->data_lane_shift;
448de7e7
SA		 453 break;
454
455 case CCDC_INPUT_CSI2A:
456 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
457 break;
458
459 case CCDC_INPUT_CCP2B:
460 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
461 break;
462
463 case CCDC_INPUT_CSI2C:
464 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
465 break;
466
467 default:
468 return;
469 }
470
c09af044
MJ		 471 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
472
448de7e7
SA		 473 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
474}
475
448de7e7
SA		 476void omap3isp_hist_dma_done(struct isp_device *isp)
477{
478 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
479 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
480 /* Histogram cannot be enabled in this frame anymore */
481 atomic_set(&isp->isp_hist.buf_err, 1);
482 dev_dbg(isp->dev, "hist: Out of synchronization with "
483 "CCDC. Ignoring next buffer.\n");
484 }
485}
486
487static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
488{
489 static const char *name[] = {
490 "CSIA_IRQ",
491 "res1",
492 "res2",
493 "CSIB_LCM_IRQ",
494 "CSIB_IRQ",
495 "res5",
496 "res6",
497 "res7",
498 "CCDC_VD0_IRQ",
499 "CCDC_VD1_IRQ",
500 "CCDC_VD2_IRQ",
501 "CCDC_ERR_IRQ",
502 "H3A_AF_DONE_IRQ",
503 "H3A_AWB_DONE_IRQ",
504 "res14",
505 "res15",
506 "HIST_DONE_IRQ",
507 "CCDC_LSC_DONE",
508 "CCDC_LSC_PREFETCH_COMPLETED",
509 "CCDC_LSC_PREFETCH_ERROR",
510 "PRV_DONE_IRQ",
511 "CBUFF_IRQ",
512 "res22",
513 "res23",
514 "RSZ_DONE_IRQ",
515 "OVF_IRQ",
516 "res26",
517 "res27",
518 "MMU_ERR_IRQ",
519 "OCP_ERR_IRQ",
520 "SEC_ERR_IRQ",
521 "HS_VS_IRQ",
522 };
523 int i;
524
6c20c635 525 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 526
527 for (i = 0; i < ARRAY_SIZE(name); i++) {
528 if ((1 << i) & irqstatus)
529 printk(KERN_CONT "%s ", name[i]);
530 }
531 printk(KERN_CONT "\n");
532}
533
534static void isp_isr_sbl(struct isp_device *isp)
535{
536 struct device *dev = isp->dev;
875e2e3e 537 struct isp_pipeline *pipe;
448de7e7
SA		 538 u32 sbl_pcr;
539
540 /*
541 * Handle shared buffer logic overflows for video buffers.
542 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
543 */
544 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
545 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
546 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
547
548 if (sbl_pcr)
549 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
550
875e2e3e
LP		 551 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
552 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
553 if (pipe != NULL)
554 pipe->error = true;
555 }
556
557 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
558 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
559 if (pipe != NULL)
560 pipe->error = true;
561 }
562
563 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
564 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
565 if (pipe != NULL)
566 pipe->error = true;
448de7e7
SA		 567 }
568
569 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 570 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
571 if (pipe != NULL)
572 pipe->error = true;
448de7e7
SA		 573 }
574
575 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
576 | ISPSBL_PCR_RSZ2_WBL_OVF
577 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 578 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
579 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
580 if (pipe != NULL)
581 pipe->error = true;
582 }
448de7e7
SA		 583
584 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
585 omap3isp_stat_sbl_overflow(&isp->isp_af);
586
587 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
588 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
589}
590
591/*
592 * isp_isr - Interrupt Service Routine for Camera ISP module.
593 * @irq: Not used currently.
594 * @_isp: Pointer to the OMAP3 ISP device
595 *
596 * Handles the corresponding callback if plugged in.
448de7e7
SA		 597 */
598static irqreturn_t isp_isr(int irq, void *_isp)
599{
600 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
601 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
602 IRQ0STATUS_CCDC_VD0_IRQ |
603 IRQ0STATUS_CCDC_VD1_IRQ |
604 IRQ0STATUS_HS_VS_IRQ;
605 struct isp_device *isp = _isp;
606 u32 irqstatus;
448de7e7
SA		 607
608 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
609 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
610
611 isp_isr_sbl(isp);
612
875e2e3e
LP		 613 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
614 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 615
875e2e3e
LP		 616 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
617 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 618
619 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
620 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
621 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
622 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
623 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
624 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
625 omap3isp_stat_isr_frame_sync(&isp->isp_af);
626 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
627 }
628
629 if (irqstatus & ccdc_events)
630 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
631
632 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
633 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
634 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
635 omap3isp_preview_isr(&isp->isp_prev);
636 }
637
638 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
639 omap3isp_resizer_isr(&isp->isp_res);
640
641 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
642 omap3isp_stat_isr(&isp->isp_aewb);
643
644 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
645 omap3isp_stat_isr(&isp->isp_af);
646
647 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
648 omap3isp_stat_isr(&isp->isp_hist);
649
650 omap3isp_flush(isp);
651
652#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
653 isp_isr_dbg(isp, irqstatus);
654#endif
655
656 return IRQ_HANDLED;
657}
658
659/* -----------------------------------------------------------------------------
660 * Pipeline power management
661 *
662 * Entities must be powered up when part of a pipeline that contains at least
663 * one open video device node.
664 *
665 * To achieve this use the entity use_count field to track the number of users.
666 * For entities corresponding to video device nodes the use_count field stores
667 * the users count of the node. For entities corresponding to subdevs the
668 * use_count field stores the total number of users of all video device nodes
669 * in the pipeline.
670 *
671 * The omap3isp_pipeline_pm_use() function must be called in the open() and
672 * close() handlers of video device nodes. It increments or decrements the use
673 * count of all subdev entities in the pipeline.
674 *
675 * To react to link management on powered pipelines, the link setup notification
676 * callback updates the use count of all entities in the source and sink sides
677 * of the link.
678 */
679
680/*
681 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
682 * @entity: The entity
683 *
684 * Return the total number of users of all video device nodes in the pipeline.
685 */
28461451
SA		 686static int isp_pipeline_pm_use_count(struct media_entity *entity,
687 struct media_entity_graph *graph)
448de7e7 688{
448de7e7
SA		 689 int use = 0;
690
28461451 691 media_entity_graph_walk_start(graph, entity);
448de7e7 692
28461451 693 while ((entity = media_entity_graph_walk_next(graph))) {
3efdf62c 694 if (is_media_entity_v4l2_io(entity))
448de7e7
SA		 695 use += entity->use_count;
696 }
697
698 return use;
699}
700
701/*
702 * isp_pipeline_pm_power_one - Apply power change to an entity
703 * @entity: The entity
704 * @change: Use count change
705 *
706 * Change the entity use count by @change. If the entity is a subdev update its
707 * power state by calling the core::s_power operation when the use count goes
708 * from 0 to != 0 or from != 0 to 0.
709 *
710 * Return 0 on success or a negative error code on failure.
711 */
712static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
713{
714 struct v4l2_subdev *subdev;
715 int ret;
716
3efdf62c 717 subdev = is_media_entity_v4l2_subdev(entity)
448de7e7
SA		 718 ? media_entity_to_v4l2_subdev(entity) : NULL;
719
720 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
721 ret = v4l2_subdev_call(subdev, core, s_power, 1);
722 if (ret < 0 && ret != -ENOIOCTLCMD)
723 return ret;
724 }
725
726 entity->use_count += change;
727 WARN_ON(entity->use_count < 0);
728
729 if (entity->use_count == 0 && change < 0 && subdev != NULL)
730 v4l2_subdev_call(subdev, core, s_power, 0);
731
732 return 0;
733}
734
735/*
736 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
737 * @entity: The entity
738 * @change: Use count change
739 *
740 * Walk the pipeline to update the use count and the power state of all non-node
741 * entities.
742 *
743 * Return 0 on success or a negative error code on failure.
744 */
28461451
SA		 745static int isp_pipeline_pm_power(struct media_entity *entity, int change,
746 struct media_entity_graph *graph)
448de7e7 747{
448de7e7
SA		 748 struct media_entity *first = entity;
749 int ret = 0;
750
751 if (!change)
752 return 0;
753
28461451 754 media_entity_graph_walk_start(graph, entity);
448de7e7 755
28461451 756 while (!ret && (entity = media_entity_graph_walk_next(graph)))
3efdf62c 757 if (is_media_entity_v4l2_subdev(entity))
448de7e7
SA		 758 ret = isp_pipeline_pm_power_one(entity, change);
759
760 if (!ret)
28461451 761 return ret;
448de7e7 762
28461451 763 media_entity_graph_walk_start(graph, first);
448de7e7 764
28461451 765 while ((first = media_entity_graph_walk_next(graph))
448de7e7 766 && first != entity)
3efdf62c 767 if (is_media_entity_v4l2_subdev(first))
448de7e7
SA		 768 isp_pipeline_pm_power_one(first, -change);
769
770 return ret;
771}
772
773/*
774 * omap3isp_pipeline_pm_use - Update the use count of an entity
775 * @entity: The entity
776 * @use: Use (1) or stop using (0) the entity
777 *
778 * Update the use count of all entities in the pipeline and power entities on or
779 * off accordingly.
780 *
781 * Return 0 on success or a negative error code on failure. Powering entities
782 * off is assumed to never fail. No failure can occur when the use parameter is
783 * set to 0.
784 */
28461451
SA		 785int omap3isp_pipeline_pm_use(struct media_entity *entity, int use,
786 struct media_entity_graph *graph)
448de7e7
SA		 787{
788 int change = use ? 1 : -1;
789 int ret;
790
d10c9894 791 mutex_lock(&entity->graph_obj.mdev->graph_mutex);
448de7e7
SA		 792
793 /* Apply use count to node. */
794 entity->use_count += change;
795 WARN_ON(entity->use_count < 0);
796
797 /* Apply power change to connected non-nodes. */
28461451 798 ret = isp_pipeline_pm_power(entity, change, graph);
e2241531
LP		 799 if (ret < 0)
800 entity->use_count -= change;
448de7e7 801
d10c9894 802 mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
448de7e7
SA		 803
804 return ret;
805}
806
807/*
808 * isp_pipeline_link_notify - Link management notification callback
813f5c0a 809 * @link: The link
448de7e7 810 * @flags: New link flags that will be applied
813f5c0a 811 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
448de7e7
SA		 812 *
813 * React to link management on powered pipelines by updating the use count of
814 * all entities in the source and sink sides of the link. Entities are powered
815 * on or off accordingly.
816 *
817 * Return 0 on success or a negative error code on failure. Powering entities
818 * off is assumed to never fail. This function will not fail for disconnection
819 * events.
820 */
813f5c0a
SN		 821static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
822 unsigned int notification)
448de7e7 823{
28461451
SA		 824 struct media_entity_graph *graph =
825 &container_of(link->graph_obj.mdev, struct isp_device,
826 media_dev)->pm_count_graph;
813f5c0a
SN		 827 struct media_entity *source = link->source->entity;
828 struct media_entity *sink = link->sink->entity;
28461451
SA		 829 int source_use;
830 int sink_use;
831 int ret = 0;
832
833 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
834 ret = media_entity_graph_walk_init(graph,
835 link->graph_obj.mdev);
836 if (ret)
837 return ret;
838 }
839
840 source_use = isp_pipeline_pm_use_count(source, graph);
841 sink_use = isp_pipeline_pm_use_count(sink, graph);
448de7e7 842
813f5c0a 843 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
9d39f054 844 !(flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 845 /* Powering off entities is assumed to never fail. */
28461451
SA		 846 isp_pipeline_pm_power(source, -sink_use, graph);
847 isp_pipeline_pm_power(sink, -source_use, graph);
448de7e7
SA		 848 return 0;
849 }
850
9d39f054 851 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH &&
813f5c0a 852 (flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 853
28461451 854 ret = isp_pipeline_pm_power(source, sink_use, graph);
813f5c0a
SN		 855 if (ret < 0)
856 return ret;
448de7e7 857
28461451 858 ret = isp_pipeline_pm_power(sink, source_use, graph);
813f5c0a 859 if (ret < 0)
28461451 860 isp_pipeline_pm_power(source, -sink_use, graph);
813f5c0a
SN		 861 }
862
28461451
SA		 863 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH)
864 media_entity_graph_walk_cleanup(graph);
865
866 return ret;
448de7e7
SA		 867}
868
869/* -----------------------------------------------------------------------------
870 * Pipeline stream management
871 */
872
873/*
874 * isp_pipeline_enable - Enable streaming on a pipeline
875 * @pipe: ISP pipeline
876 * @mode: Stream mode (single shot or continuous)
877 *
878 * Walk the entities chain starting at the pipeline output video node and start
879 * all modules in the chain in the given mode.
880 *
25985edc 881 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 882 * operation otherwise.
883 */
884static int isp_pipeline_enable(struct isp_pipeline *pipe,
885 enum isp_pipeline_stream_state mode)
886{
887 struct isp_device *isp = pipe->output->isp;
888 struct media_entity *entity;
889 struct media_pad *pad;
890 struct v4l2_subdev *subdev;
891 unsigned long flags;
c62e2a19 892 int ret;
448de7e7 893
112eee0c
LP		 894 /* Refuse to start streaming if an entity included in the pipeline has
895 * crashed. This check must be performed before the loop below to avoid
896 * starting entities if the pipeline won't start anyway (those entities
897 * would then likely fail to stop, making the problem worse).
1567bb7d 898 */
17d3d405 899 if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))
1567bb7d
LP		 900 return -EIO;
901
448de7e7
SA		 902 spin_lock_irqsave(&pipe->lock, flags);
903 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
904 spin_unlock_irqrestore(&pipe->lock, flags);
905
906 pipe->do_propagation = false;
907
908 entity = &pipe->output->video.entity;
909 while (1) {
910 pad = &entity->pads[0];
911 if (!(pad->flags & MEDIA_PAD_FL_SINK))
912 break;
913
1bddf1b3 914 pad = media_entity_remote_pad(pad);
3efdf62c 915 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
448de7e7
SA		 916 break;
917
918 entity = pad->entity;
919 subdev = media_entity_to_v4l2_subdev(entity);
920
921 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
922 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 923 return ret;
448de7e7
SA		 924
925 if (subdev == &isp->isp_ccdc.subdev) {
926 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
927 s_stream, mode);
928 v4l2_subdev_call(&isp->isp_af.subdev, video,
929 s_stream, mode);
930 v4l2_subdev_call(&isp->isp_hist.subdev, video,
931 s_stream, mode);
932 pipe->do_propagation = true;
933 }
934 }
935
c62e2a19 936 return 0;
448de7e7
SA		 937}
938
939static int isp_pipeline_wait_resizer(struct isp_device *isp)
940{
941 return omap3isp_resizer_busy(&isp->isp_res);
942}
943
944static int isp_pipeline_wait_preview(struct isp_device *isp)
945{
946 return omap3isp_preview_busy(&isp->isp_prev);
947}
948
949static int isp_pipeline_wait_ccdc(struct isp_device *isp)
950{
951 return omap3isp_stat_busy(&isp->isp_af)
952 || omap3isp_stat_busy(&isp->isp_aewb)
953 || omap3isp_stat_busy(&isp->isp_hist)
954 || omap3isp_ccdc_busy(&isp->isp_ccdc);
955}
956
957#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
958
959static int isp_pipeline_wait(struct isp_device *isp,
960 int(*busy)(struct isp_device *isp))
961{
962 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
963
964 while (!time_after(jiffies, timeout)) {
965 if (!busy(isp))
966 return 0;
967 }
968
969 return 1;
970}
971
972/*
973 * isp_pipeline_disable - Disable streaming on a pipeline
974 * @pipe: ISP pipeline
975 *
976 * Walk the entities chain starting at the pipeline output video node and stop
977 * all modules in the chain. Wait synchronously for the modules to be stopped if
978 * necessary.
979 *
980 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
981 * can't be stopped (in which case a software reset of the ISP is probably
982 * necessary).
983 */
984static int isp_pipeline_disable(struct isp_pipeline *pipe)
985{
986 struct isp_device *isp = pipe->output->isp;
987 struct media_entity *entity;
988 struct media_pad *pad;
989 struct v4l2_subdev *subdev;
990 int failure = 0;
991 int ret;
992
993 /*
994 * We need to stop all the modules after CCDC first or they'll
995 * never stop since they may not get a full frame from CCDC.
996 */
997 entity = &pipe->output->video.entity;
998 while (1) {
999 pad = &entity->pads[0];
1000 if (!(pad->flags & MEDIA_PAD_FL_SINK))
1001 break;
1002
1bddf1b3 1003 pad = media_entity_remote_pad(pad);
3efdf62c 1004 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
448de7e7
SA		 1005 break;
1006
1007 entity = pad->entity;
1008 subdev = media_entity_to_v4l2_subdev(entity);
1009
1010 if (subdev == &isp->isp_ccdc.subdev) {
1011 v4l2_subdev_call(&isp->isp_aewb.subdev,
1012 video, s_stream, 0);
1013 v4l2_subdev_call(&isp->isp_af.subdev,
1014 video, s_stream, 0);
1015 v4l2_subdev_call(&isp->isp_hist.subdev,
1016 video, s_stream, 0);
1017 }
1018
eb228e89 1019 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
448de7e7
SA		 1020
1021 if (subdev == &isp->isp_res.subdev)
eb228e89 1022 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
448de7e7 1023 else if (subdev == &isp->isp_prev.subdev)
eb228e89 1024 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
448de7e7 1025 else if (subdev == &isp->isp_ccdc.subdev)
eb228e89 1026 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
448de7e7 1027
112eee0c
LP		 1028 /* Handle stop failures. An entity that fails to stop can
1029 * usually just be restarted. Flag the stop failure nonetheless
1030 * to trigger an ISP reset the next time the device is released,
1031 * just in case.
1032 *
1033 * The preview engine is a special case. A failure to stop can
1034 * mean a hardware crash. When that happens the preview engine
1035 * won't respond to read/write operations on the L4 bus anymore,
1036 * resulting in a bus fault and a kernel oops next time it gets
1037 * accessed. Mark it as crashed to prevent pipelines including
1038 * it from being started.
1039 */
448de7e7
SA		 1040 if (ret) {
1041 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
112eee0c 1042 isp->stop_failure = true;
17d3d405
SA		 1043 if (subdev == &isp->isp_prev.subdev)
1044 media_entity_enum_set(&isp->crashed,
1045 &subdev->entity);
448de7e7
SA		 1046 failure = -ETIMEDOUT;
1047 }
1048 }
1049
1050 return failure;
1051}
1052
1053/*
1054 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1055 * @pipe: ISP pipeline
1056 * @state: Stream state (stopped, single shot or continuous)
1057 *
1058 * Set the pipeline to the given stream state. Pipelines can be started in
1059 * single-shot or continuous mode.
1060 *
25985edc 1061 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 1062 * operation otherwise. The pipeline state is not updated when the operation
1063 * fails, except when stopping the pipeline.
448de7e7
SA		 1064 */
1065int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1066 enum isp_pipeline_stream_state state)
1067{
1068 int ret;
1069
1070 if (state == ISP_PIPELINE_STREAM_STOPPED)
1071 ret = isp_pipeline_disable(pipe);
1072 else
1073 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 1074
1075 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1076 pipe->stream_state = state;
448de7e7
SA		 1077
1078 return ret;
1079}
1080
661112cb
LP		 1081/*
1082 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1083 * @pipe: ISP pipeline
1084 *
1085 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1086 * erroneous and makes sure no new buffer can be queued. This function is called
1087 * when a fatal error that prevents any further operation on the pipeline
1088 * occurs.
1089 */
1090void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1091{
1092 if (pipe->input)
1093 omap3isp_video_cancel_stream(pipe->input);
1094 if (pipe->output)
1095 omap3isp_video_cancel_stream(pipe->output);
1096}
1097
448de7e7
SA		 1098/*
1099 * isp_pipeline_resume - Resume streaming on a pipeline
1100 * @pipe: ISP pipeline
1101 *
1102 * Resume video output and input and re-enable pipeline.
1103 */
1104static void isp_pipeline_resume(struct isp_pipeline *pipe)
1105{
1106 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1107
1108 omap3isp_video_resume(pipe->output, !singleshot);
1109 if (singleshot)
1110 omap3isp_video_resume(pipe->input, 0);
1111 isp_pipeline_enable(pipe, pipe->stream_state);
1112}
1113
1114/*
1115 * isp_pipeline_suspend - Suspend streaming on a pipeline
1116 * @pipe: ISP pipeline
1117 *
1118 * Suspend pipeline.
1119 */
1120static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1121{
1122 isp_pipeline_disable(pipe);
1123}
1124
1125/*
1126 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1127 * video node
1128 * @me: ISP module's media entity
1129 *
1130 * Returns 1 if the entity has an enabled link to the output video node or 0
1131 * otherwise. It's true only while pipeline can have no more than one output
1132 * node.
1133 */
1134static int isp_pipeline_is_last(struct media_entity *me)
1135{
1136 struct isp_pipeline *pipe;
1137 struct media_pad *pad;
1138
1139 if (!me->pipe)
1140 return 0;
1141 pipe = to_isp_pipeline(me);
1142 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1143 return 0;
1bddf1b3 1144 pad = media_entity_remote_pad(&pipe->output->pad);
448de7e7
SA		 1145 return pad->entity == me;
1146}
1147
1148/*
1149 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1150 * @me: ISP module's media entity
1151 *
1152 * Suspend the whole pipeline if module's entity has an enabled link to the
1153 * output video node. It works only while pipeline can have no more than one
1154 * output node.
1155 */
1156static void isp_suspend_module_pipeline(struct media_entity *me)
1157{
1158 if (isp_pipeline_is_last(me))
1159 isp_pipeline_suspend(to_isp_pipeline(me));
1160}
1161
1162/*
1163 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1164 * @me: ISP module's media entity
1165 *
1166 * Resume the whole pipeline if module's entity has an enabled link to the
1167 * output video node. It works only while pipeline can have no more than one
1168 * output node.
1169 */
1170static void isp_resume_module_pipeline(struct media_entity *me)
1171{
1172 if (isp_pipeline_is_last(me))
1173 isp_pipeline_resume(to_isp_pipeline(me));
1174}
1175
1176/*
1177 * isp_suspend_modules - Suspend ISP submodules.
1178 * @isp: OMAP3 ISP device
1179 *
1180 * Returns 0 if suspend left in idle state all the submodules properly,
1181 * or returns 1 if a general Reset is required to suspend the submodules.
1182 */
1183static int isp_suspend_modules(struct isp_device *isp)
1184{
1185 unsigned long timeout;
1186
1187 omap3isp_stat_suspend(&isp->isp_aewb);
1188 omap3isp_stat_suspend(&isp->isp_af);
1189 omap3isp_stat_suspend(&isp->isp_hist);
1190 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1191 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1192 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1193 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1194 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1195
1196 timeout = jiffies + ISP_STOP_TIMEOUT;
1197 while (omap3isp_stat_busy(&isp->isp_af)
1198 || omap3isp_stat_busy(&isp->isp_aewb)
1199 || omap3isp_stat_busy(&isp->isp_hist)
1200 || omap3isp_preview_busy(&isp->isp_prev)
1201 || omap3isp_resizer_busy(&isp->isp_res)
1202 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1203 if (time_after(jiffies, timeout)) {
1204 dev_info(isp->dev, "can't stop modules.\n");
1205 return 1;
1206 }
1207 msleep(1);
1208 }
1209
1210 return 0;
1211}
1212
1213/*
1214 * isp_resume_modules - Resume ISP submodules.
1215 * @isp: OMAP3 ISP device
1216 */
1217static void isp_resume_modules(struct isp_device *isp)
1218{
1219 omap3isp_stat_resume(&isp->isp_aewb);
1220 omap3isp_stat_resume(&isp->isp_af);
1221 omap3isp_stat_resume(&isp->isp_hist);
1222 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1223 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1224 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1225 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1226 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1227}
1228
1229/*
1230 * isp_reset - Reset ISP with a timeout wait for idle.
1231 * @isp: OMAP3 ISP device
1232 */
1233static int isp_reset(struct isp_device *isp)
1234{
1235 unsigned long timeout = 0;
1236
1237 isp_reg_writel(isp,
1238 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1239 | ISP_SYSCONFIG_SOFTRESET,
1240 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1241 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1242 ISP_SYSSTATUS) & 0x1)) {
1243 if (timeout++ > 10000) {
1244 dev_alert(isp->dev, "cannot reset ISP\n");
1245 return -ETIMEDOUT;
1246 }
1247 udelay(1);
1248 }
1249
112eee0c 1250 isp->stop_failure = false;
17d3d405 1251 media_entity_enum_zero(&isp->crashed);
448de7e7
SA		 1252 return 0;
1253}
1254
1255/*
1256 * isp_save_context - Saves the values of the ISP module registers.
1257 * @isp: OMAP3 ISP device
1258 * @reg_list: Structure containing pairs of register address and value to
1259 * modify on OMAP.
1260 */
1261static void
1262isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1263{
1264 struct isp_reg *next = reg_list;
1265
1266 for (; next->reg != ISP_TOK_TERM; next++)
1267 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1268}
1269
1270/*
1271 * isp_restore_context - Restores the values of the ISP module registers.
1272 * @isp: OMAP3 ISP device
1273 * @reg_list: Structure containing pairs of register address and value to
1274 * modify on OMAP.
1275 */
1276static void
1277isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1278{
1279 struct isp_reg *next = reg_list;
1280
1281 for (; next->reg != ISP_TOK_TERM; next++)
1282 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1283}
1284
1285/*
1286 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1287 * @isp: OMAP3 ISP device
1288 *
1289 * Routine for saving the context of each module in the ISP.
1290 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1291 */
1292static void isp_save_ctx(struct isp_device *isp)
1293{
1294 isp_save_context(isp, isp_reg_list);
fabdbca8 1295 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1296}
1297
1298/*
1299 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1300 * @isp: OMAP3 ISP device
1301 *
1302 * Routine for restoring the context of each module in the ISP.
1303 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1304 */
1305static void isp_restore_ctx(struct isp_device *isp)
1306{
1307 isp_restore_context(isp, isp_reg_list);
fabdbca8 1308 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1309 omap3isp_ccdc_restore_context(isp);
1310 omap3isp_preview_restore_context(isp);
1311}
1312
1313/* -----------------------------------------------------------------------------
1314 * SBL resources management
1315 */
1316#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1317 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1318 OMAP3_ISP_SBL_PREVIEW_READ | \
1319 OMAP3_ISP_SBL_RESIZER_READ)
1320#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1321 OMAP3_ISP_SBL_CSI2A_WRITE | \
1322 OMAP3_ISP_SBL_CSI2C_WRITE | \
1323 OMAP3_ISP_SBL_CCDC_WRITE | \
1324 OMAP3_ISP_SBL_PREVIEW_WRITE)
1325
1326void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1327{
1328 u32 sbl = 0;
1329
1330 isp->sbl_resources |= res;
1331
1332 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1333 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1334
1335 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1336 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1337
1338 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1339 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1340
1341 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1342 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1343
1344 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1345 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1346
1347 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1348 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1349
1350 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1351}
1352
1353void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1354{
1355 u32 sbl = 0;
1356
1357 isp->sbl_resources &= ~res;
1358
1359 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1360 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1361
1362 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1363 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1364
1365 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1366 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1367
1368 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1369 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1370
1371 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1372 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1373
1374 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1375 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1376
1377 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1378}
1379
1380/*
1381 * isp_module_sync_idle - Helper to sync module with its idle state
1382 * @me: ISP submodule's media entity
1383 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1384 * @stopping: flag which tells module wants to stop
1385 *
1386 * This function checks if ISP submodule needs to wait for next interrupt. If
1387 * yes, makes the caller to sleep while waiting for such event.
1388 */
1389int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1390 atomic_t *stopping)
1391{
1392 struct isp_pipeline *pipe = to_isp_pipeline(me);
1393
1394 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1395 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1396 !isp_pipeline_ready(pipe)))
1397 return 0;
1398
1399 /*
1400 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1401 * scenario. We'll call it here to avoid race conditions.
1402 */
1403 atomic_set(stopping, 1);
1404 smp_mb();
1405
1406 /*
1407 * If module is the last one, it's writing to memory. In this case,
1408 * it's necessary to check if the module is already paused due to
1409 * DMA queue underrun or if it has to wait for next interrupt to be
1410 * idle.
1411 * If it isn't the last one, the function won't sleep but *stopping
1412 * will still be set to warn next submodule caller's interrupt the
1413 * module wants to be idle.
1414 */
1415 if (isp_pipeline_is_last(me)) {
1416 struct isp_video *video = pipe->output;
1417 unsigned long flags;
e8feb876 1418 spin_lock_irqsave(&video->irqlock, flags);
448de7e7 1419 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
e8feb876 1420 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1421 atomic_set(stopping, 0);
1422 smp_mb();
1423 return 0;
1424 }
e8feb876 1425 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1426 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1427 msecs_to_jiffies(1000))) {
1428 atomic_set(stopping, 0);
1429 smp_mb();
1430 return -ETIMEDOUT;
1431 }
1432 }
1433
1434 return 0;
1435}
1436
1437/*
1e9c4d49 1438 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
448de7e7
SA		 1439 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1440 * @stopping: flag which tells module wants to stop
1441 *
1442 * This function checks if ISP submodule was stopping. In case of yes, it
1443 * notices the caller by setting stopping to 0 and waking up the wait queue.
1444 * Returns 1 if it was stopping or 0 otherwise.
1445 */
1446int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1447 atomic_t *stopping)
1448{
1449 if (atomic_cmpxchg(stopping, 1, 0)) {
1450 wake_up(wait);
1451 return 1;
1452 }
1453
1454 return 0;
1455}
1456
1457/* --------------------------------------------------------------------------
1458 * Clock management
1459 */
1460
1461#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1462 ISPCTRL_HIST_CLK_EN | \
1463 ISPCTRL_RSZ_CLK_EN | \
1464 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1465 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1466
1467static void __isp_subclk_update(struct isp_device *isp)
1468{
1469 u32 clk = 0;
1470
be9a1b98
LP		 1471 /* AEWB and AF share the same clock. */
1472 if (isp->subclk_resources &
1473 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA		 1474 clk |= ISPCTRL_H3A_CLK_EN;
1475
1476 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1477 clk |= ISPCTRL_HIST_CLK_EN;
1478
1479 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1480 clk |= ISPCTRL_RSZ_CLK_EN;
1481
1482 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1483 * RAM as well.
448de7e7
SA		 1484 */
1485 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1486 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1487
1488 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1489 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1490
1491 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1492 ISPCTRL_CLKS_MASK, clk);
1493}
1494
1495void omap3isp_subclk_enable(struct isp_device *isp,
1496 enum isp_subclk_resource res)
1497{
1498 isp->subclk_resources |= res;
1499
1500 __isp_subclk_update(isp);
1501}
1502
1503void omap3isp_subclk_disable(struct isp_device *isp,
1504 enum isp_subclk_resource res)
1505{
1506 isp->subclk_resources &= ~res;
1507
1508 __isp_subclk_update(isp);
1509}
1510
1511/*
1512 * isp_enable_clocks - Enable ISP clocks
1513 * @isp: OMAP3 ISP device
1514 *
b057c3c3
LP		 1515 * Return 0 if successful, or clk_prepare_enable return value if any of them
1516 * fails.
448de7e7
SA		 1517 */
1518static int isp_enable_clocks(struct isp_device *isp)
1519{
1520 int r;
1521 unsigned long rate;
448de7e7 1522
b057c3c3 1523 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7 1524 if (r) {
b057c3c3 1525 dev_err(isp->dev, "failed to enable cam_ick clock\n");
448de7e7
SA		 1526 goto out_clk_enable_ick;
1527 }
6d1aa02f 1528 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
448de7e7 1529 if (r) {
6d1aa02f 1530 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
448de7e7
SA		 1531 goto out_clk_enable_mclk;
1532 }
b057c3c3 1533 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1534 if (r) {
b057c3c3 1535 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
448de7e7
SA		 1536 goto out_clk_enable_mclk;
1537 }
1538 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1539 if (rate != CM_CAM_MCLK_HZ)
1540 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1541 " expected : %d\n"
1542 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
b057c3c3 1543 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7 1544 if (r) {
b057c3c3 1545 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
448de7e7
SA		 1546 goto out_clk_enable_csi2_fclk;
1547 }
1548 return 0;
1549
1550out_clk_enable_csi2_fclk:
b057c3c3 1551 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1552out_clk_enable_mclk:
b057c3c3 1553 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7
SA		 1554out_clk_enable_ick:
1555 return r;
1556}
1557
1558/*
1559 * isp_disable_clocks - Disable ISP clocks
1560 * @isp: OMAP3 ISP device
1561 */
1562static void isp_disable_clocks(struct isp_device *isp)
1563{
b057c3c3
LP		 1564 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1565 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1566 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7
SA		 1567}
1568
1569static const char *isp_clocks[] = {
1570 "cam_ick",
1571 "cam_mclk",
448de7e7
SA		 1572 "csi2_96m_fck",
1573 "l3_ick",
1574};
1575
448de7e7
SA		 1576static int isp_get_clocks(struct isp_device *isp)
1577{
1578 struct clk *clk;
1579 unsigned int i;
1580
1581 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
cf2b4cf6 1582 clk = devm_clk_get(isp->dev, isp_clocks[i]);
448de7e7
SA		 1583 if (IS_ERR(clk)) {
1584 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
448de7e7
SA		 1585 return PTR_ERR(clk);
1586 }
1587
1588 isp->clock[i] = clk;
1589 }
1590
1591 return 0;
1592}
1593
1594/*
1595 * omap3isp_get - Acquire the ISP resource.
1596 *
1597 * Initializes the clocks for the first acquire.
1598 *
1599 * Increment the reference count on the ISP. If the first reference is taken,
1600 * enable clocks and power-up all submodules.
1601 *
25985edc 1602 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1603 */
96d62ae2 1604static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA		 1605{
1606 struct isp_device *__isp = isp;
1607
1608 if (isp == NULL)
1609 return NULL;
1610
1611 mutex_lock(&isp->isp_mutex);
1612 if (isp->ref_count > 0)
1613 goto out;
1614
1615 if (isp_enable_clocks(isp) < 0) {
1616 __isp = NULL;
1617 goto out;
1618 }
1619
1620 /* We don't want to restore context before saving it! */
1621 if (isp->has_context)
1622 isp_restore_ctx(isp);
448de7e7 1623
96d62ae2
LP		 1624 if (irq)
1625 isp_enable_interrupts(isp);
448de7e7
SA		 1626
1627out:
1628 if (__isp != NULL)
1629 isp->ref_count++;
1630 mutex_unlock(&isp->isp_mutex);
1631
1632 return __isp;
1633}
1634
96d62ae2
LP		 1635struct isp_device *omap3isp_get(struct isp_device *isp)
1636{
1637 return __omap3isp_get(isp, true);
1638}
1639
448de7e7
SA		 1640/*
1641 * omap3isp_put - Release the ISP
1642 *
1643 * Decrement the reference count on the ISP. If the last reference is released,
1644 * power-down all submodules, disable clocks and free temporary buffers.
1645 */
2a0a5472 1646static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
448de7e7
SA		 1647{
1648 if (isp == NULL)
1649 return;
1650
1651 mutex_lock(&isp->isp_mutex);
1652 BUG_ON(isp->ref_count == 0);
1653 if (--isp->ref_count == 0) {
1654 isp_disable_interrupts(isp);
2a0a5472 1655 if (save_ctx) {
a32f2f90 1656 isp_save_ctx(isp);
96d62ae2
LP		 1657 isp->has_context = 1;
1658 }
1567bb7d
LP		 1659 /* Reset the ISP if an entity has failed to stop. This is the
1660 * only way to recover from such conditions.
1661 */
17d3d405
SA		 1662 if (!media_entity_enum_empty(&isp->crashed) ||
1663 isp->stop_failure)
994d5375 1664 isp_reset(isp);
448de7e7
SA		 1665 isp_disable_clocks(isp);
1666 }
1667 mutex_unlock(&isp->isp_mutex);
1668}
1669
2a0a5472
LP		 1670void omap3isp_put(struct isp_device *isp)
1671{
1672 __omap3isp_put(isp, true);
1673}
1674
448de7e7
SA		 1675/* --------------------------------------------------------------------------
1676 * Platform device driver
1677 */
1678
1679/*
1680 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1681 * @isp: OMAP3 ISP device
1682 */
1683#define ISP_PRINT_REGISTER(isp, name)\
1684 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1685 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1686#define SBL_PRINT_REGISTER(isp, name)\
1687 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1688 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1689
1690void omap3isp_print_status(struct isp_device *isp)
1691{
1692 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1693
1694 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1695 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1696 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1697 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1698 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1699 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1700 ISP_PRINT_REGISTER(isp, CTRL);
1701 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1702 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1703 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1704 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1705 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1706 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1707 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1708 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1709
1710 SBL_PRINT_REGISTER(isp, PCR);
1711 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1712
1713 dev_dbg(isp->dev, "--------------------------------------------\n");
1714}
1715
1716#ifdef CONFIG_PM
1717
1718/*
1719 * Power management support.
1720 *
1721 * As the ISP can't properly handle an input video stream interruption on a non
1722 * frame boundary, the ISP pipelines need to be stopped before sensors get
1723 * suspended. However, as suspending the sensors can require a running clock,
1724 * which can be provided by the ISP, the ISP can't be completely suspended
1725 * before the sensor.
1726 *
1727 * To solve this problem power management support is split into prepare/complete
1728 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1729 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1730 * resume(), and the the pipelines are restarted in complete().
1731 *
39c1cb2b 1732 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
448de7e7
SA		 1733 * yet.
1734 */
1735static int isp_pm_prepare(struct device *dev)
1736{
1737 struct isp_device *isp = dev_get_drvdata(dev);
1738 int reset;
1739
1740 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1741
1742 if (isp->ref_count == 0)
1743 return 0;
1744
1745 reset = isp_suspend_modules(isp);
1746 isp_disable_interrupts(isp);
1747 isp_save_ctx(isp);
1748 if (reset)
1749 isp_reset(isp);
1750
1751 return 0;
1752}
1753
1754static int isp_pm_suspend(struct device *dev)
1755{
1756 struct isp_device *isp = dev_get_drvdata(dev);
1757
1758 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1759
1760 if (isp->ref_count)
1761 isp_disable_clocks(isp);
1762
1763 return 0;
1764}
1765
1766static int isp_pm_resume(struct device *dev)
1767{
1768 struct isp_device *isp = dev_get_drvdata(dev);
1769
1770 if (isp->ref_count == 0)
1771 return 0;
1772
1773 return isp_enable_clocks(isp);
1774}
1775
1776static void isp_pm_complete(struct device *dev)
1777{
1778 struct isp_device *isp = dev_get_drvdata(dev);
1779
1780 if (isp->ref_count == 0)
1781 return;
1782
1783 isp_restore_ctx(isp);
1784 isp_enable_interrupts(isp);
1785 isp_resume_modules(isp);
1786}
1787
1788#else
1789
1790#define isp_pm_prepare NULL
1791#define isp_pm_suspend NULL
1792#define isp_pm_resume NULL
1793#define isp_pm_complete NULL
1794
1795#endif /* CONFIG_PM */
1796
1797static void isp_unregister_entities(struct isp_device *isp)
1798{
1799 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1800 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1801 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1802 omap3isp_preview_unregister_entities(&isp->isp_prev);
1803 omap3isp_resizer_unregister_entities(&isp->isp_res);
1804 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1805 omap3isp_stat_unregister_entities(&isp->isp_af);
1806 omap3isp_stat_unregister_entities(&isp->isp_hist);
1807
1808 v4l2_device_unregister(&isp->v4l2_dev);
1809 media_device_unregister(&isp->media_dev);
9832e155 1810 media_device_cleanup(&isp->media_dev);
448de7e7
SA		 1811}
1812
703e6f62
SA		 1813static int isp_link_entity(
1814 struct isp_device *isp, struct media_entity *entity,
1815 enum isp_interface_type interface)
1816{
1817 struct media_entity *input;
1818 unsigned int flags;
1819 unsigned int pad;
1820 unsigned int i;
1821
1822 /* Connect the sensor to the correct interface module.
1823 * Parallel sensors are connected directly to the CCDC, while
1824 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1825 * receiver through CSIPHY1 or CSIPHY2.
1826 */
1827 switch (interface) {
1828 case ISP_INTERFACE_PARALLEL:
1829 input = &isp->isp_ccdc.subdev.entity;
1830 pad = CCDC_PAD_SINK;
1831 flags = 0;
1832 break;
1833
1834 case ISP_INTERFACE_CSI2A_PHY2:
1835 input = &isp->isp_csi2a.subdev.entity;
1836 pad = CSI2_PAD_SINK;
1837 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1838 break;
1839
1840 case ISP_INTERFACE_CCP2B_PHY1:
1841 case ISP_INTERFACE_CCP2B_PHY2:
1842 input = &isp->isp_ccp2.subdev.entity;
1843 pad = CCP2_PAD_SINK;
1844 flags = 0;
1845 break;
1846
1847 case ISP_INTERFACE_CSI2C_PHY1:
1848 input = &isp->isp_csi2c.subdev.entity;
1849 pad = CSI2_PAD_SINK;
1850 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1851 break;
1852
1853 default:
1854 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1855 interface);
1856 return -EINVAL;
1857 }
1858
1859 /*
1860 * Not all interfaces are available on all revisions of the
1861 * ISP. The sub-devices of those interfaces aren't initialised
1862 * in such a case. Check this by ensuring the num_pads is
1863 * non-zero.
1864 */
1865 if (!input->num_pads) {
1866 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1867 interface);
1868 return -EINVAL;
1869 }
1870
1871 for (i = 0; i < entity->num_pads; i++) {
1872 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1873 break;
1874 }
1875 if (i == entity->num_pads) {
1876 dev_err(isp->dev, "%s: no source pad in external entity\n",
1877 __func__);
1878 return -EINVAL;
1879 }
1880
8df00a15 1881 return media_create_pad_link(entity, i, input, pad, flags);
703e6f62
SA		 1882}
1883
448de7e7
SA		 1884static int isp_register_entities(struct isp_device *isp)
1885{
448de7e7
SA		 1886 int ret;
1887
1888 isp->media_dev.dev = isp->dev;
1889 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1890 sizeof(isp->media_dev.model));
083eb078 1891 isp->media_dev.hw_revision = isp->revision;
448de7e7 1892 isp->media_dev.link_notify = isp_pipeline_link_notify;
9832e155 1893 media_device_init(&isp->media_dev);
448de7e7
SA		 1894
1895 isp->v4l2_dev.mdev = &isp->media_dev;
1896 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1897 if (ret < 0) {
4feca39b 1898 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
448de7e7
SA		 1899 __func__, ret);
1900 goto done;
1901 }
1902
1903 /* Register internal entities */
1904 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1905 if (ret < 0)
1906 goto done;
1907
1908 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1909 if (ret < 0)
1910 goto done;
1911
1912 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1913 if (ret < 0)
1914 goto done;
1915
1916 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1917 &isp->v4l2_dev);
1918 if (ret < 0)
1919 goto done;
1920
1921 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1922 if (ret < 0)
1923 goto done;
1924
1925 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1926 if (ret < 0)
1927 goto done;
1928
1929 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1930 if (ret < 0)
1931 goto done;
1932
1933 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1934 if (ret < 0)
1935 goto done;
1936
448de7e7 1937done:
5d479386 1938 if (ret < 0)
448de7e7
SA		 1939 isp_unregister_entities(isp);
1940
1941 return ret;
1942}
1943
f2f6da0d 1944/*
b285d5af 1945 * isp_create_links() - Create links for internal and external ISP entities
f2f6da0d 1946 * @isp : Pointer to ISP device
b285d5af
JMC		 1947 *
1948 * This function creates all links between ISP internal and external entities.
1949 *
1950 * Return: A negative error code on failure or zero on success. Possible error
1951 * codes are those returned by media_create_pad_link().
f2f6da0d 1952 */
b285d5af 1953static int isp_create_links(struct isp_device *isp)
f2f6da0d
JMC		 1954{
1955 int ret;
1956
b5f6df06
JMC		 1957 /* Create links between entities and video nodes. */
1958 ret = media_create_pad_link(
1959 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1960 &isp->isp_csi2a.video_out.video.entity, 0, 0);
1961 if (ret < 0)
f2f6da0d 1962 return ret;
f2f6da0d 1963
b5f6df06
JMC		 1964 ret = media_create_pad_link(
1965 &isp->isp_ccp2.video_in.video.entity, 0,
1966 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SINK, 0);
1967 if (ret < 0)
f2f6da0d 1968 return ret;
f2f6da0d 1969
b5f6df06
JMC		 1970 ret = media_create_pad_link(
1971 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1972 &isp->isp_ccdc.video_out.video.entity, 0, 0);
1973 if (ret < 0)
f2f6da0d 1974 return ret;
f2f6da0d 1975
b5f6df06
JMC		 1976 ret = media_create_pad_link(
1977 &isp->isp_prev.video_in.video.entity, 0,
1978 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1979 if (ret < 0)
f2f6da0d 1980 return ret;
f2f6da0d 1981
b5f6df06
JMC		 1982 ret = media_create_pad_link(
1983 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1984 &isp->isp_prev.video_out.video.entity, 0, 0);
1985 if (ret < 0)
1986 return ret;
1987
1988 ret = media_create_pad_link(
1989 &isp->isp_res.video_in.video.entity, 0,
1990 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1991 if (ret < 0)
1992 return ret;
1993
1994 ret = media_create_pad_link(
1995 &isp->isp_res.subdev.entity, RESZ_PAD_SOURCE,
1996 &isp->isp_res.video_out.video.entity, 0, 0);
1997
1998 if (ret < 0)
f2f6da0d 1999 return ret;
f2f6da0d 2000
b5f6df06 2001 /* Create links between entities. */
f2f6da0d
JMC		 2002 ret = media_create_pad_link(
2003 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2004 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2005 if (ret < 0)
2006 return ret;
2007
2008 ret = media_create_pad_link(
2009 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2010 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2011 if (ret < 0)
2012 return ret;
2013
2014 ret = media_create_pad_link(
2015 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2016 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2017 if (ret < 0)
2018 return ret;
2019
2020 ret = media_create_pad_link(
2021 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2022 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2023 if (ret < 0)
2024 return ret;
2025
2026 ret = media_create_pad_link(
2027 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2028 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2029 if (ret < 0)
2030 return ret;
2031
2032 ret = media_create_pad_link(
2033 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2034 &isp->isp_aewb.subdev.entity, 0,
2035 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2036 if (ret < 0)
2037 return ret;
2038
2039 ret = media_create_pad_link(
2040 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2041 &isp->isp_af.subdev.entity, 0,
2042 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2043 if (ret < 0)
2044 return ret;
2045
2046 ret = media_create_pad_link(
2047 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2048 &isp->isp_hist.subdev.entity, 0,
2049 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2050 if (ret < 0)
2051 return ret;
2052
2053 return 0;
2054}
2055
448de7e7
SA		 2056static void isp_cleanup_modules(struct isp_device *isp)
2057{
2058 omap3isp_h3a_aewb_cleanup(isp);
2059 omap3isp_h3a_af_cleanup(isp);
2060 omap3isp_hist_cleanup(isp);
2061 omap3isp_resizer_cleanup(isp);
2062 omap3isp_preview_cleanup(isp);
2063 omap3isp_ccdc_cleanup(isp);
2064 omap3isp_ccp2_cleanup(isp);
2065 omap3isp_csi2_cleanup(isp);
2066}
2067
2068static int isp_initialize_modules(struct isp_device *isp)
2069{
2070 int ret;
2071
2072 ret = omap3isp_csiphy_init(isp);
2073 if (ret < 0) {
2074 dev_err(isp->dev, "CSI PHY initialization failed\n");
2075 goto error_csiphy;
2076 }
2077
2078 ret = omap3isp_csi2_init(isp);
2079 if (ret < 0) {
2080 dev_err(isp->dev, "CSI2 initialization failed\n");
2081 goto error_csi2;
2082 }
2083
2084 ret = omap3isp_ccp2_init(isp);
2085 if (ret < 0) {
2086 dev_err(isp->dev, "CCP2 initialization failed\n");
2087 goto error_ccp2;
2088 }
2089
2090 ret = omap3isp_ccdc_init(isp);
2091 if (ret < 0) {
2092 dev_err(isp->dev, "CCDC initialization failed\n");
2093 goto error_ccdc;
2094 }
2095
2096 ret = omap3isp_preview_init(isp);
2097 if (ret < 0) {
2098 dev_err(isp->dev, "Preview initialization failed\n");
2099 goto error_preview;
2100 }
2101
2102 ret = omap3isp_resizer_init(isp);
2103 if (ret < 0) {
2104 dev_err(isp->dev, "Resizer initialization failed\n");
2105 goto error_resizer;
2106 }
2107
2108 ret = omap3isp_hist_init(isp);
2109 if (ret < 0) {
2110 dev_err(isp->dev, "Histogram initialization failed\n");
2111 goto error_hist;
2112 }
2113
2114 ret = omap3isp_h3a_aewb_init(isp);
2115 if (ret < 0) {
2116 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2117 goto error_h3a_aewb;
2118 }
2119
2120 ret = omap3isp_h3a_af_init(isp);
2121 if (ret < 0) {
2122 dev_err(isp->dev, "H3A AF initialization failed\n");
2123 goto error_h3a_af;
2124 }
2125
448de7e7
SA		 2126 return 0;
2127
448de7e7
SA		 2128error_h3a_af:
2129 omap3isp_h3a_aewb_cleanup(isp);
2130error_h3a_aewb:
2131 omap3isp_hist_cleanup(isp);
2132error_hist:
2133 omap3isp_resizer_cleanup(isp);
2134error_resizer:
2135 omap3isp_preview_cleanup(isp);
2136error_preview:
2137 omap3isp_ccdc_cleanup(isp);
2138error_ccdc:
2139 omap3isp_ccp2_cleanup(isp);
2140error_ccp2:
2141 omap3isp_csi2_cleanup(isp);
2142error_csi2:
2143error_csiphy:
2144 return ret;
2145}
2146
2a0a5472
LP		 2147static void isp_detach_iommu(struct isp_device *isp)
2148{
2149 arm_iommu_release_mapping(isp->mapping);
2150 isp->mapping = NULL;
2151 iommu_group_remove_device(isp->dev);
2152}
2153
2154static int isp_attach_iommu(struct isp_device *isp)
2155{
2156 struct dma_iommu_mapping *mapping;
2157 struct iommu_group *group;
2158 int ret;
2159
2160 /* Create a device group and add the device to it. */
2161 group = iommu_group_alloc();
2162 if (IS_ERR(group)) {
2163 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2164 return PTR_ERR(group);
2165 }
2166
2167 ret = iommu_group_add_device(group, isp->dev);
2168 iommu_group_put(group);
2169
2170 if (ret < 0) {
2171 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2172 return ret;
2173 }
2174
2175 /*
2176 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2177 * VAs. This will allocate a corresponding IOMMU domain.
2178 */
2179 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2180 if (IS_ERR(mapping)) {
2181 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2182 ret = PTR_ERR(mapping);
2183 goto error;
2184 }
2185
2186 isp->mapping = mapping;
2187
2188 /* Attach the ARM VA mapping to the device. */
2189 ret = arm_iommu_attach_device(isp->dev, mapping);
2190 if (ret < 0) {
2191 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2192 goto error;
2193 }
2194
2195 return 0;
2196
2197error:
2198 isp_detach_iommu(isp);
2199 return ret;
2200}
2201
448de7e7
SA		 2202/*
2203 * isp_remove - Remove ISP platform device
2204 * @pdev: Pointer to ISP platform device
2205 *
2206 * Always returns 0.
2207 */
4c62e976 2208static int isp_remove(struct platform_device *pdev)
448de7e7
SA		 2209{
2210 struct isp_device *isp = platform_get_drvdata(pdev);
448de7e7 2211
da7f3843 2212 v4l2_async_notifier_unregister(&isp->notifier);
448de7e7
SA		 2213 isp_unregister_entities(isp);
2214 isp_cleanup_modules(isp);
9b28ee3c 2215 isp_xclk_cleanup(isp);
448de7e7 2216
96d62ae2 2217 __omap3isp_get(isp, false);
2a0a5472
LP		 2218 isp_detach_iommu(isp);
2219 __omap3isp_put(isp, false);
448de7e7 2220
17d3d405
SA		 2221 media_entity_enum_cleanup(&isp->crashed);
2222
448de7e7
SA		 2223 return 0;
2224}
2225
da7f3843
SA		 2226enum isp_of_phy {
2227 ISP_OF_PHY_PARALLEL = 0,
2228 ISP_OF_PHY_CSIPHY1,
2229 ISP_OF_PHY_CSIPHY2,
2230};
2231
2232static int isp_of_parse_node(struct device *dev, struct device_node *node,
2233 struct isp_async_subdev *isd)
2234{
2235 struct isp_bus_cfg *buscfg = &isd->bus;
2236 struct v4l2_of_endpoint vep;
2237 unsigned int i;
c517b352 2238 int ret;
da7f3843 2239
c517b352
JMC		 2240 ret = v4l2_of_parse_endpoint(node, &vep);
2241 if (ret)
2242 return ret;
da7f3843
SA		 2243
2244 dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
2245 vep.base.port);
2246
2247 switch (vep.base.port) {
2248 case ISP_OF_PHY_PARALLEL:
2249 buscfg->interface = ISP_INTERFACE_PARALLEL;
2250 buscfg->bus.parallel.data_lane_shift =
2251 vep.bus.parallel.data_shift;
2252 buscfg->bus.parallel.clk_pol =
2253 !!(vep.bus.parallel.flags
2254 & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2255 buscfg->bus.parallel.hs_pol =
2256 !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2257 buscfg->bus.parallel.vs_pol =
2258 !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2259 buscfg->bus.parallel.fld_pol =
2260 !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2261 buscfg->bus.parallel.data_pol =
2262 !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2263 break;
2264
2265 case ISP_OF_PHY_CSIPHY1:
2266 case ISP_OF_PHY_CSIPHY2:
2267 /* FIXME: always assume CSI-2 for now. */
2268 switch (vep.base.port) {
2269 case ISP_OF_PHY_CSIPHY1:
2270 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2271 break;
2272 case ISP_OF_PHY_CSIPHY2:
2273 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2274 break;
2275 }
2276 buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
2277 buscfg->bus.csi2.lanecfg.clk.pol =
2278 vep.bus.mipi_csi2.lane_polarities[0];
2279 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2280 buscfg->bus.csi2.lanecfg.clk.pol,
2281 buscfg->bus.csi2.lanecfg.clk.pos);
2282
2283 for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
2284 buscfg->bus.csi2.lanecfg.data[i].pos =
2285 vep.bus.mipi_csi2.data_lanes[i];
2286 buscfg->bus.csi2.lanecfg.data[i].pol =
2287 vep.bus.mipi_csi2.lane_polarities[i + 1];
2288 dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
2289 buscfg->bus.csi2.lanecfg.data[i].pol,
2290 buscfg->bus.csi2.lanecfg.data[i].pos);
2291 }
2292
2293 /*
2294 * FIXME: now we assume the CRC is always there.
2295 * Implement a way to obtain this information from the
2296 * sensor. Frame descriptors, perhaps?
2297 */
2298 buscfg->bus.csi2.crc = 1;
2299 break;
2300
2301 default:
2302 dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
2303 vep.base.port);
2304 break;
2305 }
2306
2307 return 0;
2308}
2309
2310static int isp_of_parse_nodes(struct device *dev,
2311 struct v4l2_async_notifier *notifier)
2312{
2313 struct device_node *node = NULL;
2314
2315 notifier->subdevs = devm_kcalloc(
2316 dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
2317 if (!notifier->subdevs)
2318 return -ENOMEM;
2319
2320 while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
2321 (node = of_graph_get_next_endpoint(dev->of_node, node))) {
2322 struct isp_async_subdev *isd;
2323
2324 isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
2325 if (!isd) {
2326 of_node_put(node);
2327 return -ENOMEM;
2328 }
2329
2330 notifier->subdevs[notifier->num_subdevs] = &isd->asd;
2331
2332 if (isp_of_parse_node(dev, node, isd)) {
2333 of_node_put(node);
2334 return -EINVAL;
2335 }
2336
2337 isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
2338 of_node_put(node);
2339 if (!isd->asd.match.of.node) {
2340 dev_warn(dev, "bad remote port parent\n");
2341 return -EINVAL;
2342 }
2343
2344 isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
2345 notifier->num_subdevs++;
2346 }
2347
2348 return notifier->num_subdevs;
2349}
2350
2351static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
2352 struct v4l2_subdev *subdev,
2353 struct v4l2_async_subdev *asd)
2354{
da7f3843
SA		 2355 struct isp_async_subdev *isd =
2356 container_of(asd, struct isp_async_subdev, asd);
da7f3843
SA		 2357
2358 isd->sd = subdev;
2359 isd->sd->host_priv = &isd->bus;
2360
68a57fa9 2361 return 0;
da7f3843
SA		 2362}
2363
2364static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2365{
2366 struct isp_device *isp = container_of(async, struct isp_device,
2367 notifier);
68a57fa9
JMC		 2368 struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
2369 struct v4l2_subdev *sd;
2370 struct isp_bus_cfg *bus;
2371 int ret;
2372
17d3d405
SA		 2373 ret = media_entity_enum_init(&isp->crashed, &isp->media_dev);
2374 if (ret)
2375 return ret;
2376
68a57fa9
JMC		 2377 list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
2378 /* Only try to link entities whose interface was set on bound */
2379 if (sd->host_priv) {
2380 bus = (struct isp_bus_cfg *)sd->host_priv;
2381 ret = isp_link_entity(isp, &sd->entity, bus->interface);
2382 if (ret < 0)
2383 return ret;
2384 }
2385 }
da7f3843 2386
9832e155
JMC		 2387 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2388 if (ret < 0)
2389 return ret;
2390
2391 return media_device_register(&isp->media_dev);
da7f3843
SA		 2392}
2393
448de7e7
SA		 2394/*
2395 * isp_probe - Probe ISP platform device
2396 * @pdev: Pointer to ISP platform device
2397 *
2398 * Returns 0 if successful,
2399 * -ENOMEM if no memory available,
2400 * -ENODEV if no platform device resources found
2401 * or no space for remapping registers,
2402 * -EINVAL if couldn't install ISR,
2403 * or clk_get return error value.
2404 */
4c62e976 2405static int isp_probe(struct platform_device *pdev)
448de7e7 2406{
448de7e7 2407 struct isp_device *isp;
8644cdf9 2408 struct resource *mem;
448de7e7
SA		 2409 int ret;
2410 int i, m;
2411
cf2b4cf6 2412 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
448de7e7
SA		 2413 if (!isp) {
2414 dev_err(&pdev->dev, "could not allocate memory\n");
2415 return -ENOMEM;
2416 }
2417
78c66fbc
LP		 2418 ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
2419 &isp->phy_type);
2420 if (ret)
2421 return ret;
da7f3843 2422
78c66fbc
LP		 2423 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2424 "syscon");
2425 if (IS_ERR(isp->syscon))
2426 return PTR_ERR(isp->syscon);
da7f3843 2427
78c66fbc
LP		 2428 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
2429 &isp->syscon_offset);
2430 if (ret)
2431 return ret;
da7f3843 2432
78c66fbc
LP		 2433 ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
2434 if (ret < 0)
2435 return ret;
da7f3843 2436
448de7e7 2437 isp->autoidle = autoidle;
448de7e7
SA		 2438
2439 mutex_init(&isp->isp_mutex);
2440 spin_lock_init(&isp->stat_lock);
2441
2442 isp->dev = &pdev->dev;
448de7e7
SA		 2443 isp->ref_count = 0;
2444
224ddca0
RK		 2445 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2446 if (ret)
697cca21 2447 goto error;
448de7e7
SA		 2448
2449 platform_set_drvdata(pdev, isp);
2450
2451 /* Regulators */
3494bb05
SA		 2452 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2453 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
448de7e7 2454
d8658bca
LP		 2455 /* Clocks
2456 *
2457 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2458 * manually to read the revision before calling __omap3isp_get().
8644cdf9
SA		 2459 *
2460 * Start by mapping the ISP MMIO area, which is in two pieces.
2461 * The ISP IOMMU is in between. Map both now, and fill in the
2462 * ISP revision specific portions a little later in the
2463 * function.
d8658bca 2464 */
8644cdf9
SA		 2465 for (i = 0; i < 2; i++) {
2466 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2467
2468 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2469 isp->mmio_base[map_idx] =
2470 devm_ioremap_resource(isp->dev, mem);
2471 if (IS_ERR(isp->mmio_base[map_idx]))
2472 return PTR_ERR(isp->mmio_base[map_idx]);
2473 }
448de7e7
SA		 2474
2475 ret = isp_get_clocks(isp);
2476 if (ret < 0)
2477 goto error;
2478
d8658bca
LP		 2479 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2480 if (ret < 0)
2481 goto error;
2482
2483 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2484 dev_info(isp->dev, "Revision %d.%d found\n",
2485 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2486
2487 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2488
0bd0dbee
PST		 2489 if (__omap3isp_get(isp, false) == NULL) {
2490 ret = -ENODEV;
448de7e7 2491 goto error;
0bd0dbee 2492 }
448de7e7
SA		 2493
2494 ret = isp_reset(isp);
2495 if (ret < 0)
2496 goto error_isp;
2497
9b28ee3c
LP		 2498 ret = isp_xclk_init(isp);
2499 if (ret < 0)
2500 goto error_isp;
2501
448de7e7 2502 /* Memory resources */
448de7e7
SA		 2503 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2504 if (isp->revision == isp_res_maps[m].isp_rev)
2505 break;
2506
2507 if (m == ARRAY_SIZE(isp_res_maps)) {
2508 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2509 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2510 ret = -ENODEV;
2511 goto error_isp;
2512 }
2513
8644cdf9
SA		 2514 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2515 isp->mmio_base[i] =
2516 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2517
2518 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2519 isp->mmio_base[i] =
2520 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2521 + isp_res_maps[m].offset[i];
2522
2523 isp->mmio_hist_base_phys =
2524 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
448de7e7 2525
2a0a5472
LP		 2526 /* IOMMU */
2527 ret = isp_attach_iommu(isp);
2528 if (ret < 0) {
2529 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
f626b52d
OBC		 2530 goto error_isp;
2531 }
2532
448de7e7 2533 /* Interrupt */
514580f9
AH		 2534 ret = platform_get_irq(pdev, 0);
2535 if (ret <= 0) {
448de7e7
SA		 2536 dev_err(isp->dev, "No IRQ resource\n");
2537 ret = -ENODEV;
2a0a5472 2538 goto error_iommu;
448de7e7 2539 }
514580f9 2540 isp->irq_num = ret;
448de7e7 2541
cf2b4cf6
LP		 2542 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2543 "OMAP3 ISP", isp)) {
448de7e7
SA		 2544 dev_err(isp->dev, "Unable to request IRQ\n");
2545 ret = -EINVAL;
2a0a5472 2546 goto error_iommu;
448de7e7
SA		 2547 }
2548
2549 /* Entities */
2550 ret = isp_initialize_modules(isp);
2551 if (ret < 0)
2a0a5472 2552 goto error_iommu;
448de7e7
SA		 2553
2554 ret = isp_register_entities(isp);
2555 if (ret < 0)
2556 goto error_modules;
2557
b285d5af 2558 ret = isp_create_links(isp);
f2f6da0d
JMC		 2559 if (ret < 0)
2560 goto error_register_entities;
2561
78c66fbc
LP		 2562 isp->notifier.bound = isp_subdev_notifier_bound;
2563 isp->notifier.complete = isp_subdev_notifier_complete;
5d479386 2564
78c66fbc
LP		 2565 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2566 if (ret)
2567 goto error_register_entities;
5d479386 2568
96d62ae2 2569 isp_core_init(isp, 1);
448de7e7
SA		 2570 omap3isp_put(isp);
2571
2572 return 0;
2573
5d479386
SA		 2574error_register_entities:
2575 isp_unregister_entities(isp);
448de7e7
SA		 2576error_modules:
2577 isp_cleanup_modules(isp);
2a0a5472
LP		 2578error_iommu:
2579 isp_detach_iommu(isp);
448de7e7 2580error_isp:
9b28ee3c 2581 isp_xclk_cleanup(isp);
2a0a5472 2582 __omap3isp_put(isp, false);
448de7e7 2583error:
ed33ac8e 2584 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2585
2586 return ret;
2587}
2588
2589static const struct dev_pm_ops omap3isp_pm_ops = {
2590 .prepare = isp_pm_prepare,
2591 .suspend = isp_pm_suspend,
2592 .resume = isp_pm_resume,
2593 .complete = isp_pm_complete,
2594};
2595
2596static struct platform_device_id omap3isp_id_table[] = {
2597 { "omap3isp", 0 },
2598 { },
2599};
2600MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2601
da7f3843
SA		 2602static const struct of_device_id omap3isp_of_table[] = {
2603 { .compatible = "ti,omap3-isp" },
2604 { },
2605};
8163ec29 2606MODULE_DEVICE_TABLE(of, omap3isp_of_table);
da7f3843 2607
448de7e7
SA		 2608static struct platform_driver omap3isp_driver = {
2609 .probe = isp_probe,
4c62e976 2610 .remove = isp_remove,
448de7e7
SA		 2611 .id_table = omap3isp_id_table,
2612 .driver = {
448de7e7
SA		 2613 .name = "omap3isp",
2614 .pm = &omap3isp_pm_ops,
da7f3843 2615 .of_match_table = omap3isp_of_table,
448de7e7
SA		 2616 },
2617};
2618
1d6629b1 2619module_platform_driver(omap3isp_driver);
448de7e7
SA		 2620
2621MODULE_AUTHOR("Nokia Corporation");
2622MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2623MODULE_LICENSE("GPL");
64dc3c1a 2624MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux kernel - Deliverables
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