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[media] media:gspca:dtcs033 Clean sparse check warnings on endianess
[deliverable/linux.git] / drivers / media / platform / s5p-mfc / s5p_mfc_enc.c
CommitLineData
af935746 1/*
2c3fb08b 2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
af935746
KD		 3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
6 *
7 * Jeongtae Park <jtp.park@samsung.com>
8 * Kamil Debski <k.debski@samsung.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#include <linux/clk.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/sched.h>
22#include <linux/version.h>
23#include <linux/videodev2.h>
f9f715a9 24#include <media/v4l2-event.h>
af935746
KD		 25#include <linux/workqueue.h>
26#include <media/v4l2-ctrls.h>
27#include <media/videobuf2-core.h>
af935746
KD		 28#include "s5p_mfc_common.h"
29#include "s5p_mfc_debug.h"
30#include "s5p_mfc_enc.h"
31#include "s5p_mfc_intr.h"
43a1ea1f
AK		 32#include "s5p_mfc_opr.h"
33
34#define DEF_SRC_FMT_ENC V4L2_PIX_FMT_NV12MT
35#define DEF_DST_FMT_ENC V4L2_PIX_FMT_H264
af935746
KD		 36
37static struct s5p_mfc_fmt formats[] = {
38 {
f96f3cfa
JP		 39 .name = "4:2:0 2 Planes 16x16 Tiles",
40 .fourcc = V4L2_PIX_FMT_NV12MT_16X16,
41 .codec_mode = S5P_MFC_CODEC_NONE,
42 .type = MFC_FMT_RAW,
43 .num_planes = 2,
af935746
KD		 44 },
45 {
f96f3cfa
JP		 46 .name = "4:2:0 2 Planes 64x32 Tiles",
47 .fourcc = V4L2_PIX_FMT_NV12MT,
48 .codec_mode = S5P_MFC_CODEC_NONE,
49 .type = MFC_FMT_RAW,
50 .num_planes = 2,
af935746
KD		 51 },
52 {
f96f3cfa
JP		 53 .name = "4:2:0 2 Planes Y/CbCr",
54 .fourcc = V4L2_PIX_FMT_NV12M,
55 .codec_mode = S5P_MFC_CODEC_NONE,
56 .type = MFC_FMT_RAW,
57 .num_planes = 2,
af935746
KD		 58 },
59 {
f96f3cfa
JP		 60 .name = "4:2:0 2 Planes Y/CrCb",
61 .fourcc = V4L2_PIX_FMT_NV21M,
62 .codec_mode = S5P_MFC_CODEC_NONE,
63 .type = MFC_FMT_RAW,
64 .num_planes = 2,
af935746
KD		 65 },
66 {
f96f3cfa
JP		 67 .name = "H264 Encoded Stream",
68 .fourcc = V4L2_PIX_FMT_H264,
69 .codec_mode = S5P_MFC_CODEC_H264_ENC,
70 .type = MFC_FMT_ENC,
71 .num_planes = 1,
72 },
73 {
74 .name = "MPEG4 Encoded Stream",
75 .fourcc = V4L2_PIX_FMT_MPEG4,
76 .codec_mode = S5P_MFC_CODEC_MPEG4_ENC,
77 .type = MFC_FMT_ENC,
78 .num_planes = 1,
79 },
80 {
81 .name = "H263 Encoded Stream",
82 .fourcc = V4L2_PIX_FMT_H263,
83 .codec_mode = S5P_MFC_CODEC_H263_ENC,
84 .type = MFC_FMT_ENC,
85 .num_planes = 1,
af935746 86 },
3a967706
AK		 87 {
88 .name = "VP8 Encoded Stream",
89 .fourcc = V4L2_PIX_FMT_VP8,
90 .codec_mode = S5P_MFC_CODEC_VP8_ENC,
91 .type = MFC_FMT_ENC,
92 .num_planes = 1,
93 },
af935746
KD		 94};
95
96#define NUM_FORMATS ARRAY_SIZE(formats)
97static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
98{
99 unsigned int i;
100
101 for (i = 0; i < NUM_FORMATS; i++) {
102 if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
103 formats[i].type == t)
104 return &formats[i];
105 }
106 return NULL;
107}
108
109static struct mfc_control controls[] = {
110 {
111 .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE,
112 .type = V4L2_CTRL_TYPE_INTEGER,
113 .minimum = 0,
114 .maximum = (1 << 16) - 1,
115 .step = 1,
d6950c47 116 .default_value = 12,
af935746
KD		 117 },
118 {
119 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
120 .type = V4L2_CTRL_TYPE_MENU,
121 .minimum = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
122 .maximum = V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES,
123 .default_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
124 .menu_skip_mask = 0,
125 },
126 {
127 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB,
128 .type = V4L2_CTRL_TYPE_INTEGER,
129 .minimum = 1,
130 .maximum = (1 << 16) - 1,
131 .step = 1,
132 .default_value = 1,
133 },
134 {
135 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES,
136 .type = V4L2_CTRL_TYPE_INTEGER,
137 .minimum = 1900,
138 .maximum = (1 << 30) - 1,
139 .step = 1,
140 .default_value = 1900,
141 },
142 {
143 .id = V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB,
144 .type = V4L2_CTRL_TYPE_INTEGER,
145 .minimum = 0,
146 .maximum = (1 << 16) - 1,
147 .step = 1,
148 .default_value = 0,
149 },
150 {
151 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING,
152 .type = V4L2_CTRL_TYPE_BOOLEAN,
153 .name = "Padding Control Enable",
154 .minimum = 0,
155 .maximum = 1,
156 .step = 1,
157 .default_value = 0,
158 },
159 {
160 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV,
161 .type = V4L2_CTRL_TYPE_INTEGER,
162 .name = "Padding Color YUV Value",
163 .minimum = 0,
164 .maximum = (1 << 25) - 1,
165 .step = 1,
166 .default_value = 0,
167 },
168 {
169 .id = V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE,
170 .type = V4L2_CTRL_TYPE_BOOLEAN,
171 .minimum = 0,
172 .maximum = 1,
173 .step = 1,
174 .default_value = 0,
175 },
176 {
177 .id = V4L2_CID_MPEG_VIDEO_BITRATE,
178 .type = V4L2_CTRL_TYPE_INTEGER,
179 .minimum = 1,
180 .maximum = (1 << 30) - 1,
181 .step = 1,
182 .default_value = 1,
183 },
184 {
185 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF,
186 .type = V4L2_CTRL_TYPE_INTEGER,
187 .name = "Rate Control Reaction Coeff.",
188 .minimum = 1,
189 .maximum = (1 << 16) - 1,
190 .step = 1,
191 .default_value = 1,
192 },
193 {
194 .id = V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE,
195 .type = V4L2_CTRL_TYPE_MENU,
196 .name = "Force frame type",
197 .minimum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
198 .maximum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED,
199 .default_value = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
200 .menu_skip_mask = 0,
201 },
202 {
203 .id = V4L2_CID_MPEG_VIDEO_VBV_SIZE,
204 .type = V4L2_CTRL_TYPE_INTEGER,
205 .minimum = 0,
206 .maximum = (1 << 16) - 1,
207 .step = 1,
208 .default_value = 0,
209 },
a378a320
AG		 210 {
211 .id = V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE,
212 .type = V4L2_CTRL_TYPE_INTEGER,
213 .name = "Horizontal MV Search Range",
214 .minimum = 16,
215 .maximum = 128,
216 .step = 16,
217 .default_value = 32,
218 },
219 {
220 .id = V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE,
221 .type = V4L2_CTRL_TYPE_INTEGER,
222 .name = "Vertical MV Search Range",
223 .minimum = 16,
224 .maximum = 128,
225 .step = 16,
226 .default_value = 32,
227 },
af935746
KD		 228 {
229 .id = V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE,
230 .type = V4L2_CTRL_TYPE_INTEGER,
231 .minimum = 0,
232 .maximum = (1 << 16) - 1,
233 .step = 1,
234 .default_value = 0,
235 },
236 {
237 .id = V4L2_CID_MPEG_VIDEO_HEADER_MODE,
238 .type = V4L2_CTRL_TYPE_MENU,
239 .minimum = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
240 .maximum = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
241 .default_value = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
242 .menu_skip_mask = 0,
243 },
244 {
245 .id = V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE,
246 .type = V4L2_CTRL_TYPE_MENU,
247 .name = "Frame Skip Enable",
248 .minimum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
249 .maximum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
250 .menu_skip_mask = 0,
251 .default_value = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
252 },
253 {
254 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT,
255 .type = V4L2_CTRL_TYPE_BOOLEAN,
256 .name = "Fixed Target Bit Enable",
257 .minimum = 0,
258 .maximum = 1,
259 .default_value = 0,
053e09f3 260 .step = 1,
af935746
KD		 261 .menu_skip_mask = 0,
262 },
263 {
264 .id = V4L2_CID_MPEG_VIDEO_B_FRAMES,
265 .type = V4L2_CTRL_TYPE_INTEGER,
266 .minimum = 0,
267 .maximum = 2,
268 .step = 1,
269 .default_value = 0,
270 },
271 {
272 .id = V4L2_CID_MPEG_VIDEO_H264_PROFILE,
273 .type = V4L2_CTRL_TYPE_MENU,
274 .minimum = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
275 .maximum = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
276 .default_value = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
277 .menu_skip_mask = ~(
278 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
279 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
280 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)
281 ),
282 },
283 {
284 .id = V4L2_CID_MPEG_VIDEO_H264_LEVEL,
285 .type = V4L2_CTRL_TYPE_MENU,
286 .minimum = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
287 .maximum = V4L2_MPEG_VIDEO_H264_LEVEL_4_0,
288 .default_value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
af935746
KD		 289 },
290 {
291 .id = V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL,
292 .type = V4L2_CTRL_TYPE_MENU,
293 .minimum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
294 .maximum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_5,
295 .default_value = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
296 .menu_skip_mask = 0,
297 },
298 {
299 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
300 .type = V4L2_CTRL_TYPE_MENU,
301 .minimum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
302 .maximum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY,
303 .default_value = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
304 .menu_skip_mask = 0,
305 },
306 {
307 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA,
308 .type = V4L2_CTRL_TYPE_INTEGER,
309 .minimum = -6,
310 .maximum = 6,
311 .step = 1,
312 .default_value = 0,
313 },
314 {
315 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA,
316 .type = V4L2_CTRL_TYPE_INTEGER,
317 .minimum = -6,
318 .maximum = 6,
319 .step = 1,
320 .default_value = 0,
321 },
322 {
323 .id = V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE,
324 .type = V4L2_CTRL_TYPE_MENU,
325 .minimum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
326 .maximum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
327 .default_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
328 .menu_skip_mask = 0,
329 },
330 {
331 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P,
332 .type = V4L2_CTRL_TYPE_INTEGER,
333 .name = "The Number of Ref. Pic for P",
334 .minimum = 1,
335 .maximum = 2,
336 .step = 1,
337 .default_value = 1,
338 },
339 {
340 .id = V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM,
341 .type = V4L2_CTRL_TYPE_BOOLEAN,
342 .minimum = 0,
343 .maximum = 1,
344 .step = 1,
345 .default_value = 0,
346 },
347 {
348 .id = V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE,
349 .type = V4L2_CTRL_TYPE_BOOLEAN,
350 .minimum = 0,
351 .maximum = 1,
352 .step = 1,
353 .default_value = 0,
354 },
355 {
356 .id = V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP,
357 .type = V4L2_CTRL_TYPE_INTEGER,
358 .minimum = 0,
359 .maximum = 51,
360 .step = 1,
361 .default_value = 1,
362 },
363 {
364 .id = V4L2_CID_MPEG_VIDEO_H264_MIN_QP,
365 .type = V4L2_CTRL_TYPE_INTEGER,
366 .minimum = 0,
367 .maximum = 51,
368 .step = 1,
369 .default_value = 1,
370 },
371 {
372 .id = V4L2_CID_MPEG_VIDEO_H264_MAX_QP,
373 .type = V4L2_CTRL_TYPE_INTEGER,
374 .minimum = 0,
375 .maximum = 51,
376 .step = 1,
d6950c47 377 .default_value = 51,
af935746
KD		 378 },
379 {
380 .id = V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP,
381 .type = V4L2_CTRL_TYPE_INTEGER,
382 .minimum = 0,
383 .maximum = 51,
384 .step = 1,
385 .default_value = 1,
386 },
387 {
388 .id = V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP,
389 .type = V4L2_CTRL_TYPE_INTEGER,
390 .minimum = 0,
391 .maximum = 51,
392 .step = 1,
393 .default_value = 1,
394 },
395 {
396 .id = V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP,
397 .type = V4L2_CTRL_TYPE_INTEGER,
398 .name = "H263 I-Frame QP value",
399 .minimum = 1,
400 .maximum = 31,
401 .step = 1,
402 .default_value = 1,
403 },
404 {
405 .id = V4L2_CID_MPEG_VIDEO_H263_MIN_QP,
406 .type = V4L2_CTRL_TYPE_INTEGER,
407 .name = "H263 Minimum QP value",
408 .minimum = 1,
409 .maximum = 31,
410 .step = 1,
411 .default_value = 1,
412 },
413 {
414 .id = V4L2_CID_MPEG_VIDEO_H263_MAX_QP,
415 .type = V4L2_CTRL_TYPE_INTEGER,
416 .name = "H263 Maximum QP value",
417 .minimum = 1,
418 .maximum = 31,
419 .step = 1,
d6950c47 420 .default_value = 31,
af935746
KD		 421 },
422 {
423 .id = V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP,
424 .type = V4L2_CTRL_TYPE_INTEGER,
425 .name = "H263 P frame QP value",
426 .minimum = 1,
427 .maximum = 31,
428 .step = 1,
429 .default_value = 1,
430 },
431 {
432 .id = V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP,
433 .type = V4L2_CTRL_TYPE_INTEGER,
434 .name = "H263 B frame QP value",
435 .minimum = 1,
436 .maximum = 31,
437 .step = 1,
438 .default_value = 1,
439 },
440 {
441 .id = V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP,
442 .type = V4L2_CTRL_TYPE_INTEGER,
443 .name = "MPEG4 I-Frame QP value",
444 .minimum = 1,
445 .maximum = 31,
446 .step = 1,
447 .default_value = 1,
448 },
449 {
450 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP,
451 .type = V4L2_CTRL_TYPE_INTEGER,
452 .name = "MPEG4 Minimum QP value",
453 .minimum = 1,
454 .maximum = 31,
455 .step = 1,
456 .default_value = 1,
457 },
458 {
459 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP,
460 .type = V4L2_CTRL_TYPE_INTEGER,
461 .name = "MPEG4 Maximum QP value",
462 .minimum = 0,
463 .maximum = 51,
464 .step = 1,
d6950c47 465 .default_value = 51,
af935746
KD		 466 },
467 {
468 .id = V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP,
469 .type = V4L2_CTRL_TYPE_INTEGER,
470 .name = "MPEG4 P frame QP value",
471 .minimum = 1,
472 .maximum = 31,
473 .step = 1,
474 .default_value = 1,
475 },
476 {
477 .id = V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP,
478 .type = V4L2_CTRL_TYPE_INTEGER,
479 .name = "MPEG4 B frame QP value",
480 .minimum = 1,
481 .maximum = 31,
482 .step = 1,
483 .default_value = 1,
484 },
485 {
486 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK,
487 .type = V4L2_CTRL_TYPE_BOOLEAN,
488 .name = "H264 Dark Reg Adaptive RC",
489 .minimum = 0,
490 .maximum = 1,
491 .step = 1,
492 .default_value = 0,
493 },
494 {
495 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH,
496 .type = V4L2_CTRL_TYPE_BOOLEAN,
497 .name = "H264 Smooth Reg Adaptive RC",
498 .minimum = 0,
499 .maximum = 1,
500 .step = 1,
501 .default_value = 0,
502 },
503 {
504 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC,
505 .type = V4L2_CTRL_TYPE_BOOLEAN,
506 .name = "H264 Static Reg Adaptive RC",
507 .minimum = 0,
508 .maximum = 1,
509 .step = 1,
510 .default_value = 0,
511 },
512 {
513 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY,
514 .type = V4L2_CTRL_TYPE_BOOLEAN,
515 .name = "H264 Activity Reg Adaptive RC",
516 .minimum = 0,
517 .maximum = 1,
518 .step = 1,
519 .default_value = 0,
520 },
521 {
522 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE,
523 .type = V4L2_CTRL_TYPE_BOOLEAN,
524 .minimum = 0,
525 .maximum = 1,
526 .step = 1,
527 .default_value = 0,
528 },
529 {
530 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC,
531 .type = V4L2_CTRL_TYPE_MENU,
532 .minimum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
533 .maximum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED,
afd14f48 534 .default_value = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
af935746
KD		 535 .menu_skip_mask = 0,
536 },
537 {
538 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH,
539 .type = V4L2_CTRL_TYPE_INTEGER,
540 .minimum = 0,
541 .maximum = (1 << 16) - 1,
542 .step = 1,
543 .default_value = 0,
544 },
545 {
546 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT,
547 .type = V4L2_CTRL_TYPE_INTEGER,
548 .minimum = 0,
549 .maximum = (1 << 16) - 1,
550 .step = 1,
551 .default_value = 0,
552 },
553 {
554 .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
555 .type = V4L2_CTRL_TYPE_BOOLEAN,
556 .minimum = 0,
557 .maximum = 1,
558 .step = 1,
559 .default_value = 1,
560 },
561 {
562 .id = V4L2_CID_MPEG_VIDEO_H264_I_PERIOD,
563 .type = V4L2_CTRL_TYPE_INTEGER,
564 .minimum = 0,
565 .maximum = (1 << 16) - 1,
566 .step = 1,
567 .default_value = 0,
568 },
569 {
570 .id = V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE,
571 .type = V4L2_CTRL_TYPE_MENU,
572 .minimum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
573 .maximum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE,
afd14f48 574 .default_value = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
af935746
KD		 575 .menu_skip_mask = 0,
576 },
577 {
578 .id = V4L2_CID_MPEG_VIDEO_MPEG4_QPEL,
579 .type = V4L2_CTRL_TYPE_BOOLEAN,
580 .minimum = 0,
581 .maximum = 1,
582 .step = 1,
583 .default_value = 0,
584 },
3a967706
AK		 585 {
586 .id = V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS,
587 .type = V4L2_CTRL_TYPE_INTEGER_MENU,
588 .maximum = V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS,
589 .default_value = V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION,
590 .menu_skip_mask = 0,
591 },
592 {
593 .id = V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4,
594 .type = V4L2_CTRL_TYPE_BOOLEAN,
595 .minimum = 0,
596 .maximum = 1,
597 .step = 1,
598 .default_value = 0,
599 },
600 {
601 .id = V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES,
602 .type = V4L2_CTRL_TYPE_INTEGER_MENU,
603 .maximum = V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME,
604 .default_value = V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME,
605 .menu_skip_mask = 0,
606 },
607 {
608 .id = V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL,
609 .type = V4L2_CTRL_TYPE_INTEGER,
610 .minimum = 0,
611 .maximum = 63,
612 .step = 1,
613 .default_value = 0,
614 },
615 {
616 .id = V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS,
617 .type = V4L2_CTRL_TYPE_INTEGER,
618 .minimum = 0,
619 .maximum = 7,
620 .step = 1,
621 .default_value = 0,
622 },
623 {
624 .id = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD,
625 .type = V4L2_CTRL_TYPE_INTEGER,
626 .minimum = 0,
627 .maximum = (1 << 16) - 1,
628 .step = 1,
629 .default_value = 0,
630 },
631 {
632 .id = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL,
633 .type = V4L2_CTRL_TYPE_MENU,
634 .minimum = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV,
635 .maximum = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD,
636 .default_value = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV,
637 .menu_skip_mask = 0,
638 },
4773ab99
AK		 639 {
640 .id = V4L2_CID_MPEG_VIDEO_VPX_MAX_QP,
641 .type = V4L2_CTRL_TYPE_INTEGER,
642 .minimum = 0,
643 .maximum = 127,
644 .step = 1,
645 .default_value = 127,
646 },
647 {
648 .id = V4L2_CID_MPEG_VIDEO_VPX_MIN_QP,
649 .type = V4L2_CTRL_TYPE_INTEGER,
650 .minimum = 0,
651 .maximum = 11,
652 .step = 1,
653 .default_value = 0,
654 },
655 {
656 .id = V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP,
657 .type = V4L2_CTRL_TYPE_INTEGER,
658 .minimum = 0,
659 .maximum = 127,
660 .step = 1,
661 .default_value = 10,
662 },
663 {
664 .id = V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP,
665 .type = V4L2_CTRL_TYPE_INTEGER,
666 .minimum = 0,
667 .maximum = 127,
668 .step = 1,
669 .default_value = 10,
670 },
bbd8f3fe
KA		 671 {
672 .id = V4L2_CID_MPEG_VIDEO_VPX_PROFILE,
673 .type = V4L2_CTRL_TYPE_INTEGER,
674 .minimum = 0,
675 .maximum = 3,
676 .step = 1,
677 .default_value = 0,
678 },
af935746
KD		 679};
680
681#define NUM_CTRLS ARRAY_SIZE(controls)
682static const char * const *mfc51_get_menu(u32 id)
683{
684 static const char * const mfc51_video_frame_skip[] = {
685 "Disabled",
686 "Level Limit",
687 "VBV/CPB Limit",
688 NULL,
689 };
690 static const char * const mfc51_video_force_frame[] = {
691 "Disabled",
692 "I Frame",
693 "Not Coded",
694 NULL,
695 };
696 switch (id) {
697 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
698 return mfc51_video_frame_skip;
699 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
700 return mfc51_video_force_frame;
701 }
702 return NULL;
703}
704
705static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
706{
707 mfc_debug(2, "src=%d, dst=%d, state=%d\n",
708 ctx->src_queue_cnt, ctx->dst_queue_cnt, ctx->state);
709 /* context is ready to make header */
710 if (ctx->state == MFCINST_GOT_INST && ctx->dst_queue_cnt >= 1)
711 return 1;
712 /* context is ready to encode a frame */
f96f3cfa 713 if ((ctx->state == MFCINST_RUNNING ||
e9d98ddc 714 ctx->state == MFCINST_HEAD_PRODUCED) &&
af935746
KD		 715 ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1)
716 return 1;
f9f715a9 717 /* context is ready to encode remaining frames */
af935746 718 if (ctx->state == MFCINST_FINISHING &&
f9f715a9 719 ctx->dst_queue_cnt >= 1)
af935746
KD		 720 return 1;
721 mfc_debug(2, "ctx is not ready\n");
722 return 0;
723}
724
725static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx)
726{
727 struct s5p_mfc_buf *mb_entry;
728 unsigned long mb_y_addr, mb_c_addr;
729
730 /* move buffers in ref queue to src queue */
731 while (!list_empty(&ctx->ref_queue)) {
732 mb_entry = list_entry((&ctx->ref_queue)->next,
733 struct s5p_mfc_buf, list);
ba7fcb0c
MS		 734 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
735 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
af935746
KD		 736 list_del(&mb_entry->list);
737 ctx->ref_queue_cnt--;
738 list_add_tail(&mb_entry->list, &ctx->src_queue);
739 ctx->src_queue_cnt++;
740 }
741 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
742 ctx->src_queue_cnt, ctx->ref_queue_cnt);
743 INIT_LIST_HEAD(&ctx->ref_queue);
744 ctx->ref_queue_cnt = 0;
745}
746
747static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx)
748{
749 struct s5p_mfc_dev *dev = ctx->dev;
750 struct s5p_mfc_buf *dst_mb;
751 unsigned long dst_addr;
752 unsigned int dst_size;
753 unsigned long flags;
754
755 spin_lock_irqsave(&dev->irqlock, flags);
756 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
ba7fcb0c 757 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
af935746 758 dst_size = vb2_plane_size(dst_mb->b, 0);
43a1ea1f
AK		 759 s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
760 dst_size);
af935746
KD		 761 spin_unlock_irqrestore(&dev->irqlock, flags);
762 return 0;
763}
764
765static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
766{
767 struct s5p_mfc_dev *dev = ctx->dev;
768 struct s5p_mfc_enc_params *p = &ctx->enc_params;
769 struct s5p_mfc_buf *dst_mb;
770 unsigned long flags;
e9d98ddc 771 unsigned int enc_pb_count;
af935746
KD		 772
773 if (p->seq_hdr_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) {
774 spin_lock_irqsave(&dev->irqlock, flags);
775 dst_mb = list_entry(ctx->dst_queue.next,
776 struct s5p_mfc_buf, list);
777 list_del(&dst_mb->list);
778 ctx->dst_queue_cnt--;
779 vb2_set_plane_payload(dst_mb->b, 0,
43a1ea1f 780 s5p_mfc_hw_call(dev->mfc_ops, get_enc_strm_size, dev));
af935746
KD		 781 vb2_buffer_done(dst_mb->b, VB2_BUF_STATE_DONE);
782 spin_unlock_irqrestore(&dev->irqlock, flags);
783 }
e9d98ddc 784
722b979e 785 if (!IS_MFCV6_PLUS(dev)) {
f96f3cfa
JP		 786 ctx->state = MFCINST_RUNNING;
787 if (s5p_mfc_ctx_ready(ctx))
788 set_work_bit_irqsave(ctx);
789 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
e9d98ddc
AK		 790 } else {
791 enc_pb_count = s5p_mfc_hw_call(dev->mfc_ops,
f96f3cfa 792 get_enc_dpb_count, dev);
e9d98ddc
AK		 793 if (ctx->pb_count < enc_pb_count)
794 ctx->pb_count = enc_pb_count;
795 ctx->state = MFCINST_HEAD_PRODUCED;
796 }
f96f3cfa 797
af935746
KD		 798 return 0;
799}
800
801static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
802{
803 struct s5p_mfc_dev *dev = ctx->dev;
804 struct s5p_mfc_buf *dst_mb;
805 struct s5p_mfc_buf *src_mb;
806 unsigned long flags;
807 unsigned long src_y_addr, src_c_addr, dst_addr;
808 unsigned int dst_size;
809
810 spin_lock_irqsave(&dev->irqlock, flags);
811 src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
ba7fcb0c
MS		 812 src_y_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 0);
813 src_c_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 1);
43a1ea1f
AK		 814 s5p_mfc_hw_call(dev->mfc_ops, set_enc_frame_buffer, ctx, src_y_addr,
815 src_c_addr);
af935746
KD		 816 spin_unlock_irqrestore(&dev->irqlock, flags);
817
818 spin_lock_irqsave(&dev->irqlock, flags);
819 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
ba7fcb0c 820 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
af935746 821 dst_size = vb2_plane_size(dst_mb->b, 0);
43a1ea1f
AK		 822 s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
823 dst_size);
af935746
KD		 824 spin_unlock_irqrestore(&dev->irqlock, flags);
825
826 return 0;
827}
828
829static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
830{
831 struct s5p_mfc_dev *dev = ctx->dev;
832 struct s5p_mfc_buf *mb_entry;
833 unsigned long enc_y_addr, enc_c_addr;
834 unsigned long mb_y_addr, mb_c_addr;
835 int slice_type;
836 unsigned int strm_size;
837 unsigned long flags;
838
43a1ea1f
AK		 839 slice_type = s5p_mfc_hw_call(dev->mfc_ops, get_enc_slice_type, dev);
840 strm_size = s5p_mfc_hw_call(dev->mfc_ops, get_enc_strm_size, dev);
4130eabc
AH		 841 mfc_debug(2, "Encoded slice type: %d\n", slice_type);
842 mfc_debug(2, "Encoded stream size: %d\n", strm_size);
843 mfc_debug(2, "Display order: %d\n",
af935746
KD		 844 mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT));
845 spin_lock_irqsave(&dev->irqlock, flags);
846 if (slice_type >= 0) {
43a1ea1f
AK		 847 s5p_mfc_hw_call(dev->mfc_ops, get_enc_frame_buffer, ctx,
848 &enc_y_addr, &enc_c_addr);
af935746 849 list_for_each_entry(mb_entry, &ctx->src_queue, list) {
ba7fcb0c
MS		 850 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
851 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
af935746
KD		 852 if ((enc_y_addr == mb_y_addr) &&
853 (enc_c_addr == mb_c_addr)) {
854 list_del(&mb_entry->list);
855 ctx->src_queue_cnt--;
856 vb2_buffer_done(mb_entry->b,
857 VB2_BUF_STATE_DONE);
858 break;
859 }
860 }
861 list_for_each_entry(mb_entry, &ctx->ref_queue, list) {
ba7fcb0c
MS		 862 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
863 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
af935746
KD		 864 if ((enc_y_addr == mb_y_addr) &&
865 (enc_c_addr == mb_c_addr)) {
866 list_del(&mb_entry->list);
867 ctx->ref_queue_cnt--;
868 vb2_buffer_done(mb_entry->b,
869 VB2_BUF_STATE_DONE);
870 break;
871 }
872 }
873 }
874 if ((ctx->src_queue_cnt > 0) && (ctx->state == MFCINST_RUNNING)) {
875 mb_entry = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
876 list);
f9f715a9 877 if (mb_entry->flags & MFC_BUF_FLAG_USED) {
af935746
KD		 878 list_del(&mb_entry->list);
879 ctx->src_queue_cnt--;
880 list_add_tail(&mb_entry->list, &ctx->ref_queue);
881 ctx->ref_queue_cnt++;
882 }
883 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
884 ctx->src_queue_cnt, ctx->ref_queue_cnt);
885 }
886 if (strm_size > 0) {
887 /* at least one more dest. buffers exist always */
888 mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
889 list);
890 list_del(&mb_entry->list);
891 ctx->dst_queue_cnt--;
892 switch (slice_type) {
893 case S5P_FIMV_ENC_SI_SLICE_TYPE_I:
894 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
895 break;
896 case S5P_FIMV_ENC_SI_SLICE_TYPE_P:
897 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
898 break;
899 case S5P_FIMV_ENC_SI_SLICE_TYPE_B:
900 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_BFRAME;
901 break;
902 }
903 vb2_set_plane_payload(mb_entry->b, 0, strm_size);
904 vb2_buffer_done(mb_entry->b, VB2_BUF_STATE_DONE);
905 }
906 spin_unlock_irqrestore(&dev->irqlock, flags);
7fb89eca
AH		 907 if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
908 clear_work_bit(ctx);
af935746
KD		 909 return 0;
910}
911
912static struct s5p_mfc_codec_ops encoder_codec_ops = {
913 .pre_seq_start = enc_pre_seq_start,
914 .post_seq_start = enc_post_seq_start,
915 .pre_frame_start = enc_pre_frame_start,
916 .post_frame_start = enc_post_frame_start,
917};
918
919/* Query capabilities of the device */
920static int vidioc_querycap(struct file *file, void *priv,
921 struct v4l2_capability *cap)
922{
923 struct s5p_mfc_dev *dev = video_drvdata(file);
924
925 strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1);
926 strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1);
927 cap->bus_info[0] = 0;
928 cap->version = KERNEL_VERSION(1, 0, 0);
f0476a83
SN		 929 /*
930 * This is only a mem-to-mem video device. The capture and output
931 * device capability flags are left only for backward compatibility
932 * and are scheduled for removal.
933 */
934 cap->capabilities = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING |
935 V4L2_CAP_VIDEO_CAPTURE_MPLANE |
936 V4L2_CAP_VIDEO_OUTPUT_MPLANE;
af935746
KD		 937 return 0;
938}
939
940static int vidioc_enum_fmt(struct v4l2_fmtdesc *f, bool mplane, bool out)
941{
942 struct s5p_mfc_fmt *fmt;
943 int i, j = 0;
944
945 for (i = 0; i < ARRAY_SIZE(formats); ++i) {
946 if (mplane && formats[i].num_planes == 1)
947 continue;
948 else if (!mplane && formats[i].num_planes > 1)
949 continue;
950 if (out && formats[i].type != MFC_FMT_RAW)
951 continue;
952 else if (!out && formats[i].type != MFC_FMT_ENC)
953 continue;
954 if (j == f->index) {
955 fmt = &formats[i];
956 strlcpy(f->description, fmt->name,
957 sizeof(f->description));
958 f->pixelformat = fmt->fourcc;
959 return 0;
960 }
961 ++j;
962 }
963 return -EINVAL;
964}
965
966static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
967 struct v4l2_fmtdesc *f)
968{
969 return vidioc_enum_fmt(f, false, false);
970}
971
972static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
973 struct v4l2_fmtdesc *f)
974{
975 return vidioc_enum_fmt(f, true, false);
976}
977
978static int vidioc_enum_fmt_vid_out(struct file *file, void *prov,
979 struct v4l2_fmtdesc *f)
980{
981 return vidioc_enum_fmt(f, false, true);
982}
983
984static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov,
985 struct v4l2_fmtdesc *f)
986{
987 return vidioc_enum_fmt(f, true, true);
988}
989
990static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
991{
992 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
993 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
994
995 mfc_debug(2, "f->type = %d ctx->state = %d\n", f->type, ctx->state);
996 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
997 /* This is run on output (encoder dest) */
998 pix_fmt_mp->width = 0;
999 pix_fmt_mp->height = 0;
1000 pix_fmt_mp->field = V4L2_FIELD_NONE;
1001 pix_fmt_mp->pixelformat = ctx->dst_fmt->fourcc;
1002 pix_fmt_mp->num_planes = ctx->dst_fmt->num_planes;
1003
1004 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->enc_dst_buf_size;
1005 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->enc_dst_buf_size;
1006 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1007 /* This is run on capture (encoder src) */
1008 pix_fmt_mp->width = ctx->img_width;
1009 pix_fmt_mp->height = ctx->img_height;
1010
1011 pix_fmt_mp->field = V4L2_FIELD_NONE;
1012 pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc;
1013 pix_fmt_mp->num_planes = ctx->src_fmt->num_planes;
1014
1015 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1016 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1017 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
1018 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1019 } else {
1020 mfc_err("invalid buf type\n");
1021 return -EINVAL;
1022 }
1023 return 0;
1024}
1025
1026static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
1027{
19c2813c 1028 struct s5p_mfc_dev *dev = video_drvdata(file);
af935746
KD		 1029 struct s5p_mfc_fmt *fmt;
1030 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
1031
1032 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1033 fmt = find_format(f, MFC_FMT_ENC);
1034 if (!fmt) {
1035 mfc_err("failed to try output format\n");
1036 return -EINVAL;
1037 }
1038
19c2813c
JS		 1039 if (!IS_MFCV7(dev) && (fmt->fourcc == V4L2_PIX_FMT_VP8)) {
1040 mfc_err("VP8 is supported only in MFC v7\n");
1041 return -EINVAL;
1042 }
1043
af935746
KD		 1044 if (pix_fmt_mp->plane_fmt[0].sizeimage == 0) {
1045 mfc_err("must be set encoding output size\n");
1046 return -EINVAL;
1047 }
1048
1049 pix_fmt_mp->plane_fmt[0].bytesperline =
1050 pix_fmt_mp->plane_fmt[0].sizeimage;
1051 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1052 fmt = find_format(f, MFC_FMT_RAW);
1053 if (!fmt) {
1054 mfc_err("failed to try output format\n");
1055 return -EINVAL;
1056 }
1057
19c2813c
JS		 1058 if (!IS_MFCV6_PLUS(dev)) {
1059 if (fmt->fourcc == V4L2_PIX_FMT_NV12MT_16X16) {
1060 mfc_err("Not supported format.\n");
1061 return -EINVAL;
1062 }
1063 } else if (IS_MFCV6_PLUS(dev)) {
1064 if (fmt->fourcc == V4L2_PIX_FMT_NV12MT) {
1065 mfc_err("Not supported format.\n");
1066 return -EINVAL;
1067 }
1068 }
1069
af935746
KD		 1070 if (fmt->num_planes != pix_fmt_mp->num_planes) {
1071 mfc_err("failed to try output format\n");
1072 return -EINVAL;
1073 }
0749ae35
AH		 1074 v4l_bound_align_image(&pix_fmt_mp->width, 8, 1920, 1,
1075 &pix_fmt_mp->height, 4, 1080, 1, 0);
af935746
KD		 1076 } else {
1077 mfc_err("invalid buf type\n");
1078 return -EINVAL;
1079 }
1080 return 0;
1081}
1082
1083static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
1084{
1085 struct s5p_mfc_dev *dev = video_drvdata(file);
1086 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
af935746 1087 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
af935746
KD		 1088 int ret = 0;
1089
1090 ret = vidioc_try_fmt(file, priv, f);
1091 if (ret)
1092 return ret;
1093 if (ctx->vq_src.streaming || ctx->vq_dst.streaming) {
1094 v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
1095 ret = -EBUSY;
1096 goto out;
1097 }
1098 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
19c2813c
JS		 1099 /* dst_fmt is validated by call to vidioc_try_fmt */
1100 ctx->dst_fmt = find_format(f, MFC_FMT_ENC);
af935746 1101 ctx->state = MFCINST_INIT;
af935746
KD		 1102 ctx->codec_mode = ctx->dst_fmt->codec_mode;
1103 ctx->enc_dst_buf_size = pix_fmt_mp->plane_fmt[0].sizeimage;
1104 pix_fmt_mp->plane_fmt[0].bytesperline = 0;
1105 ctx->dst_bufs_cnt = 0;
1106 ctx->capture_state = QUEUE_FREE;
43a1ea1f 1107 s5p_mfc_hw_call(dev->mfc_ops, alloc_instance_buffer, ctx);
7fb89eca 1108 set_work_bit_irqsave(ctx);
af935746 1109 s5p_mfc_clean_ctx_int_flags(ctx);
43a1ea1f 1110 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
af935746 1111 if (s5p_mfc_wait_for_done_ctx(ctx, \
43a1ea1f 1112 S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET, 1)) {
af935746
KD		 1113 /* Error or timeout */
1114 mfc_err("Error getting instance from hardware\n");
43a1ea1f
AK		 1115 s5p_mfc_hw_call(dev->mfc_ops, release_instance_buffer,
1116 ctx);
af935746
KD		 1117 ret = -EIO;
1118 goto out;
1119 }
1120 mfc_debug(2, "Got instance number: %d\n", ctx->inst_no);
1121 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
19c2813c
JS		 1122 /* src_fmt is validated by call to vidioc_try_fmt */
1123 ctx->src_fmt = find_format(f, MFC_FMT_RAW);
af935746
KD		 1124 ctx->img_width = pix_fmt_mp->width;
1125 ctx->img_height = pix_fmt_mp->height;
1126 mfc_debug(2, "codec number: %d\n", ctx->src_fmt->codec_mode);
1127 mfc_debug(2, "fmt - w: %d, h: %d, ctx - w: %d, h: %d\n",
1128 pix_fmt_mp->width, pix_fmt_mp->height,
1129 ctx->img_width, ctx->img_height);
af935746 1130
8f532a7f
AK		 1131 s5p_mfc_hw_call(dev->mfc_ops, enc_calc_src_size, ctx);
1132 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1133 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1134 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1135 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
af935746 1136
af935746
KD		 1137 ctx->src_bufs_cnt = 0;
1138 ctx->output_state = QUEUE_FREE;
1139 } else {
1140 mfc_err("invalid buf type\n");
1141 return -EINVAL;
1142 }
1143out:
1144 mfc_debug_leave();
1145 return ret;
1146}
1147
1148static int vidioc_reqbufs(struct file *file, void *priv,
1149 struct v4l2_requestbuffers *reqbufs)
1150{
f96f3cfa 1151 struct s5p_mfc_dev *dev = video_drvdata(file);
af935746
KD		 1152 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1153 int ret = 0;
1154
1155 /* if memory is not mmp or userptr return error */
1156 if ((reqbufs->memory != V4L2_MEMORY_MMAP) &&
1157 (reqbufs->memory != V4L2_MEMORY_USERPTR))
1158 return -EINVAL;
1159 if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1160 if (ctx->capture_state != QUEUE_FREE) {
1161 mfc_err("invalid capture state: %d\n",
1162 ctx->capture_state);
1163 return -EINVAL;
1164 }
1165 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1166 if (ret != 0) {
1167 mfc_err("error in vb2_reqbufs() for E(D)\n");
1168 return ret;
1169 }
1170 ctx->capture_state = QUEUE_BUFS_REQUESTED;
f96f3cfa 1171
e9d98ddc
AK		 1172 ret = s5p_mfc_hw_call(ctx->dev->mfc_ops,
1173 alloc_codec_buffers, ctx);
1174 if (ret) {
1175 mfc_err("Failed to allocate encoding buffers\n");
1176 reqbufs->count = 0;
1177 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1178 return -ENOMEM;
af935746
KD		 1179 }
1180 } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1181 if (ctx->output_state != QUEUE_FREE) {
1182 mfc_err("invalid output state: %d\n",
1183 ctx->output_state);
1184 return -EINVAL;
1185 }
e9d98ddc 1186
722b979e 1187 if (IS_MFCV6_PLUS(dev)) {
e9d98ddc
AK		 1188 /* Check for min encoder buffers */
1189 if (ctx->pb_count &&
1190 (reqbufs->count < ctx->pb_count)) {
1191 reqbufs->count = ctx->pb_count;
1192 mfc_debug(2, "Minimum %d output buffers needed\n",
1193 ctx->pb_count);
1194 } else {
1195 ctx->pb_count = reqbufs->count;
1196 }
1197 }
1198
af935746
KD		 1199 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
1200 if (ret != 0) {
1201 mfc_err("error in vb2_reqbufs() for E(S)\n");
1202 return ret;
1203 }
1204 ctx->output_state = QUEUE_BUFS_REQUESTED;
1205 } else {
1206 mfc_err("invalid buf type\n");
1207 return -EINVAL;
1208 }
1209 return ret;
1210}
1211
1212static int vidioc_querybuf(struct file *file, void *priv,
1213 struct v4l2_buffer *buf)
1214{
1215 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1216 int ret = 0;
1217
1218 /* if memory is not mmp or userptr return error */
1219 if ((buf->memory != V4L2_MEMORY_MMAP) &&
1220 (buf->memory != V4L2_MEMORY_USERPTR))
1221 return -EINVAL;
1222 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1223 if (ctx->state != MFCINST_GOT_INST) {
1224 mfc_err("invalid context state: %d\n", ctx->state);
1225 return -EINVAL;
1226 }
1227 ret = vb2_querybuf(&ctx->vq_dst, buf);
1228 if (ret != 0) {
1229 mfc_err("error in vb2_querybuf() for E(D)\n");
1230 return ret;
1231 }
1232 buf->m.planes[0].m.mem_offset += DST_QUEUE_OFF_BASE;
1233 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1234 ret = vb2_querybuf(&ctx->vq_src, buf);
1235 if (ret != 0) {
1236 mfc_err("error in vb2_querybuf() for E(S)\n");
1237 return ret;
1238 }
1239 } else {
1240 mfc_err("invalid buf type\n");
1241 return -EINVAL;
1242 }
1243 return ret;
1244}
1245
1246/* Queue a buffer */
1247static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1248{
1249 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1250
1251 if (ctx->state == MFCINST_ERROR) {
1252 mfc_err("Call on QBUF after unrecoverable error\n");
1253 return -EIO;
1254 }
f9f715a9
AH		 1255 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1256 if (ctx->state == MFCINST_FINISHING) {
1257 mfc_err("Call on QBUF after EOS command\n");
1258 return -EIO;
1259 }
af935746 1260 return vb2_qbuf(&ctx->vq_src, buf);
f9f715a9 1261 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
af935746 1262 return vb2_qbuf(&ctx->vq_dst, buf);
f9f715a9 1263 }
af935746
KD		 1264 return -EINVAL;
1265}
1266
1267/* Dequeue a buffer */
1268static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1269{
f9f715a9
AH		 1270 const struct v4l2_event ev = {
1271 .type = V4L2_EVENT_EOS
1272 };
af935746 1273 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
f9f715a9 1274 int ret;
af935746
KD		 1275
1276 if (ctx->state == MFCINST_ERROR) {
1277 mfc_err("Call on DQBUF after unrecoverable error\n");
1278 return -EIO;
1279 }
f9f715a9
AH		 1280 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1281 ret = vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
1282 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1283 ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
1284 if (ret == 0 && ctx->state == MFCINST_FINISHED
1285 && list_empty(&ctx->vq_dst.done_list))
1286 v4l2_event_queue_fh(&ctx->fh, &ev);
1287 } else {
1288 ret = -EINVAL;
1289 }
1290
1291 return ret;
af935746
KD		 1292}
1293
6fa9dd06
TS		 1294/* Export DMA buffer */
1295static int vidioc_expbuf(struct file *file, void *priv,
1296 struct v4l2_exportbuffer *eb)
1297{
1298 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1299
1300 if (eb->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1301 return vb2_expbuf(&ctx->vq_src, eb);
1302 if (eb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1303 return vb2_expbuf(&ctx->vq_dst, eb);
1304 return -EINVAL;
1305}
1306
af935746
KD		 1307/* Stream on */
1308static int vidioc_streamon(struct file *file, void *priv,
1309 enum v4l2_buf_type type)
1310{
1311 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1312
1313 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1314 return vb2_streamon(&ctx->vq_src, type);
1315 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1316 return vb2_streamon(&ctx->vq_dst, type);
1317 return -EINVAL;
1318}
1319
1320/* Stream off, which equals to a pause */
1321static int vidioc_streamoff(struct file *file, void *priv,
1322 enum v4l2_buf_type type)
1323{
1324 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1325
1326 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1327 return vb2_streamoff(&ctx->vq_src, type);
1328 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1329 return vb2_streamoff(&ctx->vq_dst, type);
1330 return -EINVAL;
1331}
1332
1333static inline int h264_level(enum v4l2_mpeg_video_h264_level lvl)
1334{
1335 static unsigned int t[V4L2_MPEG_VIDEO_H264_LEVEL_4_0 + 1] = {
1336 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_0 */ 10,
1337 /* V4L2_MPEG_VIDEO_H264_LEVEL_1B */ 9,
1338 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_1 */ 11,
1339 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_2 */ 12,
1340 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_3 */ 13,
1341 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_0 */ 20,
1342 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_1 */ 21,
1343 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_2 */ 22,
1344 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_0 */ 30,
1345 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_1 */ 31,
1346 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_2 */ 32,
1347 /* V4L2_MPEG_VIDEO_H264_LEVEL_4_0 */ 40,
1348 };
1349 return t[lvl];
1350}
1351
1352static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
1353{
1354 static unsigned int t[V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 + 1] = {
1355 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 */ 0,
1356 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B */ 9,
1357 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 */ 1,
1358 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 */ 2,
1359 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 */ 3,
1360 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B */ 7,
1361 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 */ 4,
1362 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 */ 5,
1363 };
1364 return t[lvl];
1365}
1366
1367static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
1368{
1369 static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
1370 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED */ 0,
1371 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 */ 1,
1372 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 */ 2,
1373 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 */ 3,
1374 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 */ 4,
1375 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 */ 5,
1376 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 */ 6,
1377 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 */ 7,
1378 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 */ 8,
1379 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 */ 9,
1380 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 */ 10,
1381 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 */ 11,
1382 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 */ 12,
1383 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 */ 13,
1384 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 */ 14,
1385 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 */ 15,
1386 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 */ 16,
1387 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED */ 255,
1388 };
1389 return t[sar];
1390}
1391
1392static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
1393{
1394 struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
1395 struct s5p_mfc_dev *dev = ctx->dev;
1396 struct s5p_mfc_enc_params *p = &ctx->enc_params;
1397 int ret = 0;
1398
1399 switch (ctrl->id) {
1400 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1401 p->gop_size = ctrl->val;
1402 break;
1403 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1404 p->slice_mode = ctrl->val;
1405 break;
1406 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1407 p->slice_mb = ctrl->val;
1408 break;
1409 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1410 p->slice_bit = ctrl->val * 8;
1411 break;
1412 case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
1413 p->intra_refresh_mb = ctrl->val;
1414 break;
1415 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING:
1416 p->pad = ctrl->val;
1417 break;
1418 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV:
1419 p->pad_luma = (ctrl->val >> 16) & 0xff;
1420 p->pad_cb = (ctrl->val >> 8) & 0xff;
1421 p->pad_cr = (ctrl->val >> 0) & 0xff;
1422 break;
1423 case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE:
1424 p->rc_frame = ctrl->val;
1425 break;
1426 case V4L2_CID_MPEG_VIDEO_BITRATE:
1427 p->rc_bitrate = ctrl->val;
1428 break;
1429 case V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF:
1430 p->rc_reaction_coeff = ctrl->val;
1431 break;
1432 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
1433 ctx->force_frame_type = ctrl->val;
1434 break;
1435 case V4L2_CID_MPEG_VIDEO_VBV_SIZE:
1436 p->vbv_size = ctrl->val;
1437 break;
a378a320
AG		 1438 case V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE:
1439 p->mv_h_range = ctrl->val;
1440 break;
1441 case V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE:
1442 p->mv_v_range = ctrl->val;
1443 break;
af935746
KD		 1444 case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE:
1445 p->codec.h264.cpb_size = ctrl->val;
1446 break;
1447 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1448 p->seq_hdr_mode = ctrl->val;
1449 break;
1450 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
1451 p->frame_skip_mode = ctrl->val;
1452 break;
1453 case V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT:
1454 p->fixed_target_bit = ctrl->val;
1455 break;
1456 case V4L2_CID_MPEG_VIDEO_B_FRAMES:
1457 p->num_b_frame = ctrl->val;
1458 break;
1459 case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
1460 switch (ctrl->val) {
1461 case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN:
1462 p->codec.h264.profile =
1463 S5P_FIMV_ENC_PROFILE_H264_MAIN;
1464 break;
1465 case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH:
1466 p->codec.h264.profile =
1467 S5P_FIMV_ENC_PROFILE_H264_HIGH;
1468 break;
1469 case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE:
1470 p->codec.h264.profile =
1471 S5P_FIMV_ENC_PROFILE_H264_BASELINE;
1472 break;
f96f3cfa 1473 case V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE:
722b979e 1474 if (IS_MFCV6_PLUS(dev))
f96f3cfa
JP		 1475 p->codec.h264.profile =
1476 S5P_FIMV_ENC_PROFILE_H264_CONSTRAINED_BASELINE;
1477 else
1478 ret = -EINVAL;
1479 break;
af935746
KD		 1480 default:
1481 ret = -EINVAL;
1482 }
1483 break;
1484 case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
1485 p->codec.h264.level_v4l2 = ctrl->val;
1486 p->codec.h264.level = h264_level(ctrl->val);
1487 if (p->codec.h264.level < 0) {
1488 mfc_err("Level number is wrong\n");
1489 ret = p->codec.h264.level;
1490 }
1491 break;
1492 case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
1493 p->codec.mpeg4.level_v4l2 = ctrl->val;
1494 p->codec.mpeg4.level = mpeg4_level(ctrl->val);
1495 if (p->codec.mpeg4.level < 0) {
1496 mfc_err("Level number is wrong\n");
1497 ret = p->codec.mpeg4.level;
1498 }
1499 break;
1500 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
1501 p->codec.h264.loop_filter_mode = ctrl->val;
1502 break;
1503 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
1504 p->codec.h264.loop_filter_alpha = ctrl->val;
1505 break;
1506 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
1507 p->codec.h264.loop_filter_beta = ctrl->val;
1508 break;
1509 case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
1510 p->codec.h264.entropy_mode = ctrl->val;
1511 break;
1512 case V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P:
1513 p->codec.h264.num_ref_pic_4p = ctrl->val;
1514 break;
1515 case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM:
1516 p->codec.h264._8x8_transform = ctrl->val;
1517 break;
1518 case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE:
8f532a7f 1519 p->rc_mb = ctrl->val;
af935746
KD		 1520 break;
1521 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1522 p->codec.h264.rc_frame_qp = ctrl->val;
1523 break;
1524 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
1525 p->codec.h264.rc_min_qp = ctrl->val;
1526 break;
1527 case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
1528 p->codec.h264.rc_max_qp = ctrl->val;
1529 break;
1530 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1531 p->codec.h264.rc_p_frame_qp = ctrl->val;
1532 break;
1533 case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
1534 p->codec.h264.rc_b_frame_qp = ctrl->val;
1535 break;
1536 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1537 case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
1538 p->codec.mpeg4.rc_frame_qp = ctrl->val;
1539 break;
1540 case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
1541 case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
1542 p->codec.mpeg4.rc_min_qp = ctrl->val;
1543 break;
1544 case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
1545 case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
1546 p->codec.mpeg4.rc_max_qp = ctrl->val;
1547 break;
1548 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1549 case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
1550 p->codec.mpeg4.rc_p_frame_qp = ctrl->val;
1551 break;
1552 case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
1553 case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
1554 p->codec.mpeg4.rc_b_frame_qp = ctrl->val;
1555 break;
1556 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK:
1557 p->codec.h264.rc_mb_dark = ctrl->val;
1558 break;
1559 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH:
1560 p->codec.h264.rc_mb_smooth = ctrl->val;
1561 break;
1562 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC:
1563 p->codec.h264.rc_mb_static = ctrl->val;
1564 break;
1565 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY:
1566 p->codec.h264.rc_mb_activity = ctrl->val;
1567 break;
1568 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE:
1569 p->codec.h264.vui_sar = ctrl->val;
1570 break;
1571 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC:
1572 p->codec.h264.vui_sar_idc = vui_sar_idc(ctrl->val);
1573 break;
1574 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH:
1575 p->codec.h264.vui_ext_sar_width = ctrl->val;
1576 break;
1577 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT:
1578 p->codec.h264.vui_ext_sar_height = ctrl->val;
1579 break;
1580 case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE:
1581 p->codec.h264.open_gop = !ctrl->val;
1582 break;
1583 case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD:
1584 p->codec.h264.open_gop_size = ctrl->val;
1585 break;
1586 case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
1587 switch (ctrl->val) {
1588 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE:
1589 p->codec.mpeg4.profile =
1590 S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE;
1591 break;
1592 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE:
1593 p->codec.mpeg4.profile =
1594 S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE;
1595 break;
1596 default:
1597 ret = -EINVAL;
1598 }
1599 break;
1600 case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL:
1601 p->codec.mpeg4.quarter_pixel = ctrl->val;
1602 break;
3a967706
AK		 1603 case V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS:
1604 p->codec.vp8.num_partitions = ctrl->val;
1605 break;
1606 case V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4:
1607 p->codec.vp8.imd_4x4 = ctrl->val;
1608 break;
1609 case V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES:
1610 p->codec.vp8.num_ref = ctrl->val;
1611 break;
1612 case V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL:
1613 p->codec.vp8.filter_level = ctrl->val;
1614 break;
1615 case V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS:
1616 p->codec.vp8.filter_sharpness = ctrl->val;
1617 break;
1618 case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD:
1619 p->codec.vp8.golden_frame_ref_period = ctrl->val;
1620 break;
1621 case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
1622 p->codec.vp8.golden_frame_sel = ctrl->val;
1623 break;
4773ab99
AK		 1624 case V4L2_CID_MPEG_VIDEO_VPX_MIN_QP:
1625 p->codec.vp8.rc_min_qp = ctrl->val;
1626 break;
1627 case V4L2_CID_MPEG_VIDEO_VPX_MAX_QP:
1628 p->codec.vp8.rc_max_qp = ctrl->val;
1629 break;
1630 case V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP:
1631 p->codec.vp8.rc_frame_qp = ctrl->val;
1632 break;
1633 case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:
1634 p->codec.vp8.rc_p_frame_qp = ctrl->val;
1635 break;
bbd8f3fe
KA		 1636 case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
1637 p->codec.vp8.profile = ctrl->val;
1638 break;
af935746
KD		 1639 default:
1640 v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
1641 ctrl->id, ctrl->val);
1642 ret = -EINVAL;
1643 }
1644 return ret;
1645}
1646
1647static const struct v4l2_ctrl_ops s5p_mfc_enc_ctrl_ops = {
1648 .s_ctrl = s5p_mfc_enc_s_ctrl,
1649};
1650
3e9095d5
SK		 1651static int vidioc_s_parm(struct file *file, void *priv,
1652 struct v4l2_streamparm *a)
af935746
KD		 1653{
1654 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1655
1656 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1657 ctx->enc_params.rc_framerate_num =
1658 a->parm.output.timeperframe.denominator;
1659 ctx->enc_params.rc_framerate_denom =
1660 a->parm.output.timeperframe.numerator;
1661 } else {
1662 mfc_err("Setting FPS is only possible for the output queue\n");
1663 return -EINVAL;
1664 }
1665 return 0;
1666}
1667
3e9095d5
SK		 1668static int vidioc_g_parm(struct file *file, void *priv,
1669 struct v4l2_streamparm *a)
af935746
KD		 1670{
1671 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1672
1673 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1674 a->parm.output.timeperframe.denominator =
1675 ctx->enc_params.rc_framerate_num;
1676 a->parm.output.timeperframe.numerator =
1677 ctx->enc_params.rc_framerate_denom;
1678 } else {
1679 mfc_err("Setting FPS is only possible for the output queue\n");
1680 return -EINVAL;
1681 }
1682 return 0;
1683}
1684
f9f715a9
AH		 1685int vidioc_encoder_cmd(struct file *file, void *priv,
1686 struct v4l2_encoder_cmd *cmd)
1687{
1688 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1689 struct s5p_mfc_dev *dev = ctx->dev;
1690 struct s5p_mfc_buf *buf;
1691 unsigned long flags;
1692
1693 switch (cmd->cmd) {
1694 case V4L2_ENC_CMD_STOP:
1695 if (cmd->flags != 0)
1696 return -EINVAL;
1697
1698 if (!ctx->vq_src.streaming)
1699 return -EINVAL;
1700
1701 spin_lock_irqsave(&dev->irqlock, flags);
1702 if (list_empty(&ctx->src_queue)) {
4130eabc 1703 mfc_debug(2, "EOS: empty src queue, entering finishing state\n");
f9f715a9 1704 ctx->state = MFCINST_FINISHING;
eb362092
KD		 1705 if (s5p_mfc_ctx_ready(ctx))
1706 set_work_bit_irqsave(ctx);
f9f715a9 1707 spin_unlock_irqrestore(&dev->irqlock, flags);
43a1ea1f 1708 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
f9f715a9 1709 } else {
4130eabc 1710 mfc_debug(2, "EOS: marking last buffer of stream\n");
f9f715a9
AH		 1711 buf = list_entry(ctx->src_queue.prev,
1712 struct s5p_mfc_buf, list);
1713 if (buf->flags & MFC_BUF_FLAG_USED)
1714 ctx->state = MFCINST_FINISHING;
1715 else
1716 buf->flags |= MFC_BUF_FLAG_EOS;
1717 spin_unlock_irqrestore(&dev->irqlock, flags);
1718 }
1719 break;
1720 default:
1721 return -EINVAL;
1722
1723 }
1724 return 0;
1725}
1726
1727static int vidioc_subscribe_event(struct v4l2_fh *fh,
e1393b59 1728 const struct v4l2_event_subscription *sub)
f9f715a9
AH		 1729{
1730 switch (sub->type) {
1731 case V4L2_EVENT_EOS:
1732 return v4l2_event_subscribe(fh, sub, 2, NULL);
1733 default:
1734 return -EINVAL;
1735 }
1736}
1737
af935746
KD		 1738static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = {
1739 .vidioc_querycap = vidioc_querycap,
1740 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1741 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
1742 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
1743 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
1744 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
1745 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
1746 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
1747 .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
1748 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
1749 .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
1750 .vidioc_reqbufs = vidioc_reqbufs,
1751 .vidioc_querybuf = vidioc_querybuf,
1752 .vidioc_qbuf = vidioc_qbuf,
1753 .vidioc_dqbuf = vidioc_dqbuf,
6fa9dd06 1754 .vidioc_expbuf = vidioc_expbuf,
af935746
KD		 1755 .vidioc_streamon = vidioc_streamon,
1756 .vidioc_streamoff = vidioc_streamoff,
1757 .vidioc_s_parm = vidioc_s_parm,
1758 .vidioc_g_parm = vidioc_g_parm,
f9f715a9
AH		 1759 .vidioc_encoder_cmd = vidioc_encoder_cmd,
1760 .vidioc_subscribe_event = vidioc_subscribe_event,
1761 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
af935746
KD		 1762};
1763
1764static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb)
1765{
1766 int i;
1767
1768 if (!fmt)
1769 return -EINVAL;
1770 if (fmt->num_planes != vb->num_planes) {
1771 mfc_err("invalid plane number for the format\n");
1772 return -EINVAL;
1773 }
1774 for (i = 0; i < fmt->num_planes; i++) {
ba7fcb0c 1775 if (!vb2_dma_contig_plane_dma_addr(vb, i)) {
af935746
KD		 1776 mfc_err("failed to get plane cookie\n");
1777 return -EINVAL;
1778 }
4130eabc
AH		 1779 mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08zx\n",
1780 vb->v4l2_buf.index, i,
1781 vb2_dma_contig_plane_dma_addr(vb, i));
af935746
KD		 1782 }
1783 return 0;
1784}
1785
1786static int s5p_mfc_queue_setup(struct vb2_queue *vq,
fc714e70
GL		 1787 const struct v4l2_format *fmt,
1788 unsigned int *buf_count, unsigned int *plane_count,
1789 unsigned int psize[], void *allocators[])
af935746
KD		 1790{
1791 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
f96f3cfa 1792 struct s5p_mfc_dev *dev = ctx->dev;
af935746
KD		 1793
1794 if (ctx->state != MFCINST_GOT_INST) {
1795 mfc_err("inavlid state: %d\n", ctx->state);
1796 return -EINVAL;
1797 }
1798 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1799 if (ctx->dst_fmt)
1800 *plane_count = ctx->dst_fmt->num_planes;
1801 else
1802 *plane_count = MFC_ENC_CAP_PLANE_COUNT;
1803 if (*buf_count < 1)
1804 *buf_count = 1;
1805 if (*buf_count > MFC_MAX_BUFFERS)
1806 *buf_count = MFC_MAX_BUFFERS;
1807 psize[0] = ctx->enc_dst_buf_size;
1808 allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1809 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1810 if (ctx->src_fmt)
1811 *plane_count = ctx->src_fmt->num_planes;
1812 else
1813 *plane_count = MFC_ENC_OUT_PLANE_COUNT;
1814
1815 if (*buf_count < 1)
1816 *buf_count = 1;
1817 if (*buf_count > MFC_MAX_BUFFERS)
1818 *buf_count = MFC_MAX_BUFFERS;
722b979e 1819
af935746
KD		 1820 psize[0] = ctx->luma_size;
1821 psize[1] = ctx->chroma_size;
debe6267 1822
722b979e 1823 if (IS_MFCV6_PLUS(dev)) {
f96f3cfa
JP		 1824 allocators[0] =
1825 ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1826 allocators[1] =
1827 ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1828 } else {
1829 allocators[0] =
1830 ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1831 allocators[1] =
1832 ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1833 }
af935746
KD		 1834 } else {
1835 mfc_err("inavlid queue type: %d\n", vq->type);
1836 return -EINVAL;
1837 }
1838 return 0;
1839}
1840
1841static void s5p_mfc_unlock(struct vb2_queue *q)
1842{
1843 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1844 struct s5p_mfc_dev *dev = ctx->dev;
1845
1846 mutex_unlock(&dev->mfc_mutex);
1847}
1848
1849static void s5p_mfc_lock(struct vb2_queue *q)
1850{
1851 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1852 struct s5p_mfc_dev *dev = ctx->dev;
1853
1854 mutex_lock(&dev->mfc_mutex);
1855}
1856
1857static int s5p_mfc_buf_init(struct vb2_buffer *vb)
1858{
1859 struct vb2_queue *vq = vb->vb2_queue;
1860 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1861 unsigned int i;
1862 int ret;
1863
1864 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1865 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1866 if (ret < 0)
1867 return ret;
1868 i = vb->v4l2_buf.index;
1869 ctx->dst_bufs[i].b = vb;
1870 ctx->dst_bufs[i].cookie.stream =
ba7fcb0c 1871 vb2_dma_contig_plane_dma_addr(vb, 0);
af935746
KD		 1872 ctx->dst_bufs_cnt++;
1873 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1874 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1875 if (ret < 0)
1876 return ret;
1877 i = vb->v4l2_buf.index;
1878 ctx->src_bufs[i].b = vb;
1879 ctx->src_bufs[i].cookie.raw.luma =
ba7fcb0c 1880 vb2_dma_contig_plane_dma_addr(vb, 0);
af935746 1881 ctx->src_bufs[i].cookie.raw.chroma =
ba7fcb0c 1882 vb2_dma_contig_plane_dma_addr(vb, 1);
af935746
KD		 1883 ctx->src_bufs_cnt++;
1884 } else {
1885 mfc_err("inavlid queue type: %d\n", vq->type);
1886 return -EINVAL;
1887 }
1888 return 0;
1889}
1890
1891static int s5p_mfc_buf_prepare(struct vb2_buffer *vb)
1892{
1893 struct vb2_queue *vq = vb->vb2_queue;
1894 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1895 int ret;
1896
1897 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1898 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1899 if (ret < 0)
1900 return ret;
1901 mfc_debug(2, "plane size: %ld, dst size: %d\n",
1902 vb2_plane_size(vb, 0), ctx->enc_dst_buf_size);
1903 if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) {
1904 mfc_err("plane size is too small for capture\n");
1905 return -EINVAL;
1906 }
1907 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1908 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1909 if (ret < 0)
1910 return ret;
1911 mfc_debug(2, "plane size: %ld, luma size: %d\n",
1912 vb2_plane_size(vb, 0), ctx->luma_size);
1913 mfc_debug(2, "plane size: %ld, chroma size: %d\n",
1914 vb2_plane_size(vb, 1), ctx->chroma_size);
1915 if (vb2_plane_size(vb, 0) < ctx->luma_size ||
1916 vb2_plane_size(vb, 1) < ctx->chroma_size) {
1917 mfc_err("plane size is too small for output\n");
1918 return -EINVAL;
1919 }
1920 } else {
1921 mfc_err("inavlid queue type: %d\n", vq->type);
1922 return -EINVAL;
1923 }
1924 return 0;
1925}
1926
bd323e28 1927static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
af935746
KD		 1928{
1929 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1930 struct s5p_mfc_dev *dev = ctx->dev;
af935746 1931
722b979e
AK		 1932 if (IS_MFCV6_PLUS(dev) &&
1933 (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)) {
e9d98ddc
AK		 1934
1935 if ((ctx->state == MFCINST_GOT_INST) &&
1936 (dev->curr_ctx == ctx->num) && dev->hw_lock) {
1937 s5p_mfc_wait_for_done_ctx(ctx,
1938 S5P_MFC_R2H_CMD_SEQ_DONE_RET,
1939 0);
1940 }
1941
1942 if (ctx->src_bufs_cnt < ctx->pb_count) {
1943 mfc_err("Need minimum %d OUTPUT buffers\n",
1944 ctx->pb_count);
79aeb3f3 1945 return -ENOBUFS;
e9d98ddc
AK		 1946 }
1947 }
1948
af935746 1949 /* If context is ready then dev = work->data;schedule it to run */
7fb89eca
AH		 1950 if (s5p_mfc_ctx_ready(ctx))
1951 set_work_bit_irqsave(ctx);
43a1ea1f 1952 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
e9d98ddc 1953
af935746
KD		 1954 return 0;
1955}
1956
1957static int s5p_mfc_stop_streaming(struct vb2_queue *q)
1958{
1959 unsigned long flags;
1960 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1961 struct s5p_mfc_dev *dev = ctx->dev;
1962
1963 if ((ctx->state == MFCINST_FINISHING ||
1964 ctx->state == MFCINST_RUNNING) &&
1965 dev->curr_ctx == ctx->num && dev->hw_lock) {
1966 ctx->state = MFCINST_ABORT;
43a1ea1f 1967 s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_FRAME_DONE_RET,
af935746
KD		 1968 0);
1969 }
1970 ctx->state = MFCINST_FINISHED;
1971 spin_lock_irqsave(&dev->irqlock, flags);
1972 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
43a1ea1f
AK		 1973 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->dst_queue,
1974 &ctx->vq_dst);
af935746
KD		 1975 INIT_LIST_HEAD(&ctx->dst_queue);
1976 ctx->dst_queue_cnt = 0;
1977 }
1978 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1979 cleanup_ref_queue(ctx);
43a1ea1f
AK		 1980 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->src_queue,
1981 &ctx->vq_src);
af935746
KD		 1982 INIT_LIST_HEAD(&ctx->src_queue);
1983 ctx->src_queue_cnt = 0;
1984 }
1985 spin_unlock_irqrestore(&dev->irqlock, flags);
1986 return 0;
1987}
1988
1989static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
1990{
1991 struct vb2_queue *vq = vb->vb2_queue;
1992 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1993 struct s5p_mfc_dev *dev = ctx->dev;
1994 unsigned long flags;
1995 struct s5p_mfc_buf *mfc_buf;
1996
1997 if (ctx->state == MFCINST_ERROR) {
1998 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
1999 cleanup_ref_queue(ctx);
2000 return;
2001 }
2002 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
2003 mfc_buf = &ctx->dst_bufs[vb->v4l2_buf.index];
f9f715a9 2004 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
af935746
KD		 2005 /* Mark destination as available for use by MFC */
2006 spin_lock_irqsave(&dev->irqlock, flags);
2007 list_add_tail(&mfc_buf->list, &ctx->dst_queue);
2008 ctx->dst_queue_cnt++;
2009 spin_unlock_irqrestore(&dev->irqlock, flags);
2010 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
2011 mfc_buf = &ctx->src_bufs[vb->v4l2_buf.index];
f9f715a9 2012 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
af935746 2013 spin_lock_irqsave(&dev->irqlock, flags);
f9f715a9
AH		 2014 list_add_tail(&mfc_buf->list, &ctx->src_queue);
2015 ctx->src_queue_cnt++;
af935746
KD		 2016 spin_unlock_irqrestore(&dev->irqlock, flags);
2017 } else {
2018 mfc_err("unsupported buffer type (%d)\n", vq->type);
2019 }
7fb89eca
AH		 2020 if (s5p_mfc_ctx_ready(ctx))
2021 set_work_bit_irqsave(ctx);
43a1ea1f 2022 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
af935746
KD		 2023}
2024
2025static struct vb2_ops s5p_mfc_enc_qops = {
2026 .queue_setup = s5p_mfc_queue_setup,
2027 .wait_prepare = s5p_mfc_unlock,
2028 .wait_finish = s5p_mfc_lock,
2029 .buf_init = s5p_mfc_buf_init,
2030 .buf_prepare = s5p_mfc_buf_prepare,
2031 .start_streaming = s5p_mfc_start_streaming,
2032 .stop_streaming = s5p_mfc_stop_streaming,
2033 .buf_queue = s5p_mfc_buf_queue,
2034};
2035
2036struct s5p_mfc_codec_ops *get_enc_codec_ops(void)
2037{
2038 return &encoder_codec_ops;
2039}
2040
2041struct vb2_ops *get_enc_queue_ops(void)
2042{
2043 return &s5p_mfc_enc_qops;
2044}
2045
2046const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void)
2047{
2048 return &s5p_mfc_enc_ioctl_ops;
2049}
2050
2051#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \
2052 && V4L2_CTRL_DRIVER_PRIV(x))
2053
2054int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx)
2055{
2056 struct v4l2_ctrl_config cfg;
2057 int i;
2058
2059 v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS);
2060 if (ctx->ctrl_handler.error) {
2061 mfc_err("v4l2_ctrl_handler_init failed\n");
2062 return ctx->ctrl_handler.error;
2063 }
2064 for (i = 0; i < NUM_CTRLS; i++) {
2065 if (IS_MFC51_PRIV(controls[i].id)) {
a65c3262 2066 memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
af935746
KD		 2067 cfg.ops = &s5p_mfc_enc_ctrl_ops;
2068 cfg.id = controls[i].id;
2069 cfg.min = controls[i].minimum;
2070 cfg.max = controls[i].maximum;
2071 cfg.def = controls[i].default_value;
2072 cfg.name = controls[i].name;
2073 cfg.type = controls[i].type;
2074 cfg.flags = 0;
2075
2076 if (cfg.type == V4L2_CTRL_TYPE_MENU) {
2077 cfg.step = 0;
2078 cfg.menu_skip_mask = cfg.menu_skip_mask;
2079 cfg.qmenu = mfc51_get_menu(cfg.id);
2080 } else {
2081 cfg.step = controls[i].step;
2082 cfg.menu_skip_mask = 0;
2083 }
2084 ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler,
2085 &cfg, NULL);
2086 } else {
3a967706
AK		 2087 if ((controls[i].type == V4L2_CTRL_TYPE_MENU) ||
2088 (controls[i].type ==
2089 V4L2_CTRL_TYPE_INTEGER_MENU)) {
af935746
KD		 2090 ctx->ctrls[i] = v4l2_ctrl_new_std_menu(
2091 &ctx->ctrl_handler,
2092 &s5p_mfc_enc_ctrl_ops, controls[i].id,
2093 controls[i].maximum, 0,
2094 controls[i].default_value);
2095 } else {
2096 ctx->ctrls[i] = v4l2_ctrl_new_std(
2097 &ctx->ctrl_handler,
2098 &s5p_mfc_enc_ctrl_ops, controls[i].id,
2099 controls[i].minimum,
2100 controls[i].maximum, controls[i].step,
2101 controls[i].default_value);
2102 }
2103 }
2104 if (ctx->ctrl_handler.error) {
2105 mfc_err("Adding control (%d) failed\n", i);
2106 return ctx->ctrl_handler.error;
2107 }
2108 if (controls[i].is_volatile && ctx->ctrls[i])
88365105 2109 ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
af935746 2110 }
69c9fe6f 2111 v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
af935746
KD		 2112 return 0;
2113}
2114
2115void s5p_mfc_enc_ctrls_delete(struct s5p_mfc_ctx *ctx)
2116{
2117 int i;
2118
2119 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
2120 for (i = 0; i < NUM_CTRLS; i++)
2121 ctx->ctrls[i] = NULL;
2122}
43a1ea1f
AK		 2123
2124void s5p_mfc_enc_init(struct s5p_mfc_ctx *ctx)
2125{
2126 struct v4l2_format f;
2127 f.fmt.pix_mp.pixelformat = DEF_SRC_FMT_ENC;
2128 ctx->src_fmt = find_format(&f, MFC_FMT_RAW);
2129 f.fmt.pix_mp.pixelformat = DEF_DST_FMT_ENC;
2130 ctx->dst_fmt = find_format(&f, MFC_FMT_ENC);
2131}
2132
Linux kernel - Deliverables
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