Commit | Line | Data |
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e87b540b | 1 | /* ir-rc5-decoder.c - decoder for RC5(x) and StreamZap protocols |
db1423a6 | 2 | * |
37e59f87 | 3 | * Copyright (C) 2010 by Mauro Carvalho Chehab |
e87b540b | 4 | * Copyright (C) 2010 by Jarod Wilson <jarod@redhat.com> |
db1423a6 MCC |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation version 2 of the License. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | /* | |
e87b540b DH |
17 | * This decoder handles the 14 bit RC5 protocol, 15 bit "StreamZap" protocol |
18 | * and 20 bit RC5x protocol. | |
db1423a6 MCC |
19 | */ |
20 | ||
f62de675 | 21 | #include "rc-core-priv.h" |
7a707b89 | 22 | #include <linux/module.h> |
db1423a6 | 23 | |
9b09df51 | 24 | #define RC5_NBITS 14 |
e87b540b | 25 | #define RC5_SZ_NBITS 15 |
733419b5 DH |
26 | #define RC5X_NBITS 20 |
27 | #define CHECK_RC5X_NBITS 8 | |
724e2495 | 28 | #define RC5_UNIT 888888 /* ns */ |
e40b1127 DH |
29 | #define RC5_BIT_START (1 * RC5_UNIT) |
30 | #define RC5_BIT_END (1 * RC5_UNIT) | |
31 | #define RC5X_SPACE (4 * RC5_UNIT) | |
e87b540b | 32 | #define RC5_TRAILER (10 * RC5_UNIT) /* In reality, approx 100 */ |
db1423a6 | 33 | |
db1423a6 MCC |
34 | enum rc5_state { |
35 | STATE_INACTIVE, | |
724e2495 DH |
36 | STATE_BIT_START, |
37 | STATE_BIT_END, | |
733419b5 | 38 | STATE_CHECK_RC5X, |
724e2495 | 39 | STATE_FINISHED, |
db1423a6 MCC |
40 | }; |
41 | ||
db1423a6 | 42 | /** |
724e2495 | 43 | * ir_rc5_decode() - Decode one RC-5 pulse or space |
d8b4b582 | 44 | * @dev: the struct rc_dev descriptor of the device |
e40b1127 | 45 | * @ev: the struct ir_raw_event descriptor of the pulse/space |
db1423a6 MCC |
46 | * |
47 | * This function returns -EINVAL if the pulse violates the state machine | |
48 | */ | |
d8b4b582 | 49 | static int ir_rc5_decode(struct rc_dev *dev, struct ir_raw_event ev) |
db1423a6 | 50 | { |
d8b4b582 | 51 | struct rc5_dec *data = &dev->raw->rc5; |
733419b5 | 52 | u8 toggle; |
724e2495 | 53 | u32 scancode; |
120703f9 | 54 | enum rc_type protocol; |
db1423a6 | 55 | |
cef83483 | 56 | if (!(dev->enabled_protocols & (RC_BIT_RC5 | RC_BIT_RC5X | RC_BIT_RC5_SZ))) |
c003ab1b | 57 | return 0; |
7f20d32d | 58 | |
4651918a ML |
59 | if (!is_timing_event(ev)) { |
60 | if (ev.reset) | |
61 | data->state = STATE_INACTIVE; | |
db1423a6 | 62 | return 0; |
724e2495 | 63 | } |
db1423a6 | 64 | |
e40b1127 | 65 | if (!geq_margin(ev.duration, RC5_UNIT, RC5_UNIT / 2)) |
724e2495 | 66 | goto out; |
db1423a6 | 67 | |
724e2495 | 68 | again: |
e87b540b | 69 | IR_dprintk(2, "RC5(x/sz) decode started at state %i (%uus %s)\n", |
e40b1127 | 70 | data->state, TO_US(ev.duration), TO_STR(ev.pulse)); |
db1423a6 | 71 | |
e40b1127 | 72 | if (!geq_margin(ev.duration, RC5_UNIT, RC5_UNIT / 2)) |
724e2495 | 73 | return 0; |
db1423a6 | 74 | |
724e2495 | 75 | switch (data->state) { |
db1423a6 | 76 | |
724e2495 | 77 | case STATE_INACTIVE: |
e40b1127 DH |
78 | if (!ev.pulse) |
79 | break; | |
80 | ||
81 | data->state = STATE_BIT_START; | |
82 | data->count = 1; | |
e40b1127 DH |
83 | decrease_duration(&ev, RC5_BIT_START); |
84 | goto again; | |
724e2495 DH |
85 | |
86 | case STATE_BIT_START: | |
e87b540b DH |
87 | if (!ev.pulse && geq_margin(ev.duration, RC5_TRAILER, RC5_UNIT / 2)) { |
88 | data->state = STATE_FINISHED; | |
89 | goto again; | |
90 | } | |
91 | ||
e40b1127 DH |
92 | if (!eq_margin(ev.duration, RC5_BIT_START, RC5_UNIT / 2)) |
93 | break; | |
94 | ||
c216369e | 95 | data->bits <<= 1; |
e40b1127 | 96 | if (!ev.pulse) |
c216369e | 97 | data->bits |= 1; |
e40b1127 | 98 | data->count++; |
e40b1127 DH |
99 | data->state = STATE_BIT_END; |
100 | return 0; | |
9b09df51 | 101 | |
724e2495 | 102 | case STATE_BIT_END: |
d8b4b582 | 103 | if (!is_transition(&ev, &dev->raw->prev_ev)) |
e40b1127 DH |
104 | break; |
105 | ||
e87b540b | 106 | if (data->count == CHECK_RC5X_NBITS) |
e40b1127 DH |
107 | data->state = STATE_CHECK_RC5X; |
108 | else | |
109 | data->state = STATE_BIT_START; | |
110 | ||
111 | decrease_duration(&ev, RC5_BIT_END); | |
112 | goto again; | |
724e2495 | 113 | |
733419b5 | 114 | case STATE_CHECK_RC5X: |
e40b1127 | 115 | if (!ev.pulse && geq_margin(ev.duration, RC5X_SPACE, RC5_UNIT / 2)) { |
e87b540b | 116 | data->is_rc5x = true; |
e40b1127 | 117 | decrease_duration(&ev, RC5X_SPACE); |
e87b540b DH |
118 | } else |
119 | data->is_rc5x = false; | |
733419b5 DH |
120 | data->state = STATE_BIT_START; |
121 | goto again; | |
122 | ||
724e2495 | 123 | case STATE_FINISHED: |
e40b1127 DH |
124 | if (ev.pulse) |
125 | break; | |
126 | ||
e87b540b | 127 | if (data->is_rc5x && data->count == RC5X_NBITS) { |
733419b5 DH |
128 | /* RC5X */ |
129 | u8 xdata, command, system; | |
c5540fbb | 130 | if (!(dev->enabled_protocols & RC_BIT_RC5X)) { |
c003ab1b DH |
131 | data->state = STATE_INACTIVE; |
132 | return 0; | |
133 | } | |
c216369e DH |
134 | xdata = (data->bits & 0x0003F) >> 0; |
135 | command = (data->bits & 0x00FC0) >> 6; | |
136 | system = (data->bits & 0x1F000) >> 12; | |
137 | toggle = (data->bits & 0x20000) ? 1 : 0; | |
138 | command += (data->bits & 0x01000) ? 0 : 0x40; | |
733419b5 | 139 | scancode = system << 16 | command << 8 | xdata; |
120703f9 | 140 | protocol = RC_TYPE_RC5X; |
733419b5 | 141 | |
e87b540b | 142 | } else if (!data->is_rc5x && data->count == RC5_NBITS) { |
733419b5 DH |
143 | /* RC5 */ |
144 | u8 command, system; | |
c5540fbb | 145 | if (!(dev->enabled_protocols & RC_BIT_RC5)) { |
c003ab1b DH |
146 | data->state = STATE_INACTIVE; |
147 | return 0; | |
148 | } | |
c216369e DH |
149 | command = (data->bits & 0x0003F) >> 0; |
150 | system = (data->bits & 0x007C0) >> 6; | |
151 | toggle = (data->bits & 0x00800) ? 1 : 0; | |
152 | command += (data->bits & 0x01000) ? 0 : 0x40; | |
733419b5 | 153 | scancode = system << 8 | command; |
120703f9 | 154 | protocol = RC_TYPE_RC5; |
733419b5 | 155 | |
e87b540b DH |
156 | } else if (!data->is_rc5x && data->count == RC5_SZ_NBITS) { |
157 | /* RC5 StreamZap */ | |
158 | u8 command, system; | |
159 | if (!(dev->enabled_protocols & RC_BIT_RC5_SZ)) { | |
160 | data->state = STATE_INACTIVE; | |
161 | return 0; | |
162 | } | |
163 | command = (data->bits & 0x0003F) >> 0; | |
164 | system = (data->bits & 0x02FC0) >> 6; | |
165 | toggle = (data->bits & 0x01000) ? 1 : 0; | |
166 | scancode = system << 6 | command; | |
167 | protocol = RC_TYPE_RC5_SZ; | |
168 | ||
169 | } else | |
170 | break; | |
171 | ||
172 | IR_dprintk(1, "RC5(x/sz) scancode 0x%06x (p: %u, t: %u)\n", | |
173 | scancode, protocol, toggle); | |
733419b5 | 174 | |
120703f9 | 175 | rc_keydown(dev, protocol, scancode, toggle); |
db1423a6 MCC |
176 | data->state = STATE_INACTIVE; |
177 | return 0; | |
178 | } | |
179 | ||
724e2495 | 180 | out: |
32570579 MCC |
181 | IR_dprintk(1, "RC5(x/sz) decode failed at state %i count %d (%uus %s)\n", |
182 | data->state, data->count, TO_US(ev.duration), TO_STR(ev.pulse)); | |
db1423a6 MCC |
183 | data->state = STATE_INACTIVE; |
184 | return -EINVAL; | |
185 | } | |
186 | ||
a0466f15 JH |
187 | static struct ir_raw_timings_manchester ir_rc5_timings = { |
188 | .leader = RC5_UNIT, | |
189 | .pulse_space_start = 0, | |
190 | .clock = RC5_UNIT, | |
191 | .trailer_space = RC5_UNIT * 10, | |
192 | }; | |
193 | ||
194 | static struct ir_raw_timings_manchester ir_rc5x_timings[2] = { | |
195 | { | |
196 | .leader = RC5_UNIT, | |
197 | .pulse_space_start = 0, | |
198 | .clock = RC5_UNIT, | |
199 | .trailer_space = RC5X_SPACE, | |
200 | }, | |
201 | { | |
202 | .clock = RC5_UNIT, | |
203 | .trailer_space = RC5_UNIT * 10, | |
204 | }, | |
205 | }; | |
206 | ||
207 | static struct ir_raw_timings_manchester ir_rc5_sz_timings = { | |
208 | .leader = RC5_UNIT, | |
209 | .pulse_space_start = 0, | |
210 | .clock = RC5_UNIT, | |
211 | .trailer_space = RC5_UNIT * 10, | |
212 | }; | |
213 | ||
214 | static int ir_rc5_validate_filter(const struct rc_scancode_filter *scancode, | |
215 | unsigned int important_bits) | |
216 | { | |
217 | /* all important bits of scancode should be set in mask */ | |
218 | if (~scancode->mask & important_bits) | |
219 | return -EINVAL; | |
220 | /* extra bits in mask should be zero in data */ | |
221 | if (scancode->mask & scancode->data & ~important_bits) | |
222 | return -EINVAL; | |
223 | return 0; | |
224 | } | |
225 | ||
226 | /** | |
227 | * ir_rc5_encode() - Encode a scancode as a stream of raw events | |
228 | * | |
229 | * @protocols: allowed protocols | |
230 | * @scancode: scancode filter describing scancode (helps distinguish between | |
231 | * protocol subtypes when scancode is ambiguous) | |
232 | * @events: array of raw ir events to write into | |
233 | * @max: maximum size of @events | |
234 | * | |
235 | * Returns: The number of events written. | |
236 | * -ENOBUFS if there isn't enough space in the array to fit the | |
237 | * encoding. In this case all @max events will have been written. | |
238 | * -EINVAL if the scancode is ambiguous or invalid. | |
239 | */ | |
240 | static int ir_rc5_encode(u64 protocols, | |
241 | const struct rc_scancode_filter *scancode, | |
242 | struct ir_raw_event *events, unsigned int max) | |
243 | { | |
244 | int ret; | |
245 | struct ir_raw_event *e = events; | |
246 | unsigned int data, xdata, command, commandx, system; | |
247 | ||
248 | /* Detect protocol and convert scancode to raw data */ | |
249 | if (protocols & RC_BIT_RC5 && | |
250 | !ir_rc5_validate_filter(scancode, 0x1f7f)) { | |
251 | /* decode scancode */ | |
252 | command = (scancode->data & 0x003f) >> 0; | |
253 | commandx = (scancode->data & 0x0040) >> 6; | |
254 | system = (scancode->data & 0x1f00) >> 8; | |
255 | /* encode data */ | |
256 | data = !commandx << 12 | system << 6 | command; | |
257 | ||
258 | /* Modulate the data */ | |
259 | ret = ir_raw_gen_manchester(&e, max, &ir_rc5_timings, RC5_NBITS, | |
260 | data); | |
261 | if (ret < 0) | |
262 | return ret; | |
263 | } else if (protocols & RC_BIT_RC5X && | |
264 | !ir_rc5_validate_filter(scancode, 0x1f7f3f)) { | |
265 | /* decode scancode */ | |
266 | xdata = (scancode->data & 0x00003f) >> 0; | |
267 | command = (scancode->data & 0x003f00) >> 8; | |
268 | commandx = (scancode->data & 0x004000) >> 14; | |
269 | system = (scancode->data & 0x1f0000) >> 16; | |
270 | /* commandx and system overlap, bits must match when encoded */ | |
271 | if (commandx == (system & 0x1)) | |
272 | return -EINVAL; | |
273 | /* encode data */ | |
274 | data = 1 << 18 | system << 12 | command << 6 | xdata; | |
275 | ||
276 | /* Modulate the data */ | |
277 | ret = ir_raw_gen_manchester(&e, max, &ir_rc5x_timings[0], | |
278 | CHECK_RC5X_NBITS, | |
279 | data >> (RC5X_NBITS-CHECK_RC5X_NBITS)); | |
280 | if (ret < 0) | |
281 | return ret; | |
282 | ret = ir_raw_gen_manchester(&e, max - (e - events), | |
283 | &ir_rc5x_timings[1], | |
284 | RC5X_NBITS - CHECK_RC5X_NBITS, | |
285 | data); | |
286 | if (ret < 0) | |
287 | return ret; | |
288 | } else if (protocols & RC_BIT_RC5_SZ && | |
289 | !ir_rc5_validate_filter(scancode, 0x2fff)) { | |
290 | /* RC5-SZ scancode is raw enough for Manchester as it is */ | |
291 | ret = ir_raw_gen_manchester(&e, max, &ir_rc5_sz_timings, | |
292 | RC5_SZ_NBITS, scancode->data & 0x2fff); | |
293 | if (ret < 0) | |
294 | return ret; | |
295 | } else { | |
296 | return -EINVAL; | |
297 | } | |
298 | ||
299 | return e - events; | |
300 | } | |
301 | ||
db1423a6 | 302 | static struct ir_raw_handler rc5_handler = { |
e87b540b | 303 | .protocols = RC_BIT_RC5 | RC_BIT_RC5X | RC_BIT_RC5_SZ, |
db1423a6 | 304 | .decode = ir_rc5_decode, |
a0466f15 | 305 | .encode = ir_rc5_encode, |
db1423a6 MCC |
306 | }; |
307 | ||
308 | static int __init ir_rc5_decode_init(void) | |
309 | { | |
310 | ir_raw_handler_register(&rc5_handler); | |
311 | ||
e87b540b | 312 | printk(KERN_INFO "IR RC5(x/sz) protocol handler initialized\n"); |
db1423a6 MCC |
313 | return 0; |
314 | } | |
315 | ||
316 | static void __exit ir_rc5_decode_exit(void) | |
317 | { | |
318 | ir_raw_handler_unregister(&rc5_handler); | |
319 | } | |
320 | ||
321 | module_init(ir_rc5_decode_init); | |
322 | module_exit(ir_rc5_decode_exit); | |
323 | ||
324 | MODULE_LICENSE("GPL"); | |
e87b540b | 325 | MODULE_AUTHOR("Mauro Carvalho Chehab and Jarod Wilson"); |
db1423a6 | 326 | MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)"); |
e87b540b | 327 | MODULE_DESCRIPTION("RC5(x/sz) IR protocol decoder"); |