Commit | Line | Data |
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8d009a0c DF |
1 | /* |
2 | * Driver for Xceive XC4000 "QAM/8VSB single chip tuner" | |
3 | * | |
4 | * Copyright (c) 2007 Xceive Corporation | |
5 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> | |
6 | * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com> | |
7 | * Copyright (c) 2009 Davide Ferri <d.ferri@zero11.it> | |
341747be | 8 | * Copyright (c) 2010 Istvan Varga <istvan_v@mailbox.hu> |
8d009a0c DF |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
8d009a0c DF |
18 | * GNU General Public License for more details. |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/videodev2.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/dvb/frontend.h> | |
30 | #include <linux/i2c.h> | |
5614942b | 31 | #include <linux/mutex.h> |
11091a31 | 32 | #include <asm/unaligned.h> |
8d009a0c DF |
33 | |
34 | #include "dvb_frontend.h" | |
35 | ||
36 | #include "xc4000.h" | |
37 | #include "tuner-i2c.h" | |
11091a31 | 38 | #include "tuner-xc2028-types.h" |
8d009a0c | 39 | |
4922cec5 | 40 | static int debug; |
8d009a0c | 41 | module_param(debug, int, 0644); |
341747be | 42 | MODULE_PARM_DESC(debug, "Debugging level (0 to 2, default: 0 (off))."); |
8d009a0c DF |
43 | |
44 | static int no_poweroff; | |
45 | module_param(no_poweroff, int, 0644); | |
341747be | 46 | MODULE_PARM_DESC(no_poweroff, "Power management (1: disabled, 2: enabled, " |
47 | "0 (default): use device-specific default mode)."); | |
923137a4 IV |
48 | |
49 | static int audio_std; | |
50 | module_param(audio_std, int, 0644); | |
341747be | 51 | MODULE_PARM_DESC(audio_std, "Audio standard. XC4000 audio decoder explicitly " |
52 | "needs to know what audio standard is needed for some video standards " | |
53 | "with audio A2 or NICAM. The valid settings are a sum of:\n" | |
54 | " 1: use NICAM/B or A2/B instead of NICAM/A or A2/A\n" | |
55 | " 2: use A2 instead of NICAM or BTSC\n" | |
56 | " 4: use SECAM/K3 instead of K1\n" | |
57 | " 8: use PAL-D/K audio for SECAM-D/K\n" | |
58 | "16: use FM radio input 1 instead of input 2\n" | |
59 | "32: use mono audio (the lower three bits are ignored)"); | |
fa285bc1 IV |
60 | |
61 | static char firmware_name[30]; | |
62 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); | |
341747be | 63 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " |
64 | "default firmware name."); | |
fa285bc1 | 65 | |
8d009a0c DF |
66 | static DEFINE_MUTEX(xc4000_list_mutex); |
67 | static LIST_HEAD(hybrid_tuner_instance_list); | |
68 | ||
69 | #define dprintk(level, fmt, arg...) if (debug >= level) \ | |
70 | printk(KERN_INFO "%s: " fmt, "xc4000", ## arg) | |
71 | ||
11091a31 DH |
72 | /* struct for storing firmware table */ |
73 | struct firmware_description { | |
74 | unsigned int type; | |
75 | v4l2_std_id id; | |
76 | __u16 int_freq; | |
77 | unsigned char *ptr; | |
78 | unsigned int size; | |
79 | }; | |
80 | ||
81 | struct firmware_properties { | |
82 | unsigned int type; | |
83 | v4l2_std_id id; | |
84 | v4l2_std_id std_req; | |
85 | __u16 int_freq; | |
86 | unsigned int scode_table; | |
e3bb7c60 | 87 | int scode_nr; |
11091a31 | 88 | }; |
8d009a0c DF |
89 | |
90 | struct xc4000_priv { | |
91 | struct tuner_i2c_props i2c_props; | |
92 | struct list_head hybrid_tuner_instance_list; | |
11091a31 | 93 | struct firmware_description *firm; |
fbe4a29f | 94 | int firm_size; |
fbe4a29f | 95 | u32 if_khz; |
4c07e328 | 96 | u32 freq_hz, freq_offset; |
fbe4a29f IV |
97 | u32 bandwidth; |
98 | u8 video_standard; | |
99 | u8 rf_mode; | |
8edeb6eb | 100 | u8 default_pm; |
101 | u8 dvb_amplitude; | |
102 | u8 set_smoothedcvbs; | |
fbe4a29f | 103 | u8 ignore_i2c_write_errors; |
8edeb6eb | 104 | __u16 firm_version; |
d0962382 | 105 | struct firmware_properties cur_fw; |
fbe4a29f IV |
106 | __u16 hwmodel; |
107 | __u16 hwvers; | |
5614942b | 108 | struct mutex lock; |
8d009a0c DF |
109 | }; |
110 | ||
341747be | 111 | #define XC4000_AUDIO_STD_B 1 |
112 | #define XC4000_AUDIO_STD_A2 2 | |
113 | #define XC4000_AUDIO_STD_K3 4 | |
114 | #define XC4000_AUDIO_STD_L 8 | |
115 | #define XC4000_AUDIO_STD_INPUT1 16 | |
116 | #define XC4000_AUDIO_STD_MONO 32 | |
117 | ||
118 | #define XC4000_DEFAULT_FIRMWARE "dvb-fe-xc4000-1.4.fw" | |
da7bfa2c | 119 | #define XC4000_DEFAULT_FIRMWARE_NEW "dvb-fe-xc4000-1.4.1.fw" |
341747be | 120 | |
8d009a0c | 121 | /* Misc Defines */ |
4911085f | 122 | #define MAX_TV_STANDARD 24 |
8d009a0c | 123 | #define XC_MAX_I2C_WRITE_LENGTH 64 |
5272f6b1 | 124 | #define XC_POWERED_DOWN 0x80000000U |
8d009a0c DF |
125 | |
126 | /* Signal Types */ | |
127 | #define XC_RF_MODE_AIR 0 | |
128 | #define XC_RF_MODE_CABLE 1 | |
129 | ||
8d009a0c DF |
130 | /* Product id */ |
131 | #define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000 | |
7db98fe6 IV |
132 | #define XC_PRODUCT_ID_XC4000 0x0FA0 |
133 | #define XC_PRODUCT_ID_XC4100 0x1004 | |
8d009a0c | 134 | |
ee4c3cd6 | 135 | /* Registers (Write-only) */ |
8d009a0c DF |
136 | #define XREG_INIT 0x00 |
137 | #define XREG_VIDEO_MODE 0x01 | |
138 | #define XREG_AUDIO_MODE 0x02 | |
139 | #define XREG_RF_FREQ 0x03 | |
140 | #define XREG_D_CODE 0x04 | |
ee4c3cd6 DH |
141 | #define XREG_DIRECTSITTING_MODE 0x05 |
142 | #define XREG_SEEK_MODE 0x06 | |
143 | #define XREG_POWER_DOWN 0x08 | |
144 | #define XREG_SIGNALSOURCE 0x0A | |
30f544ec | 145 | #define XREG_SMOOTHEDCVBS 0x0E |
ee4c3cd6 | 146 | #define XREG_AMPLITUDE 0x10 |
8d009a0c | 147 | |
ee4c3cd6 | 148 | /* Registers (Read-only) */ |
8d009a0c DF |
149 | #define XREG_ADC_ENV 0x00 |
150 | #define XREG_QUALITY 0x01 | |
151 | #define XREG_FRAME_LINES 0x02 | |
152 | #define XREG_HSYNC_FREQ 0x03 | |
153 | #define XREG_LOCK 0x04 | |
154 | #define XREG_FREQ_ERROR 0x05 | |
155 | #define XREG_SNR 0x06 | |
156 | #define XREG_VERSION 0x07 | |
157 | #define XREG_PRODUCT_ID 0x08 | |
8a538a88 MS |
158 | #define XREG_SIGNAL_LEVEL 0x0A |
159 | #define XREG_NOISE_LEVEL 0x0B | |
8d009a0c DF |
160 | |
161 | /* | |
162 | Basic firmware description. This will remain with | |
163 | the driver for documentation purposes. | |
164 | ||
165 | This represents an I2C firmware file encoded as a | |
166 | string of unsigned char. Format is as follows: | |
167 | ||
168 | char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB | |
169 | char[1 ]=len0_LSB -> length of first write transaction | |
170 | char[2 ]=data0 -> first byte to be sent | |
171 | char[3 ]=data1 | |
172 | char[4 ]=data2 | |
173 | char[ ]=... | |
174 | char[M ]=dataN -> last byte to be sent | |
175 | char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB | |
176 | char[M+2]=len1_LSB -> length of second write transaction | |
177 | char[M+3]=data0 | |
178 | char[M+4]=data1 | |
179 | ... | |
180 | etc. | |
181 | ||
182 | The [len] value should be interpreted as follows: | |
183 | ||
184 | len= len_MSB _ len_LSB | |
185 | len=1111_1111_1111_1111 : End of I2C_SEQUENCE | |
186 | len=0000_0000_0000_0000 : Reset command: Do hardware reset | |
187 | len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767) | |
188 | len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms | |
189 | ||
190 | For the RESET and WAIT commands, the two following bytes will contain | |
191 | immediately the length of the following transaction. | |
8d009a0c | 192 | */ |
fbe4a29f | 193 | |
8d009a0c | 194 | struct XC_TV_STANDARD { |
fbe4a29f | 195 | const char *Name; |
341747be | 196 | u16 audio_mode; |
197 | u16 video_mode; | |
4911085f | 198 | u16 int_freq; |
8d009a0c DF |
199 | }; |
200 | ||
201 | /* Tuner standards */ | |
ed23db32 DH |
202 | #define XC4000_MN_NTSC_PAL_BTSC 0 |
203 | #define XC4000_MN_NTSC_PAL_A2 1 | |
204 | #define XC4000_MN_NTSC_PAL_EIAJ 2 | |
205 | #define XC4000_MN_NTSC_PAL_Mono 3 | |
206 | #define XC4000_BG_PAL_A2 4 | |
207 | #define XC4000_BG_PAL_NICAM 5 | |
208 | #define XC4000_BG_PAL_MONO 6 | |
209 | #define XC4000_I_PAL_NICAM 7 | |
210 | #define XC4000_I_PAL_NICAM_MONO 8 | |
211 | #define XC4000_DK_PAL_A2 9 | |
212 | #define XC4000_DK_PAL_NICAM 10 | |
213 | #define XC4000_DK_PAL_MONO 11 | |
214 | #define XC4000_DK_SECAM_A2DK1 12 | |
e3bb7c60 MCC |
215 | #define XC4000_DK_SECAM_A2LDK3 13 |
216 | #define XC4000_DK_SECAM_A2MONO 14 | |
4911085f IV |
217 | #define XC4000_DK_SECAM_NICAM 15 |
218 | #define XC4000_L_SECAM_NICAM 16 | |
219 | #define XC4000_LC_SECAM_NICAM 17 | |
220 | #define XC4000_DTV6 18 | |
221 | #define XC4000_DTV8 19 | |
222 | #define XC4000_DTV7_8 20 | |
223 | #define XC4000_DTV7 21 | |
224 | #define XC4000_FM_Radio_INPUT2 22 | |
225 | #define XC4000_FM_Radio_INPUT1 23 | |
8d009a0c | 226 | |
341747be | 227 | static struct XC_TV_STANDARD xc4000_standard[MAX_TV_STANDARD] = { |
4911085f IV |
228 | {"M/N-NTSC/PAL-BTSC", 0x0000, 0x80A0, 4500}, |
229 | {"M/N-NTSC/PAL-A2", 0x0000, 0x80A0, 4600}, | |
230 | {"M/N-NTSC/PAL-EIAJ", 0x0040, 0x80A0, 4500}, | |
231 | {"M/N-NTSC/PAL-Mono", 0x0078, 0x80A0, 4500}, | |
232 | {"B/G-PAL-A2", 0x0000, 0x8159, 5640}, | |
233 | {"B/G-PAL-NICAM", 0x0004, 0x8159, 5740}, | |
234 | {"B/G-PAL-MONO", 0x0078, 0x8159, 5500}, | |
235 | {"I-PAL-NICAM", 0x0080, 0x8049, 6240}, | |
236 | {"I-PAL-NICAM-MONO", 0x0078, 0x8049, 6000}, | |
237 | {"D/K-PAL-A2", 0x0000, 0x8049, 6380}, | |
238 | {"D/K-PAL-NICAM", 0x0080, 0x8049, 6200}, | |
239 | {"D/K-PAL-MONO", 0x0078, 0x8049, 6500}, | |
240 | {"D/K-SECAM-A2 DK1", 0x0000, 0x8049, 6340}, | |
241 | {"D/K-SECAM-A2 L/DK3", 0x0000, 0x8049, 6000}, | |
242 | {"D/K-SECAM-A2 MONO", 0x0078, 0x8049, 6500}, | |
243 | {"D/K-SECAM-NICAM", 0x0080, 0x8049, 6200}, | |
244 | {"L-SECAM-NICAM", 0x8080, 0x0009, 6200}, | |
245 | {"L'-SECAM-NICAM", 0x8080, 0x4009, 6200}, | |
246 | {"DTV6", 0x00C0, 0x8002, 0}, | |
247 | {"DTV8", 0x00C0, 0x800B, 0}, | |
248 | {"DTV7/8", 0x00C0, 0x801B, 0}, | |
249 | {"DTV7", 0x00C0, 0x8007, 0}, | |
941830c9 MCC |
250 | {"FM Radio-INPUT2", 0x0008, 0x9800, 10700}, |
251 | {"FM Radio-INPUT1", 0x0008, 0x9000, 10700} | |
8d009a0c DF |
252 | }; |
253 | ||
8d009a0c | 254 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val); |
341747be | 255 | static int xc4000_tuner_reset(struct dvb_frontend *fe); |
f4312e2f | 256 | static void xc_debug_dump(struct xc4000_priv *priv); |
8d009a0c DF |
257 | |
258 | static int xc_send_i2c_data(struct xc4000_priv *priv, u8 *buf, int len) | |
259 | { | |
260 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, | |
261 | .flags = 0, .buf = buf, .len = len }; | |
8d009a0c | 262 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { |
799ed11a DH |
263 | if (priv->ignore_i2c_write_errors == 0) { |
264 | printk(KERN_ERR "xc4000: I2C write failed (len=%i)\n", | |
265 | len); | |
266 | if (len == 4) { | |
c6480ccc | 267 | printk(KERN_ERR "bytes %*ph\n", 4, buf); |
799ed11a | 268 | } |
341747be | 269 | return -EREMOTEIO; |
799ed11a | 270 | } |
8d009a0c | 271 | } |
341747be | 272 | return 0; |
8d009a0c DF |
273 | } |
274 | ||
341747be | 275 | static int xc4000_tuner_reset(struct dvb_frontend *fe) |
8d009a0c DF |
276 | { |
277 | struct xc4000_priv *priv = fe->tuner_priv; | |
278 | int ret; | |
279 | ||
280 | dprintk(1, "%s()\n", __func__); | |
281 | ||
282 | if (fe->callback) { | |
283 | ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
284 | fe->dvb->priv : | |
285 | priv->i2c_props.adap->algo_data, | |
286 | DVB_FRONTEND_COMPONENT_TUNER, | |
287 | XC4000_TUNER_RESET, 0); | |
288 | if (ret) { | |
289 | printk(KERN_ERR "xc4000: reset failed\n"); | |
341747be | 290 | return -EREMOTEIO; |
8d009a0c DF |
291 | } |
292 | } else { | |
341747be | 293 | printk(KERN_ERR "xc4000: no tuner reset callback function, " |
294 | "fatal\n"); | |
295 | return -EINVAL; | |
8d009a0c | 296 | } |
341747be | 297 | return 0; |
8d009a0c DF |
298 | } |
299 | ||
300 | static int xc_write_reg(struct xc4000_priv *priv, u16 regAddr, u16 i2cData) | |
301 | { | |
302 | u8 buf[4]; | |
8d009a0c DF |
303 | int result; |
304 | ||
305 | buf[0] = (regAddr >> 8) & 0xFF; | |
306 | buf[1] = regAddr & 0xFF; | |
307 | buf[2] = (i2cData >> 8) & 0xFF; | |
308 | buf[3] = i2cData & 0xFF; | |
309 | result = xc_send_i2c_data(priv, buf, 4); | |
8d009a0c DF |
310 | |
311 | return result; | |
312 | } | |
313 | ||
314 | static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence) | |
315 | { | |
316 | struct xc4000_priv *priv = fe->tuner_priv; | |
317 | ||
318 | int i, nbytes_to_send, result; | |
319 | unsigned int len, pos, index; | |
320 | u8 buf[XC_MAX_I2C_WRITE_LENGTH]; | |
321 | ||
322 | index = 0; | |
323 | while ((i2c_sequence[index] != 0xFF) || | |
324 | (i2c_sequence[index + 1] != 0xFF)) { | |
325 | len = i2c_sequence[index] * 256 + i2c_sequence[index+1]; | |
326 | if (len == 0x0000) { | |
327 | /* RESET command */ | |
341747be | 328 | /* NOTE: this is ignored, as the reset callback was */ |
329 | /* already called by check_firmware() */ | |
8d009a0c | 330 | index += 2; |
8d009a0c DF |
331 | } else if (len & 0x8000) { |
332 | /* WAIT command */ | |
341747be | 333 | msleep(len & 0x7FFF); |
8d009a0c DF |
334 | index += 2; |
335 | } else { | |
336 | /* Send i2c data whilst ensuring individual transactions | |
337 | * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes. | |
338 | */ | |
339 | index += 2; | |
340 | buf[0] = i2c_sequence[index]; | |
341 | buf[1] = i2c_sequence[index + 1]; | |
342 | pos = 2; | |
343 | while (pos < len) { | |
344 | if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) | |
345 | nbytes_to_send = | |
346 | XC_MAX_I2C_WRITE_LENGTH; | |
347 | else | |
348 | nbytes_to_send = (len - pos + 2); | |
349 | for (i = 2; i < nbytes_to_send; i++) { | |
350 | buf[i] = i2c_sequence[index + pos + | |
351 | i - 2]; | |
352 | } | |
353 | result = xc_send_i2c_data(priv, buf, | |
354 | nbytes_to_send); | |
355 | ||
341747be | 356 | if (result != 0) |
8d009a0c DF |
357 | return result; |
358 | ||
359 | pos += nbytes_to_send - 2; | |
360 | } | |
361 | index += len; | |
362 | } | |
363 | } | |
341747be | 364 | return 0; |
8d009a0c DF |
365 | } |
366 | ||
341747be | 367 | static int xc_set_tv_standard(struct xc4000_priv *priv, |
368 | u16 video_mode, u16 audio_mode) | |
8d009a0c DF |
369 | { |
370 | int ret; | |
341747be | 371 | dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode); |
8d009a0c DF |
372 | dprintk(1, "%s() Standard = %s\n", |
373 | __func__, | |
341747be | 374 | xc4000_standard[priv->video_standard].Name); |
8d009a0c | 375 | |
799ed11a DH |
376 | /* Don't complain when the request fails because of i2c stretching */ |
377 | priv->ignore_i2c_write_errors = 1; | |
378 | ||
341747be | 379 | ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode); |
380 | if (ret == 0) | |
381 | ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode); | |
8d009a0c | 382 | |
799ed11a DH |
383 | priv->ignore_i2c_write_errors = 0; |
384 | ||
8d009a0c DF |
385 | return ret; |
386 | } | |
387 | ||
341747be | 388 | static int xc_set_signal_source(struct xc4000_priv *priv, u16 rf_mode) |
8d009a0c DF |
389 | { |
390 | dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode, | |
391 | rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE"); | |
392 | ||
393 | if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) { | |
394 | rf_mode = XC_RF_MODE_CABLE; | |
395 | printk(KERN_ERR | |
396 | "%s(), Invalid mode, defaulting to CABLE", | |
397 | __func__); | |
398 | } | |
399 | return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode); | |
400 | } | |
401 | ||
402 | static const struct dvb_tuner_ops xc4000_tuner_ops; | |
403 | ||
341747be | 404 | static int xc_set_rf_frequency(struct xc4000_priv *priv, u32 freq_hz) |
8d009a0c DF |
405 | { |
406 | u16 freq_code; | |
407 | ||
408 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | |
409 | ||
410 | if ((freq_hz > xc4000_tuner_ops.info.frequency_max) || | |
341747be | 411 | (freq_hz < xc4000_tuner_ops.info.frequency_min)) |
412 | return -EINVAL; | |
8d009a0c DF |
413 | |
414 | freq_code = (u16)(freq_hz / 15625); | |
415 | ||
416 | /* WAS: Starting in firmware version 1.1.44, Xceive recommends using the | |
417 | FINERFREQ for all normal tuning (the doc indicates reg 0x03 should | |
418 | only be used for fast scanning for channel lock) */ | |
341747be | 419 | /* WAS: XREG_FINERFREQ */ |
420 | return xc_write_reg(priv, XREG_RF_FREQ, freq_code); | |
8d009a0c DF |
421 | } |
422 | ||
341747be | 423 | static int xc_get_adc_envelope(struct xc4000_priv *priv, u16 *adc_envelope) |
8d009a0c DF |
424 | { |
425 | return xc4000_readreg(priv, XREG_ADC_ENV, adc_envelope); | |
426 | } | |
427 | ||
428 | static int xc_get_frequency_error(struct xc4000_priv *priv, u32 *freq_error_hz) | |
429 | { | |
430 | int result; | |
431 | u16 regData; | |
432 | u32 tmp; | |
433 | ||
434 | result = xc4000_readreg(priv, XREG_FREQ_ERROR, ®Data); | |
341747be | 435 | if (result != 0) |
8d009a0c DF |
436 | return result; |
437 | ||
1368ceb2 IV |
438 | tmp = (u32)regData & 0xFFFFU; |
439 | tmp = (tmp < 0x8000U ? tmp : 0x10000U - tmp); | |
440 | (*freq_error_hz) = tmp * 15625; | |
8d009a0c DF |
441 | return result; |
442 | } | |
443 | ||
444 | static int xc_get_lock_status(struct xc4000_priv *priv, u16 *lock_status) | |
445 | { | |
446 | return xc4000_readreg(priv, XREG_LOCK, lock_status); | |
447 | } | |
448 | ||
449 | static int xc_get_version(struct xc4000_priv *priv, | |
450 | u8 *hw_majorversion, u8 *hw_minorversion, | |
451 | u8 *fw_majorversion, u8 *fw_minorversion) | |
452 | { | |
453 | u16 data; | |
454 | int result; | |
455 | ||
456 | result = xc4000_readreg(priv, XREG_VERSION, &data); | |
341747be | 457 | if (result != 0) |
8d009a0c DF |
458 | return result; |
459 | ||
460 | (*hw_majorversion) = (data >> 12) & 0x0F; | |
461 | (*hw_minorversion) = (data >> 8) & 0x0F; | |
462 | (*fw_majorversion) = (data >> 4) & 0x0F; | |
463 | (*fw_minorversion) = data & 0x0F; | |
464 | ||
465 | return 0; | |
466 | } | |
467 | ||
8d009a0c DF |
468 | static int xc_get_hsync_freq(struct xc4000_priv *priv, u32 *hsync_freq_hz) |
469 | { | |
470 | u16 regData; | |
471 | int result; | |
472 | ||
473 | result = xc4000_readreg(priv, XREG_HSYNC_FREQ, ®Data); | |
341747be | 474 | if (result != 0) |
8d009a0c DF |
475 | return result; |
476 | ||
477 | (*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100; | |
478 | return result; | |
479 | } | |
480 | ||
481 | static int xc_get_frame_lines(struct xc4000_priv *priv, u16 *frame_lines) | |
482 | { | |
483 | return xc4000_readreg(priv, XREG_FRAME_LINES, frame_lines); | |
484 | } | |
485 | ||
486 | static int xc_get_quality(struct xc4000_priv *priv, u16 *quality) | |
487 | { | |
488 | return xc4000_readreg(priv, XREG_QUALITY, quality); | |
489 | } | |
490 | ||
8a538a88 MS |
491 | static int xc_get_signal_level(struct xc4000_priv *priv, u16 *signal) |
492 | { | |
493 | return xc4000_readreg(priv, XREG_SIGNAL_LEVEL, signal); | |
494 | } | |
495 | ||
496 | static int xc_get_noise_level(struct xc4000_priv *priv, u16 *noise) | |
497 | { | |
498 | return xc4000_readreg(priv, XREG_NOISE_LEVEL, noise); | |
499 | } | |
500 | ||
341747be | 501 | static u16 xc_wait_for_lock(struct xc4000_priv *priv) |
8d009a0c | 502 | { |
341747be | 503 | u16 lock_state = 0; |
504 | int watchdog_count = 40; | |
505 | ||
506 | while ((lock_state == 0) && (watchdog_count > 0)) { | |
507 | xc_get_lock_status(priv, &lock_state); | |
508 | if (lock_state != 1) { | |
509 | msleep(5); | |
510 | watchdog_count--; | |
8d009a0c DF |
511 | } |
512 | } | |
341747be | 513 | return lock_state; |
8d009a0c DF |
514 | } |
515 | ||
e75873c1 | 516 | static int xc_tune_channel(struct xc4000_priv *priv, u32 freq_hz) |
8d009a0c | 517 | { |
e75873c1 IV |
518 | int found = 1; |
519 | int result; | |
8d009a0c DF |
520 | |
521 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | |
522 | ||
799ed11a DH |
523 | /* Don't complain when the request fails because of i2c stretching */ |
524 | priv->ignore_i2c_write_errors = 1; | |
341747be | 525 | result = xc_set_rf_frequency(priv, freq_hz); |
799ed11a DH |
526 | priv->ignore_i2c_write_errors = 0; |
527 | ||
341747be | 528 | if (result != 0) |
8d009a0c DF |
529 | return 0; |
530 | ||
e75873c1 IV |
531 | /* wait for lock only in analog TV mode */ |
532 | if ((priv->cur_fw.type & (FM | DTV6 | DTV7 | DTV78 | DTV8)) == 0) { | |
341747be | 533 | if (xc_wait_for_lock(priv) != 1) |
e75873c1 | 534 | found = 0; |
8d009a0c DF |
535 | } |
536 | ||
f4312e2f IV |
537 | /* Wait for stats to stabilize. |
538 | * Frame Lines needs two frame times after initial lock | |
539 | * before it is valid. | |
540 | */ | |
341747be | 541 | msleep(debug ? 100 : 10); |
f4312e2f IV |
542 | |
543 | if (debug) | |
544 | xc_debug_dump(priv); | |
545 | ||
8d009a0c DF |
546 | return found; |
547 | } | |
548 | ||
549 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val) | |
550 | { | |
551 | u8 buf[2] = { reg >> 8, reg & 0xff }; | |
552 | u8 bval[2] = { 0, 0 }; | |
553 | struct i2c_msg msg[2] = { | |
554 | { .addr = priv->i2c_props.addr, | |
555 | .flags = 0, .buf = &buf[0], .len = 2 }, | |
556 | { .addr = priv->i2c_props.addr, | |
557 | .flags = I2C_M_RD, .buf = &bval[0], .len = 2 }, | |
558 | }; | |
559 | ||
560 | if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) { | |
941830c9 | 561 | printk(KERN_ERR "xc4000: I2C read failed\n"); |
8d009a0c DF |
562 | return -EREMOTEIO; |
563 | } | |
564 | ||
565 | *val = (bval[0] << 8) | bval[1]; | |
341747be | 566 | return 0; |
8d009a0c DF |
567 | } |
568 | ||
e3bb7c60 | 569 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
d0962382 DH |
570 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
571 | { | |
97e0e1e8 | 572 | if (type & BASE) |
941830c9 | 573 | printk(KERN_CONT "BASE "); |
97e0e1e8 | 574 | if (type & INIT1) |
941830c9 | 575 | printk(KERN_CONT "INIT1 "); |
97e0e1e8 | 576 | if (type & F8MHZ) |
941830c9 | 577 | printk(KERN_CONT "F8MHZ "); |
97e0e1e8 | 578 | if (type & MTS) |
941830c9 | 579 | printk(KERN_CONT "MTS "); |
97e0e1e8 | 580 | if (type & D2620) |
941830c9 | 581 | printk(KERN_CONT "D2620 "); |
97e0e1e8 | 582 | if (type & D2633) |
941830c9 | 583 | printk(KERN_CONT "D2633 "); |
97e0e1e8 | 584 | if (type & DTV6) |
941830c9 | 585 | printk(KERN_CONT "DTV6 "); |
97e0e1e8 | 586 | if (type & QAM) |
941830c9 | 587 | printk(KERN_CONT "QAM "); |
97e0e1e8 | 588 | if (type & DTV7) |
941830c9 | 589 | printk(KERN_CONT "DTV7 "); |
97e0e1e8 | 590 | if (type & DTV78) |
941830c9 | 591 | printk(KERN_CONT "DTV78 "); |
97e0e1e8 | 592 | if (type & DTV8) |
941830c9 | 593 | printk(KERN_CONT "DTV8 "); |
97e0e1e8 | 594 | if (type & FM) |
941830c9 | 595 | printk(KERN_CONT "FM "); |
97e0e1e8 | 596 | if (type & INPUT1) |
941830c9 | 597 | printk(KERN_CONT "INPUT1 "); |
97e0e1e8 | 598 | if (type & LCD) |
941830c9 | 599 | printk(KERN_CONT "LCD "); |
97e0e1e8 | 600 | if (type & NOGD) |
941830c9 | 601 | printk(KERN_CONT "NOGD "); |
97e0e1e8 | 602 | if (type & MONO) |
941830c9 | 603 | printk(KERN_CONT "MONO "); |
97e0e1e8 | 604 | if (type & ATSC) |
941830c9 | 605 | printk(KERN_CONT "ATSC "); |
97e0e1e8 | 606 | if (type & IF) |
941830c9 | 607 | printk(KERN_CONT "IF "); |
97e0e1e8 | 608 | if (type & LG60) |
941830c9 | 609 | printk(KERN_CONT "LG60 "); |
97e0e1e8 | 610 | if (type & ATI638) |
941830c9 | 611 | printk(KERN_CONT "ATI638 "); |
97e0e1e8 | 612 | if (type & OREN538) |
941830c9 | 613 | printk(KERN_CONT "OREN538 "); |
97e0e1e8 | 614 | if (type & OREN36) |
941830c9 | 615 | printk(KERN_CONT "OREN36 "); |
97e0e1e8 | 616 | if (type & TOYOTA388) |
941830c9 | 617 | printk(KERN_CONT "TOYOTA388 "); |
97e0e1e8 | 618 | if (type & TOYOTA794) |
941830c9 | 619 | printk(KERN_CONT "TOYOTA794 "); |
97e0e1e8 | 620 | if (type & DIBCOM52) |
941830c9 | 621 | printk(KERN_CONT "DIBCOM52 "); |
97e0e1e8 | 622 | if (type & ZARLINK456) |
941830c9 | 623 | printk(KERN_CONT "ZARLINK456 "); |
97e0e1e8 | 624 | if (type & CHINA) |
941830c9 | 625 | printk(KERN_CONT "CHINA "); |
97e0e1e8 | 626 | if (type & F6MHZ) |
941830c9 | 627 | printk(KERN_CONT "F6MHZ "); |
97e0e1e8 | 628 | if (type & INPUT2) |
941830c9 | 629 | printk(KERN_CONT "INPUT2 "); |
97e0e1e8 | 630 | if (type & SCODE) |
941830c9 | 631 | printk(KERN_CONT "SCODE "); |
97e0e1e8 | 632 | if (type & HAS_IF) |
941830c9 | 633 | printk(KERN_CONT "HAS_IF_%d ", int_freq); |
d0962382 DH |
634 | } |
635 | ||
11091a31 DH |
636 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
637 | v4l2_std_id *id) | |
638 | { | |
639 | struct xc4000_priv *priv = fe->tuner_priv; | |
3db95704 IV |
640 | int i, best_i = -1; |
641 | unsigned int best_nr_diffs = 255U; | |
11091a31 | 642 | |
11091a31 | 643 | if (!priv->firm) { |
341747be | 644 | printk(KERN_ERR "Error! firmware not loaded\n"); |
11091a31 DH |
645 | return -EINVAL; |
646 | } | |
647 | ||
648 | if (((type & ~SCODE) == 0) && (*id == 0)) | |
649 | *id = V4L2_STD_PAL; | |
650 | ||
11091a31 DH |
651 | /* Seek for generic video standard match */ |
652 | for (i = 0; i < priv->firm_size; i++) { | |
3db95704 IV |
653 | v4l2_std_id id_diff_mask = |
654 | (priv->firm[i].id ^ (*id)) & (*id); | |
655 | unsigned int type_diff_mask = | |
656 | (priv->firm[i].type ^ type) | |
657 | & (BASE_TYPES | DTV_TYPES | LCD | NOGD | MONO | SCODE); | |
658 | unsigned int nr_diffs; | |
659 | ||
660 | if (type_diff_mask | |
661 | & (BASE | INIT1 | FM | DTV6 | DTV7 | DTV78 | DTV8 | SCODE)) | |
11091a31 DH |
662 | continue; |
663 | ||
3db95704 IV |
664 | nr_diffs = hweight64(id_diff_mask) + hweight32(type_diff_mask); |
665 | if (!nr_diffs) /* Supports all the requested standards */ | |
666 | goto found; | |
11091a31 | 667 | |
3db95704 IV |
668 | if (nr_diffs < best_nr_diffs) { |
669 | best_nr_diffs = nr_diffs; | |
11091a31 DH |
670 | best_i = i; |
671 | } | |
672 | } | |
673 | ||
3db95704 IV |
674 | /* FIXME: Would make sense to seek for type "hint" match ? */ |
675 | if (best_i < 0) { | |
676 | i = -ENOENT; | |
677 | goto ret; | |
678 | } | |
679 | ||
680 | if (best_nr_diffs > 0U) { | |
941830c9 MCC |
681 | printk(KERN_WARNING |
682 | "Selecting best matching firmware (%u bits differ) for " | |
341747be | 683 | "type=(%x), id %016llx:\n", |
684 | best_nr_diffs, type, (unsigned long long)*id); | |
11091a31 | 685 | i = best_i; |
11091a31 DH |
686 | } |
687 | ||
11091a31 DH |
688 | found: |
689 | *id = priv->firm[i].id; | |
690 | ||
691 | ret: | |
11091a31 | 692 | if (debug) { |
941830c9 | 693 | printk(KERN_DEBUG "%s firmware for type=", |
341747be | 694 | (i < 0) ? "Can't find" : "Found"); |
d0962382 | 695 | dump_firm_type(type); |
941830c9 | 696 | printk(KERN_DEBUG "(%x), id %016llx.\n", type, (unsigned long long)*id); |
11091a31 DH |
697 | } |
698 | return i; | |
699 | } | |
700 | ||
701 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, | |
702 | v4l2_std_id *id) | |
703 | { | |
704 | struct xc4000_priv *priv = fe->tuner_priv; | |
705 | int pos, rc; | |
31f880e2 | 706 | unsigned char *p; |
11091a31 | 707 | |
11091a31 DH |
708 | pos = seek_firmware(fe, type, id); |
709 | if (pos < 0) | |
710 | return pos; | |
711 | ||
11091a31 | 712 | p = priv->firm[pos].ptr; |
11091a31 | 713 | |
799ed11a DH |
714 | /* Don't complain when the request fails because of i2c stretching */ |
715 | priv->ignore_i2c_write_errors = 1; | |
716 | ||
31f880e2 | 717 | rc = xc_load_i2c_sequence(fe, p); |
11091a31 | 718 | |
799ed11a DH |
719 | priv->ignore_i2c_write_errors = 0; |
720 | ||
31f880e2 | 721 | return rc; |
11091a31 DH |
722 | } |
723 | ||
8d009a0c DF |
724 | static int xc4000_fwupload(struct dvb_frontend *fe) |
725 | { | |
726 | struct xc4000_priv *priv = fe->tuner_priv; | |
11091a31 DH |
727 | const struct firmware *fw = NULL; |
728 | const unsigned char *p, *endp; | |
729 | int rc = 0; | |
730 | int n, n_array; | |
731 | char name[33]; | |
fbe4a29f | 732 | const char *fname; |
11091a31 | 733 | |
da7bfa2c | 734 | if (firmware_name[0] != '\0') { |
fa285bc1 | 735 | fname = firmware_name; |
11091a31 | 736 | |
da7bfa2c MCC |
737 | dprintk(1, "Reading custom firmware %s\n", fname); |
738 | rc = request_firmware(&fw, fname, | |
739 | priv->i2c_props.adap->dev.parent); | |
740 | } else { | |
741 | fname = XC4000_DEFAULT_FIRMWARE_NEW; | |
742 | dprintk(1, "Trying to read firmware %s\n", fname); | |
743 | rc = request_firmware(&fw, fname, | |
744 | priv->i2c_props.adap->dev.parent); | |
745 | if (rc == -ENOENT) { | |
746 | fname = XC4000_DEFAULT_FIRMWARE; | |
747 | dprintk(1, "Trying to read firmware %s\n", fname); | |
748 | rc = request_firmware(&fw, fname, | |
749 | priv->i2c_props.adap->dev.parent); | |
750 | } | |
751 | } | |
752 | ||
11091a31 DH |
753 | if (rc < 0) { |
754 | if (rc == -ENOENT) | |
941830c9 | 755 | printk(KERN_ERR "Error: firmware %s not found.\n", fname); |
11091a31 | 756 | else |
941830c9 | 757 | printk(KERN_ERR "Error %d while requesting firmware %s\n", |
341747be | 758 | rc, fname); |
8d009a0c | 759 | |
11091a31 DH |
760 | return rc; |
761 | } | |
da7bfa2c MCC |
762 | dprintk(1, "Loading Firmware: %s\n", fname); |
763 | ||
11091a31 DH |
764 | p = fw->data; |
765 | endp = p + fw->size; | |
8d009a0c | 766 | |
11091a31 | 767 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
941830c9 MCC |
768 | printk(KERN_ERR "Error: firmware file %s has invalid size!\n", |
769 | fname); | |
11091a31 | 770 | goto corrupt; |
8d009a0c DF |
771 | } |
772 | ||
11091a31 | 773 | memcpy(name, p, sizeof(name) - 1); |
341747be | 774 | name[sizeof(name) - 1] = '\0'; |
11091a31 DH |
775 | p += sizeof(name) - 1; |
776 | ||
777 | priv->firm_version = get_unaligned_le16(p); | |
778 | p += 2; | |
779 | ||
780 | n_array = get_unaligned_le16(p); | |
781 | p += 2; | |
782 | ||
b6cdb5be DH |
783 | dprintk(1, "Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
784 | n_array, fname, name, | |
785 | priv->firm_version >> 8, priv->firm_version & 0xff); | |
11091a31 | 786 | |
1b7acf0c | 787 | priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL); |
11091a31 | 788 | if (priv->firm == NULL) { |
941830c9 | 789 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); |
11091a31 | 790 | rc = -ENOMEM; |
941830c9 | 791 | goto done; |
11091a31 DH |
792 | } |
793 | priv->firm_size = n_array; | |
794 | ||
795 | n = -1; | |
796 | while (p < endp) { | |
797 | __u32 type, size; | |
798 | v4l2_std_id id; | |
799 | __u16 int_freq = 0; | |
800 | ||
801 | n++; | |
802 | if (n >= n_array) { | |
941830c9 | 803 | printk(KERN_ERR "More firmware images in file than " |
fbe4a29f | 804 | "were expected!\n"); |
11091a31 DH |
805 | goto corrupt; |
806 | } | |
807 | ||
808 | /* Checks if there's enough bytes to read */ | |
809 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) | |
810 | goto header; | |
811 | ||
812 | type = get_unaligned_le32(p); | |
813 | p += sizeof(type); | |
814 | ||
815 | id = get_unaligned_le64(p); | |
816 | p += sizeof(id); | |
817 | ||
818 | if (type & HAS_IF) { | |
819 | int_freq = get_unaligned_le16(p); | |
820 | p += sizeof(int_freq); | |
821 | if (endp - p < sizeof(size)) | |
822 | goto header; | |
823 | } | |
824 | ||
825 | size = get_unaligned_le32(p); | |
826 | p += sizeof(size); | |
827 | ||
828 | if (!size || size > endp - p) { | |
941830c9 | 829 | printk(KERN_ERR "Firmware type (%x), id %llx is corrupted (size=%d, expected %d)\n", |
11091a31 DH |
830 | type, (unsigned long long)id, |
831 | (unsigned)(endp - p), size); | |
832 | goto corrupt; | |
833 | } | |
834 | ||
835 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); | |
836 | if (priv->firm[n].ptr == NULL) { | |
941830c9 | 837 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); |
11091a31 | 838 | rc = -ENOMEM; |
941830c9 | 839 | goto done; |
11091a31 | 840 | } |
d0962382 | 841 | |
11091a31 | 842 | if (debug) { |
941830c9 | 843 | printk(KERN_DEBUG "Reading firmware type "); |
d0962382 | 844 | dump_firm_type_and_int_freq(type, int_freq); |
941830c9 | 845 | printk(KERN_DEBUG "(%x), id %llx, size=%d.\n", |
11091a31 DH |
846 | type, (unsigned long long)id, size); |
847 | } | |
848 | ||
849 | memcpy(priv->firm[n].ptr, p, size); | |
850 | priv->firm[n].type = type; | |
851 | priv->firm[n].id = id; | |
852 | priv->firm[n].size = size; | |
853 | priv->firm[n].int_freq = int_freq; | |
854 | ||
855 | p += size; | |
8d009a0c DF |
856 | } |
857 | ||
11091a31 | 858 | if (n + 1 != priv->firm_size) { |
941830c9 | 859 | printk(KERN_ERR "Firmware file is incomplete!\n"); |
11091a31 DH |
860 | goto corrupt; |
861 | } | |
862 | ||
863 | goto done; | |
864 | ||
865 | header: | |
941830c9 | 866 | printk(KERN_ERR "Firmware header is incomplete!\n"); |
11091a31 DH |
867 | corrupt: |
868 | rc = -EINVAL; | |
941830c9 | 869 | printk(KERN_ERR "Error: firmware file is corrupted!\n"); |
11091a31 DH |
870 | |
871 | done: | |
8d009a0c | 872 | release_firmware(fw); |
11091a31 | 873 | if (rc == 0) |
b6cdb5be | 874 | dprintk(1, "Firmware files loaded.\n"); |
11091a31 DH |
875 | |
876 | return rc; | |
8d009a0c DF |
877 | } |
878 | ||
d0962382 DH |
879 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
880 | v4l2_std_id *id, __u16 int_freq, int scode) | |
881 | { | |
882 | struct xc4000_priv *priv = fe->tuner_priv; | |
ffce6266 IV |
883 | int pos, rc; |
884 | unsigned char *p; | |
885 | u8 scode_buf[13]; | |
886 | u8 indirect_mode[5]; | |
d0962382 | 887 | |
fe830364 | 888 | dprintk(1, "%s called int_freq=%d\n", __func__, int_freq); |
d0962382 DH |
889 | |
890 | if (!int_freq) { | |
891 | pos = seek_firmware(fe, type, id); | |
892 | if (pos < 0) | |
893 | return pos; | |
894 | } else { | |
895 | for (pos = 0; pos < priv->firm_size; pos++) { | |
896 | if ((priv->firm[pos].int_freq == int_freq) && | |
897 | (priv->firm[pos].type & HAS_IF)) | |
898 | break; | |
899 | } | |
900 | if (pos == priv->firm_size) | |
901 | return -ENOENT; | |
902 | } | |
903 | ||
904 | p = priv->firm[pos].ptr; | |
905 | ||
ffce6266 IV |
906 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
907 | return -EINVAL; | |
908 | p += 12 * scode; | |
d0962382 | 909 | |
941830c9 MCC |
910 | if (debug) { |
911 | tuner_info("Loading SCODE for type="); | |
912 | dump_firm_type_and_int_freq(priv->firm[pos].type, | |
913 | priv->firm[pos].int_freq); | |
914 | printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type, | |
915 | (unsigned long long)*id); | |
916 | } | |
d0962382 | 917 | |
ee4c3cd6 DH |
918 | scode_buf[0] = 0x00; |
919 | memcpy(&scode_buf[1], p, 12); | |
d0962382 DH |
920 | |
921 | /* Enter direct-mode */ | |
ee4c3cd6 DH |
922 | rc = xc_write_reg(priv, XREG_DIRECTSITTING_MODE, 0); |
923 | if (rc < 0) { | |
941830c9 | 924 | printk(KERN_ERR "failed to put device into direct mode!\n"); |
d0962382 | 925 | return -EIO; |
ee4c3cd6 | 926 | } |
d0962382 | 927 | |
ee4c3cd6 | 928 | rc = xc_send_i2c_data(priv, scode_buf, 13); |
341747be | 929 | if (rc != 0) { |
ee4c3cd6 DH |
930 | /* Even if the send failed, make sure we set back to indirect |
931 | mode */ | |
941830c9 | 932 | printk(KERN_ERR "Failed to set scode %d\n", rc); |
ee4c3cd6 | 933 | } |
d0962382 DH |
934 | |
935 | /* Switch back to indirect-mode */ | |
936 | memset(indirect_mode, 0, sizeof(indirect_mode)); | |
937 | indirect_mode[4] = 0x88; | |
ee4c3cd6 DH |
938 | xc_send_i2c_data(priv, indirect_mode, sizeof(indirect_mode)); |
939 | msleep(10); | |
d0962382 DH |
940 | |
941 | return 0; | |
942 | } | |
943 | ||
944 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, | |
945 | v4l2_std_id std, __u16 int_freq) | |
946 | { | |
947 | struct xc4000_priv *priv = fe->tuner_priv; | |
948 | struct firmware_properties new_fw; | |
949 | int rc = 0, is_retry = 0; | |
09f46342 | 950 | u16 hwmodel; |
d0962382 | 951 | v4l2_std_id std0; |
0d0d76e5 | 952 | u8 hw_major = 0, hw_minor = 0, fw_major = 0, fw_minor = 0; |
d0962382 DH |
953 | |
954 | dprintk(1, "%s called\n", __func__); | |
955 | ||
956 | if (!priv->firm) { | |
957 | rc = xc4000_fwupload(fe); | |
958 | if (rc < 0) | |
959 | return rc; | |
960 | } | |
961 | ||
d0962382 DH |
962 | retry: |
963 | new_fw.type = type; | |
964 | new_fw.id = std; | |
965 | new_fw.std_req = std; | |
341747be | 966 | new_fw.scode_table = SCODE; |
d0962382 DH |
967 | new_fw.scode_nr = 0; |
968 | new_fw.int_freq = int_freq; | |
969 | ||
970 | dprintk(1, "checking firmware, user requested type="); | |
971 | if (debug) { | |
972 | dump_firm_type(new_fw.type); | |
941830c9 | 973 | printk(KERN_CONT "(%x), id %016llx, ", new_fw.type, |
d0962382 | 974 | (unsigned long long)new_fw.std_req); |
341747be | 975 | if (!int_freq) |
976 | printk(KERN_CONT "scode_tbl "); | |
977 | else | |
978 | printk(KERN_CONT "int_freq %d, ", new_fw.int_freq); | |
979 | printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr); | |
d0962382 DH |
980 | } |
981 | ||
982 | /* No need to reload base firmware if it matches */ | |
595a83f4 | 983 | if (priv->cur_fw.type & BASE) { |
d0962382 DH |
984 | dprintk(1, "BASE firmware not changed.\n"); |
985 | goto skip_base; | |
986 | } | |
987 | ||
988 | /* Updating BASE - forget about all currently loaded firmware */ | |
989 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
990 | ||
991 | /* Reset is needed before loading firmware */ | |
341747be | 992 | rc = xc4000_tuner_reset(fe); |
d0962382 DH |
993 | if (rc < 0) |
994 | goto fail; | |
995 | ||
996 | /* BASE firmwares are all std0 */ | |
997 | std0 = 0; | |
595a83f4 | 998 | rc = load_firmware(fe, BASE, &std0); |
d0962382 | 999 | if (rc < 0) { |
941830c9 | 1000 | printk(KERN_ERR "Error %d while loading base firmware\n", rc); |
d0962382 DH |
1001 | goto fail; |
1002 | } | |
1003 | ||
1004 | /* Load INIT1, if needed */ | |
1005 | dprintk(1, "Load init1 firmware, if exists\n"); | |
1006 | ||
595a83f4 | 1007 | rc = load_firmware(fe, BASE | INIT1, &std0); |
d0962382 | 1008 | if (rc == -ENOENT) |
595a83f4 | 1009 | rc = load_firmware(fe, BASE | INIT1, &std0); |
d0962382 DH |
1010 | if (rc < 0 && rc != -ENOENT) { |
1011 | tuner_err("Error %d while loading init1 firmware\n", | |
1012 | rc); | |
1013 | goto fail; | |
1014 | } | |
1015 | ||
1016 | skip_base: | |
1017 | /* | |
1018 | * No need to reload standard specific firmware if base firmware | |
1019 | * was not reloaded and requested video standards have not changed. | |
1020 | */ | |
1021 | if (priv->cur_fw.type == (BASE | new_fw.type) && | |
1022 | priv->cur_fw.std_req == std) { | |
1023 | dprintk(1, "Std-specific firmware already loaded.\n"); | |
1024 | goto skip_std_specific; | |
1025 | } | |
1026 | ||
1027 | /* Reloading std-specific firmware forces a SCODE update */ | |
1028 | priv->cur_fw.scode_table = 0; | |
1029 | ||
ee4c3cd6 | 1030 | /* Load the standard firmware */ |
d0962382 | 1031 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
d0962382 DH |
1032 | |
1033 | if (rc < 0) | |
1034 | goto fail; | |
1035 | ||
1036 | skip_std_specific: | |
1037 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
1038 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
1039 | dprintk(1, "SCODE firmware already loaded.\n"); | |
1040 | goto check_device; | |
1041 | } | |
1042 | ||
d0962382 | 1043 | /* Load SCODE firmware, if exists */ |
d0962382 DH |
1044 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
1045 | new_fw.int_freq, new_fw.scode_nr); | |
341747be | 1046 | if (rc != 0) |
ee4c3cd6 | 1047 | dprintk(1, "load scode failed %d\n", rc); |
d0962382 DH |
1048 | |
1049 | check_device: | |
1050 | rc = xc4000_readreg(priv, XREG_PRODUCT_ID, &hwmodel); | |
1051 | ||
799ed11a | 1052 | if (xc_get_version(priv, &hw_major, &hw_minor, &fw_major, |
341747be | 1053 | &fw_minor) != 0) { |
941830c9 | 1054 | printk(KERN_ERR "Unable to read tuner registers.\n"); |
d0962382 DH |
1055 | goto fail; |
1056 | } | |
1057 | ||
1058 | dprintk(1, "Device is Xceive %d version %d.%d, " | |
1059 | "firmware version %d.%d\n", | |
1060 | hwmodel, hw_major, hw_minor, fw_major, fw_minor); | |
1061 | ||
1062 | /* Check firmware version against what we downloaded. */ | |
09f46342 | 1063 | if (priv->firm_version != ((fw_major << 8) | fw_minor)) { |
1064 | printk(KERN_WARNING | |
1065 | "Incorrect readback of firmware version %d.%d.\n", | |
1066 | fw_major, fw_minor); | |
d0962382 DH |
1067 | goto fail; |
1068 | } | |
d0962382 DH |
1069 | |
1070 | /* Check that the tuner hardware model remains consistent over time. */ | |
7db98fe6 IV |
1071 | if (priv->hwmodel == 0 && |
1072 | (hwmodel == XC_PRODUCT_ID_XC4000 || | |
1073 | hwmodel == XC_PRODUCT_ID_XC4100)) { | |
d0962382 | 1074 | priv->hwmodel = hwmodel; |
09f46342 | 1075 | priv->hwvers = (hw_major << 8) | hw_minor; |
d0962382 | 1076 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || |
09f46342 | 1077 | priv->hwvers != ((hw_major << 8) | hw_minor)) { |
1078 | printk(KERN_WARNING | |
1079 | "Read invalid device hardware information - tuner " | |
fbe4a29f | 1080 | "hung?\n"); |
d0962382 DH |
1081 | goto fail; |
1082 | } | |
1083 | ||
36628731 | 1084 | priv->cur_fw = new_fw; |
d0962382 DH |
1085 | |
1086 | /* | |
1087 | * By setting BASE in cur_fw.type only after successfully loading all | |
1088 | * firmwares, we can: | |
1089 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
1090 | * 2. Tell whether BASE firmware was just changed the next time through. | |
1091 | */ | |
1092 | priv->cur_fw.type |= BASE; | |
1093 | ||
1094 | return 0; | |
1095 | ||
1096 | fail: | |
1097 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
1098 | if (!is_retry) { | |
1099 | msleep(50); | |
1100 | is_retry = 1; | |
1101 | dprintk(1, "Retrying firmware load\n"); | |
1102 | goto retry; | |
1103 | } | |
1104 | ||
1105 | if (rc == -ENOENT) | |
1106 | rc = -EINVAL; | |
1107 | return rc; | |
1108 | } | |
11091a31 | 1109 | |
8d009a0c DF |
1110 | static void xc_debug_dump(struct xc4000_priv *priv) |
1111 | { | |
fbe4a29f IV |
1112 | u16 adc_envelope; |
1113 | u32 freq_error_hz = 0; | |
1114 | u16 lock_status; | |
1115 | u32 hsync_freq_hz = 0; | |
1116 | u16 frame_lines; | |
1117 | u16 quality; | |
8a538a88 MS |
1118 | u16 signal = 0; |
1119 | u16 noise = 0; | |
fbe4a29f IV |
1120 | u8 hw_majorversion = 0, hw_minorversion = 0; |
1121 | u8 fw_majorversion = 0, fw_minorversion = 0; | |
8d009a0c | 1122 | |
341747be | 1123 | xc_get_adc_envelope(priv, &adc_envelope); |
8d009a0c DF |
1124 | dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope); |
1125 | ||
1126 | xc_get_frequency_error(priv, &freq_error_hz); | |
1127 | dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz); | |
1128 | ||
fbe4a29f | 1129 | xc_get_lock_status(priv, &lock_status); |
8d009a0c DF |
1130 | dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n", |
1131 | lock_status); | |
1132 | ||
fbe4a29f IV |
1133 | xc_get_version(priv, &hw_majorversion, &hw_minorversion, |
1134 | &fw_majorversion, &fw_minorversion); | |
8d009a0c DF |
1135 | dprintk(1, "*** HW: V%02x.%02x, FW: V%02x.%02x\n", |
1136 | hw_majorversion, hw_minorversion, | |
1137 | fw_majorversion, fw_minorversion); | |
1138 | ||
f4312e2f IV |
1139 | if (priv->video_standard < XC4000_DTV6) { |
1140 | xc_get_hsync_freq(priv, &hsync_freq_hz); | |
1141 | dprintk(1, "*** Horizontal sync frequency = %d Hz\n", | |
1142 | hsync_freq_hz); | |
8d009a0c | 1143 | |
f4312e2f IV |
1144 | xc_get_frame_lines(priv, &frame_lines); |
1145 | dprintk(1, "*** Frame lines = %d\n", frame_lines); | |
1146 | } | |
8d009a0c | 1147 | |
fbe4a29f | 1148 | xc_get_quality(priv, &quality); |
8d009a0c | 1149 | dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality); |
8a538a88 MS |
1150 | |
1151 | xc_get_signal_level(priv, &signal); | |
1152 | dprintk(1, "*** Signal level = -%ddB (%d)\n", signal >> 8, signal); | |
1153 | ||
1154 | xc_get_noise_level(priv, &noise); | |
1155 | dprintk(1, "*** Noise level = %ddB (%d)\n", noise >> 8, noise); | |
8d009a0c DF |
1156 | } |
1157 | ||
14d24d14 | 1158 | static int xc4000_set_params(struct dvb_frontend *fe) |
8d009a0c | 1159 | { |
40d6f2b8 MCC |
1160 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
1161 | u32 delsys = c->delivery_system; | |
1162 | u32 bw = c->bandwidth_hz; | |
8d009a0c | 1163 | struct xc4000_priv *priv = fe->tuner_priv; |
ed23db32 | 1164 | unsigned int type; |
5614942b | 1165 | int ret = -EREMOTEIO; |
8d009a0c | 1166 | |
40d6f2b8 | 1167 | dprintk(1, "%s() frequency=%d (Hz)\n", __func__, c->frequency); |
8d009a0c | 1168 | |
5614942b IV |
1169 | mutex_lock(&priv->lock); |
1170 | ||
40d6f2b8 MCC |
1171 | switch (delsys) { |
1172 | case SYS_ATSC: | |
1173 | dprintk(1, "%s() VSB modulation\n", __func__); | |
1174 | priv->rf_mode = XC_RF_MODE_AIR; | |
4c07e328 | 1175 | priv->freq_offset = 1750000; |
40d6f2b8 MCC |
1176 | priv->video_standard = XC4000_DTV6; |
1177 | type = DTV6; | |
1178 | break; | |
1179 | case SYS_DVBC_ANNEX_B: | |
1180 | dprintk(1, "%s() QAM modulation\n", __func__); | |
1181 | priv->rf_mode = XC_RF_MODE_CABLE; | |
4c07e328 | 1182 | priv->freq_offset = 1750000; |
40d6f2b8 MCC |
1183 | priv->video_standard = XC4000_DTV6; |
1184 | type = DTV6; | |
1185 | break; | |
1186 | case SYS_DVBT: | |
1187 | case SYS_DVBT2: | |
8d009a0c | 1188 | dprintk(1, "%s() OFDM\n", __func__); |
40d6f2b8 MCC |
1189 | if (bw == 0) { |
1190 | if (c->frequency < 400000000) { | |
4c07e328 | 1191 | priv->freq_offset = 2250000; |
40d6f2b8 | 1192 | } else { |
4c07e328 | 1193 | priv->freq_offset = 2750000; |
40d6f2b8 MCC |
1194 | } |
1195 | priv->video_standard = XC4000_DTV7_8; | |
1196 | type = DTV78; | |
1197 | } else if (bw <= 6000000) { | |
ed23db32 | 1198 | priv->video_standard = XC4000_DTV6; |
4c07e328 | 1199 | priv->freq_offset = 1750000; |
ed23db32 | 1200 | type = DTV6; |
40d6f2b8 | 1201 | } else if (bw <= 7000000) { |
f0ef7c88 | 1202 | priv->video_standard = XC4000_DTV7; |
4c07e328 | 1203 | priv->freq_offset = 2250000; |
ed23db32 | 1204 | type = DTV7; |
40d6f2b8 | 1205 | } else { |
ed23db32 | 1206 | priv->video_standard = XC4000_DTV8; |
4c07e328 | 1207 | priv->freq_offset = 2750000; |
ed23db32 | 1208 | type = DTV8; |
8d009a0c DF |
1209 | } |
1210 | priv->rf_mode = XC_RF_MODE_AIR; | |
40d6f2b8 MCC |
1211 | break; |
1212 | default: | |
1213 | printk(KERN_ERR "xc4000 delivery system not supported!\n"); | |
5614942b IV |
1214 | ret = -EINVAL; |
1215 | goto fail; | |
8d009a0c DF |
1216 | } |
1217 | ||
4c07e328 MCC |
1218 | priv->freq_hz = c->frequency - priv->freq_offset; |
1219 | ||
8d009a0c DF |
1220 | dprintk(1, "%s() frequency=%d (compensated)\n", |
1221 | __func__, priv->freq_hz); | |
1222 | ||
ed23db32 | 1223 | /* Make sure the correct firmware type is loaded */ |
341747be | 1224 | if (check_firmware(fe, type, 0, priv->if_khz) != 0) |
5614942b | 1225 | goto fail; |
ed23db32 | 1226 | |
c6f56e7d MCC |
1227 | priv->bandwidth = c->bandwidth_hz; |
1228 | ||
341747be | 1229 | ret = xc_set_signal_source(priv, priv->rf_mode); |
1230 | if (ret != 0) { | |
1231 | printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n", | |
5614942b IV |
1232 | priv->rf_mode); |
1233 | goto fail; | |
30f544ec IV |
1234 | } else { |
1235 | u16 video_mode, audio_mode; | |
341747be | 1236 | video_mode = xc4000_standard[priv->video_standard].video_mode; |
1237 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | |
30f544ec IV |
1238 | if (type == DTV6 && priv->firm_version != 0x0102) |
1239 | video_mode |= 0x0001; | |
341747be | 1240 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); |
1241 | if (ret != 0) { | |
1242 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | |
30f544ec IV |
1243 | /* DJH - do not return when it fails... */ |
1244 | /* goto fail; */ | |
1245 | } | |
8d009a0c DF |
1246 | } |
1247 | ||
8edeb6eb | 1248 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) |
1249 | ret = 0; | |
1250 | if (priv->dvb_amplitude != 0) { | |
30f544ec | 1251 | if (xc_write_reg(priv, XREG_AMPLITUDE, |
8edeb6eb | 1252 | (priv->firm_version != 0x0102 || |
1253 | priv->dvb_amplitude != 134 ? | |
1254 | priv->dvb_amplitude : 132)) != 0) | |
30f544ec | 1255 | ret = -EREMOTEIO; |
8edeb6eb | 1256 | } |
1257 | if (priv->set_smoothedcvbs != 0) { | |
30f544ec IV |
1258 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) |
1259 | ret = -EREMOTEIO; | |
8edeb6eb | 1260 | } |
1261 | if (ret != 0) { | |
1262 | printk(KERN_ERR "xc4000: setting registers failed\n"); | |
1263 | /* goto fail; */ | |
8d009a0c | 1264 | } |
30f544ec | 1265 | |
e75873c1 | 1266 | xc_tune_channel(priv, priv->freq_hz); |
8d009a0c | 1267 | |
5614942b IV |
1268 | ret = 0; |
1269 | ||
1270 | fail: | |
1271 | mutex_unlock(&priv->lock); | |
1272 | ||
1273 | return ret; | |
8d009a0c DF |
1274 | } |
1275 | ||
8d009a0c DF |
1276 | static int xc4000_set_analog_params(struct dvb_frontend *fe, |
1277 | struct analog_parameters *params) | |
1278 | { | |
1279 | struct xc4000_priv *priv = fe->tuner_priv; | |
818a1776 | 1280 | unsigned int type = 0; |
5614942b | 1281 | int ret = -EREMOTEIO; |
8d009a0c | 1282 | |
818a1776 IV |
1283 | if (params->mode == V4L2_TUNER_RADIO) { |
1284 | dprintk(1, "%s() frequency=%d (in units of 62.5Hz)\n", | |
1285 | __func__, params->frequency); | |
1286 | ||
1287 | mutex_lock(&priv->lock); | |
1288 | ||
1289 | params->std = 0; | |
1290 | priv->freq_hz = params->frequency * 125L / 2; | |
1291 | ||
1292 | if (audio_std & XC4000_AUDIO_STD_INPUT1) { | |
1293 | priv->video_standard = XC4000_FM_Radio_INPUT1; | |
1294 | type = FM | INPUT1; | |
1295 | } else { | |
1296 | priv->video_standard = XC4000_FM_Radio_INPUT2; | |
1297 | type = FM | INPUT2; | |
1298 | } | |
1299 | ||
1300 | goto tune_channel; | |
1301 | } | |
1302 | ||
8d009a0c DF |
1303 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", |
1304 | __func__, params->frequency); | |
1305 | ||
5614942b IV |
1306 | mutex_lock(&priv->lock); |
1307 | ||
8d009a0c DF |
1308 | /* params->frequency is in units of 62.5khz */ |
1309 | priv->freq_hz = params->frequency * 62500; | |
1310 | ||
818a1776 IV |
1311 | params->std &= V4L2_STD_ALL; |
1312 | /* if std is not defined, choose one */ | |
1313 | if (!params->std) | |
1314 | params->std = V4L2_STD_PAL_BG; | |
1315 | ||
1316 | if (audio_std & XC4000_AUDIO_STD_MONO) | |
1317 | type = MONO; | |
1318 | ||
8d009a0c | 1319 | if (params->std & V4L2_STD_MN) { |
818a1776 IV |
1320 | params->std = V4L2_STD_MN; |
1321 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1322 | priv->video_standard = XC4000_MN_NTSC_PAL_Mono; | |
1323 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | |
1324 | params->std |= V4L2_STD_A2; | |
1325 | priv->video_standard = XC4000_MN_NTSC_PAL_A2; | |
1326 | } else { | |
1327 | params->std |= V4L2_STD_BTSC; | |
1328 | priv->video_standard = XC4000_MN_NTSC_PAL_BTSC; | |
1329 | } | |
8d009a0c DF |
1330 | goto tune_channel; |
1331 | } | |
1332 | ||
1333 | if (params->std & V4L2_STD_PAL_BG) { | |
818a1776 IV |
1334 | params->std = V4L2_STD_PAL_BG; |
1335 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1336 | priv->video_standard = XC4000_BG_PAL_MONO; | |
1337 | } else if (!(audio_std & XC4000_AUDIO_STD_A2)) { | |
1338 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | |
1339 | params->std |= V4L2_STD_NICAM_A; | |
1340 | priv->video_standard = XC4000_BG_PAL_NICAM; | |
1341 | } else { | |
1342 | params->std |= V4L2_STD_NICAM_B; | |
1343 | priv->video_standard = XC4000_BG_PAL_NICAM; | |
1344 | } | |
1345 | } else { | |
1346 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | |
1347 | params->std |= V4L2_STD_A2_A; | |
1348 | priv->video_standard = XC4000_BG_PAL_A2; | |
1349 | } else { | |
1350 | params->std |= V4L2_STD_A2_B; | |
1351 | priv->video_standard = XC4000_BG_PAL_A2; | |
1352 | } | |
1353 | } | |
8d009a0c DF |
1354 | goto tune_channel; |
1355 | } | |
1356 | ||
1357 | if (params->std & V4L2_STD_PAL_I) { | |
1358 | /* default to NICAM audio standard */ | |
818a1776 | 1359 | params->std = V4L2_STD_PAL_I | V4L2_STD_NICAM; |
941830c9 | 1360 | if (audio_std & XC4000_AUDIO_STD_MONO) |
818a1776 | 1361 | priv->video_standard = XC4000_I_PAL_NICAM_MONO; |
941830c9 | 1362 | else |
818a1776 | 1363 | priv->video_standard = XC4000_I_PAL_NICAM; |
8d009a0c DF |
1364 | goto tune_channel; |
1365 | } | |
1366 | ||
1367 | if (params->std & V4L2_STD_PAL_DK) { | |
818a1776 IV |
1368 | params->std = V4L2_STD_PAL_DK; |
1369 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1370 | priv->video_standard = XC4000_DK_PAL_MONO; | |
1371 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | |
1372 | params->std |= V4L2_STD_A2; | |
1373 | priv->video_standard = XC4000_DK_PAL_A2; | |
1374 | } else { | |
1375 | params->std |= V4L2_STD_NICAM; | |
1376 | priv->video_standard = XC4000_DK_PAL_NICAM; | |
1377 | } | |
8d009a0c DF |
1378 | goto tune_channel; |
1379 | } | |
1380 | ||
1381 | if (params->std & V4L2_STD_SECAM_DK) { | |
818a1776 IV |
1382 | /* default to A2 audio standard */ |
1383 | params->std = V4L2_STD_SECAM_DK | V4L2_STD_A2; | |
1384 | if (audio_std & XC4000_AUDIO_STD_L) { | |
1385 | type = 0; | |
1386 | priv->video_standard = XC4000_DK_SECAM_NICAM; | |
1387 | } else if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1388 | priv->video_standard = XC4000_DK_SECAM_A2MONO; | |
1389 | } else if (audio_std & XC4000_AUDIO_STD_K3) { | |
1390 | params->std |= V4L2_STD_SECAM_K3; | |
1391 | priv->video_standard = XC4000_DK_SECAM_A2LDK3; | |
1392 | } else { | |
1393 | priv->video_standard = XC4000_DK_SECAM_A2DK1; | |
1394 | } | |
8d009a0c DF |
1395 | goto tune_channel; |
1396 | } | |
1397 | ||
1398 | if (params->std & V4L2_STD_SECAM_L) { | |
818a1776 IV |
1399 | /* default to NICAM audio standard */ |
1400 | type = 0; | |
1401 | params->std = V4L2_STD_SECAM_L | V4L2_STD_NICAM; | |
ed23db32 | 1402 | priv->video_standard = XC4000_L_SECAM_NICAM; |
8d009a0c DF |
1403 | goto tune_channel; |
1404 | } | |
1405 | ||
1406 | if (params->std & V4L2_STD_SECAM_LC) { | |
818a1776 IV |
1407 | /* default to NICAM audio standard */ |
1408 | type = 0; | |
1409 | params->std = V4L2_STD_SECAM_LC | V4L2_STD_NICAM; | |
ed23db32 | 1410 | priv->video_standard = XC4000_LC_SECAM_NICAM; |
8d009a0c DF |
1411 | goto tune_channel; |
1412 | } | |
1413 | ||
1414 | tune_channel: | |
341747be | 1415 | /* FIXME: it could be air. */ |
818a1776 | 1416 | priv->rf_mode = XC_RF_MODE_CABLE; |
ed23db32 | 1417 | |
818a1776 | 1418 | if (check_firmware(fe, type, params->std, |
341747be | 1419 | xc4000_standard[priv->video_standard].int_freq) != 0) |
5614942b | 1420 | goto fail; |
ed23db32 | 1421 | |
341747be | 1422 | ret = xc_set_signal_source(priv, priv->rf_mode); |
1423 | if (ret != 0) { | |
8d009a0c | 1424 | printk(KERN_ERR |
341747be | 1425 | "xc4000: xc_set_signal_source(%d) failed\n", |
5614942b IV |
1426 | priv->rf_mode); |
1427 | goto fail; | |
30f544ec IV |
1428 | } else { |
1429 | u16 video_mode, audio_mode; | |
341747be | 1430 | video_mode = xc4000_standard[priv->video_standard].video_mode; |
1431 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | |
30f544ec | 1432 | if (priv->video_standard < XC4000_BG_PAL_A2) { |
341747be | 1433 | if (type & NOGD) |
30f544ec IV |
1434 | video_mode &= 0xFF7F; |
1435 | } else if (priv->video_standard < XC4000_I_PAL_NICAM) { | |
8edeb6eb | 1436 | if (priv->firm_version == 0x0102) |
30f544ec | 1437 | video_mode &= 0xFEFF; |
923137a4 IV |
1438 | if (audio_std & XC4000_AUDIO_STD_B) |
1439 | video_mode |= 0x0080; | |
30f544ec | 1440 | } |
341747be | 1441 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); |
1442 | if (ret != 0) { | |
1443 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | |
30f544ec IV |
1444 | goto fail; |
1445 | } | |
8d009a0c DF |
1446 | } |
1447 | ||
8edeb6eb | 1448 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) |
1449 | ret = 0; | |
1450 | if (xc_write_reg(priv, XREG_AMPLITUDE, 1) != 0) | |
1451 | ret = -EREMOTEIO; | |
1452 | if (priv->set_smoothedcvbs != 0) { | |
30f544ec IV |
1453 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) |
1454 | ret = -EREMOTEIO; | |
8edeb6eb | 1455 | } |
1456 | if (ret != 0) { | |
1457 | printk(KERN_ERR "xc4000: setting registers failed\n"); | |
1458 | goto fail; | |
8d009a0c DF |
1459 | } |
1460 | ||
e75873c1 | 1461 | xc_tune_channel(priv, priv->freq_hz); |
8d009a0c | 1462 | |
5614942b IV |
1463 | ret = 0; |
1464 | ||
1465 | fail: | |
1466 | mutex_unlock(&priv->lock); | |
1467 | ||
1468 | return ret; | |
8d009a0c DF |
1469 | } |
1470 | ||
8a538a88 MS |
1471 | static int xc4000_get_signal(struct dvb_frontend *fe, u16 *strength) |
1472 | { | |
1473 | struct xc4000_priv *priv = fe->tuner_priv; | |
1474 | u16 value = 0; | |
1475 | int rc; | |
1476 | ||
1477 | mutex_lock(&priv->lock); | |
1478 | rc = xc4000_readreg(priv, XREG_SIGNAL_LEVEL, &value); | |
1479 | mutex_unlock(&priv->lock); | |
1480 | ||
1481 | if (rc < 0) | |
1482 | goto ret; | |
1483 | ||
1484 | /* Informations from real testing of DVB-T and radio part, | |
1485 | coeficient for one dB is 0xff. | |
1486 | */ | |
1487 | tuner_dbg("Signal strength: -%ddB (%05d)\n", value >> 8, value); | |
1488 | ||
1489 | /* all known digital modes */ | |
1490 | if ((priv->video_standard == XC4000_DTV6) || | |
1491 | (priv->video_standard == XC4000_DTV7) || | |
1492 | (priv->video_standard == XC4000_DTV7_8) || | |
1493 | (priv->video_standard == XC4000_DTV8)) | |
1494 | goto digital; | |
1495 | ||
1496 | /* Analog mode has NOISE LEVEL important, signal | |
1497 | depends only on gain of antenna and amplifiers, | |
1498 | but it doesn't tell anything about real quality | |
1499 | of reception. | |
1500 | */ | |
1501 | mutex_lock(&priv->lock); | |
1502 | rc = xc4000_readreg(priv, XREG_NOISE_LEVEL, &value); | |
1503 | mutex_unlock(&priv->lock); | |
1504 | ||
1505 | tuner_dbg("Noise level: %ddB (%05d)\n", value >> 8, value); | |
1506 | ||
1507 | /* highest noise level: 32dB */ | |
1508 | if (value >= 0x2000) { | |
1509 | value = 0; | |
1510 | } else { | |
dfa7ba5f | 1511 | value = (~value << 3) & 0xffff; |
8a538a88 MS |
1512 | } |
1513 | ||
1514 | goto ret; | |
1515 | ||
1516 | /* Digital mode has SIGNAL LEVEL important and real | |
1517 | noise level is stored in demodulator registers. | |
1518 | */ | |
1519 | digital: | |
1520 | /* best signal: -50dB */ | |
1521 | if (value <= 0x3200) { | |
1522 | value = 0xffff; | |
1523 | /* minimum: -114dB - should be 0x7200 but real zero is 0x713A */ | |
1524 | } else if (value >= 0x713A) { | |
1525 | value = 0; | |
1526 | } else { | |
1527 | value = ~(value - 0x3200) << 2; | |
1528 | } | |
1529 | ||
1530 | ret: | |
1531 | *strength = value; | |
1532 | ||
1533 | return rc; | |
1534 | } | |
1535 | ||
8d009a0c DF |
1536 | static int xc4000_get_frequency(struct dvb_frontend *fe, u32 *freq) |
1537 | { | |
1538 | struct xc4000_priv *priv = fe->tuner_priv; | |
f4312e2f | 1539 | |
4c07e328 | 1540 | *freq = priv->freq_hz + priv->freq_offset; |
f4312e2f IV |
1541 | |
1542 | if (debug) { | |
1543 | mutex_lock(&priv->lock); | |
1544 | if ((priv->cur_fw.type | |
1545 | & (BASE | FM | DTV6 | DTV7 | DTV78 | DTV8)) == BASE) { | |
1546 | u16 snr = 0; | |
1547 | if (xc4000_readreg(priv, XREG_SNR, &snr) == 0) { | |
1548 | mutex_unlock(&priv->lock); | |
1549 | dprintk(1, "%s() freq = %u, SNR = %d\n", | |
1550 | __func__, *freq, snr); | |
1551 | return 0; | |
1552 | } | |
1553 | } | |
1554 | mutex_unlock(&priv->lock); | |
1555 | } | |
1556 | ||
1557 | dprintk(1, "%s()\n", __func__); | |
1558 | ||
8d009a0c DF |
1559 | return 0; |
1560 | } | |
1561 | ||
1562 | static int xc4000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) | |
1563 | { | |
1564 | struct xc4000_priv *priv = fe->tuner_priv; | |
1565 | dprintk(1, "%s()\n", __func__); | |
1566 | ||
1567 | *bw = priv->bandwidth; | |
1568 | return 0; | |
1569 | } | |
1570 | ||
1571 | static int xc4000_get_status(struct dvb_frontend *fe, u32 *status) | |
1572 | { | |
1573 | struct xc4000_priv *priv = fe->tuner_priv; | |
fbe4a29f | 1574 | u16 lock_status = 0; |
8d009a0c | 1575 | |
5614942b IV |
1576 | mutex_lock(&priv->lock); |
1577 | ||
f4312e2f IV |
1578 | if (priv->cur_fw.type & BASE) |
1579 | xc_get_lock_status(priv, &lock_status); | |
8d009a0c | 1580 | |
f4312e2f IV |
1581 | *status = (lock_status == 1 ? |
1582 | TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO : 0); | |
1583 | if (priv->cur_fw.type & (DTV6 | DTV7 | DTV78 | DTV8)) | |
1584 | *status &= (~TUNER_STATUS_STEREO); | |
5614942b | 1585 | |
f4312e2f | 1586 | mutex_unlock(&priv->lock); |
8d009a0c | 1587 | |
f4312e2f | 1588 | dprintk(2, "%s() lock_status = %d\n", __func__, lock_status); |
8d009a0c DF |
1589 | |
1590 | return 0; | |
1591 | } | |
1592 | ||
8d009a0c DF |
1593 | static int xc4000_sleep(struct dvb_frontend *fe) |
1594 | { | |
5272f6b1 | 1595 | struct xc4000_priv *priv = fe->tuner_priv; |
341747be | 1596 | int ret = 0; |
5272f6b1 IV |
1597 | |
1598 | dprintk(1, "%s()\n", __func__); | |
1599 | ||
1600 | mutex_lock(&priv->lock); | |
1601 | ||
1602 | /* Avoid firmware reload on slow devices */ | |
1603 | if ((no_poweroff == 2 || | |
8edeb6eb | 1604 | (no_poweroff == 0 && priv->default_pm != 0)) && |
5272f6b1 IV |
1605 | (priv->cur_fw.type & BASE) != 0) { |
1606 | /* force reset and firmware reload */ | |
1607 | priv->cur_fw.type = XC_POWERED_DOWN; | |
1608 | ||
341747be | 1609 | if (xc_write_reg(priv, XREG_POWER_DOWN, 0) != 0) { |
5272f6b1 IV |
1610 | printk(KERN_ERR |
1611 | "xc4000: %s() unable to shutdown tuner\n", | |
1612 | __func__); | |
1613 | ret = -EREMOTEIO; | |
1614 | } | |
341747be | 1615 | msleep(20); |
5272f6b1 IV |
1616 | } |
1617 | ||
1618 | mutex_unlock(&priv->lock); | |
1619 | ||
1620 | return ret; | |
8d009a0c DF |
1621 | } |
1622 | ||
1623 | static int xc4000_init(struct dvb_frontend *fe) | |
1624 | { | |
8d009a0c DF |
1625 | dprintk(1, "%s()\n", __func__); |
1626 | ||
8d009a0c DF |
1627 | return 0; |
1628 | } | |
1629 | ||
1630 | static int xc4000_release(struct dvb_frontend *fe) | |
1631 | { | |
1632 | struct xc4000_priv *priv = fe->tuner_priv; | |
1633 | ||
1634 | dprintk(1, "%s()\n", __func__); | |
1635 | ||
1636 | mutex_lock(&xc4000_list_mutex); | |
1637 | ||
1638 | if (priv) | |
1639 | hybrid_tuner_release_state(priv); | |
1640 | ||
1641 | mutex_unlock(&xc4000_list_mutex); | |
1642 | ||
1643 | fe->tuner_priv = NULL; | |
1644 | ||
1645 | return 0; | |
1646 | } | |
1647 | ||
1648 | static const struct dvb_tuner_ops xc4000_tuner_ops = { | |
1649 | .info = { | |
1650 | .name = "Xceive XC4000", | |
1651 | .frequency_min = 1000000, | |
1652 | .frequency_max = 1023000000, | |
1653 | .frequency_step = 50000, | |
1654 | }, | |
1655 | ||
1656 | .release = xc4000_release, | |
1657 | .init = xc4000_init, | |
1658 | .sleep = xc4000_sleep, | |
1659 | ||
1660 | .set_params = xc4000_set_params, | |
1661 | .set_analog_params = xc4000_set_analog_params, | |
1662 | .get_frequency = xc4000_get_frequency, | |
8a538a88 | 1663 | .get_rf_strength = xc4000_get_signal, |
8d009a0c DF |
1664 | .get_bandwidth = xc4000_get_bandwidth, |
1665 | .get_status = xc4000_get_status | |
1666 | }; | |
1667 | ||
1668 | struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe, | |
1669 | struct i2c_adapter *i2c, | |
1670 | struct xc4000_config *cfg) | |
1671 | { | |
1672 | struct xc4000_priv *priv = NULL; | |
fbe4a29f IV |
1673 | int instance; |
1674 | u16 id = 0; | |
8d009a0c DF |
1675 | |
1676 | dprintk(1, "%s(%d-%04x)\n", __func__, | |
1677 | i2c ? i2c_adapter_id(i2c) : -1, | |
1678 | cfg ? cfg->i2c_address : -1); | |
1679 | ||
1680 | mutex_lock(&xc4000_list_mutex); | |
1681 | ||
1682 | instance = hybrid_tuner_request_state(struct xc4000_priv, priv, | |
1683 | hybrid_tuner_instance_list, | |
1684 | i2c, cfg->i2c_address, "xc4000"); | |
1685 | switch (instance) { | |
1686 | case 0: | |
1687 | goto fail; | |
8d009a0c DF |
1688 | case 1: |
1689 | /* new tuner instance */ | |
c6f56e7d | 1690 | priv->bandwidth = 6000000; |
8edeb6eb | 1691 | /* set default configuration */ |
1692 | priv->if_khz = 4560; | |
1693 | priv->default_pm = 0; | |
1694 | priv->dvb_amplitude = 134; | |
1695 | priv->set_smoothedcvbs = 1; | |
5614942b | 1696 | mutex_init(&priv->lock); |
8d009a0c DF |
1697 | fe->tuner_priv = priv; |
1698 | break; | |
1699 | default: | |
1700 | /* existing tuner instance */ | |
1701 | fe->tuner_priv = priv; | |
1702 | break; | |
1703 | } | |
1704 | ||
0b402132 | 1705 | if (cfg->if_khz != 0) { |
8edeb6eb | 1706 | /* copy configuration if provided by the caller */ |
8d009a0c | 1707 | priv->if_khz = cfg->if_khz; |
8edeb6eb | 1708 | priv->default_pm = cfg->default_pm; |
1709 | priv->dvb_amplitude = cfg->dvb_amplitude; | |
1710 | priv->set_smoothedcvbs = cfg->set_smoothedcvbs; | |
8d009a0c DF |
1711 | } |
1712 | ||
1713 | /* Check if firmware has been loaded. It is possible that another | |
1714 | instance of the driver has loaded the firmware. | |
1715 | */ | |
1716 | ||
027fd361 | 1717 | if (instance == 1) { |
341747be | 1718 | if (xc4000_readreg(priv, XREG_PRODUCT_ID, &id) != 0) |
8d009a0c | 1719 | goto fail; |
027fd361 IV |
1720 | } else { |
1721 | id = ((priv->cur_fw.type & BASE) != 0 ? | |
1722 | priv->hwmodel : XC_PRODUCT_ID_FW_NOT_LOADED); | |
1723 | } | |
8d009a0c DF |
1724 | |
1725 | switch (id) { | |
7db98fe6 IV |
1726 | case XC_PRODUCT_ID_XC4000: |
1727 | case XC_PRODUCT_ID_XC4100: | |
8d009a0c DF |
1728 | printk(KERN_INFO |
1729 | "xc4000: Successfully identified at address 0x%02x\n", | |
1730 | cfg->i2c_address); | |
1731 | printk(KERN_INFO | |
1732 | "xc4000: Firmware has been loaded previously\n"); | |
1733 | break; | |
1734 | case XC_PRODUCT_ID_FW_NOT_LOADED: | |
1735 | printk(KERN_INFO | |
1736 | "xc4000: Successfully identified at address 0x%02x\n", | |
1737 | cfg->i2c_address); | |
1738 | printk(KERN_INFO | |
1739 | "xc4000: Firmware has not been loaded previously\n"); | |
1740 | break; | |
1741 | default: | |
1742 | printk(KERN_ERR | |
1743 | "xc4000: Device not found at addr 0x%02x (0x%x)\n", | |
1744 | cfg->i2c_address, id); | |
1745 | goto fail; | |
1746 | } | |
1747 | ||
1748 | mutex_unlock(&xc4000_list_mutex); | |
1749 | ||
1750 | memcpy(&fe->ops.tuner_ops, &xc4000_tuner_ops, | |
1751 | sizeof(struct dvb_tuner_ops)); | |
1752 | ||
027fd361 IV |
1753 | if (instance == 1) { |
1754 | int ret; | |
1755 | mutex_lock(&priv->lock); | |
1756 | ret = xc4000_fwupload(fe); | |
1757 | mutex_unlock(&priv->lock); | |
341747be | 1758 | if (ret != 0) |
027fd361 IV |
1759 | goto fail2; |
1760 | } | |
11091a31 | 1761 | |
8d009a0c DF |
1762 | return fe; |
1763 | fail: | |
1764 | mutex_unlock(&xc4000_list_mutex); | |
027fd361 | 1765 | fail2: |
8d009a0c DF |
1766 | xc4000_release(fe); |
1767 | return NULL; | |
1768 | } | |
1769 | EXPORT_SYMBOL(xc4000_attach); | |
1770 | ||
1771 | MODULE_AUTHOR("Steven Toth, Davide Ferri"); | |
1772 | MODULE_DESCRIPTION("Xceive xc4000 silicon tuner driver"); | |
1773 | MODULE_LICENSE("GPL"); | |
612ae142 MCC |
1774 | MODULE_FIRMWARE(XC4000_DEFAULT_FIRMWARE_NEW); |
1775 | MODULE_FIRMWARE(XC4000_DEFAULT_FIRMWARE); |