Commit | Line | Data |
---|---|---|
a6c2ba28 | 1 | /* |
f7abcd38 | 2 | em28xx-i2c.c - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
f7abcd38 MCC |
4 | Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> |
5 | Markus Rechberger <mrechberger@gmail.com> | |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
f7abcd38 | 7 | Sascha Sommer <saschasommer@freenet.de> |
a3ea4bf9 | 8 | Copyright (C) 2013 Frank Schäfer <fschaefer.oss@googlemail.com> |
a6c2ba28 | 9 | |
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/usb.h> | |
28 | #include <linux/i2c.h> | |
4b83626a | 29 | #include <linux/jiffies.h> |
a6c2ba28 | 30 | |
f7abcd38 | 31 | #include "em28xx.h" |
6c362c8e | 32 | #include "tuner-xc2028.h" |
5e453dc7 | 33 | #include <media/v4l2-common.h> |
d5e52653 | 34 | #include <media/tuner.h> |
a6c2ba28 | 35 | |
36 | /* ----------------------------------------------------------- */ | |
37 | ||
ff699e6b | 38 | static unsigned int i2c_scan; |
a6c2ba28 | 39 | module_param(i2c_scan, int, 0444); |
40 | MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time"); | |
41 | ||
ff699e6b | 42 | static unsigned int i2c_debug; |
a6c2ba28 | 43 | module_param(i2c_debug, int, 0644); |
50f0a9df | 44 | MODULE_PARM_DESC(i2c_debug, "i2c debug message level (1: normal debug, 2: show I2C transfers)"); |
a6c2ba28 | 45 | |
a6c2ba28 | 46 | /* |
f5ae371a FS |
47 | * em2800_i2c_send_bytes() |
48 | * send up to 4 bytes to the em2800 i2c device | |
596d92d5 | 49 | */ |
f5ae371a | 50 | static int em2800_i2c_send_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len) |
596d92d5 | 51 | { |
d1b7213b | 52 | unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_I2C_XFER_TIMEOUT); |
596d92d5 | 53 | int ret; |
a6bad040 | 54 | u8 b2[6]; |
f5ae371a FS |
55 | |
56 | if (len < 1 || len > 4) | |
57 | return -EOPNOTSUPP; | |
58 | ||
596d92d5 MCC |
59 | BUG_ON(len < 1 || len > 4); |
60 | b2[5] = 0x80 + len - 1; | |
61 | b2[4] = addr; | |
62 | b2[3] = buf[0]; | |
63 | if (len > 1) | |
64 | b2[2] = buf[1]; | |
65 | if (len > 2) | |
66 | b2[1] = buf[2]; | |
67 | if (len > 3) | |
68 | b2[0] = buf[3]; | |
69 | ||
2fcc82d8 | 70 | /* trigger write */ |
3acf2809 | 71 | ret = dev->em28xx_write_regs(dev, 4 - len, &b2[4 - len], 2 + len); |
596d92d5 | 72 | if (ret != 2 + len) { |
d230d5ad FS |
73 | em28xx_warn("failed to trigger write to i2c address 0x%x (error=%i)\n", |
74 | addr, ret); | |
45f04e82 | 75 | return (ret < 0) ? ret : -EIO; |
596d92d5 | 76 | } |
2fcc82d8 | 77 | /* wait for completion */ |
4b83626a | 78 | while (time_is_after_jiffies(timeout)) { |
3acf2809 | 79 | ret = dev->em28xx_read_reg(dev, 0x05); |
4b83626a | 80 | if (ret == 0x80 + len - 1) |
596d92d5 | 81 | return len; |
4b83626a | 82 | if (ret == 0x94 + len - 1) { |
d845fb3a | 83 | if (i2c_debug == 1) |
8ae8cd6c | 84 | em28xx_warn("R05 returned 0x%02x: I2C ACK error\n", |
d845fb3a | 85 | ret); |
e63b009d | 86 | return -ENXIO; |
4b83626a MCC |
87 | } |
88 | if (ret < 0) { | |
d230d5ad FS |
89 | em28xx_warn("failed to get i2c transfer status from bridge register (error=%i)\n", |
90 | ret); | |
45f04e82 FS |
91 | return ret; |
92 | } | |
e8e41da4 | 93 | msleep(5); |
596d92d5 | 94 | } |
50f0a9df MCC |
95 | if (i2c_debug) |
96 | em28xx_warn("write to i2c device at 0x%x timed out\n", addr); | |
e63b009d | 97 | return -ETIMEDOUT; |
596d92d5 MCC |
98 | } |
99 | ||
596d92d5 | 100 | /* |
2fcc82d8 FS |
101 | * em2800_i2c_recv_bytes() |
102 | * read up to 4 bytes from the em2800 i2c device | |
596d92d5 | 103 | */ |
2fcc82d8 | 104 | static int em2800_i2c_recv_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len) |
596d92d5 | 105 | { |
d1b7213b | 106 | unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_I2C_XFER_TIMEOUT); |
2fcc82d8 | 107 | u8 buf2[4]; |
596d92d5 | 108 | int ret; |
2fcc82d8 FS |
109 | int i; |
110 | ||
111 | if (len < 1 || len > 4) | |
112 | return -EOPNOTSUPP; | |
113 | ||
114 | /* trigger read */ | |
115 | buf2[1] = 0x84 + len - 1; | |
116 | buf2[0] = addr; | |
117 | ret = dev->em28xx_write_regs(dev, 0x04, buf2, 2); | |
118 | if (ret != 2) { | |
d230d5ad FS |
119 | em28xx_warn("failed to trigger read from i2c address 0x%x (error=%i)\n", |
120 | addr, ret); | |
2fcc82d8 | 121 | return (ret < 0) ? ret : -EIO; |
596d92d5 | 122 | } |
d45b9b8a | 123 | |
2fcc82d8 | 124 | /* wait for completion */ |
4b83626a | 125 | while (time_is_after_jiffies(timeout)) { |
2fcc82d8 | 126 | ret = dev->em28xx_read_reg(dev, 0x05); |
4b83626a | 127 | if (ret == 0x84 + len - 1) |
2fcc82d8 | 128 | break; |
4b83626a | 129 | if (ret == 0x94 + len - 1) { |
d845fb3a | 130 | if (i2c_debug == 1) |
8ae8cd6c | 131 | em28xx_warn("R05 returned 0x%02x: I2C ACK error\n", |
d845fb3a | 132 | ret); |
e63b009d | 133 | return -ENXIO; |
4b83626a MCC |
134 | } |
135 | if (ret < 0) { | |
d230d5ad FS |
136 | em28xx_warn("failed to get i2c transfer status from bridge register (error=%i)\n", |
137 | ret); | |
2fcc82d8 FS |
138 | return ret; |
139 | } | |
e8e41da4 | 140 | msleep(5); |
596d92d5 | 141 | } |
50f0a9df MCC |
142 | if (ret != 0x84 + len - 1) { |
143 | if (i2c_debug) | |
144 | em28xx_warn("read from i2c device at 0x%x timed out\n", | |
145 | addr); | |
146 | } | |
2fcc82d8 FS |
147 | |
148 | /* get the received message */ | |
149 | ret = dev->em28xx_read_reg_req_len(dev, 0x00, 4-len, buf2, len); | |
150 | if (ret != len) { | |
d230d5ad FS |
151 | em28xx_warn("reading from i2c device at 0x%x failed: couldn't get the received message from the bridge (error=%i)\n", |
152 | addr, ret); | |
2fcc82d8 FS |
153 | return (ret < 0) ? ret : -EIO; |
154 | } | |
155 | for (i = 0; i < len; i++) | |
156 | buf[i] = buf2[len - 1 - i]; | |
157 | ||
158 | return ret; | |
596d92d5 MCC |
159 | } |
160 | ||
161 | /* | |
2fcc82d8 FS |
162 | * em2800_i2c_check_for_device() |
163 | * check if there is an i2c device at the supplied address | |
596d92d5 | 164 | */ |
2fcc82d8 | 165 | static int em2800_i2c_check_for_device(struct em28xx *dev, u8 addr) |
596d92d5 | 166 | { |
2fcc82d8 | 167 | u8 buf; |
596d92d5 | 168 | int ret; |
f5ae371a | 169 | |
2fcc82d8 FS |
170 | ret = em2800_i2c_recv_bytes(dev, addr, &buf, 1); |
171 | if (ret == 1) | |
172 | return 0; | |
173 | return (ret < 0) ? ret : -EIO; | |
596d92d5 MCC |
174 | } |
175 | ||
176 | /* | |
3acf2809 | 177 | * em28xx_i2c_send_bytes() |
a6c2ba28 | 178 | */ |
a6bad040 FS |
179 | static int em28xx_i2c_send_bytes(struct em28xx *dev, u16 addr, u8 *buf, |
180 | u16 len, int stop) | |
a6c2ba28 | 181 | { |
d1b7213b | 182 | unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_I2C_XFER_TIMEOUT); |
4b83626a | 183 | int ret; |
a6c2ba28 | 184 | |
f5ae371a FS |
185 | if (len < 1 || len > 64) |
186 | return -EOPNOTSUPP; | |
fa74aca3 FS |
187 | /* |
188 | * NOTE: limited by the USB ctrl message constraints | |
189 | * Zero length reads always succeed, even if no device is connected | |
190 | */ | |
f5ae371a | 191 | |
45f04e82 FS |
192 | /* Write to i2c device */ |
193 | ret = dev->em28xx_write_regs_req(dev, stop ? 2 : 3, addr, buf, len); | |
194 | if (ret != len) { | |
195 | if (ret < 0) { | |
d230d5ad FS |
196 | em28xx_warn("writing to i2c device at 0x%x failed (error=%i)\n", |
197 | addr, ret); | |
45f04e82 FS |
198 | return ret; |
199 | } else { | |
d230d5ad | 200 | em28xx_warn("%i bytes write to i2c device at 0x%x requested, but %i bytes written\n", |
45f04e82 FS |
201 | len, addr, ret); |
202 | return -EIO; | |
203 | } | |
204 | } | |
a6c2ba28 | 205 | |
4b83626a MCC |
206 | /* wait for completion */ |
207 | while (time_is_after_jiffies(timeout)) { | |
bbc70e64 | 208 | ret = dev->em28xx_read_reg(dev, 0x05); |
4b83626a | 209 | if (ret == 0) /* success */ |
45f04e82 | 210 | return len; |
4b83626a | 211 | if (ret == 0x10) { |
d845fb3a | 212 | if (i2c_debug == 1) |
8ae8cd6c | 213 | em28xx_warn("I2C ACK error on writing to addr 0x%02x\n", |
d845fb3a | 214 | addr); |
e63b009d | 215 | return -ENXIO; |
4b83626a MCC |
216 | } |
217 | if (ret < 0) { | |
218 | em28xx_warn("failed to get i2c transfer status from bridge register (error=%i)\n", | |
d230d5ad | 219 | ret); |
45f04e82 FS |
220 | return ret; |
221 | } | |
bbc70e64 | 222 | msleep(5); |
fa74aca3 FS |
223 | /* |
224 | * NOTE: do we really have to wait for success ? | |
225 | * Never seen anything else than 0x00 or 0x10 | |
226 | * (even with high payload) ... | |
227 | */ | |
bbc70e64 | 228 | } |
123a17d1 FS |
229 | |
230 | if (ret == 0x02 || ret == 0x04) { | |
231 | /* NOTE: these errors seem to be related to clock stretching */ | |
232 | if (i2c_debug) | |
233 | em28xx_warn("write to i2c device at 0x%x timed out (status=%i)\n", | |
234 | addr, ret); | |
235 | return -ETIMEDOUT; | |
236 | } | |
237 | ||
238 | em28xx_warn("write to i2c device at 0x%x failed with unknown error (status=%i)\n", | |
239 | addr, ret); | |
240 | return -EIO; | |
a6c2ba28 | 241 | } |
242 | ||
243 | /* | |
3acf2809 | 244 | * em28xx_i2c_recv_bytes() |
a6c2ba28 | 245 | * read a byte from the i2c device |
246 | */ | |
a6bad040 | 247 | static int em28xx_i2c_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len) |
a6c2ba28 | 248 | { |
249 | int ret; | |
f5ae371a FS |
250 | |
251 | if (len < 1 || len > 64) | |
252 | return -EOPNOTSUPP; | |
fa74aca3 FS |
253 | /* |
254 | * NOTE: limited by the USB ctrl message constraints | |
255 | * Zero length reads always succeed, even if no device is connected | |
256 | */ | |
f5ae371a | 257 | |
45f04e82 | 258 | /* Read data from i2c device */ |
3acf2809 | 259 | ret = dev->em28xx_read_reg_req_len(dev, 2, addr, buf, len); |
7f6301d1 FS |
260 | if (ret < 0) { |
261 | em28xx_warn("reading from i2c device at 0x%x failed (error=%i)\n", | |
262 | addr, ret); | |
263 | return ret; | |
45f04e82 | 264 | } |
fa74aca3 FS |
265 | /* |
266 | * NOTE: some devices with two i2c busses have the bad habit to return 0 | |
7f6301d1 FS |
267 | * bytes if we are on bus B AND there was no write attempt to the |
268 | * specified slave address before AND no device is present at the | |
269 | * requested slave address. | |
e63b009d | 270 | * Anyway, the next check will fail with -ENXIO in this case, so avoid |
7f6301d1 FS |
271 | * spamming the system log on device probing and do nothing here. |
272 | */ | |
45f04e82 FS |
273 | |
274 | /* Check success of the i2c operation */ | |
275 | ret = dev->em28xx_read_reg(dev, 0x05); | |
4b83626a MCC |
276 | if (ret == 0) /* success */ |
277 | return len; | |
a6c2ba28 | 278 | if (ret < 0) { |
4b83626a | 279 | em28xx_warn("failed to get i2c transfer status from bridge register (error=%i)\n", |
d230d5ad | 280 | ret); |
a6c2ba28 | 281 | return ret; |
282 | } | |
d845fb3a MCC |
283 | if (ret == 0x10) { |
284 | if (i2c_debug == 1) | |
8ae8cd6c | 285 | em28xx_warn("I2C ACK error on writing to addr 0x%02x\n", |
d845fb3a | 286 | addr); |
e63b009d | 287 | return -ENXIO; |
d845fb3a | 288 | } |
4b83626a | 289 | |
123a17d1 FS |
290 | if (ret == 0x02 || ret == 0x04) { |
291 | /* NOTE: these errors seem to be related to clock stretching */ | |
292 | if (i2c_debug) | |
293 | em28xx_warn("write to i2c device at 0x%x timed out (status=%i)\n", | |
294 | addr, ret); | |
295 | return -ETIMEDOUT; | |
296 | } | |
297 | ||
298 | em28xx_warn("write to i2c device at 0x%x failed with unknown error (status=%i)\n", | |
299 | addr, ret); | |
300 | return -EIO; | |
a6c2ba28 | 301 | } |
302 | ||
303 | /* | |
3acf2809 | 304 | * em28xx_i2c_check_for_device() |
a6c2ba28 | 305 | * check if there is a i2c_device at the supplied address |
306 | */ | |
a6bad040 | 307 | static int em28xx_i2c_check_for_device(struct em28xx *dev, u16 addr) |
a6c2ba28 | 308 | { |
a6c2ba28 | 309 | int ret; |
45f04e82 | 310 | u8 buf; |
a6c2ba28 | 311 | |
45f04e82 FS |
312 | ret = em28xx_i2c_recv_bytes(dev, addr, &buf, 1); |
313 | if (ret == 1) | |
314 | return 0; | |
315 | return (ret < 0) ? ret : -EIO; | |
a6c2ba28 | 316 | } |
317 | ||
a3ea4bf9 FS |
318 | /* |
319 | * em25xx_bus_B_send_bytes | |
320 | * write bytes to the i2c device | |
321 | */ | |
322 | static int em25xx_bus_B_send_bytes(struct em28xx *dev, u16 addr, u8 *buf, | |
323 | u16 len) | |
324 | { | |
325 | int ret; | |
326 | ||
327 | if (len < 1 || len > 64) | |
328 | return -EOPNOTSUPP; | |
329 | /* | |
330 | * NOTE: limited by the USB ctrl message constraints | |
331 | * Zero length reads always succeed, even if no device is connected | |
332 | */ | |
333 | ||
334 | /* Set register and write value */ | |
335 | ret = dev->em28xx_write_regs_req(dev, 0x06, addr, buf, len); | |
336 | if (ret != len) { | |
337 | if (ret < 0) { | |
338 | em28xx_warn("writing to i2c device at 0x%x failed (error=%i)\n", | |
339 | addr, ret); | |
340 | return ret; | |
341 | } else { | |
342 | em28xx_warn("%i bytes write to i2c device at 0x%x requested, but %i bytes written\n", | |
343 | len, addr, ret); | |
344 | return -EIO; | |
345 | } | |
346 | } | |
347 | /* Check success */ | |
348 | ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000); | |
349 | /* | |
350 | * NOTE: the only error we've seen so far is | |
351 | * 0x01 when the slave device is not present | |
352 | */ | |
353 | if (!ret) | |
354 | return len; | |
d845fb3a MCC |
355 | else if (ret > 0) { |
356 | if (i2c_debug == 1) | |
8ae8cd6c | 357 | em28xx_warn("Bus B R08 returned 0x%02x: I2C ACK error\n", |
d845fb3a | 358 | ret); |
e63b009d | 359 | return -ENXIO; |
d845fb3a | 360 | } |
a3ea4bf9 FS |
361 | |
362 | return ret; | |
363 | /* | |
364 | * NOTE: With chip types (other chip IDs) which actually don't support | |
365 | * this operation, it seems to succeed ALWAYS ! (even if there is no | |
366 | * slave device or even no second i2c bus provided) | |
367 | */ | |
368 | } | |
369 | ||
370 | /* | |
371 | * em25xx_bus_B_recv_bytes | |
372 | * read bytes from the i2c device | |
373 | */ | |
374 | static int em25xx_bus_B_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, | |
375 | u16 len) | |
376 | { | |
377 | int ret; | |
378 | ||
379 | if (len < 1 || len > 64) | |
380 | return -EOPNOTSUPP; | |
381 | /* | |
382 | * NOTE: limited by the USB ctrl message constraints | |
383 | * Zero length reads always succeed, even if no device is connected | |
384 | */ | |
385 | ||
386 | /* Read value */ | |
387 | ret = dev->em28xx_read_reg_req_len(dev, 0x06, addr, buf, len); | |
388 | if (ret < 0) { | |
389 | em28xx_warn("reading from i2c device at 0x%x failed (error=%i)\n", | |
390 | addr, ret); | |
391 | return ret; | |
392 | } | |
393 | /* | |
394 | * NOTE: some devices with two i2c busses have the bad habit to return 0 | |
395 | * bytes if we are on bus B AND there was no write attempt to the | |
396 | * specified slave address before AND no device is present at the | |
397 | * requested slave address. | |
e63b009d | 398 | * Anyway, the next check will fail with -ENXIO in this case, so avoid |
a3ea4bf9 FS |
399 | * spamming the system log on device probing and do nothing here. |
400 | */ | |
401 | ||
402 | /* Check success */ | |
403 | ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000); | |
404 | /* | |
405 | * NOTE: the only error we've seen so far is | |
406 | * 0x01 when the slave device is not present | |
407 | */ | |
408 | if (!ret) | |
409 | return len; | |
d845fb3a MCC |
410 | else if (ret > 0) { |
411 | if (i2c_debug == 1) | |
8ae8cd6c | 412 | em28xx_warn("Bus B R08 returned 0x%02x: I2C ACK error\n", |
d845fb3a | 413 | ret); |
e63b009d | 414 | return -ENXIO; |
d845fb3a | 415 | } |
a3ea4bf9 FS |
416 | |
417 | return ret; | |
418 | /* | |
419 | * NOTE: With chip types (other chip IDs) which actually don't support | |
420 | * this operation, it seems to succeed ALWAYS ! (even if there is no | |
421 | * slave device or even no second i2c bus provided) | |
422 | */ | |
423 | } | |
424 | ||
425 | /* | |
426 | * em25xx_bus_B_check_for_device() | |
427 | * check if there is a i2c device at the supplied address | |
428 | */ | |
429 | static int em25xx_bus_B_check_for_device(struct em28xx *dev, u16 addr) | |
430 | { | |
431 | u8 buf; | |
432 | int ret; | |
433 | ||
434 | ret = em25xx_bus_B_recv_bytes(dev, addr, &buf, 1); | |
435 | if (ret < 0) | |
436 | return ret; | |
437 | ||
438 | return 0; | |
439 | /* | |
440 | * NOTE: With chips which do not support this operation, | |
441 | * it seems to succeed ALWAYS ! (even if no device connected) | |
442 | */ | |
443 | } | |
444 | ||
445 | static inline int i2c_check_for_device(struct em28xx_i2c_bus *i2c_bus, u16 addr) | |
446 | { | |
447 | struct em28xx *dev = i2c_bus->dev; | |
448 | int rc = -EOPNOTSUPP; | |
449 | ||
450 | if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) | |
451 | rc = em28xx_i2c_check_for_device(dev, addr); | |
452 | else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800) | |
453 | rc = em2800_i2c_check_for_device(dev, addr); | |
454 | else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B) | |
455 | rc = em25xx_bus_B_check_for_device(dev, addr); | |
a3ea4bf9 FS |
456 | return rc; |
457 | } | |
458 | ||
459 | static inline int i2c_recv_bytes(struct em28xx_i2c_bus *i2c_bus, | |
460 | struct i2c_msg msg) | |
461 | { | |
462 | struct em28xx *dev = i2c_bus->dev; | |
463 | u16 addr = msg.addr << 1; | |
50f0a9df | 464 | int rc = -EOPNOTSUPP; |
a3ea4bf9 FS |
465 | |
466 | if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) | |
467 | rc = em28xx_i2c_recv_bytes(dev, addr, msg.buf, msg.len); | |
468 | else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800) | |
469 | rc = em2800_i2c_recv_bytes(dev, addr, msg.buf, msg.len); | |
470 | else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B) | |
471 | rc = em25xx_bus_B_recv_bytes(dev, addr, msg.buf, msg.len); | |
a3ea4bf9 FS |
472 | return rc; |
473 | } | |
474 | ||
475 | static inline int i2c_send_bytes(struct em28xx_i2c_bus *i2c_bus, | |
476 | struct i2c_msg msg, int stop) | |
477 | { | |
478 | struct em28xx *dev = i2c_bus->dev; | |
479 | u16 addr = msg.addr << 1; | |
50f0a9df | 480 | int rc = -EOPNOTSUPP; |
a3ea4bf9 | 481 | |
a3ea4bf9 FS |
482 | if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) |
483 | rc = em28xx_i2c_send_bytes(dev, addr, msg.buf, msg.len, stop); | |
484 | else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800) | |
485 | rc = em2800_i2c_send_bytes(dev, addr, msg.buf, msg.len); | |
486 | else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B) | |
487 | rc = em25xx_bus_B_send_bytes(dev, addr, msg.buf, msg.len); | |
488 | return rc; | |
489 | } | |
490 | ||
a6c2ba28 | 491 | /* |
3acf2809 | 492 | * em28xx_i2c_xfer() |
a6c2ba28 | 493 | * the main i2c transfer function |
494 | */ | |
3acf2809 | 495 | static int em28xx_i2c_xfer(struct i2c_adapter *i2c_adap, |
a6c2ba28 | 496 | struct i2c_msg msgs[], int num) |
497 | { | |
aab3125c MCC |
498 | struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data; |
499 | struct em28xx *dev = i2c_bus->dev; | |
500 | unsigned bus = i2c_bus->bus; | |
a3ea4bf9 | 501 | int addr, rc, i; |
3190fbee | 502 | u8 reg; |
a6c2ba28 | 503 | |
cc5c5d20 SK |
504 | /* prevent i2c xfer attempts after device is disconnected |
505 | some fe's try to do i2c writes/reads from their release | |
506 | interfaces when called in disconnect path */ | |
507 | if (dev->disconnected) | |
508 | return -ENODEV; | |
509 | ||
aab3125c MCC |
510 | rc = rt_mutex_trylock(&dev->i2c_bus_lock); |
511 | if (rc < 0) | |
512 | return rc; | |
513 | ||
514 | /* Switch I2C bus if needed */ | |
a3ea4bf9 FS |
515 | if (bus != dev->cur_i2c_bus && |
516 | i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) { | |
aab3125c | 517 | if (bus == 1) |
3190fbee | 518 | reg = EM2874_I2C_SECONDARY_BUS_SELECT; |
aab3125c | 519 | else |
3190fbee MCC |
520 | reg = 0; |
521 | em28xx_write_reg_bits(dev, EM28XX_R06_I2C_CLK, reg, | |
522 | EM2874_I2C_SECONDARY_BUS_SELECT); | |
aab3125c MCC |
523 | dev->cur_i2c_bus = bus; |
524 | } | |
525 | ||
526 | if (num <= 0) { | |
527 | rt_mutex_unlock(&dev->i2c_bus_lock); | |
a6c2ba28 | 528 | return 0; |
aab3125c | 529 | } |
a6c2ba28 | 530 | for (i = 0; i < num; i++) { |
531 | addr = msgs[i].addr << 1; | |
50f0a9df | 532 | if (i2c_debug > 1) |
d7a80eaa FS |
533 | printk(KERN_DEBUG "%s at %s: %s %s addr=%02x len=%d:", |
534 | dev->name, __func__ , | |
535 | (msgs[i].flags & I2C_M_RD) ? "read" : "write", | |
536 | i == num - 1 ? "stop" : "nonstop", | |
537 | addr, msgs[i].len); | |
e63b009d MCC |
538 | if (!msgs[i].len) { |
539 | /* | |
540 | * no len: check only for device presence | |
541 | * This code is only called during device probe. | |
542 | */ | |
a3ea4bf9 | 543 | rc = i2c_check_for_device(i2c_bus, addr); |
50f0a9df MCC |
544 | if (rc < 0) { |
545 | if (rc == -ENXIO) { | |
546 | if (i2c_debug > 1) | |
547 | printk(KERN_CONT " no device\n"); | |
548 | rc = -ENODEV; | |
549 | } else { | |
550 | if (i2c_debug > 1) | |
551 | printk(KERN_CONT " ERROR: %i\n", rc); | |
552 | } | |
aab3125c | 553 | rt_mutex_unlock(&dev->i2c_bus_lock); |
50f0a9df | 554 | return rc; |
a6c2ba28 | 555 | } |
596d92d5 | 556 | } else if (msgs[i].flags & I2C_M_RD) { |
a6c2ba28 | 557 | /* read bytes */ |
a3ea4bf9 | 558 | rc = i2c_recv_bytes(i2c_bus, msgs[i]); |
50f0a9df MCC |
559 | |
560 | if (i2c_debug > 1 && rc >= 0) | |
561 | printk(KERN_CONT " %*ph", | |
562 | msgs[i].len, msgs[i].buf); | |
a6c2ba28 | 563 | } else { |
50f0a9df MCC |
564 | if (i2c_debug > 1) |
565 | printk(KERN_CONT " %*ph", | |
566 | msgs[i].len, msgs[i].buf); | |
567 | ||
a6c2ba28 | 568 | /* write bytes */ |
a3ea4bf9 | 569 | rc = i2c_send_bytes(i2c_bus, msgs[i], i == num - 1); |
a6c2ba28 | 570 | } |
45f04e82 | 571 | if (rc < 0) { |
50f0a9df MCC |
572 | if (i2c_debug > 1) |
573 | printk(KERN_CONT " ERROR: %i\n", rc); | |
aab3125c | 574 | rt_mutex_unlock(&dev->i2c_bus_lock); |
45f04e82 FS |
575 | return rc; |
576 | } | |
50f0a9df MCC |
577 | if (i2c_debug > 1) |
578 | printk(KERN_CONT "\n"); | |
a6c2ba28 | 579 | } |
580 | ||
aab3125c | 581 | rt_mutex_unlock(&dev->i2c_bus_lock); |
a6c2ba28 | 582 | return num; |
a6c2ba28 | 583 | } |
584 | ||
fa74aca3 FS |
585 | /* |
586 | * based on linux/sunrpc/svcauth.h and linux/hash.h | |
03910cc3 | 587 | * The original hash function returns a different value, if arch is x86_64 |
fa74aca3 | 588 | * or i386. |
03910cc3 MCC |
589 | */ |
590 | static inline unsigned long em28xx_hash_mem(char *buf, int length, int bits) | |
591 | { | |
592 | unsigned long hash = 0; | |
593 | unsigned long l = 0; | |
594 | int len = 0; | |
595 | unsigned char c; | |
fdf1bc9f | 596 | |
03910cc3 MCC |
597 | do { |
598 | if (len == length) { | |
599 | c = (char)len; | |
600 | len = -1; | |
601 | } else | |
602 | c = *buf++; | |
603 | l = (l << 8) | c; | |
604 | len++; | |
605 | if ((len & (32 / 8 - 1)) == 0) | |
606 | hash = ((hash^l) * 0x9e370001UL); | |
607 | } while (len); | |
608 | ||
609 | return (hash >> (32 - bits)) & 0xffffffffUL; | |
610 | } | |
611 | ||
fa74aca3 FS |
612 | /* |
613 | * Helper function to read data blocks from i2c clients with 8 or 16 bit | |
614 | * address width, 8 bit register width and auto incrementation been activated | |
615 | */ | |
aab3125c MCC |
616 | static int em28xx_i2c_read_block(struct em28xx *dev, unsigned bus, u16 addr, |
617 | bool addr_w16, u16 len, u8 *data) | |
d832c5b2 FS |
618 | { |
619 | int remain = len, rsize, rsize_max, ret; | |
620 | u8 buf[2]; | |
621 | ||
622 | /* Sanity check */ | |
623 | if (addr + remain > (addr_w16 * 0xff00 + 0xff + 1)) | |
624 | return -EINVAL; | |
625 | /* Select address */ | |
626 | buf[0] = addr >> 8; | |
627 | buf[1] = addr & 0xff; | |
aab3125c | 628 | ret = i2c_master_send(&dev->i2c_client[bus], buf + !addr_w16, 1 + addr_w16); |
d832c5b2 FS |
629 | if (ret < 0) |
630 | return ret; | |
631 | /* Read data */ | |
632 | if (dev->board.is_em2800) | |
633 | rsize_max = 4; | |
634 | else | |
635 | rsize_max = 64; | |
636 | while (remain > 0) { | |
637 | if (remain > rsize_max) | |
638 | rsize = rsize_max; | |
639 | else | |
640 | rsize = remain; | |
641 | ||
aab3125c | 642 | ret = i2c_master_recv(&dev->i2c_client[bus], data, rsize); |
d832c5b2 FS |
643 | if (ret < 0) |
644 | return ret; | |
645 | ||
646 | remain -= rsize; | |
647 | data += rsize; | |
648 | } | |
649 | ||
650 | return len; | |
651 | } | |
652 | ||
aab3125c MCC |
653 | static int em28xx_i2c_eeprom(struct em28xx *dev, unsigned bus, |
654 | u8 **eedata, u16 *eedata_len) | |
a6c2ba28 | 655 | { |
510e884c | 656 | const u16 len = 256; |
fa74aca3 FS |
657 | /* |
658 | * FIXME common length/size for bytes to read, to display, hash | |
510e884c | 659 | * calculation and returned device dataset. Simplifies the code a lot, |
fa74aca3 FS |
660 | * but we might have to deal with multiple sizes in the future ! |
661 | */ | |
50f0a9df | 662 | int err; |
510e884c FS |
663 | struct em28xx_eeprom *dev_config; |
664 | u8 buf, *data; | |
a6c2ba28 | 665 | |
a217968f | 666 | *eedata = NULL; |
510e884c | 667 | *eedata_len = 0; |
a217968f | 668 | |
aab3125c MCC |
669 | /* EEPROM is always on i2c bus 0 on all known devices. */ |
670 | ||
671 | dev->i2c_client[bus].addr = 0xa0 >> 1; | |
596d92d5 MCC |
672 | |
673 | /* Check if board has eeprom */ | |
aab3125c | 674 | err = i2c_master_recv(&dev->i2c_client[bus], &buf, 0); |
f2a01a00 | 675 | if (err < 0) { |
12d7ce18 | 676 | em28xx_info("board has no eeprom\n"); |
c41109fc | 677 | return -ENODEV; |
f2a01a00 | 678 | } |
596d92d5 | 679 | |
a217968f FS |
680 | data = kzalloc(len, GFP_KERNEL); |
681 | if (data == NULL) | |
682 | return -ENOMEM; | |
683 | ||
d832c5b2 | 684 | /* Read EEPROM content */ |
aab3125c MCC |
685 | err = em28xx_i2c_read_block(dev, bus, 0x0000, |
686 | dev->eeprom_addrwidth_16bit, | |
a217968f | 687 | len, data); |
d832c5b2 | 688 | if (err != len) { |
12d7ce18 | 689 | em28xx_errdev("failed to read eeprom (err=%d)\n", err); |
510e884c | 690 | goto error; |
a6c2ba28 | 691 | } |
90271964 | 692 | |
50f0a9df MCC |
693 | if (i2c_debug) { |
694 | /* Display eeprom content */ | |
695 | print_hex_dump(KERN_INFO, "eeprom ", DUMP_PREFIX_OFFSET, | |
696 | 16, 1, data, len, true); | |
697 | ||
698 | if (dev->eeprom_addrwidth_16bit) | |
699 | em28xx_info("eeprom %06x: ... (skipped)\n", 256); | |
a6c2ba28 | 700 | } |
701 | ||
87b52439 | 702 | if (dev->eeprom_addrwidth_16bit && |
a217968f | 703 | data[0] == 0x26 && data[3] == 0x00) { |
87b52439 | 704 | /* new eeprom format; size 4-64kb */ |
510e884c FS |
705 | u16 mc_start; |
706 | u16 hwconf_offset; | |
707 | ||
a217968f | 708 | dev->hash = em28xx_hash_mem(data, len, 32); |
510e884c FS |
709 | mc_start = (data[1] << 8) + 4; /* usually 0x0004 */ |
710 | ||
d230d5ad | 711 | em28xx_info("EEPROM ID = %02x %02x %02x %02x, EEPROM hash = 0x%08lx\n", |
510e884c FS |
712 | data[0], data[1], data[2], data[3], dev->hash); |
713 | em28xx_info("EEPROM info:\n"); | |
d230d5ad | 714 | em28xx_info("\tmicrocode start address = 0x%04x, boot configuration = 0x%02x\n", |
510e884c | 715 | mc_start, data[2]); |
fa74aca3 FS |
716 | /* |
717 | * boot configuration (address 0x0002): | |
87b52439 FS |
718 | * [0] microcode download speed: 1 = 400 kHz; 0 = 100 kHz |
719 | * [1] always selects 12 kb RAM | |
720 | * [2] USB device speed: 1 = force Full Speed; 0 = auto detect | |
721 | * [4] 1 = force fast mode and no suspend for device testing | |
722 | * [5:7] USB PHY tuning registers; determined by device | |
723 | * characterization | |
724 | */ | |
725 | ||
fa74aca3 FS |
726 | /* |
727 | * Read hardware config dataset offset from address | |
728 | * (microcode start + 46) | |
729 | */ | |
aab3125c MCC |
730 | err = em28xx_i2c_read_block(dev, bus, mc_start + 46, 1, 2, |
731 | data); | |
510e884c FS |
732 | if (err != 2) { |
733 | em28xx_errdev("failed to read hardware configuration data from eeprom (err=%d)\n", | |
734 | err); | |
735 | goto error; | |
736 | } | |
737 | ||
738 | /* Calculate hardware config dataset start address */ | |
739 | hwconf_offset = mc_start + data[0] + (data[1] << 8); | |
740 | ||
741 | /* Read hardware config dataset */ | |
fa74aca3 FS |
742 | /* |
743 | * NOTE: the microcode copy can be multiple pages long, but | |
510e884c FS |
744 | * we assume the hardware config dataset is the same as in |
745 | * the old eeprom and not longer than 256 bytes. | |
746 | * tveeprom is currently also limited to 256 bytes. | |
87b52439 | 747 | */ |
aab3125c MCC |
748 | err = em28xx_i2c_read_block(dev, bus, hwconf_offset, 1, len, |
749 | data); | |
510e884c FS |
750 | if (err != len) { |
751 | em28xx_errdev("failed to read hardware configuration data from eeprom (err=%d)\n", | |
752 | err); | |
753 | goto error; | |
754 | } | |
87b52439 | 755 | |
510e884c FS |
756 | /* Verify hardware config dataset */ |
757 | /* NOTE: not all devices provide this type of dataset */ | |
758 | if (data[0] != 0x1a || data[1] != 0xeb || | |
759 | data[2] != 0x67 || data[3] != 0x95) { | |
760 | em28xx_info("\tno hardware configuration dataset found in eeprom\n"); | |
761 | kfree(data); | |
762 | return 0; | |
763 | } | |
764 | ||
765 | /* TODO: decrypt eeprom data for camera bridges (em25xx, em276x+) */ | |
766 | ||
767 | } else if (!dev->eeprom_addrwidth_16bit && | |
768 | data[0] == 0x1a && data[1] == 0xeb && | |
769 | data[2] == 0x67 && data[3] == 0x95) { | |
770 | dev->hash = em28xx_hash_mem(data, len, 32); | |
d230d5ad | 771 | em28xx_info("EEPROM ID = %02x %02x %02x %02x, EEPROM hash = 0x%08lx\n", |
510e884c FS |
772 | data[0], data[1], data[2], data[3], dev->hash); |
773 | em28xx_info("EEPROM info:\n"); | |
774 | } else { | |
87b52439 | 775 | em28xx_info("unknown eeprom format or eeprom corrupted !\n"); |
510e884c FS |
776 | err = -ENODEV; |
777 | goto error; | |
f55eacbe FS |
778 | } |
779 | ||
a217968f | 780 | *eedata = data; |
510e884c | 781 | *eedata_len = len; |
32bf7c6c | 782 | dev_config = (void *)*eedata; |
a217968f | 783 | |
510e884c | 784 | switch (le16_to_cpu(dev_config->chip_conf) >> 4 & 0x3) { |
a6c2ba28 | 785 | case 0: |
12d7ce18 | 786 | em28xx_info("\tNo audio on board.\n"); |
a6c2ba28 | 787 | break; |
788 | case 1: | |
12d7ce18 | 789 | em28xx_info("\tAC97 audio (5 sample rates)\n"); |
a6c2ba28 | 790 | break; |
791 | case 2: | |
687ff8b0 FS |
792 | if (dev->chip_id < CHIP_ID_EM2860) |
793 | em28xx_info("\tI2S audio, sample rate=32k\n"); | |
794 | else | |
795 | em28xx_info("\tI2S audio, 3 sample rates\n"); | |
a6c2ba28 | 796 | break; |
797 | case 3: | |
687ff8b0 FS |
798 | if (dev->chip_id < CHIP_ID_EM2860) |
799 | em28xx_info("\tI2S audio, 3 sample rates\n"); | |
800 | else | |
801 | em28xx_info("\tI2S audio, 5 sample rates\n"); | |
a6c2ba28 | 802 | break; |
803 | } | |
804 | ||
510e884c | 805 | if (le16_to_cpu(dev_config->chip_conf) & 1 << 3) |
12d7ce18 | 806 | em28xx_info("\tUSB Remote wakeup capable\n"); |
a6c2ba28 | 807 | |
510e884c | 808 | if (le16_to_cpu(dev_config->chip_conf) & 1 << 2) |
12d7ce18 | 809 | em28xx_info("\tUSB Self power capable\n"); |
a6c2ba28 | 810 | |
510e884c | 811 | switch (le16_to_cpu(dev_config->chip_conf) & 0x3) { |
a6c2ba28 | 812 | case 0: |
12d7ce18 | 813 | em28xx_info("\t500mA max power\n"); |
a6c2ba28 | 814 | break; |
815 | case 1: | |
12d7ce18 | 816 | em28xx_info("\t400mA max power\n"); |
a6c2ba28 | 817 | break; |
818 | case 2: | |
12d7ce18 | 819 | em28xx_info("\t300mA max power\n"); |
a6c2ba28 | 820 | break; |
821 | case 3: | |
12d7ce18 | 822 | em28xx_info("\t200mA max power\n"); |
a6c2ba28 | 823 | break; |
824 | } | |
12d7ce18 | 825 | em28xx_info("\tTable at offset 0x%02x, strings=0x%04x, 0x%04x, 0x%04x\n", |
510e884c FS |
826 | dev_config->string_idx_table, |
827 | le16_to_cpu(dev_config->string1), | |
828 | le16_to_cpu(dev_config->string2), | |
829 | le16_to_cpu(dev_config->string3)); | |
a6c2ba28 | 830 | |
831 | return 0; | |
510e884c FS |
832 | |
833 | error: | |
834 | kfree(data); | |
835 | return err; | |
a6c2ba28 | 836 | } |
837 | ||
838 | /* ----------------------------------------------------------- */ | |
839 | ||
a6c2ba28 | 840 | /* |
841 | * functionality() | |
842 | */ | |
aab3125c | 843 | static u32 functionality(struct i2c_adapter *i2c_adap) |
a6c2ba28 | 844 | { |
aab3125c | 845 | struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data; |
aab3125c | 846 | |
a3ea4bf9 FS |
847 | if ((i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) || |
848 | (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)) { | |
849 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; | |
850 | } else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800) { | |
851 | return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) & | |
852 | ~I2C_FUNC_SMBUS_WRITE_BLOCK_DATA; | |
853 | } | |
854 | ||
855 | WARN(1, "Unknown i2c bus algorithm.\n"); | |
856 | return 0; | |
a6c2ba28 | 857 | } |
858 | ||
3acf2809 MCC |
859 | static struct i2c_algorithm em28xx_algo = { |
860 | .master_xfer = em28xx_i2c_xfer, | |
a6c2ba28 | 861 | .functionality = functionality, |
862 | }; | |
863 | ||
3acf2809 | 864 | static struct i2c_adapter em28xx_adap_template = { |
a6c2ba28 | 865 | .owner = THIS_MODULE, |
3acf2809 | 866 | .name = "em28xx", |
3acf2809 | 867 | .algo = &em28xx_algo, |
a6c2ba28 | 868 | }; |
869 | ||
3acf2809 MCC |
870 | static struct i2c_client em28xx_client_template = { |
871 | .name = "em28xx internal", | |
a6c2ba28 | 872 | }; |
873 | ||
874 | /* ----------------------------------------------------------- */ | |
875 | ||
876 | /* | |
877 | * i2c_devs | |
878 | * incomplete list of known devices | |
879 | */ | |
880 | static char *i2c_devs[128] = { | |
9aa785b1 | 881 | [0x1c >> 1] = "lgdt330x", |
0b3966e4 | 882 | [0x3e >> 1] = "remote IR sensor", |
a6c2ba28 | 883 | [0x4a >> 1] = "saa7113h", |
729841ed | 884 | [0x52 >> 1] = "drxk", |
a6c2ba28 | 885 | [0x60 >> 1] = "remote IR sensor", |
da45a2a5 | 886 | [0x8e >> 1] = "remote IR sensor", |
a6c2ba28 | 887 | [0x86 >> 1] = "tda9887", |
888 | [0x80 >> 1] = "msp34xx", | |
889 | [0x88 >> 1] = "msp34xx", | |
890 | [0xa0 >> 1] = "eeprom", | |
2bd1d9eb | 891 | [0xb0 >> 1] = "tda9874", |
a6c2ba28 | 892 | [0xb8 >> 1] = "tvp5150a", |
791a08fc | 893 | [0xba >> 1] = "webcam sensor or tvp5150a", |
a6c2ba28 | 894 | [0xc0 >> 1] = "tuner (analog)", |
895 | [0xc2 >> 1] = "tuner (analog)", | |
896 | [0xc4 >> 1] = "tuner (analog)", | |
897 | [0xc6 >> 1] = "tuner (analog)", | |
898 | }; | |
899 | ||
900 | /* | |
901 | * do_i2c_scan() | |
902 | * check i2c address range for devices | |
903 | */ | |
aab3125c | 904 | void em28xx_do_i2c_scan(struct em28xx *dev, unsigned bus) |
a6c2ba28 | 905 | { |
fad7b958 | 906 | u8 i2c_devicelist[128]; |
a6c2ba28 | 907 | unsigned char buf; |
908 | int i, rc; | |
909 | ||
fad7b958 SS |
910 | memset(i2c_devicelist, 0, ARRAY_SIZE(i2c_devicelist)); |
911 | ||
53c4e955 | 912 | for (i = 0; i < ARRAY_SIZE(i2c_devs); i++) { |
aab3125c MCC |
913 | dev->i2c_client[bus].addr = i; |
914 | rc = i2c_master_recv(&dev->i2c_client[bus], &buf, 0); | |
a6c2ba28 | 915 | if (rc < 0) |
916 | continue; | |
fad7b958 | 917 | i2c_devicelist[i] = i; |
aab3125c MCC |
918 | em28xx_info("found i2c device @ 0x%x on bus %d [%s]\n", |
919 | i << 1, bus, i2c_devs[i] ? i2c_devs[i] : "???"); | |
a6c2ba28 | 920 | } |
fad7b958 | 921 | |
aab3125c MCC |
922 | if (bus == dev->def_i2c_bus) |
923 | dev->i2c_hash = em28xx_hash_mem(i2c_devicelist, | |
924 | ARRAY_SIZE(i2c_devicelist), 32); | |
a6c2ba28 | 925 | } |
926 | ||
a6c2ba28 | 927 | /* |
3acf2809 | 928 | * em28xx_i2c_register() |
a6c2ba28 | 929 | * register i2c bus |
930 | */ | |
a3ea4bf9 FS |
931 | int em28xx_i2c_register(struct em28xx *dev, unsigned bus, |
932 | enum em28xx_i2c_algo_type algo_type) | |
a6c2ba28 | 933 | { |
f2a01a00 DSL |
934 | int retval; |
935 | ||
3acf2809 MCC |
936 | BUG_ON(!dev->em28xx_write_regs || !dev->em28xx_read_reg); |
937 | BUG_ON(!dev->em28xx_write_regs_req || !dev->em28xx_read_reg_req); | |
f2a01a00 | 938 | |
aab3125c MCC |
939 | if (bus >= NUM_I2C_BUSES) |
940 | return -ENODEV; | |
941 | ||
942 | dev->i2c_adap[bus] = em28xx_adap_template; | |
943 | dev->i2c_adap[bus].dev.parent = &dev->udev->dev; | |
944 | strcpy(dev->i2c_adap[bus].name, dev->name); | |
945 | ||
946 | dev->i2c_bus[bus].bus = bus; | |
a3ea4bf9 | 947 | dev->i2c_bus[bus].algo_type = algo_type; |
aab3125c MCC |
948 | dev->i2c_bus[bus].dev = dev; |
949 | dev->i2c_adap[bus].algo_data = &dev->i2c_bus[bus]; | |
aab3125c MCC |
950 | |
951 | retval = i2c_add_adapter(&dev->i2c_adap[bus]); | |
f2a01a00 DSL |
952 | if (retval < 0) { |
953 | em28xx_errdev("%s: i2c_add_adapter failed! retval [%d]\n", | |
fdf1bc9f | 954 | __func__, retval); |
f2a01a00 DSL |
955 | return retval; |
956 | } | |
a6c2ba28 | 957 | |
aab3125c MCC |
958 | dev->i2c_client[bus] = em28xx_client_template; |
959 | dev->i2c_client[bus].adapter = &dev->i2c_adap[bus]; | |
a6c2ba28 | 960 | |
aab3125c MCC |
961 | /* Up to now, all eeproms are at bus 0 */ |
962 | if (!bus) { | |
963 | retval = em28xx_i2c_eeprom(dev, bus, &dev->eedata, &dev->eedata_len); | |
964 | if ((retval < 0) && (retval != -ENODEV)) { | |
965 | em28xx_errdev("%s: em28xx_i2_eeprom failed! retval [%d]\n", | |
fdf1bc9f | 966 | __func__, retval); |
c41109fc | 967 | |
aab3125c MCC |
968 | return retval; |
969 | } | |
f2a01a00 | 970 | } |
a6c2ba28 | 971 | |
972 | if (i2c_scan) | |
aab3125c | 973 | em28xx_do_i2c_scan(dev, bus); |
c41109fc | 974 | |
a6c2ba28 | 975 | return 0; |
976 | } | |
977 | ||
978 | /* | |
3acf2809 | 979 | * em28xx_i2c_unregister() |
a6c2ba28 | 980 | * unregister i2c_bus |
981 | */ | |
aab3125c | 982 | int em28xx_i2c_unregister(struct em28xx *dev, unsigned bus) |
a6c2ba28 | 983 | { |
aab3125c MCC |
984 | if (bus >= NUM_I2C_BUSES) |
985 | return -ENODEV; | |
986 | ||
987 | i2c_del_adapter(&dev->i2c_adap[bus]); | |
a6c2ba28 | 988 | return 0; |
989 | } |