Commit | Line | Data |
---|---|---|
a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
0cf544a6 | 7 | Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> |
a6c2ba28 | 8 | |
9 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2 of the License, or | |
14 | (at your option) any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software | |
23 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
3acf2809 MCC |
26 | #ifndef _EM28XX_H |
27 | #define _EM28XX_H | |
a6c2ba28 | 28 | |
37ecc7b1 | 29 | #define EM28XX_VERSION "0.2.2" |
d8992b09 | 30 | #define DRIVER_DESC "Empia em28xx device driver" |
ce67943e | 31 | |
39a96b4c MCC |
32 | #include <linux/workqueue.h> |
33 | #include <linux/i2c.h> | |
34 | #include <linux/mutex.h> | |
47677e51 | 35 | #include <linux/kref.h> |
cb77d010 | 36 | #include <linux/videodev2.h> |
39a96b4c | 37 | |
2d700715 | 38 | #include <media/videobuf2-v4l2.h> |
d3829fad | 39 | #include <media/videobuf2-vmalloc.h> |
f2cf250a | 40 | #include <media/v4l2-device.h> |
081b945e | 41 | #include <media/v4l2-ctrls.h> |
69a61642 | 42 | #include <media/v4l2-fh.h> |
b5dcee22 | 43 | #include <media/i2c/ir-kbd-i2c.h> |
6bda9644 | 44 | #include <media/rc-core.h> |
3ca9c093 | 45 | #include "tuner-xc2028.h" |
82e7dbbd | 46 | #include "xc5000.h" |
2ba890ec | 47 | #include "em28xx-reg.h" |
3aefb79a MCC |
48 | |
49 | /* Boards supported by driver */ | |
d5b6a746 FS |
50 | #define EM2800_BOARD_UNKNOWN 0 |
51 | #define EM2820_BOARD_UNKNOWN 1 | |
52 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
53 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
54 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
55 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
56 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
57 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
58 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
59 | #define EM2820_BOARD_PINNACLE_DVC_90 9 | |
60 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 | |
61 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
62 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
63 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 | |
64 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 | |
65 | #define EM2800_BOARD_VGEAR_POCKETTV 15 | |
66 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16 | |
67 | #define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17 | |
68 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18 | |
69 | #define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19 | |
70 | #define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20 | |
71 | #define EM2800_BOARD_GRABBEEX_USB2800 21 | |
95b86a9a DSL |
72 | #define EM2750_BOARD_UNKNOWN 22 |
73 | #define EM2750_BOARD_DLCW_130 23 | |
74 | #define EM2820_BOARD_DLINK_USB_TV 24 | |
75 | #define EM2820_BOARD_GADMEI_UTV310 25 | |
76 | #define EM2820_BOARD_HERCULES_SMART_TV_USB2 26 | |
77 | #define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27 | |
78 | #define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28 | |
443fed9f | 79 | #define EM2860_BOARD_TVP5150_REFERENCE_DESIGN 29 |
95b86a9a DSL |
80 | #define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30 |
81 | #define EM2821_BOARD_USBGEAR_VD204 31 | |
82 | #define EM2821_BOARD_SUPERCOMP_USB_2 32 | |
8298f2f8 | 83 | #define EM2860_BOARD_ELGATO_VIDEO_CAPTURE 33 |
95b86a9a DSL |
84 | #define EM2860_BOARD_TERRATEC_HYBRID_XS 34 |
85 | #define EM2860_BOARD_TYPHOON_DVD_MAKER 35 | |
86 | #define EM2860_BOARD_NETGMBH_CAM 36 | |
87 | #define EM2860_BOARD_GADMEI_UTV330 37 | |
88 | #define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38 | |
89 | #define EM2861_BOARD_KWORLD_PVRTV_300U 39 | |
90 | #define EM2861_BOARD_PLEXTOR_PX_TV100U 40 | |
91 | #define EM2870_BOARD_KWORLD_350U 41 | |
92 | #define EM2870_BOARD_KWORLD_355U 42 | |
93 | #define EM2870_BOARD_TERRATEC_XS 43 | |
94 | #define EM2870_BOARD_TERRATEC_XS_MT2060 44 | |
95 | #define EM2870_BOARD_PINNACLE_PCTV_DVB 45 | |
96 | #define EM2870_BOARD_COMPRO_VIDEOMATE 46 | |
97 | #define EM2880_BOARD_KWORLD_DVB_305U 47 | |
98 | #define EM2880_BOARD_KWORLD_DVB_310U 48 | |
99 | #define EM2880_BOARD_MSI_DIGIVOX_AD 49 | |
100 | #define EM2880_BOARD_MSI_DIGIVOX_AD_II 50 | |
101 | #define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51 | |
102 | #define EM2881_BOARD_DNT_DA2_HYBRID 52 | |
103 | #define EM2881_BOARD_PINNACLE_HYBRID_PRO 53 | |
104 | #define EM2882_BOARD_KWORLD_VS_DVBT 54 | |
105 | #define EM2882_BOARD_TERRATEC_HYBRID_XS 55 | |
09bc1942 | 106 | #define EM2882_BOARD_PINNACLE_HYBRID_PRO_330E 56 |
d5b6a746 | 107 | #define EM2883_BOARD_KWORLD_HYBRID_330U 57 |
ee281b85 | 108 | #define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58 |
38b2df95 | 109 | #define EM2874_BOARD_PCTV_HD_MINI_80E 59 |
f89bc329 | 110 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60 |
1e1addd5 | 111 | #define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61 |
f7fe3e6f | 112 | #define EM2820_BOARD_GADMEI_TVR200 62 |
d5b6a746 FS |
113 | #define EM2860_BOARD_KAIOMY_TVNPC_U2 63 |
114 | #define EM2860_BOARD_EASYCAP 64 | |
f74a61e3 | 115 | #define EM2820_BOARD_IODATA_GVMVP_SZ 65 |
e5db5d44 | 116 | #define EM2880_BOARD_EMPIRE_DUAL_TV 66 |
4557af9c | 117 | #define EM2860_BOARD_TERRATEC_GRABBY 67 |
766ed64d | 118 | #define EM2860_BOARD_TERRATEC_AV350 68 |
d7de5d8f | 119 | #define EM2882_BOARD_KWORLD_ATSC_315U 69 |
19859229 | 120 | #define EM2882_BOARD_EVGA_INDTUBE 70 |
d5b6a746 FS |
121 | #define EM2820_BOARD_SILVERCREST_WEBCAM 71 |
122 | #define EM2861_BOARD_GADMEI_UTV330PLUS 72 | |
123 | #define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73 | |
694a101e | 124 | #define EM2800_BOARD_VC211A 74 |
7ca7ef60 | 125 | #define EM2882_BOARD_DIKOM_DK300 75 |
7e48b30a | 126 | #define EM2870_BOARD_KWORLD_A340 76 |
fec528b7 | 127 | #define EM2874_BOARD_LEADERSHIP_ISDBT 77 |
d5b6a746 | 128 | #define EM28174_BOARD_PCTV_290E 78 |
fec528b7 | 129 | #define EM2884_BOARD_TERRATEC_H5 79 |
d5b6a746 | 130 | #define EM28174_BOARD_PCTV_460E 80 |
82e7dbbd | 131 | #define EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C 81 |
a1ed02e9 | 132 | #define EM2884_BOARD_CINERGY_HTC_STICK 82 |
d5b6a746 FS |
133 | #define EM2860_BOARD_HT_VIDBOX_NW03 83 |
134 | #define EM2874_BOARD_MAXMEDIA_UB425_TC 84 | |
135 | #define EM2884_BOARD_PCTV_510E 85 | |
136 | #define EM2884_BOARD_PCTV_520E 86 | |
89040136 | 137 | #define EM2884_BOARD_TERRATEC_HTC_USB_XS 87 |
4159d01b | 138 | #define EM2884_BOARD_C3TECH_DIGITAL_DUO 88 |
7c1dfdb0 | 139 | #define EM2874_BOARD_DELOCK_61959 89 |
6dbea9f0 | 140 | #define EM2874_BOARD_KWORLD_UB435Q_V2 90 |
0c37e736 | 141 | #define EM2765_BOARD_SPEEDLINK_VAD_LAPLACE 91 |
ec573362 | 142 | #define EM28178_BOARD_PCTV_461E 92 |
02bc1f55 | 143 | #define EM2874_BOARD_KWORLD_UB435Q_V3 93 |
19229240 | 144 | #define EM28178_BOARD_PCTV_292E 94 |
eace9721 | 145 | #define EM2861_BOARD_LEADTEK_VC100 95 |
fc30dd76 | 146 | #define EM28178_BOARD_TERRATEC_T2_STICK_HD 96 |
1fe0fbd6 | 147 | #define EM2884_BOARD_ELGATO_EYETV_HYBRID_2008 97 |
3aefb79a MCC |
148 | |
149 | /* Limits minimum and default number of buffers */ | |
150 | #define EM28XX_MIN_BUF 4 | |
151 | #define EM28XX_DEF_BUF 8 | |
a6c2ba28 | 152 | |
c4a98793 MCC |
153 | /*Limits the max URB message size */ |
154 | #define URB_MAX_CTRL_SIZE 80 | |
155 | ||
95b86a9a DSL |
156 | /* Params for validated field */ |
157 | #define EM28XX_BOARD_NOT_VALIDATED 1 | |
158 | #define EM28XX_BOARD_VALIDATED 0 | |
159 | ||
22cff7b3 DSL |
160 | /* Params for em28xx_cmd() audio */ |
161 | #define EM28XX_START_AUDIO 1 | |
162 | #define EM28XX_STOP_AUDIO 0 | |
163 | ||
596d92d5 | 164 | /* maximum number of em28xx boards */ |
3687e1e6 | 165 | #define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */ |
596d92d5 | 166 | |
a6c2ba28 | 167 | /* maximum number of frames that can be queued */ |
3acf2809 | 168 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 169 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 170 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 171 | |
172 | /* number of buffers for isoc transfers */ | |
3acf2809 | 173 | #define EM28XX_NUM_BUFS 5 |
86d38d1e | 174 | #define EM28XX_DVB_NUM_BUFS 5 |
a6c2ba28 | 175 | |
c7a45e5b MCC |
176 | /* max number of I2C buses on em28xx devices */ |
177 | #define NUM_I2C_BUSES 2 | |
178 | ||
515688a8 | 179 | /* isoc transfers: number of packets for each buffer |
33c02fac | 180 | windows requests only 64 packets .. so we better do the same |
d5e52653 MCC |
181 | this is what I found out for all alternate numbers there! |
182 | */ | |
515688a8 FS |
183 | #define EM28XX_NUM_ISOC_PACKETS 64 |
184 | #define EM28XX_DVB_NUM_ISOC_PACKETS 64 | |
a6c2ba28 | 185 | |
c647a91a FS |
186 | /* bulk transfers: transfer buffer size = packet size * packet multiplier |
187 | USB 2.0 spec says bulk packet size is always 512 bytes | |
188 | */ | |
189 | #define EM28XX_BULK_PACKET_MULTIPLIER 384 | |
190 | #define EM28XX_DVB_BULK_PACKET_MULTIPLIER 384 | |
191 | ||
3acf2809 | 192 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 193 | |
d20e4ed6 MCC |
194 | /* |
195 | * Time in msecs to wait for i2c xfers to finish. | |
196 | * 35ms is the maximum time a SMBUS device could wait when | |
197 | * clock stretching is used. As the transfer itself will take | |
198 | * some time to happen, set it to 35 ms. | |
199 | * | |
200 | * Ok, I2C doesn't specify any limit. So, eventually, we may need | |
201 | * to increase this timeout. | |
202 | * | |
203 | * FIXME: this assumes that an I2C message is not longer than 1ms. | |
204 | * This is actually dependent on the I2C bus speed, although most | |
205 | * devices use a 100kHz clock. So, this assumtion is true most of | |
206 | * the time. | |
207 | */ | |
208 | #define EM28XX_I2C_XFER_TIMEOUT 36 | |
596d92d5 | 209 | |
5022a208 MCC |
210 | /* time in msecs to wait for AC97 xfers to finish */ |
211 | #define EM28XX_AC97_XFER_TIMEOUT 100 | |
212 | ||
f5222609 FS |
213 | /* max. number of button state polling addresses */ |
214 | #define EM28XX_NUM_BUTTON_ADDRESSES_MAX 5 | |
215 | ||
3aefb79a | 216 | enum em28xx_mode { |
2fe3e2ee | 217 | EM28XX_SUSPEND, |
3aefb79a MCC |
218 | EM28XX_ANALOG_MODE, |
219 | EM28XX_DIGITAL_MODE, | |
220 | }; | |
221 | ||
579f72e4 AT |
222 | struct em28xx; |
223 | ||
f0fa9936 | 224 | struct em28xx_usb_bufs { |
ad0ebb96 MCC |
225 | /* max packet size of isoc transaction */ |
226 | int max_pkt_size; | |
227 | ||
86d38d1e GG |
228 | /* number of packets in each buffer */ |
229 | int num_packets; | |
230 | ||
ad0ebb96 MCC |
231 | /* number of allocated urbs */ |
232 | int num_bufs; | |
233 | ||
f0fa9936 | 234 | /* urb for isoc/bulk transfers */ |
ad0ebb96 MCC |
235 | struct urb **urb; |
236 | ||
f0fa9936 | 237 | /* transfer buffers for isoc/bulk transfer */ |
ad0ebb96 | 238 | char **transfer_buffer; |
86d38d1e GG |
239 | }; |
240 | ||
74209dc0 FS |
241 | struct em28xx_usb_ctl { |
242 | /* isoc/bulk transfer buffers for analog mode */ | |
f0fa9936 | 243 | struct em28xx_usb_bufs analog_bufs; |
86d38d1e | 244 | |
74209dc0 | 245 | /* isoc/bulk transfer buffers for digital mode */ |
f0fa9936 | 246 | struct em28xx_usb_bufs digital_bufs; |
ad0ebb96 | 247 | |
ad0ebb96 | 248 | /* Stores already requested buffers */ |
fdf1bc9f MCC |
249 | struct em28xx_buffer *vid_buf; |
250 | struct em28xx_buffer *vbi_buf; | |
ad0ebb96 | 251 | |
74209dc0 | 252 | /* copy data from URB */ |
fdf1bc9f | 253 | int (*urb_data_copy)(struct em28xx *dev, struct urb *urb); |
579f72e4 | 254 | |
ad0ebb96 MCC |
255 | }; |
256 | ||
bddcf633 | 257 | /* Struct to enumberate video formats */ |
ad0ebb96 MCC |
258 | struct em28xx_fmt { |
259 | char *name; | |
260 | u32 fourcc; /* v4l2 format id */ | |
bddcf633 MCC |
261 | int depth; |
262 | int reg; | |
ad0ebb96 MCC |
263 | }; |
264 | ||
265 | /* buffer for one video frame */ | |
266 | struct em28xx_buffer { | |
267 | /* common v4l buffer stuff -- must be first */ | |
2d700715 | 268 | struct vb2_v4l2_buffer vb; |
d3829fad | 269 | struct list_head list; |
ad0ebb96 | 270 | |
d3829fad DH |
271 | void *mem; |
272 | unsigned int length; | |
a6c2ba28 | 273 | int top_field; |
8732533b FS |
274 | |
275 | /* counter to control buffer fill */ | |
276 | unsigned int pos; | |
277 | /* NOTE; in interlaced mode, this value is reset to zero at | |
278 | * the start of each new field (not frame !) */ | |
4078d625 FS |
279 | |
280 | /* pointer to vmalloc memory address in vb */ | |
281 | char *vb_buf; | |
ad0ebb96 MCC |
282 | }; |
283 | ||
284 | struct em28xx_dmaqueue { | |
285 | struct list_head active; | |
ad0ebb96 MCC |
286 | |
287 | wait_queue_head_t wq; | |
a6c2ba28 | 288 | }; |
289 | ||
a6c2ba28 | 290 | /* inputs */ |
291 | ||
3acf2809 MCC |
292 | #define MAX_EM28XX_INPUT 4 |
293 | enum enum28xx_itype { | |
d83a96a5 | 294 | EM28XX_VMUX_COMPOSITE = 1, |
3acf2809 MCC |
295 | EM28XX_VMUX_SVIDEO, |
296 | EM28XX_VMUX_TELEVISION, | |
3acf2809 | 297 | EM28XX_RADIO, |
a6c2ba28 | 298 | }; |
299 | ||
35643943 MCC |
300 | enum em28xx_ac97_mode { |
301 | EM28XX_NO_AC97 = 0, | |
302 | EM28XX_AC97_EM202, | |
209acc02 | 303 | EM28XX_AC97_SIGMATEL, |
35643943 MCC |
304 | EM28XX_AC97_OTHER, |
305 | }; | |
306 | ||
307 | struct em28xx_audio_mode { | |
308 | enum em28xx_ac97_mode ac97; | |
920f1e4a | 309 | }; |
35643943 | 310 | |
920f1e4a FS |
311 | enum em28xx_int_audio_type { |
312 | EM28XX_INT_AUDIO_NONE = 0, | |
313 | EM28XX_INT_AUDIO_AC97, | |
314 | EM28XX_INT_AUDIO_I2S, | |
5c2231c8 | 315 | }; |
35643943 | 316 | |
c5874208 FS |
317 | enum em28xx_usb_audio_type { |
318 | EM28XX_USB_AUDIO_NONE = 0, | |
319 | EM28XX_USB_AUDIO_CLASS, | |
320 | EM28XX_USB_AUDIO_VENDOR, | |
5c2231c8 DH |
321 | }; |
322 | ||
5faff789 MCC |
323 | /* em28xx has two audio inputs: tuner and line in. |
324 | However, on most devices, an auxiliary AC97 codec device is used. | |
325 | The AC97 device may have several different inputs and outputs, | |
326 | depending on their model. So, it is possible to use AC97 mixer to | |
327 | address more than two different entries. | |
328 | */ | |
539c96d0 | 329 | enum em28xx_amux { |
5faff789 MCC |
330 | /* This is the only entry for em28xx tuner input */ |
331 | EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */ | |
332 | ||
333 | EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */ | |
334 | ||
335 | /* Some less-common mixer setups */ | |
336 | EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */ | |
337 | EM28XX_AMUX_PHONE, | |
338 | EM28XX_AMUX_MIC, | |
339 | EM28XX_AMUX_CD, | |
340 | EM28XX_AMUX_AUX, | |
341 | EM28XX_AMUX_PCM_OUT, | |
539c96d0 MCC |
342 | }; |
343 | ||
35ae6f04 | 344 | enum em28xx_aout { |
8866f9cf | 345 | /* AC97 outputs */ |
e879b8eb MCC |
346 | EM28XX_AOUT_MASTER = 1 << 0, |
347 | EM28XX_AOUT_LINE = 1 << 1, | |
348 | EM28XX_AOUT_MONO = 1 << 2, | |
349 | EM28XX_AOUT_LFE = 1 << 3, | |
350 | EM28XX_AOUT_SURR = 1 << 4, | |
8866f9cf MCC |
351 | |
352 | /* PCM IN Mixer - used by AC97_RECORD_SELECT register */ | |
353 | EM28XX_AOUT_PCM_IN = 1 << 7, | |
354 | ||
355 | /* Bits 10-8 are used to indicate the PCM IN record select */ | |
356 | EM28XX_AOUT_PCM_MIC_PCM = 0 << 8, | |
357 | EM28XX_AOUT_PCM_CD = 1 << 8, | |
358 | EM28XX_AOUT_PCM_VIDEO = 2 << 8, | |
359 | EM28XX_AOUT_PCM_AUX = 3 << 8, | |
360 | EM28XX_AOUT_PCM_LINE = 4 << 8, | |
361 | EM28XX_AOUT_PCM_STEREO = 5 << 8, | |
362 | EM28XX_AOUT_PCM_MONO = 6 << 8, | |
363 | EM28XX_AOUT_PCM_PHONE = 7 << 8, | |
35ae6f04 MCC |
364 | }; |
365 | ||
32929fb4 | 366 | static inline int ac97_return_record_select(int a_out) |
8866f9cf MCC |
367 | { |
368 | return (a_out & 0x700) >> 8; | |
369 | } | |
370 | ||
122b77e5 MCC |
371 | struct em28xx_reg_seq { |
372 | int reg; | |
373 | unsigned char val, mask; | |
374 | int sleep; | |
375 | }; | |
376 | ||
3acf2809 MCC |
377 | struct em28xx_input { |
378 | enum enum28xx_itype type; | |
a6c2ba28 | 379 | unsigned int vmux; |
539c96d0 | 380 | enum em28xx_amux amux; |
35ae6f04 | 381 | enum em28xx_aout aout; |
122b77e5 | 382 | struct em28xx_reg_seq *gpio; |
a6c2ba28 | 383 | }; |
384 | ||
3acf2809 | 385 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 386 | |
3acf2809 | 387 | enum em28xx_decoder { |
527f09a9 | 388 | EM28XX_NODECODER = 0, |
3acf2809 | 389 | EM28XX_TVP5150, |
ec5de990 | 390 | EM28XX_SAA711X, |
527f09a9 MCC |
391 | }; |
392 | ||
393 | enum em28xx_sensor { | |
394 | EM28XX_NOSENSOR = 0, | |
02e7804b | 395 | EM28XX_MT9V011, |
b80fd2d8 | 396 | EM28XX_MT9M001, |
f2e26ae7 | 397 | EM28XX_MT9M111, |
e4b7131d | 398 | EM28XX_OV2640, |
a6c2ba28 | 399 | }; |
400 | ||
df7fa09c MCC |
401 | enum em28xx_adecoder { |
402 | EM28XX_NOADECODER = 0, | |
403 | EM28XX_TVAUDIO, | |
404 | }; | |
405 | ||
6b8a3170 FS |
406 | enum em28xx_led_role { |
407 | EM28XX_LED_ANALOG_CAPTURING = 0, | |
54e92549 | 408 | EM28XX_LED_DIGITAL_CAPTURING, |
6063d077 | 409 | EM28XX_LED_ILLUMINATION, |
6b8a3170 FS |
410 | EM28XX_NUM_LED_ROLES, /* must be the last */ |
411 | }; | |
412 | ||
07e4de30 | 413 | struct em28xx_led { |
6b8a3170 | 414 | enum em28xx_led_role role; |
07e4de30 FS |
415 | u8 gpio_reg; |
416 | u8 gpio_mask; | |
417 | bool inverted; | |
418 | }; | |
419 | ||
f5222609 FS |
420 | enum em28xx_button_role { |
421 | EM28XX_BUTTON_SNAPSHOT = 0, | |
6063d077 | 422 | EM28XX_BUTTON_ILLUMINATION, |
f5222609 FS |
423 | EM28XX_NUM_BUTTON_ROLES, /* must be the last */ |
424 | }; | |
425 | ||
426 | struct em28xx_button { | |
427 | enum em28xx_button_role role; | |
428 | u8 reg_r; | |
429 | u8 reg_clearing; | |
430 | u8 mask; | |
431 | bool inverted; | |
432 | }; | |
433 | ||
3acf2809 | 434 | struct em28xx_board { |
a6c2ba28 | 435 | char *name; |
505b6d0b | 436 | int vchannels; |
a6c2ba28 | 437 | int tuner_type; |
66767920 | 438 | int tuner_addr; |
aab3125c | 439 | unsigned def_i2c_bus; /* Default I2C bus */ |
a6c2ba28 | 440 | |
441 | /* i2c flags */ | |
442 | unsigned int tda9887_conf; | |
443 | ||
017ab4b1 | 444 | /* GPIO sequences */ |
122b77e5 | 445 | struct em28xx_reg_seq *dvb_gpio; |
2fe3e2ee | 446 | struct em28xx_reg_seq *suspend_gpio; |
017ab4b1 | 447 | struct em28xx_reg_seq *tuner_gpio; |
2bd1d9eb | 448 | struct em28xx_reg_seq *mute_gpio; |
122b77e5 | 449 | |
74f38a82 | 450 | unsigned int is_em2800:1; |
a6c2ba28 | 451 | unsigned int has_msp34xx:1; |
5add9a6f | 452 | unsigned int mts_firmware:1; |
c8793b03 | 453 | unsigned int max_range_640_480:1; |
3aefb79a | 454 | unsigned int has_dvb:1; |
c43221df | 455 | unsigned int is_webcam:1; |
95b86a9a | 456 | unsigned int valid:1; |
ac07bb73 | 457 | unsigned int has_ir_i2c:1; |
3abee53e | 458 | |
a2070c66 | 459 | unsigned char xclk, i2c_speed; |
f2cf250a DSL |
460 | unsigned char radio_addr; |
461 | unsigned short tvaudio_addr; | |
a2070c66 | 462 | |
3acf2809 | 463 | enum em28xx_decoder decoder; |
df7fa09c | 464 | enum em28xx_adecoder adecoder; |
a6c2ba28 | 465 | |
3acf2809 | 466 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 467 | struct em28xx_input radio; |
02858eed | 468 | char *ir_codes; |
07e4de30 FS |
469 | |
470 | /* LEDs that need to be controlled explicitly */ | |
6b8a3170 | 471 | struct em28xx_led *leds; |
f5222609 FS |
472 | |
473 | /* Buttons */ | |
474 | struct em28xx_button *buttons; | |
a6c2ba28 | 475 | }; |
476 | ||
3acf2809 | 477 | struct em28xx_eeprom { |
0c28dcc0 FS |
478 | u8 id[4]; /* 1a eb 67 95 */ |
479 | __le16 vendor_ID; | |
480 | __le16 product_ID; | |
a6c2ba28 | 481 | |
0c28dcc0 | 482 | __le16 chip_conf; |
a6c2ba28 | 483 | |
0c28dcc0 | 484 | __le16 board_conf; |
a6c2ba28 | 485 | |
0c28dcc0 | 486 | __le16 string1, string2, string3; |
a6c2ba28 | 487 | |
488 | u8 string_idx_table; | |
489 | }; | |
490 | ||
6d79468d | 491 | #define EM28XX_CAPTURE_STREAM_EN 1 |
3aefb79a MCC |
492 | |
493 | /* em28xx extensions */ | |
6d79468d | 494 | #define EM28XX_AUDIO 0x10 |
3aefb79a | 495 | #define EM28XX_DVB 0x20 |
f4d4e765 | 496 | #define EM28XX_RC 0x30 |
01c28193 | 497 | #define EM28XX_V4L2 0x40 |
6d79468d | 498 | |
8c873d31 DH |
499 | /* em28xx resource types (used for res_get/res_lock etc */ |
500 | #define EM28XX_RESOURCE_VIDEO 0x01 | |
501 | #define EM28XX_RESOURCE_VBI 0x02 | |
502 | ||
95d2608b FS |
503 | struct em28xx_v4l2 { |
504 | struct kref ref; | |
abc1308f | 505 | struct em28xx *dev; |
95d2608b FS |
506 | |
507 | struct v4l2_device v4l2_dev; | |
abc1308f | 508 | struct v4l2_ctrl_handler ctrl_handler; |
2c52a2fc | 509 | struct v4l2_clk *clk; |
ef74a0b9 | 510 | |
d4352f36 HV |
511 | struct video_device vdev; |
512 | struct video_device vbi_dev; | |
513 | struct video_device radio_dev; | |
27a36df6 FS |
514 | |
515 | /* Videobuf2 */ | |
516 | struct vb2_queue vb_vidq; | |
517 | struct vb2_queue vb_vbiq; | |
518 | struct mutex vb_queue_lock; | |
519 | struct mutex vb_vbi_queue_lock; | |
753aee77 | 520 | |
9297285e FS |
521 | u8 vinmode; |
522 | u8 vinctl; | |
523 | ||
d7dc18da FS |
524 | /* Camera specific fields */ |
525 | int sensor_xres; | |
526 | int sensor_yres; | |
527 | int sensor_xtal; | |
528 | ||
8e2c8717 | 529 | int users; /* user count for exclusive use */ |
8139a4d5 FS |
530 | int streaming_users; /* number of actively streaming users */ |
531 | ||
3854b0d8 FS |
532 | u32 frequency; /* selected tuner frequency */ |
533 | ||
06e20672 | 534 | struct em28xx_fmt *format; |
52faaf78 FS |
535 | v4l2_std_id norm; /* selected tv norm */ |
536 | ||
58159171 FS |
537 | /* Progressive/interlaced mode */ |
538 | bool progressive; | |
539 | int interlaced_fieldmode; /* 1=interlaced fields, 0=just top fields */ | |
540 | /* FIXME: everything else than interlaced_fieldmode=1 doesn't work */ | |
541 | ||
753aee77 FS |
542 | /* Frame properties */ |
543 | int width; /* current frame width */ | |
544 | int height; /* current frame height */ | |
545 | unsigned hscale; /* horizontal scale factor (see datasheet) */ | |
546 | unsigned vscale; /* vertical scale factor (see datasheet) */ | |
547 | unsigned int vbi_width; | |
548 | unsigned int vbi_height; /* lines per field */ | |
f0e38230 FS |
549 | |
550 | /* Capture state tracking */ | |
551 | int capture_type; | |
552 | bool top_field; | |
553 | int vbi_read; | |
554 | unsigned int field_count; | |
37ecc7b1 MCC |
555 | |
556 | #ifdef CONFIG_MEDIA_CONTROLLER | |
557 | struct media_pad video_pad, vbi_pad; | |
558 | struct media_entity *decoder; | |
559 | #endif | |
95d2608b FS |
560 | }; |
561 | ||
6d79468d MCC |
562 | struct em28xx_audio { |
563 | char name[50]; | |
1b3fd2d3 MCC |
564 | unsigned num_urb; |
565 | char **transfer_buffer; | |
566 | struct urb **urb; | |
6d79468d MCC |
567 | struct usb_device *udev; |
568 | unsigned int capture_transfer_done; | |
569 | struct snd_pcm_substream *capture_pcm_substream; | |
570 | ||
571 | unsigned int hwptr_done_capture; | |
572 | struct snd_card *sndcard; | |
573 | ||
a02b9c23 MCC |
574 | size_t period; |
575 | ||
c744dff2 | 576 | int users; |
6d79468d | 577 | spinlock_t slock; |
a5c075cf FS |
578 | |
579 | /* Controls streaming */ | |
580 | struct work_struct wq_trigger; /* trigger to start/stop audio */ | |
581 | atomic_t stream_started; /* stream should be running if true */ | |
6d79468d MCC |
582 | }; |
583 | ||
52284c3e MCC |
584 | struct em28xx; |
585 | ||
a3ea4bf9 FS |
586 | enum em28xx_i2c_algo_type { |
587 | EM28XX_I2C_ALGO_EM28XX = 0, | |
588 | EM28XX_I2C_ALGO_EM2800, | |
589 | EM28XX_I2C_ALGO_EM25XX_BUS_B, | |
590 | }; | |
591 | ||
aab3125c MCC |
592 | struct em28xx_i2c_bus { |
593 | struct em28xx *dev; | |
594 | ||
595 | unsigned bus; | |
a3ea4bf9 | 596 | enum em28xx_i2c_algo_type algo_type; |
aab3125c MCC |
597 | }; |
598 | ||
a6c2ba28 | 599 | /* main device struct */ |
3acf2809 | 600 | struct em28xx { |
47677e51 MCC |
601 | struct kref ref; |
602 | ||
6743033e | 603 | /* Sub-module data */ |
95d2608b | 604 | struct em28xx_v4l2 *v4l2; |
6743033e FS |
605 | struct em28xx_dvb *dvb; |
606 | struct em28xx_audio adev; | |
607 | struct em28xx_IR *ir; | |
608 | ||
a6c2ba28 | 609 | /* generic device properties */ |
610 | char name[30]; /* name (including minor) of the device */ | |
611 | int model; /* index in the device_data struct */ | |
e5589bef | 612 | int devno; /* marks the number of this device */ |
600bd7f0 | 613 | enum em28xx_chip_id chip_id; |
505b6d0b | 614 | |
ce67943e | 615 | unsigned int is_em25xx:1; /* em25xx/em276x/7x/8x family bridge */ |
2665c299 | 616 | unsigned char disconnected:1; /* device has been diconnected */ |
01c28193 | 617 | unsigned int has_video:1; |
ce67943e | 618 | unsigned int is_audio_only:1; |
920f1e4a | 619 | enum em28xx_int_audio_type int_audio_type; |
c5874208 | 620 | enum em28xx_usb_audio_type usb_audio_type; |
2665c299 | 621 | |
505b6d0b MCC |
622 | struct em28xx_board board; |
623 | ||
d7dc18da | 624 | enum em28xx_sensor em28xx_sensor; /* camera specific */ |
527f09a9 | 625 | |
89b329ef MCC |
626 | /* Some older em28xx chips needs a waiting time after writing */ |
627 | unsigned int wait_after_write; | |
628 | ||
74f38a82 MCC |
629 | struct list_head devlist; |
630 | ||
9bb13a6d MCC |
631 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
632 | ||
35643943 | 633 | struct em28xx_audio_mode audio_mode; |
a6c2ba28 | 634 | |
635 | int tuner_type; /* type of the tuner */ | |
c7a45e5b | 636 | |
a6c2ba28 | 637 | /* i2c i/o */ |
c7a45e5b MCC |
638 | struct i2c_adapter i2c_adap[NUM_I2C_BUSES]; |
639 | struct i2c_client i2c_client[NUM_I2C_BUSES]; | |
aab3125c MCC |
640 | struct em28xx_i2c_bus i2c_bus[NUM_I2C_BUSES]; |
641 | ||
87b52439 | 642 | unsigned char eeprom_addrwidth_16bit:1; |
aab3125c MCC |
643 | unsigned def_i2c_bus; /* Default I2C bus */ |
644 | unsigned cur_i2c_bus; /* Current I2C bus */ | |
645 | struct rt_mutex i2c_bus_lock; | |
c7a45e5b | 646 | |
a6c2ba28 | 647 | /* video for linux */ |
a6c2ba28 | 648 | unsigned int ctl_input; /* selected input */ |
95b86a9a | 649 | unsigned int ctl_ainput;/* selected audio input */ |
35ae6f04 | 650 | unsigned int ctl_aoutput;/* selected audio output */ |
a6c2ba28 | 651 | int mute; |
652 | int volume; | |
753aee77 | 653 | |
03910cc3 | 654 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
6ea54d93 DSL |
655 | unsigned long i2c_hash; /* i2c devicelist hash - |
656 | for boards with generic ID */ | |
03910cc3 | 657 | |
d7448a8d MCC |
658 | struct work_struct request_module_wk; |
659 | ||
a6c2ba28 | 660 | /* locks */ |
5a80415b | 661 | struct mutex lock; |
f2a2e491 | 662 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
a6c2ba28 | 663 | |
8c873d31 DH |
664 | /* resources in use */ |
665 | unsigned int resources; | |
666 | ||
510e884c FS |
667 | /* eeprom content */ |
668 | u8 *eedata; | |
669 | u16 eedata_len; | |
a6c2ba28 | 670 | |
ad0ebb96 MCC |
671 | /* Isoc control struct */ |
672 | struct em28xx_dmaqueue vidq; | |
28abf083 | 673 | struct em28xx_dmaqueue vbiq; |
74209dc0 | 674 | struct em28xx_usb_ctl usb_ctl; |
ad0ebb96 MCC |
675 | spinlock_t slock; |
676 | ||
a6c2ba28 | 677 | /* usb transfer */ |
678 | struct usb_device *udev; /* the usb device */ | |
961717b4 | 679 | u8 ifnum; /* number of the assigned usb interface */ |
c647a91a FS |
680 | u8 analog_ep_isoc; /* address of isoc endpoint for analog */ |
681 | u8 analog_ep_bulk; /* address of bulk endpoint for analog */ | |
682 | u8 dvb_ep_isoc; /* address of isoc endpoint for DVB */ | |
d5b6a746 | 683 | u8 dvb_ep_bulk; /* address of bulk endpoint for DVB */ |
0cf544a6 FS |
684 | int alt; /* alternate setting */ |
685 | int max_pkt_size; /* max packet size of the selected ep at alt */ | |
c647a91a FS |
686 | int packet_multiplier; /* multiplier for wMaxPacketSize, used for |
687 | URB buffer size definition */ | |
0cf544a6 FS |
688 | int num_alt; /* number of alternative settings */ |
689 | unsigned int *alt_max_pkt_size_isoc; /* array of isoc wMaxPacketSize */ | |
7312f2c9 FS |
690 | unsigned int analog_xfer_bulk:1; /* use bulk instead of isoc |
691 | transfers for analog */ | |
0cf544a6 FS |
692 | int dvb_alt_isoc; /* alternate setting for DVB isoc transfers */ |
693 | unsigned int dvb_max_pkt_size_isoc; /* isoc max packet size of the | |
694 | selected DVB ep at dvb_alt */ | |
7312f2c9 FS |
695 | unsigned int dvb_xfer_bulk:1; /* use bulk instead of isoc |
696 | transfers for DVB */ | |
c4a98793 MCC |
697 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ |
698 | ||
a6c2ba28 | 699 | /* helper funcs that call usb_control_msg */ |
fdf1bc9f MCC |
700 | int (*em28xx_write_regs)(struct em28xx *dev, u16 reg, |
701 | char *buf, int len); | |
702 | int (*em28xx_read_reg)(struct em28xx *dev, u16 reg); | |
703 | int (*em28xx_read_reg_req_len)(struct em28xx *dev, u8 req, u16 reg, | |
704 | char *buf, int len); | |
705 | int (*em28xx_write_regs_req)(struct em28xx *dev, u8 req, u16 reg, | |
706 | char *buf, int len); | |
707 | int (*em28xx_read_reg_req)(struct em28xx *dev, u8 req, u16 reg); | |
3aefb79a MCC |
708 | |
709 | enum em28xx_mode mode; | |
710 | ||
f5222609 FS |
711 | /* Button state polling */ |
712 | struct delayed_work buttons_query_work; | |
713 | u8 button_polling_addresses[EM28XX_NUM_BUTTON_ADDRESSES_MAX]; | |
7763481a | 714 | u8 button_polling_last_values[EM28XX_NUM_BUTTON_ADDRESSES_MAX]; |
f5222609 | 715 | u8 num_button_polling_addresses; |
0ff950a7 | 716 | u16 button_polling_interval; /* [ms] */ |
f5222609 | 717 | /* Snapshot button input device */ |
a9fc52bc DH |
718 | char snapshot_button_path[30]; /* path of the input dev */ |
719 | struct input_dev *sbutton_input_dev; | |
37ecc7b1 MCC |
720 | |
721 | #ifdef CONFIG_MEDIA_CONTROLLER | |
722 | struct media_device *media_dev; | |
723 | struct media_entity input_ent[MAX_EM28XX_INPUT]; | |
724 | struct media_pad input_pad[MAX_EM28XX_INPUT]; | |
725 | #endif | |
a6c2ba28 | 726 | }; |
727 | ||
47677e51 MCC |
728 | #define kref_to_dev(d) container_of(d, struct em28xx, ref) |
729 | ||
6d79468d MCC |
730 | struct em28xx_ops { |
731 | struct list_head next; | |
732 | char *name; | |
733 | int id; | |
734 | int (*init)(struct em28xx *); | |
735 | int (*fini)(struct em28xx *); | |
9c669b73 SK |
736 | int (*suspend)(struct em28xx *); |
737 | int (*resume)(struct em28xx *); | |
a3a048ce MCC |
738 | }; |
739 | ||
3acf2809 | 740 | /* Provided by em28xx-i2c.c */ |
aab3125c | 741 | void em28xx_do_i2c_scan(struct em28xx *dev, unsigned bus); |
a3ea4bf9 FS |
742 | int em28xx_i2c_register(struct em28xx *dev, unsigned bus, |
743 | enum em28xx_i2c_algo_type algo_type); | |
aab3125c | 744 | int em28xx_i2c_unregister(struct em28xx *dev, unsigned bus); |
a6c2ba28 | 745 | |
3acf2809 | 746 | /* Provided by em28xx-core.c */ |
3acf2809 | 747 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 748 | char *buf, int len); |
3acf2809 MCC |
749 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
750 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
751 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 752 | int len); |
3acf2809 | 753 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
b6972489 | 754 | int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val); |
1bad429e | 755 | int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, |
fdf1bc9f | 756 | u8 bitmask); |
6063d077 | 757 | int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask); |
b6972489 | 758 | |
531c98e7 MCC |
759 | int em28xx_read_ac97(struct em28xx *dev, u8 reg); |
760 | int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val); | |
761 | ||
3acf2809 | 762 | int em28xx_audio_analog_set(struct em28xx *dev); |
35643943 | 763 | int em28xx_audio_setup(struct em28xx *dev); |
539c96d0 | 764 | |
6b8a3170 FS |
765 | const struct em28xx_led *em28xx_find_led(struct em28xx *dev, |
766 | enum em28xx_led_role role); | |
3acf2809 | 767 | int em28xx_capture_start(struct em28xx *dev, int start); |
6ddd89d0 FS |
768 | int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, |
769 | int num_bufs, int max_pkt_size, int packet_multiplier); | |
057ca0da FS |
770 | int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode, |
771 | int xfer_bulk, | |
772 | int num_bufs, int max_pkt_size, int packet_multiplier, | |
773 | int (*urb_data_copy) | |
774 | (struct em28xx *dev, struct urb *urb)); | |
afb177e0 | 775 | void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode); |
5f5f147f | 776 | void em28xx_stop_urbs(struct em28xx *dev); |
c67ec53f MCC |
777 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode); |
778 | int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio); | |
6d79468d MCC |
779 | int em28xx_register_extension(struct em28xx_ops *dev); |
780 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
1a23f81b MCC |
781 | void em28xx_init_extension(struct em28xx *dev); |
782 | void em28xx_close_extension(struct em28xx *dev); | |
9c669b73 SK |
783 | int em28xx_suspend_extension(struct em28xx *dev); |
784 | int em28xx_resume_extension(struct em28xx *dev); | |
1a23f81b | 785 | |
3acf2809 | 786 | /* Provided by em28xx-cards.c */ |
3acf2809 MCC |
787 | extern struct em28xx_board em28xx_boards[]; |
788 | extern struct usb_device_id em28xx_id_table[]; | |
d7cba043 | 789 | int em28xx_tuner_callback(void *ptr, int component, int command, int arg); |
ee97207c | 790 | void em28xx_setup_xc3028(struct em28xx *dev, struct xc2028_ctrl *ctl); |
47677e51 | 791 | void em28xx_free_device(struct kref *ref); |
c8793b03 | 792 | |
855ff38e FS |
793 | /* Provided by em28xx-camera.c */ |
794 | int em28xx_detect_sensor(struct em28xx *dev); | |
795 | int em28xx_init_camera(struct em28xx *dev); | |
796 | ||
a6c2ba28 | 797 | /* printk macros */ |
798 | ||
3acf2809 | 799 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 800 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 801 | |
3acf2809 | 802 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 803 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 804 | dev->name , ##arg); } while (0) |
a6c2ba28 | 805 | |
3acf2809 | 806 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 807 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 808 | dev->name , ##arg); } while (0) |
3acf2809 | 809 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 810 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 811 | dev->name , ##arg); } while (0) |
a6c2ba28 | 812 | |
a6c2ba28 | 813 | #endif |