Commit | Line | Data |
---|---|---|
a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
0cf544a6 | 7 | Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> |
a6c2ba28 | 8 | |
9 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2 of the License, or | |
14 | (at your option) any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software | |
23 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
3acf2809 MCC |
26 | #ifndef _EM28XX_H |
27 | #define _EM28XX_H | |
a6c2ba28 | 28 | |
01c28193 | 29 | #define EM28XX_VERSION "0.2.1" |
d8992b09 | 30 | #define DRIVER_DESC "Empia em28xx device driver" |
ce67943e | 31 | |
39a96b4c MCC |
32 | #include <linux/workqueue.h> |
33 | #include <linux/i2c.h> | |
34 | #include <linux/mutex.h> | |
cb77d010 | 35 | #include <linux/videodev2.h> |
39a96b4c | 36 | |
d3829fad | 37 | #include <media/videobuf2-vmalloc.h> |
f2cf250a | 38 | #include <media/v4l2-device.h> |
081b945e | 39 | #include <media/v4l2-ctrls.h> |
69a61642 | 40 | #include <media/v4l2-fh.h> |
d5e52653 | 41 | #include <media/ir-kbd-i2c.h> |
6bda9644 | 42 | #include <media/rc-core.h> |
3ca9c093 | 43 | #include "tuner-xc2028.h" |
82e7dbbd | 44 | #include "xc5000.h" |
2ba890ec | 45 | #include "em28xx-reg.h" |
3aefb79a MCC |
46 | |
47 | /* Boards supported by driver */ | |
d5b6a746 FS |
48 | #define EM2800_BOARD_UNKNOWN 0 |
49 | #define EM2820_BOARD_UNKNOWN 1 | |
50 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
51 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
52 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
53 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
54 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
55 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
56 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
57 | #define EM2820_BOARD_PINNACLE_DVC_90 9 | |
58 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 | |
59 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
60 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
61 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 | |
62 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 | |
63 | #define EM2800_BOARD_VGEAR_POCKETTV 15 | |
64 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16 | |
65 | #define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17 | |
66 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18 | |
67 | #define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19 | |
68 | #define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20 | |
69 | #define EM2800_BOARD_GRABBEEX_USB2800 21 | |
95b86a9a DSL |
70 | #define EM2750_BOARD_UNKNOWN 22 |
71 | #define EM2750_BOARD_DLCW_130 23 | |
72 | #define EM2820_BOARD_DLINK_USB_TV 24 | |
73 | #define EM2820_BOARD_GADMEI_UTV310 25 | |
74 | #define EM2820_BOARD_HERCULES_SMART_TV_USB2 26 | |
75 | #define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27 | |
76 | #define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28 | |
443fed9f | 77 | #define EM2860_BOARD_TVP5150_REFERENCE_DESIGN 29 |
95b86a9a DSL |
78 | #define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30 |
79 | #define EM2821_BOARD_USBGEAR_VD204 31 | |
80 | #define EM2821_BOARD_SUPERCOMP_USB_2 32 | |
8298f2f8 | 81 | #define EM2860_BOARD_ELGATO_VIDEO_CAPTURE 33 |
95b86a9a DSL |
82 | #define EM2860_BOARD_TERRATEC_HYBRID_XS 34 |
83 | #define EM2860_BOARD_TYPHOON_DVD_MAKER 35 | |
84 | #define EM2860_BOARD_NETGMBH_CAM 36 | |
85 | #define EM2860_BOARD_GADMEI_UTV330 37 | |
86 | #define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38 | |
87 | #define EM2861_BOARD_KWORLD_PVRTV_300U 39 | |
88 | #define EM2861_BOARD_PLEXTOR_PX_TV100U 40 | |
89 | #define EM2870_BOARD_KWORLD_350U 41 | |
90 | #define EM2870_BOARD_KWORLD_355U 42 | |
91 | #define EM2870_BOARD_TERRATEC_XS 43 | |
92 | #define EM2870_BOARD_TERRATEC_XS_MT2060 44 | |
93 | #define EM2870_BOARD_PINNACLE_PCTV_DVB 45 | |
94 | #define EM2870_BOARD_COMPRO_VIDEOMATE 46 | |
95 | #define EM2880_BOARD_KWORLD_DVB_305U 47 | |
96 | #define EM2880_BOARD_KWORLD_DVB_310U 48 | |
97 | #define EM2880_BOARD_MSI_DIGIVOX_AD 49 | |
98 | #define EM2880_BOARD_MSI_DIGIVOX_AD_II 50 | |
99 | #define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51 | |
100 | #define EM2881_BOARD_DNT_DA2_HYBRID 52 | |
101 | #define EM2881_BOARD_PINNACLE_HYBRID_PRO 53 | |
102 | #define EM2882_BOARD_KWORLD_VS_DVBT 54 | |
103 | #define EM2882_BOARD_TERRATEC_HYBRID_XS 55 | |
09bc1942 | 104 | #define EM2882_BOARD_PINNACLE_HYBRID_PRO_330E 56 |
d5b6a746 | 105 | #define EM2883_BOARD_KWORLD_HYBRID_330U 57 |
ee281b85 | 106 | #define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58 |
f89bc329 | 107 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60 |
1e1addd5 | 108 | #define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61 |
f7fe3e6f | 109 | #define EM2820_BOARD_GADMEI_TVR200 62 |
d5b6a746 FS |
110 | #define EM2860_BOARD_KAIOMY_TVNPC_U2 63 |
111 | #define EM2860_BOARD_EASYCAP 64 | |
f74a61e3 | 112 | #define EM2820_BOARD_IODATA_GVMVP_SZ 65 |
e5db5d44 | 113 | #define EM2880_BOARD_EMPIRE_DUAL_TV 66 |
4557af9c | 114 | #define EM2860_BOARD_TERRATEC_GRABBY 67 |
766ed64d | 115 | #define EM2860_BOARD_TERRATEC_AV350 68 |
d7de5d8f | 116 | #define EM2882_BOARD_KWORLD_ATSC_315U 69 |
19859229 | 117 | #define EM2882_BOARD_EVGA_INDTUBE 70 |
d5b6a746 FS |
118 | #define EM2820_BOARD_SILVERCREST_WEBCAM 71 |
119 | #define EM2861_BOARD_GADMEI_UTV330PLUS 72 | |
120 | #define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73 | |
694a101e | 121 | #define EM2800_BOARD_VC211A 74 |
7ca7ef60 | 122 | #define EM2882_BOARD_DIKOM_DK300 75 |
7e48b30a | 123 | #define EM2870_BOARD_KWORLD_A340 76 |
fec528b7 | 124 | #define EM2874_BOARD_LEADERSHIP_ISDBT 77 |
d5b6a746 | 125 | #define EM28174_BOARD_PCTV_290E 78 |
fec528b7 | 126 | #define EM2884_BOARD_TERRATEC_H5 79 |
d5b6a746 | 127 | #define EM28174_BOARD_PCTV_460E 80 |
82e7dbbd | 128 | #define EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C 81 |
a1ed02e9 | 129 | #define EM2884_BOARD_CINERGY_HTC_STICK 82 |
d5b6a746 FS |
130 | #define EM2860_BOARD_HT_VIDBOX_NW03 83 |
131 | #define EM2874_BOARD_MAXMEDIA_UB425_TC 84 | |
132 | #define EM2884_BOARD_PCTV_510E 85 | |
133 | #define EM2884_BOARD_PCTV_520E 86 | |
89040136 | 134 | #define EM2884_BOARD_TERRATEC_HTC_USB_XS 87 |
4159d01b | 135 | #define EM2884_BOARD_C3TECH_DIGITAL_DUO 88 |
7c1dfdb0 | 136 | #define EM2874_BOARD_DELOCK_61959 89 |
6dbea9f0 | 137 | #define EM2874_BOARD_KWORLD_UB435Q_V2 90 |
0c37e736 | 138 | #define EM2765_BOARD_SPEEDLINK_VAD_LAPLACE 91 |
ec573362 | 139 | #define EM28178_BOARD_PCTV_461E 92 |
3aefb79a MCC |
140 | |
141 | /* Limits minimum and default number of buffers */ | |
142 | #define EM28XX_MIN_BUF 4 | |
143 | #define EM28XX_DEF_BUF 8 | |
a6c2ba28 | 144 | |
c4a98793 MCC |
145 | /*Limits the max URB message size */ |
146 | #define URB_MAX_CTRL_SIZE 80 | |
147 | ||
95b86a9a DSL |
148 | /* Params for validated field */ |
149 | #define EM28XX_BOARD_NOT_VALIDATED 1 | |
150 | #define EM28XX_BOARD_VALIDATED 0 | |
151 | ||
22cff7b3 DSL |
152 | /* Params for em28xx_cmd() audio */ |
153 | #define EM28XX_START_AUDIO 1 | |
154 | #define EM28XX_STOP_AUDIO 0 | |
155 | ||
596d92d5 | 156 | /* maximum number of em28xx boards */ |
3687e1e6 | 157 | #define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */ |
596d92d5 | 158 | |
a6c2ba28 | 159 | /* maximum number of frames that can be queued */ |
3acf2809 | 160 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 161 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 162 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 163 | |
164 | /* number of buffers for isoc transfers */ | |
3acf2809 | 165 | #define EM28XX_NUM_BUFS 5 |
86d38d1e | 166 | #define EM28XX_DVB_NUM_BUFS 5 |
a6c2ba28 | 167 | |
c7a45e5b MCC |
168 | /* max number of I2C buses on em28xx devices */ |
169 | #define NUM_I2C_BUSES 2 | |
170 | ||
515688a8 | 171 | /* isoc transfers: number of packets for each buffer |
33c02fac | 172 | windows requests only 64 packets .. so we better do the same |
d5e52653 MCC |
173 | this is what I found out for all alternate numbers there! |
174 | */ | |
515688a8 FS |
175 | #define EM28XX_NUM_ISOC_PACKETS 64 |
176 | #define EM28XX_DVB_NUM_ISOC_PACKETS 64 | |
a6c2ba28 | 177 | |
c647a91a FS |
178 | /* bulk transfers: transfer buffer size = packet size * packet multiplier |
179 | USB 2.0 spec says bulk packet size is always 512 bytes | |
180 | */ | |
181 | #define EM28XX_BULK_PACKET_MULTIPLIER 384 | |
182 | #define EM28XX_DVB_BULK_PACKET_MULTIPLIER 384 | |
183 | ||
3acf2809 | 184 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 185 | |
d20e4ed6 MCC |
186 | /* |
187 | * Time in msecs to wait for i2c xfers to finish. | |
188 | * 35ms is the maximum time a SMBUS device could wait when | |
189 | * clock stretching is used. As the transfer itself will take | |
190 | * some time to happen, set it to 35 ms. | |
191 | * | |
192 | * Ok, I2C doesn't specify any limit. So, eventually, we may need | |
193 | * to increase this timeout. | |
194 | * | |
195 | * FIXME: this assumes that an I2C message is not longer than 1ms. | |
196 | * This is actually dependent on the I2C bus speed, although most | |
197 | * devices use a 100kHz clock. So, this assumtion is true most of | |
198 | * the time. | |
199 | */ | |
200 | #define EM28XX_I2C_XFER_TIMEOUT 36 | |
596d92d5 | 201 | |
5022a208 MCC |
202 | /* time in msecs to wait for AC97 xfers to finish */ |
203 | #define EM28XX_AC97_XFER_TIMEOUT 100 | |
204 | ||
f5222609 FS |
205 | /* max. number of button state polling addresses */ |
206 | #define EM28XX_NUM_BUTTON_ADDRESSES_MAX 5 | |
207 | ||
3aefb79a | 208 | enum em28xx_mode { |
2fe3e2ee | 209 | EM28XX_SUSPEND, |
3aefb79a MCC |
210 | EM28XX_ANALOG_MODE, |
211 | EM28XX_DIGITAL_MODE, | |
212 | }; | |
213 | ||
a6c2ba28 | 214 | |
579f72e4 AT |
215 | struct em28xx; |
216 | ||
f0fa9936 | 217 | struct em28xx_usb_bufs { |
ad0ebb96 MCC |
218 | /* max packet size of isoc transaction */ |
219 | int max_pkt_size; | |
220 | ||
86d38d1e GG |
221 | /* number of packets in each buffer */ |
222 | int num_packets; | |
223 | ||
ad0ebb96 MCC |
224 | /* number of allocated urbs */ |
225 | int num_bufs; | |
226 | ||
f0fa9936 | 227 | /* urb for isoc/bulk transfers */ |
ad0ebb96 MCC |
228 | struct urb **urb; |
229 | ||
f0fa9936 | 230 | /* transfer buffers for isoc/bulk transfer */ |
ad0ebb96 | 231 | char **transfer_buffer; |
86d38d1e GG |
232 | }; |
233 | ||
74209dc0 FS |
234 | struct em28xx_usb_ctl { |
235 | /* isoc/bulk transfer buffers for analog mode */ | |
f0fa9936 | 236 | struct em28xx_usb_bufs analog_bufs; |
86d38d1e | 237 | |
74209dc0 | 238 | /* isoc/bulk transfer buffers for digital mode */ |
f0fa9936 | 239 | struct em28xx_usb_bufs digital_bufs; |
ad0ebb96 | 240 | |
ad0ebb96 | 241 | /* Stores already requested buffers */ |
28abf083 DH |
242 | struct em28xx_buffer *vid_buf; |
243 | struct em28xx_buffer *vbi_buf; | |
ad0ebb96 | 244 | |
74209dc0 FS |
245 | /* copy data from URB */ |
246 | int (*urb_data_copy) (struct em28xx *dev, struct urb *urb); | |
579f72e4 | 247 | |
ad0ebb96 MCC |
248 | }; |
249 | ||
bddcf633 | 250 | /* Struct to enumberate video formats */ |
ad0ebb96 MCC |
251 | struct em28xx_fmt { |
252 | char *name; | |
253 | u32 fourcc; /* v4l2 format id */ | |
bddcf633 MCC |
254 | int depth; |
255 | int reg; | |
ad0ebb96 MCC |
256 | }; |
257 | ||
258 | /* buffer for one video frame */ | |
259 | struct em28xx_buffer { | |
260 | /* common v4l buffer stuff -- must be first */ | |
d3829fad DH |
261 | struct vb2_buffer vb; |
262 | struct list_head list; | |
ad0ebb96 | 263 | |
d3829fad DH |
264 | void *mem; |
265 | unsigned int length; | |
a6c2ba28 | 266 | int top_field; |
8732533b FS |
267 | |
268 | /* counter to control buffer fill */ | |
269 | unsigned int pos; | |
270 | /* NOTE; in interlaced mode, this value is reset to zero at | |
271 | * the start of each new field (not frame !) */ | |
4078d625 FS |
272 | |
273 | /* pointer to vmalloc memory address in vb */ | |
274 | char *vb_buf; | |
ad0ebb96 MCC |
275 | }; |
276 | ||
277 | struct em28xx_dmaqueue { | |
278 | struct list_head active; | |
ad0ebb96 MCC |
279 | |
280 | wait_queue_head_t wq; | |
a6c2ba28 | 281 | }; |
282 | ||
a6c2ba28 | 283 | /* inputs */ |
284 | ||
3acf2809 MCC |
285 | #define MAX_EM28XX_INPUT 4 |
286 | enum enum28xx_itype { | |
287 | EM28XX_VMUX_COMPOSITE1 = 1, | |
288 | EM28XX_VMUX_COMPOSITE2, | |
289 | EM28XX_VMUX_COMPOSITE3, | |
290 | EM28XX_VMUX_COMPOSITE4, | |
291 | EM28XX_VMUX_SVIDEO, | |
292 | EM28XX_VMUX_TELEVISION, | |
293 | EM28XX_VMUX_CABLE, | |
294 | EM28XX_VMUX_DVB, | |
295 | EM28XX_VMUX_DEBUG, | |
296 | EM28XX_RADIO, | |
a6c2ba28 | 297 | }; |
298 | ||
35643943 MCC |
299 | enum em28xx_ac97_mode { |
300 | EM28XX_NO_AC97 = 0, | |
301 | EM28XX_AC97_EM202, | |
209acc02 | 302 | EM28XX_AC97_SIGMATEL, |
35643943 MCC |
303 | EM28XX_AC97_OTHER, |
304 | }; | |
305 | ||
306 | struct em28xx_audio_mode { | |
307 | enum em28xx_ac97_mode ac97; | |
308 | ||
309 | u16 ac97_feat; | |
16c7bcad | 310 | u32 ac97_vendor_id; |
35643943 MCC |
311 | |
312 | unsigned int has_audio:1; | |
313 | ||
687ff8b0 | 314 | u8 i2s_samplerates; |
5c2231c8 DH |
315 | }; |
316 | ||
5faff789 MCC |
317 | /* em28xx has two audio inputs: tuner and line in. |
318 | However, on most devices, an auxiliary AC97 codec device is used. | |
319 | The AC97 device may have several different inputs and outputs, | |
320 | depending on their model. So, it is possible to use AC97 mixer to | |
321 | address more than two different entries. | |
322 | */ | |
539c96d0 | 323 | enum em28xx_amux { |
5faff789 MCC |
324 | /* This is the only entry for em28xx tuner input */ |
325 | EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */ | |
326 | ||
327 | EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */ | |
328 | ||
329 | /* Some less-common mixer setups */ | |
330 | EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */ | |
331 | EM28XX_AMUX_PHONE, | |
332 | EM28XX_AMUX_MIC, | |
333 | EM28XX_AMUX_CD, | |
334 | EM28XX_AMUX_AUX, | |
335 | EM28XX_AMUX_PCM_OUT, | |
539c96d0 MCC |
336 | }; |
337 | ||
35ae6f04 | 338 | enum em28xx_aout { |
8866f9cf | 339 | /* AC97 outputs */ |
e879b8eb MCC |
340 | EM28XX_AOUT_MASTER = 1 << 0, |
341 | EM28XX_AOUT_LINE = 1 << 1, | |
342 | EM28XX_AOUT_MONO = 1 << 2, | |
343 | EM28XX_AOUT_LFE = 1 << 3, | |
344 | EM28XX_AOUT_SURR = 1 << 4, | |
8866f9cf MCC |
345 | |
346 | /* PCM IN Mixer - used by AC97_RECORD_SELECT register */ | |
347 | EM28XX_AOUT_PCM_IN = 1 << 7, | |
348 | ||
349 | /* Bits 10-8 are used to indicate the PCM IN record select */ | |
350 | EM28XX_AOUT_PCM_MIC_PCM = 0 << 8, | |
351 | EM28XX_AOUT_PCM_CD = 1 << 8, | |
352 | EM28XX_AOUT_PCM_VIDEO = 2 << 8, | |
353 | EM28XX_AOUT_PCM_AUX = 3 << 8, | |
354 | EM28XX_AOUT_PCM_LINE = 4 << 8, | |
355 | EM28XX_AOUT_PCM_STEREO = 5 << 8, | |
356 | EM28XX_AOUT_PCM_MONO = 6 << 8, | |
357 | EM28XX_AOUT_PCM_PHONE = 7 << 8, | |
35ae6f04 MCC |
358 | }; |
359 | ||
32929fb4 | 360 | static inline int ac97_return_record_select(int a_out) |
8866f9cf MCC |
361 | { |
362 | return (a_out & 0x700) >> 8; | |
363 | } | |
364 | ||
122b77e5 MCC |
365 | struct em28xx_reg_seq { |
366 | int reg; | |
367 | unsigned char val, mask; | |
368 | int sleep; | |
369 | }; | |
370 | ||
3acf2809 MCC |
371 | struct em28xx_input { |
372 | enum enum28xx_itype type; | |
a6c2ba28 | 373 | unsigned int vmux; |
539c96d0 | 374 | enum em28xx_amux amux; |
35ae6f04 | 375 | enum em28xx_aout aout; |
122b77e5 | 376 | struct em28xx_reg_seq *gpio; |
a6c2ba28 | 377 | }; |
378 | ||
3acf2809 | 379 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 380 | |
3acf2809 | 381 | enum em28xx_decoder { |
527f09a9 | 382 | EM28XX_NODECODER = 0, |
3acf2809 | 383 | EM28XX_TVP5150, |
ec5de990 | 384 | EM28XX_SAA711X, |
527f09a9 MCC |
385 | }; |
386 | ||
387 | enum em28xx_sensor { | |
388 | EM28XX_NOSENSOR = 0, | |
02e7804b | 389 | EM28XX_MT9V011, |
b80fd2d8 | 390 | EM28XX_MT9M001, |
f2e26ae7 | 391 | EM28XX_MT9M111, |
e4b7131d | 392 | EM28XX_OV2640, |
a6c2ba28 | 393 | }; |
394 | ||
df7fa09c MCC |
395 | enum em28xx_adecoder { |
396 | EM28XX_NOADECODER = 0, | |
397 | EM28XX_TVAUDIO, | |
398 | }; | |
399 | ||
6b8a3170 FS |
400 | enum em28xx_led_role { |
401 | EM28XX_LED_ANALOG_CAPTURING = 0, | |
6063d077 | 402 | EM28XX_LED_ILLUMINATION, |
6b8a3170 FS |
403 | EM28XX_NUM_LED_ROLES, /* must be the last */ |
404 | }; | |
405 | ||
07e4de30 | 406 | struct em28xx_led { |
6b8a3170 | 407 | enum em28xx_led_role role; |
07e4de30 FS |
408 | u8 gpio_reg; |
409 | u8 gpio_mask; | |
410 | bool inverted; | |
411 | }; | |
412 | ||
f5222609 FS |
413 | enum em28xx_button_role { |
414 | EM28XX_BUTTON_SNAPSHOT = 0, | |
6063d077 | 415 | EM28XX_BUTTON_ILLUMINATION, |
f5222609 FS |
416 | EM28XX_NUM_BUTTON_ROLES, /* must be the last */ |
417 | }; | |
418 | ||
419 | struct em28xx_button { | |
420 | enum em28xx_button_role role; | |
421 | u8 reg_r; | |
422 | u8 reg_clearing; | |
423 | u8 mask; | |
424 | bool inverted; | |
425 | }; | |
426 | ||
3acf2809 | 427 | struct em28xx_board { |
a6c2ba28 | 428 | char *name; |
505b6d0b | 429 | int vchannels; |
a6c2ba28 | 430 | int tuner_type; |
66767920 | 431 | int tuner_addr; |
aab3125c | 432 | unsigned def_i2c_bus; /* Default I2C bus */ |
a6c2ba28 | 433 | |
434 | /* i2c flags */ | |
435 | unsigned int tda9887_conf; | |
436 | ||
017ab4b1 | 437 | /* GPIO sequences */ |
122b77e5 | 438 | struct em28xx_reg_seq *dvb_gpio; |
2fe3e2ee | 439 | struct em28xx_reg_seq *suspend_gpio; |
017ab4b1 | 440 | struct em28xx_reg_seq *tuner_gpio; |
2bd1d9eb | 441 | struct em28xx_reg_seq *mute_gpio; |
122b77e5 | 442 | |
74f38a82 | 443 | unsigned int is_em2800:1; |
a6c2ba28 | 444 | unsigned int has_msp34xx:1; |
5add9a6f | 445 | unsigned int mts_firmware:1; |
c8793b03 | 446 | unsigned int max_range_640_480:1; |
3aefb79a | 447 | unsigned int has_dvb:1; |
c43221df | 448 | unsigned int is_webcam:1; |
95b86a9a | 449 | unsigned int valid:1; |
ac07bb73 | 450 | unsigned int has_ir_i2c:1; |
3abee53e | 451 | |
a2070c66 | 452 | unsigned char xclk, i2c_speed; |
f2cf250a DSL |
453 | unsigned char radio_addr; |
454 | unsigned short tvaudio_addr; | |
a2070c66 | 455 | |
3acf2809 | 456 | enum em28xx_decoder decoder; |
df7fa09c | 457 | enum em28xx_adecoder adecoder; |
a6c2ba28 | 458 | |
3acf2809 | 459 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 460 | struct em28xx_input radio; |
02858eed | 461 | char *ir_codes; |
07e4de30 FS |
462 | |
463 | /* LEDs that need to be controlled explicitly */ | |
6b8a3170 | 464 | struct em28xx_led *leds; |
f5222609 FS |
465 | |
466 | /* Buttons */ | |
467 | struct em28xx_button *buttons; | |
a6c2ba28 | 468 | }; |
469 | ||
3acf2809 | 470 | struct em28xx_eeprom { |
0c28dcc0 FS |
471 | u8 id[4]; /* 1a eb 67 95 */ |
472 | __le16 vendor_ID; | |
473 | __le16 product_ID; | |
a6c2ba28 | 474 | |
0c28dcc0 | 475 | __le16 chip_conf; |
a6c2ba28 | 476 | |
0c28dcc0 | 477 | __le16 board_conf; |
a6c2ba28 | 478 | |
0c28dcc0 | 479 | __le16 string1, string2, string3; |
a6c2ba28 | 480 | |
481 | u8 string_idx_table; | |
482 | }; | |
483 | ||
6d79468d MCC |
484 | #define EM28XX_AUDIO_BUFS 5 |
485 | #define EM28XX_NUM_AUDIO_PACKETS 64 | |
486 | #define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */ | |
487 | #define EM28XX_CAPTURE_STREAM_EN 1 | |
3aefb79a MCC |
488 | |
489 | /* em28xx extensions */ | |
6d79468d | 490 | #define EM28XX_AUDIO 0x10 |
3aefb79a | 491 | #define EM28XX_DVB 0x20 |
f4d4e765 | 492 | #define EM28XX_RC 0x30 |
01c28193 | 493 | #define EM28XX_V4L2 0x40 |
6d79468d | 494 | |
8c873d31 DH |
495 | /* em28xx resource types (used for res_get/res_lock etc */ |
496 | #define EM28XX_RESOURCE_VIDEO 0x01 | |
497 | #define EM28XX_RESOURCE_VBI 0x02 | |
498 | ||
6d79468d MCC |
499 | struct em28xx_audio { |
500 | char name[50]; | |
501 | char *transfer_buffer[EM28XX_AUDIO_BUFS]; | |
502 | struct urb *urb[EM28XX_AUDIO_BUFS]; | |
503 | struct usb_device *udev; | |
504 | unsigned int capture_transfer_done; | |
505 | struct snd_pcm_substream *capture_pcm_substream; | |
506 | ||
507 | unsigned int hwptr_done_capture; | |
508 | struct snd_card *sndcard; | |
509 | ||
c744dff2 | 510 | int users; |
6d79468d MCC |
511 | spinlock_t slock; |
512 | }; | |
513 | ||
52284c3e MCC |
514 | struct em28xx; |
515 | ||
516 | struct em28xx_fh { | |
69a61642 | 517 | struct v4l2_fh fh; |
52284c3e | 518 | struct em28xx *dev; |
52284c3e MCC |
519 | |
520 | enum v4l2_buf_type type; | |
521 | }; | |
522 | ||
a3ea4bf9 FS |
523 | enum em28xx_i2c_algo_type { |
524 | EM28XX_I2C_ALGO_EM28XX = 0, | |
525 | EM28XX_I2C_ALGO_EM2800, | |
526 | EM28XX_I2C_ALGO_EM25XX_BUS_B, | |
527 | }; | |
528 | ||
aab3125c MCC |
529 | struct em28xx_i2c_bus { |
530 | struct em28xx *dev; | |
531 | ||
532 | unsigned bus; | |
a3ea4bf9 | 533 | enum em28xx_i2c_algo_type algo_type; |
aab3125c MCC |
534 | }; |
535 | ||
536 | ||
a6c2ba28 | 537 | /* main device struct */ |
3acf2809 | 538 | struct em28xx { |
a6c2ba28 | 539 | /* generic device properties */ |
540 | char name[30]; /* name (including minor) of the device */ | |
541 | int model; /* index in the device_data struct */ | |
e5589bef | 542 | int devno; /* marks the number of this device */ |
600bd7f0 | 543 | enum em28xx_chip_id chip_id; |
505b6d0b | 544 | |
ce67943e | 545 | unsigned int is_em25xx:1; /* em25xx/em276x/7x/8x family bridge */ |
2665c299 | 546 | unsigned char disconnected:1; /* device has been diconnected */ |
01c28193 | 547 | unsigned int has_video:1; |
ce67943e MCC |
548 | unsigned int has_audio_class:1; |
549 | unsigned int has_alsa_audio:1; | |
550 | unsigned int is_audio_only:1; | |
2665c299 | 551 | |
4f83e7b3 MCC |
552 | int audio_ifnum; |
553 | ||
f2cf250a | 554 | struct v4l2_device v4l2_dev; |
081b945e | 555 | struct v4l2_ctrl_handler ctrl_handler; |
fc5d0f8a | 556 | struct v4l2_clk *clk; |
505b6d0b MCC |
557 | struct em28xx_board board; |
558 | ||
d36bb4e7 | 559 | /* Webcam specific fields */ |
527f09a9 | 560 | enum em28xx_sensor em28xx_sensor; |
55699964 | 561 | int sensor_xres, sensor_yres; |
d36bb4e7 | 562 | int sensor_xtal; |
527f09a9 | 563 | |
8c301567 | 564 | /* Progressive (non-interlaced) mode */ |
c2a6b54a MCC |
565 | int progressive; |
566 | ||
579d3152 MCC |
567 | /* Vinmode/Vinctl used at the driver */ |
568 | int vinmode, vinctl; | |
569 | ||
39a96b4c | 570 | /* Controls audio streaming */ |
d5b6a746 FS |
571 | struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ |
572 | atomic_t stream_started; /* stream should be running if true */ | |
39a96b4c | 573 | |
bddcf633 MCC |
574 | struct em28xx_fmt *format; |
575 | ||
a924a499 MCC |
576 | struct em28xx_IR *ir; |
577 | ||
89b329ef MCC |
578 | /* Some older em28xx chips needs a waiting time after writing */ |
579 | unsigned int wait_after_write; | |
580 | ||
74f38a82 MCC |
581 | struct list_head devlist; |
582 | ||
9bb13a6d MCC |
583 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
584 | ||
35643943 | 585 | struct em28xx_audio_mode audio_mode; |
a6c2ba28 | 586 | |
587 | int tuner_type; /* type of the tuner */ | |
588 | int tuner_addr; /* tuner address */ | |
589 | int tda9887_conf; | |
c7a45e5b | 590 | |
a6c2ba28 | 591 | /* i2c i/o */ |
c7a45e5b MCC |
592 | struct i2c_adapter i2c_adap[NUM_I2C_BUSES]; |
593 | struct i2c_client i2c_client[NUM_I2C_BUSES]; | |
aab3125c MCC |
594 | struct em28xx_i2c_bus i2c_bus[NUM_I2C_BUSES]; |
595 | ||
87b52439 | 596 | unsigned char eeprom_addrwidth_16bit:1; |
aab3125c MCC |
597 | unsigned def_i2c_bus; /* Default I2C bus */ |
598 | unsigned cur_i2c_bus; /* Current I2C bus */ | |
599 | struct rt_mutex i2c_bus_lock; | |
c7a45e5b | 600 | |
a6c2ba28 | 601 | /* video for linux */ |
602 | int users; /* user count for exclusive use */ | |
d3829fad | 603 | int streaming_users; /* Number of actively streaming users */ |
a6c2ba28 | 604 | struct video_device *vdev; /* video for linux device struct */ |
7d497f8a | 605 | v4l2_std_id norm; /* selected tv norm */ |
a6c2ba28 | 606 | int ctl_freq; /* selected frequency */ |
607 | unsigned int ctl_input; /* selected input */ | |
95b86a9a | 608 | unsigned int ctl_ainput;/* selected audio input */ |
35ae6f04 | 609 | unsigned int ctl_aoutput;/* selected audio output */ |
a6c2ba28 | 610 | int mute; |
611 | int volume; | |
612 | /* frame properties */ | |
a6c2ba28 | 613 | int width; /* current frame width */ |
614 | int height; /* current frame height */ | |
d45b9b8a HV |
615 | unsigned hscale; /* horizontal scale factor (see datasheet) */ |
616 | unsigned vscale; /* vertical scale factor (see datasheet) */ | |
a6c2ba28 | 617 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ |
9e31ced8 | 618 | unsigned int video_bytesread; /* Number of bytes read */ |
a6c2ba28 | 619 | |
03910cc3 | 620 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
6ea54d93 DSL |
621 | unsigned long i2c_hash; /* i2c devicelist hash - |
622 | for boards with generic ID */ | |
03910cc3 | 623 | |
9baed99e | 624 | struct em28xx_audio adev; |
6d79468d | 625 | |
960da93b | 626 | /* capture state tracking */ |
da52a55c | 627 | int capture_type; |
0455eebf | 628 | unsigned char top_field:1; |
960da93b | 629 | int vbi_read; |
66d9cbad DH |
630 | unsigned int vbi_width; |
631 | unsigned int vbi_height; /* lines per field */ | |
da52a55c | 632 | |
d7448a8d MCC |
633 | struct work_struct request_module_wk; |
634 | ||
a6c2ba28 | 635 | /* locks */ |
5a80415b | 636 | struct mutex lock; |
f2a2e491 | 637 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
d7aa8020 | 638 | /* spinlock_t queue_lock; */ |
a6c2ba28 | 639 | struct list_head inqueue, outqueue; |
a6c2ba28 | 640 | struct video_device *vbi_dev; |
0be43754 | 641 | struct video_device *radio_dev; |
a6c2ba28 | 642 | |
d3829fad DH |
643 | /* Videobuf2 */ |
644 | struct vb2_queue vb_vidq; | |
645 | struct vb2_queue vb_vbiq; | |
646 | struct mutex vb_queue_lock; | |
647 | struct mutex vb_vbi_queue_lock; | |
648 | ||
8c873d31 DH |
649 | /* resources in use */ |
650 | unsigned int resources; | |
651 | ||
510e884c FS |
652 | /* eeprom content */ |
653 | u8 *eedata; | |
654 | u16 eedata_len; | |
a6c2ba28 | 655 | |
ad0ebb96 MCC |
656 | /* Isoc control struct */ |
657 | struct em28xx_dmaqueue vidq; | |
28abf083 | 658 | struct em28xx_dmaqueue vbiq; |
74209dc0 | 659 | struct em28xx_usb_ctl usb_ctl; |
ad0ebb96 MCC |
660 | spinlock_t slock; |
661 | ||
d3829fad DH |
662 | unsigned int field_count; |
663 | unsigned int vbi_field_count; | |
664 | ||
a6c2ba28 | 665 | /* usb transfer */ |
666 | struct usb_device *udev; /* the usb device */ | |
c647a91a FS |
667 | u8 analog_ep_isoc; /* address of isoc endpoint for analog */ |
668 | u8 analog_ep_bulk; /* address of bulk endpoint for analog */ | |
669 | u8 dvb_ep_isoc; /* address of isoc endpoint for DVB */ | |
d5b6a746 | 670 | u8 dvb_ep_bulk; /* address of bulk endpoint for DVB */ |
0cf544a6 FS |
671 | int alt; /* alternate setting */ |
672 | int max_pkt_size; /* max packet size of the selected ep at alt */ | |
c647a91a FS |
673 | int packet_multiplier; /* multiplier for wMaxPacketSize, used for |
674 | URB buffer size definition */ | |
0cf544a6 FS |
675 | int num_alt; /* number of alternative settings */ |
676 | unsigned int *alt_max_pkt_size_isoc; /* array of isoc wMaxPacketSize */ | |
7312f2c9 FS |
677 | unsigned int analog_xfer_bulk:1; /* use bulk instead of isoc |
678 | transfers for analog */ | |
0cf544a6 FS |
679 | int dvb_alt_isoc; /* alternate setting for DVB isoc transfers */ |
680 | unsigned int dvb_max_pkt_size_isoc; /* isoc max packet size of the | |
681 | selected DVB ep at dvb_alt */ | |
7312f2c9 FS |
682 | unsigned int dvb_xfer_bulk:1; /* use bulk instead of isoc |
683 | transfers for DVB */ | |
c4a98793 MCC |
684 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ |
685 | ||
a6c2ba28 | 686 | /* helper funcs that call usb_control_msg */ |
6ea54d93 | 687 | int (*em28xx_write_regs) (struct em28xx *dev, u16 reg, |
a6c2ba28 | 688 | char *buf, int len); |
6ea54d93 DSL |
689 | int (*em28xx_read_reg) (struct em28xx *dev, u16 reg); |
690 | int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg, | |
691 | char *buf, int len); | |
692 | int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg, | |
a6c2ba28 | 693 | char *buf, int len); |
6ea54d93 | 694 | int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg); |
3aefb79a MCC |
695 | |
696 | enum em28xx_mode mode; | |
697 | ||
f5222609 FS |
698 | /* Button state polling */ |
699 | struct delayed_work buttons_query_work; | |
700 | u8 button_polling_addresses[EM28XX_NUM_BUTTON_ADDRESSES_MAX]; | |
7763481a | 701 | u8 button_polling_last_values[EM28XX_NUM_BUTTON_ADDRESSES_MAX]; |
f5222609 | 702 | u8 num_button_polling_addresses; |
0ff950a7 | 703 | u16 button_polling_interval; /* [ms] */ |
f5222609 | 704 | /* Snapshot button input device */ |
a9fc52bc DH |
705 | char snapshot_button_path[30]; /* path of the input dev */ |
706 | struct input_dev *sbutton_input_dev; | |
a9fc52bc | 707 | |
3421b778 | 708 | struct em28xx_dvb *dvb; |
a6c2ba28 | 709 | }; |
710 | ||
6d79468d MCC |
711 | struct em28xx_ops { |
712 | struct list_head next; | |
713 | char *name; | |
714 | int id; | |
715 | int (*init)(struct em28xx *); | |
716 | int (*fini)(struct em28xx *); | |
a3a048ce MCC |
717 | }; |
718 | ||
3acf2809 | 719 | /* Provided by em28xx-i2c.c */ |
aab3125c | 720 | void em28xx_do_i2c_scan(struct em28xx *dev, unsigned bus); |
a3ea4bf9 FS |
721 | int em28xx_i2c_register(struct em28xx *dev, unsigned bus, |
722 | enum em28xx_i2c_algo_type algo_type); | |
aab3125c | 723 | int em28xx_i2c_unregister(struct em28xx *dev, unsigned bus); |
a6c2ba28 | 724 | |
3acf2809 | 725 | /* Provided by em28xx-core.c */ |
3acf2809 | 726 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 727 | char *buf, int len); |
3acf2809 MCC |
728 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
729 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
730 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 731 | int len); |
3acf2809 | 732 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
b6972489 | 733 | int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val); |
1bad429e MCC |
734 | int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, |
735 | u8 bitmask); | |
6063d077 | 736 | int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask); |
b6972489 | 737 | |
531c98e7 MCC |
738 | int em28xx_read_ac97(struct em28xx *dev, u8 reg); |
739 | int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val); | |
740 | ||
3acf2809 | 741 | int em28xx_audio_analog_set(struct em28xx *dev); |
35643943 | 742 | int em28xx_audio_setup(struct em28xx *dev); |
539c96d0 | 743 | |
6b8a3170 FS |
744 | const struct em28xx_led *em28xx_find_led(struct em28xx *dev, |
745 | enum em28xx_led_role role); | |
3acf2809 | 746 | int em28xx_capture_start(struct em28xx *dev, int start); |
6ddd89d0 FS |
747 | int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, |
748 | int num_bufs, int max_pkt_size, int packet_multiplier); | |
057ca0da FS |
749 | int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode, |
750 | int xfer_bulk, | |
751 | int num_bufs, int max_pkt_size, int packet_multiplier, | |
752 | int (*urb_data_copy) | |
753 | (struct em28xx *dev, struct urb *urb)); | |
afb177e0 | 754 | void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode); |
5f5f147f | 755 | void em28xx_stop_urbs(struct em28xx *dev); |
c67ec53f MCC |
756 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode); |
757 | int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio); | |
6d79468d MCC |
758 | int em28xx_register_extension(struct em28xx_ops *dev); |
759 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
1a23f81b MCC |
760 | void em28xx_init_extension(struct em28xx *dev); |
761 | void em28xx_close_extension(struct em28xx *dev); | |
762 | ||
3acf2809 | 763 | /* Provided by em28xx-cards.c */ |
3acf2809 MCC |
764 | extern struct em28xx_board em28xx_boards[]; |
765 | extern struct usb_device_id em28xx_id_table[]; | |
d7cba043 | 766 | int em28xx_tuner_callback(void *ptr, int component, int command, int arg); |
1a23f81b | 767 | void em28xx_release_resources(struct em28xx *dev); |
c8793b03 | 768 | |
855ff38e FS |
769 | /* Provided by em28xx-camera.c */ |
770 | int em28xx_detect_sensor(struct em28xx *dev); | |
771 | int em28xx_init_camera(struct em28xx *dev); | |
772 | ||
a6c2ba28 | 773 | /* printk macros */ |
774 | ||
3acf2809 | 775 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 776 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 777 | |
3acf2809 | 778 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 779 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 780 | dev->name , ##arg); } while (0) |
a6c2ba28 | 781 | |
3acf2809 | 782 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 783 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 784 | dev->name , ##arg); } while (0) |
3acf2809 | 785 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 786 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 787 | dev->name , ##arg); } while (0) |
a6c2ba28 | 788 | |
6ea54d93 | 789 | static inline int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 | 790 | { |
791 | /* side effect of disabling scaler and mixer */ | |
2a29a0d7 | 792 | return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00); |
a6c2ba28 | 793 | } |
794 | ||
a6c2ba28 | 795 | /*FIXME: maxw should be dependent of alt mode */ |
6ea54d93 | 796 | static inline unsigned int norm_maxw(struct em28xx *dev) |
30556b23 | 797 | { |
55699964 MCC |
798 | if (dev->board.is_webcam) |
799 | return dev->sensor_xres; | |
800 | ||
1020d13d | 801 | if (dev->board.max_range_640_480) |
7d497f8a | 802 | return 640; |
55699964 MCC |
803 | |
804 | return 720; | |
30556b23 MR |
805 | } |
806 | ||
6ea54d93 | 807 | static inline unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 808 | { |
55699964 MCC |
809 | if (dev->board.is_webcam) |
810 | return dev->sensor_yres; | |
811 | ||
505b6d0b | 812 | if (dev->board.max_range_640_480) |
7d497f8a | 813 | return 480; |
55699964 MCC |
814 | |
815 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; | |
a6c2ba28 | 816 | } |
a6c2ba28 | 817 | #endif |