Commit | Line | Data |
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1c1e45d1 HV |
1 | /* |
2 | * cx18 functions for DVB support | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org> |
1ed9dcc8 | 5 | * Copyright (C) 2008 Andy Walls <awalls@radix.net> |
1c1e45d1 HV |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include "cx18-version.h" | |
24 | #include "cx18-dvb.h" | |
b1526421 | 25 | #include "cx18-io.h" |
21a278b8 | 26 | #include "cx18-queue.h" |
1c1e45d1 HV |
27 | #include "cx18-streams.h" |
28 | #include "cx18-cards.h" | |
8bb09db3 | 29 | #include "cx18-gpio.h" |
1c1e45d1 | 30 | #include "s5h1409.h" |
67129471 | 31 | #include "mxl5005s.h" |
8bb09db3 | 32 | #include "zl10353.h" |
ff861fb2 AW |
33 | |
34 | #include <linux/firmware.h> | |
35 | #include "mt352.h" | |
36 | #include "mt352_priv.h" | |
8bb09db3 | 37 | #include "tuner-xc2028.h" |
1c1e45d1 HV |
38 | |
39 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | |
40 | ||
41 | #define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000 | |
8bb09db3 AW |
42 | #define CX18_CLOCK_ENABLE2 0xc71024 |
43 | #define CX18_DMUX_CLK_MASK 0x0080 | |
1c1e45d1 | 44 | |
ff861fb2 AW |
45 | /* |
46 | * CX18_CARD_HVR_1600_ESMT | |
47 | * CX18_CARD_HVR_1600_SAMSUNG | |
48 | */ | |
49 | ||
67129471 ST |
50 | static struct mxl5005s_config hauppauge_hvr1600_tuner = { |
51 | .i2c_address = 0xC6 >> 1, | |
52 | .if_freq = IF_FREQ_5380000HZ, | |
53 | .xtal_freq = CRYSTAL_FREQ_16000000HZ, | |
54 | .agc_mode = MXL_SINGLE_AGC, | |
55 | .tracking_filter = MXL_TF_C_H, | |
56 | .rssi_enable = MXL_RSSI_ENABLE, | |
57 | .cap_select = MXL_CAP_SEL_ENABLE, | |
58 | .div_out = MXL_DIV_OUT_4, | |
59 | .clock_out = MXL_CLOCK_OUT_DISABLE, | |
60 | .output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM, | |
61 | .top = MXL5005S_TOP_25P2, | |
62 | .mod_mode = MXL_DIGITAL_MODE, | |
63 | .if_mode = MXL_ZERO_IF, | |
48c511ed | 64 | .qam_gain = 0x02, |
67129471 | 65 | .AgcMasterByte = 0x00, |
1c1e45d1 HV |
66 | }; |
67 | ||
68 | static struct s5h1409_config hauppauge_hvr1600_config = { | |
69 | .demod_address = 0x32 >> 1, | |
70 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
71 | .gpio = S5H1409_GPIO_ON, | |
72 | .qam_if = 44000, | |
73 | .inversion = S5H1409_INVERSION_OFF, | |
74 | .status_mode = S5H1409_DEMODLOCKING, | |
af5c8e15 DH |
75 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, |
76 | .hvr1600_opt = S5H1409_HVR1600_OPTIMIZE | |
8bb09db3 | 77 | }; |
1c1e45d1 | 78 | |
ff861fb2 AW |
79 | /* |
80 | * CX18_CARD_LEADTEK_DVR3100H | |
81 | */ | |
8bb09db3 AW |
82 | /* Information/confirmation of proper config values provided by Terry Wu */ |
83 | static struct zl10353_config leadtek_dvr3100h_demod = { | |
84 | .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ | |
85 | .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ | |
86 | .parallel_ts = 1, /* Not a serial TS */ | |
87 | .no_tuner = 1, /* XC3028 is not behind the gate */ | |
88 | .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ | |
1c1e45d1 | 89 | }; |
1c1e45d1 | 90 | |
ff861fb2 AW |
91 | /* |
92 | * CX18_CARD_YUAN_MPC718 | |
93 | */ | |
94 | /* | |
95 | * Due to | |
96 | * | |
97 | * 1. an absence of information on how to prgram the MT352 | |
98 | * 2. the Linux mt352 module pushing MT352 initialzation off onto us here | |
99 | * | |
100 | * We have to use an init sequence that *you* must extract from the Windows | |
101 | * driver (yuanrap.sys) and which we load as a firmware. | |
102 | * | |
103 | * If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual | |
104 | * with chip programming details, then I can remove this annoyance. | |
105 | */ | |
106 | static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream, | |
107 | const struct firmware **fw) | |
108 | { | |
109 | struct cx18 *cx = stream->cx; | |
110 | const char *fn = "dvb-cx18-mpc718-mt352.fw"; | |
111 | int ret; | |
112 | ||
113 | ret = request_firmware(fw, fn, &cx->pci_dev->dev); | |
114 | if (ret) | |
115 | CX18_ERR("Unable to open firmware file %s\n", fn); | |
116 | else { | |
117 | size_t sz = (*fw)->size; | |
118 | if (sz < 2 || sz > 64 || (sz % 2) != 0) { | |
119 | CX18_ERR("Firmware %s has a bad size: %lu bytes\n", | |
120 | fn, (unsigned long) sz); | |
121 | ret = -EILSEQ; | |
122 | release_firmware(*fw); | |
123 | *fw = NULL; | |
124 | } | |
125 | } | |
126 | ||
127 | if (ret) { | |
128 | CX18_ERR("The MPC718 board variant with the MT352 DVB-T" | |
129 | "demodualtor will not work without it\n"); | |
130 | CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware " | |
131 | "mpc718' if you need the firmware\n"); | |
132 | } | |
133 | return ret; | |
134 | } | |
135 | ||
136 | static int yuan_mpc718_mt352_init(struct dvb_frontend *fe) | |
137 | { | |
138 | struct cx18_dvb *dvb = container_of(fe->dvb, | |
139 | struct cx18_dvb, dvb_adapter); | |
140 | struct cx18_stream *stream = container_of(dvb, struct cx18_stream, dvb); | |
141 | const struct firmware *fw = NULL; | |
142 | int ret; | |
143 | int i; | |
144 | u8 buf[3]; | |
145 | ||
146 | ret = yuan_mpc718_mt352_reqfw(stream, &fw); | |
147 | if (ret) | |
148 | return ret; | |
149 | ||
150 | /* Loop through all the register-value pairs in the firmware file */ | |
151 | for (i = 0; i < fw->size; i += 2) { | |
152 | buf[0] = fw->data[i]; | |
153 | /* Intercept a few registers we want to set ourselves */ | |
154 | switch (buf[0]) { | |
155 | case TRL_NOMINAL_RATE_0: | |
156 | /* Set our custom OFDM bandwidth in the case below */ | |
157 | break; | |
158 | case TRL_NOMINAL_RATE_1: | |
159 | /* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */ | |
160 | /* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */ | |
161 | /* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */ | |
162 | buf[1] = 0x72; | |
163 | buf[2] = 0x49; | |
164 | mt352_write(fe, buf, 3); | |
165 | break; | |
166 | case INPUT_FREQ_0: | |
167 | /* Set our custom IF in the case below */ | |
168 | break; | |
169 | case INPUT_FREQ_1: | |
170 | /* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */ | |
171 | buf[1] = 0x31; | |
172 | buf[2] = 0xc0; | |
173 | mt352_write(fe, buf, 3); | |
174 | break; | |
175 | default: | |
176 | /* Pass through the register-value pair from the fw */ | |
177 | buf[1] = fw->data[i+1]; | |
178 | mt352_write(fe, buf, 2); | |
179 | break; | |
180 | } | |
181 | } | |
182 | ||
183 | buf[0] = (u8) TUNER_GO; | |
184 | buf[1] = 0x01; /* Go */ | |
185 | mt352_write(fe, buf, 2); | |
186 | release_firmware(fw); | |
187 | return 0; | |
188 | } | |
189 | ||
190 | static struct mt352_config yuan_mpc718_mt352_demod = { | |
191 | .demod_address = 0x1e >> 1, | |
192 | .adc_clock = 20480, /* 20.480 MHz */ | |
193 | .if2 = 4560, /* 4.560 MHz */ | |
194 | .no_tuner = 1, /* XC3028 is not behind the gate */ | |
195 | .demod_init = yuan_mpc718_mt352_init, | |
196 | }; | |
197 | ||
198 | static struct zl10353_config yuan_mpc718_zl10353_demod = { | |
199 | .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ | |
200 | .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ | |
201 | .parallel_ts = 1, /* Not a serial TS */ | |
202 | .no_tuner = 1, /* XC3028 is not behind the gate */ | |
203 | .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ | |
204 | }; | |
205 | ||
1c1e45d1 HV |
206 | static int dvb_register(struct cx18_stream *stream); |
207 | ||
208 | /* Kernel DVB framework calls this when the feed needs to start. | |
209 | * The CX18 framework should enable the transport DMA handling | |
210 | * and queue processing. | |
211 | */ | |
212 | static int cx18_dvb_start_feed(struct dvb_demux_feed *feed) | |
213 | { | |
214 | struct dvb_demux *demux = feed->demux; | |
215 | struct cx18_stream *stream = (struct cx18_stream *) demux->priv; | |
216 | struct cx18 *cx = stream->cx; | |
08cf7b2e | 217 | int ret; |
1c1e45d1 HV |
218 | u32 v; |
219 | ||
220 | CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n", | |
221 | feed->pid, feed->index); | |
08cf7b2e AW |
222 | |
223 | mutex_lock(&cx->serialize_lock); | |
224 | ret = cx18_init_on_first_open(cx); | |
225 | mutex_unlock(&cx->serialize_lock); | |
226 | if (ret) { | |
227 | CX18_ERR("Failed to initialize firmware starting DVB feed\n"); | |
228 | return ret; | |
229 | } | |
230 | ret = -EINVAL; | |
231 | ||
1c1e45d1 HV |
232 | switch (cx->card->type) { |
233 | case CX18_CARD_HVR_1600_ESMT: | |
234 | case CX18_CARD_HVR_1600_SAMSUNG: | |
b1526421 | 235 | v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL); |
1c1e45d1 HV |
236 | v |= 0x00400000; /* Serial Mode */ |
237 | v |= 0x00002000; /* Data Length - Byte */ | |
238 | v |= 0x00010000; /* Error - Polarity */ | |
239 | v |= 0x00020000; /* Error - Passthru */ | |
240 | v |= 0x000c0000; /* Error - Ignore */ | |
b1526421 | 241 | cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL); |
1c1e45d1 HV |
242 | break; |
243 | ||
8bb09db3 | 244 | case CX18_CARD_LEADTEK_DVR3100H: |
ff861fb2 | 245 | case CX18_CARD_YUAN_MPC718: |
1c1e45d1 HV |
246 | default: |
247 | /* Assumption - Parallel transport - Signalling | |
248 | * undefined or default. | |
249 | */ | |
250 | break; | |
251 | } | |
252 | ||
253 | if (!demux->dmx.frontend) | |
254 | return -EINVAL; | |
255 | ||
f68d0cf5 AW |
256 | if (!stream) |
257 | return -EINVAL; | |
258 | ||
259 | mutex_lock(&stream->dvb.feedlock); | |
260 | if (stream->dvb.feeding++ == 0) { | |
261 | CX18_DEBUG_INFO("Starting Transport DMA\n"); | |
262 | set_bit(CX18_F_S_STREAMING, &stream->s_flags); | |
263 | ret = cx18_start_v4l2_encode_stream(stream); | |
264 | if (ret < 0) { | |
265 | CX18_DEBUG_INFO("Failed to start Transport DMA\n"); | |
266 | stream->dvb.feeding--; | |
267 | if (stream->dvb.feeding == 0) | |
268 | clear_bit(CX18_F_S_STREAMING, &stream->s_flags); | |
269 | } | |
270 | } else | |
271 | ret = 0; | |
272 | mutex_unlock(&stream->dvb.feedlock); | |
1c1e45d1 HV |
273 | |
274 | return ret; | |
275 | } | |
276 | ||
277 | /* Kernel DVB framework calls this when the feed needs to stop. */ | |
278 | static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed) | |
279 | { | |
280 | struct dvb_demux *demux = feed->demux; | |
281 | struct cx18_stream *stream = (struct cx18_stream *)demux->priv; | |
282 | struct cx18 *cx = stream->cx; | |
283 | int ret = -EINVAL; | |
284 | ||
285 | CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n", | |
286 | feed->pid, feed->index); | |
287 | ||
288 | if (stream) { | |
289 | mutex_lock(&stream->dvb.feedlock); | |
290 | if (--stream->dvb.feeding == 0) { | |
291 | CX18_DEBUG_INFO("Stopping Transport DMA\n"); | |
292 | ret = cx18_stop_v4l2_encode_stream(stream, 0); | |
293 | } else | |
294 | ret = 0; | |
295 | mutex_unlock(&stream->dvb.feedlock); | |
296 | } | |
297 | ||
298 | return ret; | |
299 | } | |
300 | ||
301 | int cx18_dvb_register(struct cx18_stream *stream) | |
302 | { | |
303 | struct cx18 *cx = stream->cx; | |
304 | struct cx18_dvb *dvb = &stream->dvb; | |
305 | struct dvb_adapter *dvb_adapter; | |
306 | struct dvb_demux *dvbdemux; | |
307 | struct dmx_demux *dmx; | |
308 | int ret; | |
309 | ||
310 | if (!dvb) | |
311 | return -EINVAL; | |
312 | ||
313 | ret = dvb_register_adapter(&dvb->dvb_adapter, | |
314 | CX18_DRIVER_NAME, | |
3d05913d | 315 | THIS_MODULE, &cx->pci_dev->dev, adapter_nr); |
1c1e45d1 HV |
316 | if (ret < 0) |
317 | goto err_out; | |
318 | ||
319 | dvb_adapter = &dvb->dvb_adapter; | |
320 | ||
321 | dvbdemux = &dvb->demux; | |
322 | ||
323 | dvbdemux->priv = (void *)stream; | |
324 | ||
325 | dvbdemux->filternum = 256; | |
326 | dvbdemux->feednum = 256; | |
327 | dvbdemux->start_feed = cx18_dvb_start_feed; | |
328 | dvbdemux->stop_feed = cx18_dvb_stop_feed; | |
329 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | | |
330 | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); | |
331 | ret = dvb_dmx_init(dvbdemux); | |
332 | if (ret < 0) | |
333 | goto err_dvb_unregister_adapter; | |
334 | ||
335 | dmx = &dvbdemux->dmx; | |
336 | ||
337 | dvb->hw_frontend.source = DMX_FRONTEND_0; | |
338 | dvb->mem_frontend.source = DMX_MEMORY_FE; | |
339 | dvb->dmxdev.filternum = 256; | |
340 | dvb->dmxdev.demux = dmx; | |
341 | ||
342 | ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter); | |
343 | if (ret < 0) | |
344 | goto err_dvb_dmx_release; | |
345 | ||
346 | ret = dmx->add_frontend(dmx, &dvb->hw_frontend); | |
347 | if (ret < 0) | |
348 | goto err_dvb_dmxdev_release; | |
349 | ||
350 | ret = dmx->add_frontend(dmx, &dvb->mem_frontend); | |
351 | if (ret < 0) | |
352 | goto err_remove_hw_frontend; | |
353 | ||
354 | ret = dmx->connect_frontend(dmx, &dvb->hw_frontend); | |
355 | if (ret < 0) | |
356 | goto err_remove_mem_frontend; | |
357 | ||
358 | ret = dvb_register(stream); | |
359 | if (ret < 0) | |
360 | goto err_disconnect_frontend; | |
361 | ||
362 | dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx); | |
363 | ||
364 | CX18_INFO("DVB Frontend registered\n"); | |
6ecd86dc AW |
365 | CX18_INFO("Registered DVB adapter%d for %s (%d x %d kB)\n", |
366 | stream->dvb.dvb_adapter.num, stream->name, | |
367 | stream->buffers, stream->buf_size/1024); | |
368 | ||
1c1e45d1 HV |
369 | mutex_init(&dvb->feedlock); |
370 | dvb->enabled = 1; | |
371 | return ret; | |
372 | ||
373 | err_disconnect_frontend: | |
374 | dmx->disconnect_frontend(dmx); | |
375 | err_remove_mem_frontend: | |
376 | dmx->remove_frontend(dmx, &dvb->mem_frontend); | |
377 | err_remove_hw_frontend: | |
378 | dmx->remove_frontend(dmx, &dvb->hw_frontend); | |
379 | err_dvb_dmxdev_release: | |
380 | dvb_dmxdev_release(&dvb->dmxdev); | |
381 | err_dvb_dmx_release: | |
382 | dvb_dmx_release(dvbdemux); | |
383 | err_dvb_unregister_adapter: | |
384 | dvb_unregister_adapter(dvb_adapter); | |
385 | err_out: | |
386 | return ret; | |
387 | } | |
388 | ||
389 | void cx18_dvb_unregister(struct cx18_stream *stream) | |
390 | { | |
391 | struct cx18 *cx = stream->cx; | |
392 | struct cx18_dvb *dvb = &stream->dvb; | |
393 | struct dvb_adapter *dvb_adapter; | |
394 | struct dvb_demux *dvbdemux; | |
395 | struct dmx_demux *dmx; | |
396 | ||
397 | CX18_INFO("unregister DVB\n"); | |
398 | ||
399 | dvb_adapter = &dvb->dvb_adapter; | |
400 | dvbdemux = &dvb->demux; | |
401 | dmx = &dvbdemux->dmx; | |
402 | ||
403 | dmx->close(dmx); | |
404 | dvb_net_release(&dvb->dvbnet); | |
405 | dmx->remove_frontend(dmx, &dvb->mem_frontend); | |
406 | dmx->remove_frontend(dmx, &dvb->hw_frontend); | |
407 | dvb_dmxdev_release(&dvb->dmxdev); | |
408 | dvb_dmx_release(dvbdemux); | |
409 | dvb_unregister_frontend(dvb->fe); | |
410 | dvb_frontend_detach(dvb->fe); | |
411 | dvb_unregister_adapter(dvb_adapter); | |
412 | } | |
413 | ||
414 | /* All the DVB attach calls go here, this function get's modified | |
8bb09db3 | 415 | * for each new card. cx18_dvb_start_feed() will also need changes. |
1c1e45d1 HV |
416 | */ |
417 | static int dvb_register(struct cx18_stream *stream) | |
418 | { | |
419 | struct cx18_dvb *dvb = &stream->dvb; | |
420 | struct cx18 *cx = stream->cx; | |
421 | int ret = 0; | |
422 | ||
423 | switch (cx->card->type) { | |
1c1e45d1 HV |
424 | case CX18_CARD_HVR_1600_ESMT: |
425 | case CX18_CARD_HVR_1600_SAMSUNG: | |
426 | dvb->fe = dvb_attach(s5h1409_attach, | |
427 | &hauppauge_hvr1600_config, | |
428 | &cx->i2c_adap[0]); | |
429 | if (dvb->fe != NULL) { | |
67129471 ST |
430 | dvb_attach(mxl5005s_attach, dvb->fe, |
431 | &cx->i2c_adap[0], | |
432 | &hauppauge_hvr1600_tuner); | |
1c1e45d1 HV |
433 | ret = 0; |
434 | } | |
435 | break; | |
8bb09db3 AW |
436 | case CX18_CARD_LEADTEK_DVR3100H: |
437 | dvb->fe = dvb_attach(zl10353_attach, | |
438 | &leadtek_dvr3100h_demod, | |
439 | &cx->i2c_adap[1]); | |
440 | if (dvb->fe != NULL) { | |
441 | struct dvb_frontend *fe; | |
442 | struct xc2028_config cfg = { | |
443 | .i2c_adap = &cx->i2c_adap[1], | |
444 | .i2c_addr = 0xc2 >> 1, | |
445 | .ctrl = NULL, | |
446 | }; | |
447 | static struct xc2028_ctrl ctrl = { | |
448 | .fname = XC2028_DEFAULT_FIRMWARE, | |
ff861fb2 AW |
449 | .max_len = 64, |
450 | .demod = XC3028_FE_ZARLINK456, | |
451 | .type = XC2028_AUTO, | |
452 | }; | |
453 | ||
454 | fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); | |
455 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
456 | fe->ops.tuner_ops.set_config(fe, &ctrl); | |
457 | } | |
458 | break; | |
459 | case CX18_CARD_YUAN_MPC718: | |
460 | /* | |
461 | * TODO | |
462 | * Apparently, these cards also could instead have a | |
463 | * DiBcom demod supported by one of the db7000 drivers | |
464 | */ | |
465 | dvb->fe = dvb_attach(mt352_attach, | |
466 | &yuan_mpc718_mt352_demod, | |
467 | &cx->i2c_adap[1]); | |
468 | if (dvb->fe == NULL) | |
469 | dvb->fe = dvb_attach(zl10353_attach, | |
470 | &yuan_mpc718_zl10353_demod, | |
471 | &cx->i2c_adap[1]); | |
472 | if (dvb->fe != NULL) { | |
473 | struct dvb_frontend *fe; | |
474 | struct xc2028_config cfg = { | |
475 | .i2c_adap = &cx->i2c_adap[1], | |
476 | .i2c_addr = 0xc2 >> 1, | |
477 | .ctrl = NULL, | |
478 | }; | |
479 | static struct xc2028_ctrl ctrl = { | |
480 | .fname = XC2028_DEFAULT_FIRMWARE, | |
8bb09db3 AW |
481 | .max_len = 64, |
482 | .demod = XC3028_FE_ZARLINK456, | |
483 | .type = XC2028_AUTO, | |
484 | }; | |
485 | ||
486 | fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); | |
487 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
488 | fe->ops.tuner_ops.set_config(fe, &ctrl); | |
489 | } | |
490 | break; | |
1c1e45d1 HV |
491 | default: |
492 | /* No Digital Tv Support */ | |
493 | break; | |
494 | } | |
495 | ||
496 | if (dvb->fe == NULL) { | |
497 | CX18_ERR("frontend initialization failed\n"); | |
498 | return -1; | |
499 | } | |
500 | ||
8bb09db3 AW |
501 | dvb->fe->callback = cx18_reset_tuner_gpio; |
502 | ||
1c1e45d1 HV |
503 | ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe); |
504 | if (ret < 0) { | |
505 | if (dvb->fe->ops.release) | |
506 | dvb->fe->ops.release(dvb->fe); | |
507 | return ret; | |
508 | } | |
509 | ||
8bb09db3 AW |
510 | /* |
511 | * The firmware seems to enable the TS DMUX clock | |
512 | * under various circumstances. However, since we know we | |
513 | * might use it, let's just turn it on ourselves here. | |
514 | */ | |
515 | cx18_write_reg_expect(cx, | |
516 | (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK, | |
517 | CX18_CLOCK_ENABLE2, | |
518 | CX18_DMUX_CLK_MASK, | |
519 | (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK); | |
520 | ||
1c1e45d1 HV |
521 | return ret; |
522 | } |