[deliverable/linux.git] / drivers / media / video / cx18 / cx18-scb.c

/*
 *  cx18 System Control Block initialization
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 *  02111-1307  USA
 */

#include "cx18-driver.h"
#include "cx18-scb.h"

void cx18_init_scb(struct cx18 *cx)
{
	setup_page(SCB_OFFSET);
	memset_io(cx->scb, 0, 0x10000);

	writel(IRQ_APU_TO_CPU,     &cx->scb->apu2cpu_irq);
	writel(IRQ_CPU_TO_APU_ACK, &cx->scb->cpu2apu_irq_ack);
	writel(IRQ_HPU_TO_CPU,     &cx->scb->hpu2cpu_irq);
	writel(IRQ_CPU_TO_HPU_ACK, &cx->scb->cpu2hpu_irq_ack);
	writel(IRQ_PPU_TO_CPU,     &cx->scb->ppu2cpu_irq);
	writel(IRQ_CPU_TO_PPU_ACK, &cx->scb->cpu2ppu_irq_ack);
	writel(IRQ_EPU_TO_CPU,     &cx->scb->epu2cpu_irq);
	writel(IRQ_CPU_TO_EPU_ACK, &cx->scb->cpu2epu_irq_ack);

	writel(IRQ_CPU_TO_APU,     &cx->scb->cpu2apu_irq);
	writel(IRQ_APU_TO_CPU_ACK, &cx->scb->apu2cpu_irq_ack);
	writel(IRQ_HPU_TO_APU,     &cx->scb->hpu2apu_irq);
	writel(IRQ_APU_TO_HPU_ACK, &cx->scb->apu2hpu_irq_ack);
	writel(IRQ_PPU_TO_APU,     &cx->scb->ppu2apu_irq);
	writel(IRQ_APU_TO_PPU_ACK, &cx->scb->apu2ppu_irq_ack);
	writel(IRQ_EPU_TO_APU,     &cx->scb->epu2apu_irq);
	writel(IRQ_APU_TO_EPU_ACK, &cx->scb->apu2epu_irq_ack);

	writel(IRQ_CPU_TO_HPU,     &cx->scb->cpu2hpu_irq);
	writel(IRQ_HPU_TO_CPU_ACK, &cx->scb->hpu2cpu_irq_ack);
	writel(IRQ_APU_TO_HPU,     &cx->scb->apu2hpu_irq);
	writel(IRQ_HPU_TO_APU_ACK, &cx->scb->hpu2apu_irq_ack);
	writel(IRQ_PPU_TO_HPU,     &cx->scb->ppu2hpu_irq);
	writel(IRQ_HPU_TO_PPU_ACK, &cx->scb->hpu2ppu_irq_ack);
	writel(IRQ_EPU_TO_HPU,     &cx->scb->epu2hpu_irq);
	writel(IRQ_HPU_TO_EPU_ACK, &cx->scb->hpu2epu_irq_ack);

	writel(IRQ_CPU_TO_PPU,     &cx->scb->cpu2ppu_irq);
	writel(IRQ_PPU_TO_CPU_ACK, &cx->scb->ppu2cpu_irq_ack);
	writel(IRQ_APU_TO_PPU,     &cx->scb->apu2ppu_irq);
	writel(IRQ_PPU_TO_APU_ACK, &cx->scb->ppu2apu_irq_ack);
	writel(IRQ_HPU_TO_PPU,     &cx->scb->hpu2ppu_irq);
	writel(IRQ_PPU_TO_HPU_ACK, &cx->scb->ppu2hpu_irq_ack);
	writel(IRQ_EPU_TO_PPU,     &cx->scb->epu2ppu_irq);
	writel(IRQ_PPU_TO_EPU_ACK, &cx->scb->ppu2epu_irq_ack);

	writel(IRQ_CPU_TO_EPU,     &cx->scb->cpu2epu_irq);
	writel(IRQ_EPU_TO_CPU_ACK, &cx->scb->epu2cpu_irq_ack);
	writel(IRQ_APU_TO_EPU,     &cx->scb->apu2epu_irq);
	writel(IRQ_EPU_TO_APU_ACK, &cx->scb->epu2apu_irq_ack);
	writel(IRQ_HPU_TO_EPU,     &cx->scb->hpu2epu_irq);
	writel(IRQ_EPU_TO_HPU_ACK, &cx->scb->epu2hpu_irq_ack);
	writel(IRQ_PPU_TO_EPU,     &cx->scb->ppu2epu_irq);
	writel(IRQ_EPU_TO_PPU_ACK, &cx->scb->epu2ppu_irq_ack);

	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2cpu_mb),
			&cx->scb->apu2cpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2cpu_mb),
			&cx->scb->hpu2cpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2cpu_mb),
			&cx->scb->ppu2cpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2cpu_mb),
			&cx->scb->epu2cpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2apu_mb),
			&cx->scb->cpu2apu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2apu_mb),
			&cx->scb->hpu2apu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2apu_mb),
			&cx->scb->ppu2apu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2apu_mb),
			&cx->scb->epu2apu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2hpu_mb),
			&cx->scb->cpu2hpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2hpu_mb),
			&cx->scb->apu2hpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2hpu_mb),
			&cx->scb->ppu2hpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2hpu_mb),
			&cx->scb->epu2hpu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2ppu_mb),
			&cx->scb->cpu2ppu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2ppu_mb),
			&cx->scb->apu2ppu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2ppu_mb),
			&cx->scb->hpu2ppu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2ppu_mb),
			&cx->scb->epu2ppu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2epu_mb),
			&cx->scb->cpu2epu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2epu_mb),
			&cx->scb->apu2epu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2epu_mb),
			&cx->scb->hpu2epu_mb_offset);
	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2epu_mb),
			&cx->scb->ppu2epu_mb_offset);

	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu_state),
			&cx->scb->ipc_offset);

	writel(1, &cx->scb->hpu_state);
	writel(1, &cx->scb->epu_state);
}
Commit	Line	Data
1c1e45d1 HV	1	/*
	2	* cx18 System Control Block initialization
	3	*
	4	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	19	* 02111-1307 USA
	20	*/
	21
	22	#include "cx18-driver.h"
	23	#include "cx18-scb.h"
	24
	25	void cx18_init_scb(struct cx18 *cx)
	26	{
	27	setup_page(SCB_OFFSET);
	28	memset_io(cx->scb, 0, 0x10000);
	29
	30	writel(IRQ_APU_TO_CPU, &cx->scb->apu2cpu_irq);
	31	writel(IRQ_CPU_TO_APU_ACK, &cx->scb->cpu2apu_irq_ack);
	32	writel(IRQ_HPU_TO_CPU, &cx->scb->hpu2cpu_irq);
	33	writel(IRQ_CPU_TO_HPU_ACK, &cx->scb->cpu2hpu_irq_ack);
	34	writel(IRQ_PPU_TO_CPU, &cx->scb->ppu2cpu_irq);
	35	writel(IRQ_CPU_TO_PPU_ACK, &cx->scb->cpu2ppu_irq_ack);
	36	writel(IRQ_EPU_TO_CPU, &cx->scb->epu2cpu_irq);
	37	writel(IRQ_CPU_TO_EPU_ACK, &cx->scb->cpu2epu_irq_ack);
	38
	39	writel(IRQ_CPU_TO_APU, &cx->scb->cpu2apu_irq);
	40	writel(IRQ_APU_TO_CPU_ACK, &cx->scb->apu2cpu_irq_ack);
	41	writel(IRQ_HPU_TO_APU, &cx->scb->hpu2apu_irq);
	42	writel(IRQ_APU_TO_HPU_ACK, &cx->scb->apu2hpu_irq_ack);
	43	writel(IRQ_PPU_TO_APU, &cx->scb->ppu2apu_irq);
	44	writel(IRQ_APU_TO_PPU_ACK, &cx->scb->apu2ppu_irq_ack);
	45	writel(IRQ_EPU_TO_APU, &cx->scb->epu2apu_irq);
	46	writel(IRQ_APU_TO_EPU_ACK, &cx->scb->apu2epu_irq_ack);
	47
	48	writel(IRQ_CPU_TO_HPU, &cx->scb->cpu2hpu_irq);
	49	writel(IRQ_HPU_TO_CPU_ACK, &cx->scb->hpu2cpu_irq_ack);
	50	writel(IRQ_APU_TO_HPU, &cx->scb->apu2hpu_irq);
	51	writel(IRQ_HPU_TO_APU_ACK, &cx->scb->hpu2apu_irq_ack);
	52	writel(IRQ_PPU_TO_HPU, &cx->scb->ppu2hpu_irq);
	53	writel(IRQ_HPU_TO_PPU_ACK, &cx->scb->hpu2ppu_irq_ack);
	54	writel(IRQ_EPU_TO_HPU, &cx->scb->epu2hpu_irq);
	55	writel(IRQ_HPU_TO_EPU_ACK, &cx->scb->hpu2epu_irq_ack);
	56
	57	writel(IRQ_CPU_TO_PPU, &cx->scb->cpu2ppu_irq);
	58	writel(IRQ_PPU_TO_CPU_ACK, &cx->scb->ppu2cpu_irq_ack);
	59	writel(IRQ_APU_TO_PPU, &cx->scb->apu2ppu_irq);
	60	writel(IRQ_PPU_TO_APU_ACK, &cx->scb->ppu2apu_irq_ack);
	61	writel(IRQ_HPU_TO_PPU, &cx->scb->hpu2ppu_irq);
	62	writel(IRQ_PPU_TO_HPU_ACK, &cx->scb->ppu2hpu_irq_ack);
	63	writel(IRQ_EPU_TO_PPU, &cx->scb->epu2ppu_irq);
	64	writel(IRQ_PPU_TO_EPU_ACK, &cx->scb->ppu2epu_irq_ack);
65
66	writel(IRQ_CPU_TO_EPU, &cx->scb->cpu2epu_irq);
67	writel(IRQ_EPU_TO_CPU_ACK, &cx->scb->epu2cpu_irq_ack);
68	writel(IRQ_APU_TO_EPU, &cx->scb->apu2epu_irq);
69	writel(IRQ_EPU_TO_APU_ACK, &cx->scb->epu2apu_irq_ack);
70	writel(IRQ_HPU_TO_EPU, &cx->scb->hpu2epu_irq);
71	writel(IRQ_EPU_TO_HPU_ACK, &cx->scb->epu2hpu_irq_ack);
72	writel(IRQ_PPU_TO_EPU, &cx->scb->ppu2epu_irq);
73	writel(IRQ_EPU_TO_PPU_ACK, &cx->scb->epu2ppu_irq_ack);
74
75	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2cpu_mb),
76	&cx->scb->apu2cpu_mb_offset);
77	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2cpu_mb),
78	&cx->scb->hpu2cpu_mb_offset);
79	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2cpu_mb),
80	&cx->scb->ppu2cpu_mb_offset);
81	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2cpu_mb),
82	&cx->scb->epu2cpu_mb_offset);
83	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2apu_mb),
84	&cx->scb->cpu2apu_mb_offset);
85	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2apu_mb),
86	&cx->scb->hpu2apu_mb_offset);
87	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2apu_mb),
88	&cx->scb->ppu2apu_mb_offset);
89	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2apu_mb),
90	&cx->scb->epu2apu_mb_offset);
91	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2hpu_mb),
92	&cx->scb->cpu2hpu_mb_offset);
93	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2hpu_mb),
94	&cx->scb->apu2hpu_mb_offset);
95	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2hpu_mb),
96	&cx->scb->ppu2hpu_mb_offset);
97	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2hpu_mb),
98	&cx->scb->epu2hpu_mb_offset);
99	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2ppu_mb),
100	&cx->scb->cpu2ppu_mb_offset);
101	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2ppu_mb),
102	&cx->scb->apu2ppu_mb_offset);
103	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2ppu_mb),
104	&cx->scb->hpu2ppu_mb_offset);
105	writel(SCB_OFFSET + offsetof(struct cx18_scb, epu2ppu_mb),
106	&cx->scb->epu2ppu_mb_offset);
107	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu2epu_mb),
108	&cx->scb->cpu2epu_mb_offset);
109	writel(SCB_OFFSET + offsetof(struct cx18_scb, apu2epu_mb),
110	&cx->scb->apu2epu_mb_offset);
111	writel(SCB_OFFSET + offsetof(struct cx18_scb, hpu2epu_mb),
112	&cx->scb->hpu2epu_mb_offset);
113	writel(SCB_OFFSET + offsetof(struct cx18_scb, ppu2epu_mb),
114	&cx->scb->ppu2epu_mb_offset);
115
116	writel(SCB_OFFSET + offsetof(struct cx18_scb, cpu_state),
117	&cx->scb->ipc_offset);
118
119	writel(1, &cx->scb->hpu_state);
120	writel(1, &cx->scb->epu_state);
121	}