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V4L/DVB (13085): cx23885: Fix support for v4l2-dbg access to CX2388[578] and CX23417...
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST		 27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
d19770e5
ST		 31
32/* ------------------------------------------------------------------ */
33/* board config info */
34
35struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
c7712613
ST		 38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
d19770e5
ST		 40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
9c8ced51 43 }, {
d19770e5
ST		 44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
9c8ced51 46 }, {
d19770e5
ST		 47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
9c8ced51 49 }, {
d19770e5
ST		 50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
9c8ced51 52 } },
d19770e5
ST		 53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
9c8ced51 61 }, {
d19770e5
ST		 62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
9c8ced51 65 }, {
d19770e5
ST		 66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
9c8ced51 69 }, {
d19770e5
ST		 70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
9c8ced51 73 } },
d19770e5
ST		 74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
7b888014 77 .porta = CX23885_ANALOG_VIDEO,
a589b665 78 .portb = CX23885_MPEG_ENCODER,
d19770e5 79 .portc = CX23885_MPEG_DVB,
7b888014
ST		 80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST		 82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
9c8ced51 88 }, {
d19770e5 89 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
9c8ced51 94 }, {
d19770e5 95 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
9c8ced51 101 } },
d19770e5 102 },
a77743bc
ST		 103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
9c8ced51 110 }, {
a77743bc
ST		 111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
9c8ced51 114 }, {
a77743bc
ST		 115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
9c8ced51 118 }, {
a77743bc
ST		 119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
9c8ced51 122 } },
a77743bc 123 },
9bc37caa
MK		 124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
a6a3f140 126 .portb = CX23885_MPEG_DVB,
9bc37caa 127 },
d1987d55
ST		 128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
07b4a835
MK		 132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
b3ea0166
ST		 136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
a780a31c
ST		 140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
66762373
ST		 144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
335377b7
MK		 148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 150 .portb = CX23885_MPEG_DVB,
335377b7
MK		 151 .portc = CX23885_MPEG_DVB,
152 },
aef2d186
ST		 153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
4c56b04a
ST		 158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
9bb1b7e8
IL		 162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
96318d0c
IL		 166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
579943f5
IL		 170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
c9b8b04b
IL		 174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
5a23b076
IL		 178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
2074dffa
ST		 184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 186 .portc = CX23885_MPEG_DVB,
2074dffa 187 },
d099becb
MK		 188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
19bc5796
MK		 192 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
193 .name = "Hauppauge WinTV-HVR1255",
194 .portc = CX23885_MPEG_DVB,
195 },
6b926eca
MK		 196 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
197 .name = "Hauppauge WinTV-HVR1210",
198 .portc = CX23885_MPEG_DVB,
199 },
493b7127
DW		 200 [CX23885_BOARD_MYGICA_X8506] = {
201 .name = "Mygica X8506 DMB-TH",
202 .portb = CX23885_MPEG_DVB,
203 },
2365b2d3
DW		 204 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
205 .name = "Magic-Pro ProHDTV Extreme 2",
206 .portb = CX23885_MPEG_DVB,
207 },
13697380
ST		 208 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
209 .name = "Hauppauge WinTV-HVR1850",
210 .portb = CX23885_MPEG_ENCODER,
211 .portc = CX23885_MPEG_DVB,
212 },
34e383dd
VG		 213 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
214 .name = "Compro VideoMate E800",
215 .portc = CX23885_MPEG_DVB,
216 },
d19770e5
ST		 217};
218const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
219
220/* ------------------------------------------------------------------ */
221/* PCI subsystem IDs */
222
223struct cx23885_subid cx23885_subids[] = {
224 {
225 .subvendor = 0x0070,
226 .subdevice = 0x3400,
227 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 228 }, {
d19770e5
ST		 229 .subvendor = 0x0070,
230 .subdevice = 0x7600,
231 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 232 }, {
d19770e5
ST		 233 .subvendor = 0x0070,
234 .subdevice = 0x7800,
235 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 236 }, {
d19770e5
ST		 237 .subvendor = 0x0070,
238 .subdevice = 0x7801,
239 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 240 }, {
6ccb8cfb
MK		 241 .subvendor = 0x0070,
242 .subdevice = 0x7809,
243 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 244 }, {
a77743bc
ST		 245 .subvendor = 0x0070,
246 .subdevice = 0x7911,
247 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 248 }, {
9bc37caa
MK		 249 .subvendor = 0x18ac,
250 .subdevice = 0xd500,
251 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 252 }, {
b00fff0b
MK		 253 .subvendor = 0x0070,
254 .subdevice = 0x7790,
255 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 256 }, {
d1987d55
ST		 257 .subvendor = 0x0070,
258 .subdevice = 0x7797,
259 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 260 }, {
b00fff0b
MK		 261 .subvendor = 0x0070,
262 .subdevice = 0x7710,
263 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 264 }, {
07b4a835
MK		 265 .subvendor = 0x0070,
266 .subdevice = 0x7717,
267 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 268 }, {
269 .subvendor = 0x0070,
270 .subdevice = 0x71d1,
271 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 272 }, {
273 .subvendor = 0x0070,
274 .subdevice = 0x71d3,
275 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 276 }, {
277 .subvendor = 0x0070,
278 .subdevice = 0x8101,
279 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 280 }, {
281 .subvendor = 0x0070,
282 .subdevice = 0x8010,
283 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 284 }, {
335377b7
MK		 285 .subvendor = 0x18ac,
286 .subdevice = 0xd618,
287 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 288 }, {
aef2d186
ST		 289 .subvendor = 0x18ac,
290 .subdevice = 0xdb78,
291 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 292 }, {
293 .subvendor = 0x107d,
294 .subdevice = 0x6681,
295 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL		 296 }, {
297 .subvendor = 0x185b,
298 .subdevice = 0xe800,
299 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 300 }, {
301 .subvendor = 0x6920,
302 .subdevice = 0x8888,
303 .card = CX23885_BOARD_TBS_6920,
579943f5
IL		 304 }, {
305 .subvendor = 0xd470,
306 .subdevice = 0x9022,
307 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 308 }, {
309 .subvendor = 0x0001,
310 .subdevice = 0x2005,
311 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 312 }, {
313 .subvendor = 0x1b55,
314 .subdevice = 0x2a2c,
315 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 316 }, {
317 .subvendor = 0x0070,
318 .subdevice = 0x2211,
319 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 320 }, {
321 .subvendor = 0x0070,
322 .subdevice = 0x2215,
323 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 324 }, {
325 .subvendor = 0x0070,
326 .subdevice = 0x2251,
327 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK		 328 }, {
329 .subvendor = 0x0070,
330 .subdevice = 0x2291,
331 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
332 }, {
333 .subvendor = 0x0070,
334 .subdevice = 0x2295,
335 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
493b7127
DW		 336 }, {
337 .subvendor = 0x14f1,
338 .subdevice = 0x8651,
339 .card = CX23885_BOARD_MYGICA_X8506,
2365b2d3
DW		 340 }, {
341 .subvendor = 0x14f1,
342 .subdevice = 0x8657,
343 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
13697380
ST		 344 }, {
345 .subvendor = 0x0070,
346 .subdevice = 0x8541,
347 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
34e383dd
VG		 348 }, {
349 .subvendor = 0x1858,
350 .subdevice = 0xe800,
351 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
d19770e5
ST		 352 },
353};
354const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
355
356void cx23885_card_list(struct cx23885_dev *dev)
357{
358 int i;
359
360 if (0 == dev->pci->subsystem_vendor &&
361 0 == dev->pci->subsystem_device) {
9c8ced51
ST		 362 printk(KERN_INFO
363 "%s: Board has no valid PCIe Subsystem ID and can't\n"
364 "%s: be autodetected. Pass card=<n> insmod option\n"
365 "%s: to workaround that. Redirect complaints to the\n"
366 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST		 367 "%s: -- tux\n",
368 dev->name, dev->name, dev->name, dev->name, dev->name);
369 } else {
9c8ced51
ST		 370 printk(KERN_INFO
371 "%s: Your board isn't known (yet) to the driver.\n"
372 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST		 373 "%s: card=<n> insmod option. Updating to the latest\n"
374 "%s: version might help as well.\n",
375 dev->name, dev->name, dev->name, dev->name);
376 }
9c8ced51 377 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 378 dev->name);
379 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 380 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST		 381 dev->name, i, cx23885_boards[i].name);
382}
383
384static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
385{
386 struct tveeprom tv;
387
9c8ced51
ST		 388 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
389 eeprom_data);
d19770e5 390
d19770e5 391 /* Make sure we support the board model */
9c8ced51 392 switch (tv.model) {
5308cf09
MK		 393 case 22001:
394 /* WinTV-HVR1270 (PCIe, Retail, half height)
395 * ATSC/QAM and basic analog, IR Blast */
396 case 22009:
397 /* WinTV-HVR1210 (PCIe, Retail, half height)
398 * DVB-T and basic analog, IR Blast */
399 case 22011:
400 /* WinTV-HVR1270 (PCIe, Retail, half height)
401 * ATSC/QAM and basic analog, IR Recv */
402 case 22019:
403 /* WinTV-HVR1210 (PCIe, Retail, half height)
404 * DVB-T and basic analog, IR Recv */
405 case 22021:
406 /* WinTV-HVR1275 (PCIe, Retail, half height)
407 * ATSC/QAM and basic analog, IR Recv */
408 case 22029:
409 /* WinTV-HVR1210 (PCIe, Retail, half height)
410 * DVB-T and basic analog, IR Recv */
411 case 22101:
412 /* WinTV-HVR1270 (PCIe, Retail, full height)
413 * ATSC/QAM and basic analog, IR Blast */
414 case 22109:
415 /* WinTV-HVR1210 (PCIe, Retail, full height)
416 * DVB-T and basic analog, IR Blast */
417 case 22111:
418 /* WinTV-HVR1270 (PCIe, Retail, full height)
419 * ATSC/QAM and basic analog, IR Recv */
420 case 22119:
421 /* WinTV-HVR1210 (PCIe, Retail, full height)
422 * DVB-T and basic analog, IR Recv */
423 case 22121:
424 /* WinTV-HVR1275 (PCIe, Retail, full height)
425 * ATSC/QAM and basic analog, IR Recv */
426 case 22129:
427 /* WinTV-HVR1210 (PCIe, Retail, full height)
428 * DVB-T and basic analog, IR Recv */
36396c89
MK		 429 case 71009:
430 /* WinTV-HVR1200 (PCIe, Retail, full height)
431 * DVB-T and basic analog */
432 case 71359:
433 /* WinTV-HVR1200 (PCIe, OEM, half height)
434 * DVB-T and basic analog */
435 case 71439:
436 /* WinTV-HVR1200 (PCIe, OEM, half height)
437 * DVB-T and basic analog */
438 case 71449:
439 /* WinTV-HVR1200 (PCIe, OEM, full height)
440 * DVB-T and basic analog */
441 case 71939:
442 /* WinTV-HVR1200 (PCIe, OEM, half height)
443 * DVB-T and basic analog */
444 case 71949:
445 /* WinTV-HVR1200 (PCIe, OEM, full height)
446 * DVB-T and basic analog */
447 case 71959:
448 /* WinTV-HVR1200 (PCIe, OEM, full height)
449 * DVB-T and basic analog */
450 case 71979:
451 /* WinTV-HVR1200 (PCIe, OEM, half height)
452 * DVB-T and basic analog */
453 case 71999:
454 /* WinTV-HVR1200 (PCIe, OEM, full height)
455 * DVB-T and basic analog */
9c8ced51
ST		 456 case 76601:
457 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
458 channel ATSC and MPEG2 HW Encoder */
459 case 77001:
460 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
461 and Basic analog */
462 case 77011:
463 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
464 and Basic analog */
465 case 77041:
466 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
467 and Basic analog */
468 case 77051:
469 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
470 and Basic analog */
471 case 78011:
472 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
473 Dual channel ATSC and MPEG2 HW Encoder */
474 case 78501:
475 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
476 Dual channel ATSC and MPEG2 HW Encoder */
477 case 78521:
478 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
479 Dual channel ATSC and MPEG2 HW Encoder */
480 case 78531:
481 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
482 Dual channel ATSC and MPEG2 HW Encoder */
483 case 78631:
484 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
485 Dual channel ATSC and MPEG2 HW Encoder */
486 case 79001:
487 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
488 ATSC and Basic analog */
489 case 79101:
490 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
491 ATSC and Basic analog */
492 case 79561:
493 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
494 ATSC and Basic analog */
495 case 79571:
496 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
497 ATSC and Basic analog */
498 case 79671:
499 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
500 ATSC and Basic analog */
66762373
ST		 501 case 80019:
502 /* WinTV-HVR1400 (Express Card, Retail, IR,
503 * DVB-T and Basic analog */
36396c89
MK		 504 case 81509:
505 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
506 * DVB-T and MPEG2 HW Encoder */
a780a31c 507 case 81519:
36396c89 508 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 509 * DVB-T and MPEG2 HW Encoder */
d19770e5 510 break;
13697380
ST		 511 case 85021:
512 /* WinTV-HVR1850 (PCIe, OEM, RCA in, IR, FM,
513 Dual channel ATSC and MPEG2 HW Encoder */
514 break;
d19770e5 515 default:
13697380
ST		 516 printk(KERN_WARNING "%s: warning: "
517 "unknown hauppauge model #%d\n",
9c8ced51 518 dev->name, tv.model);
d19770e5
ST		 519 break;
520 }
521
522 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
523 dev->name, tv.model);
524}
525
d7cba043 526int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 527{
89ce2216
ST		 528 struct cx23885_tsport *port = priv;
529 struct cx23885_dev *dev = port->dev;
6df51690
ST		 530 u32 bitmask = 0;
531
89ce2216
ST		 532 if (command == XC2028_RESET_CLK)
533 return 0;
534
6df51690
ST		 535 if (command != 0) {
536 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
537 __func__, command);
538 return -EINVAL;
539 }
8c70017f 540
9c8ced51 541 switch (dev->board) {
90a71b1c
ST		 542 case CX23885_BOARD_HAUPPAUGE_HVR1400:
543 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 544 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 545 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 546 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 547 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
90a71b1c 548 /* Tuner Reset Command */
4c56b04a 549 bitmask = 0x04;
6df51690
ST		 550 break;
551 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 552 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST		 553 /* Two identical tuners on two different i2c buses,
554 * we need to reset the correct gpio. */
d4dc673d 555 if (port->nr == 1)
4c56b04a 556 bitmask = 0x01;
d4dc673d 557 else if (port->nr == 2)
4c56b04a 558 bitmask = 0x04;
8c70017f
ST		 559 break;
560 }
561
6df51690
ST		 562 if (bitmask) {
563 /* Drive the tuner into reset and back out */
564 cx_clear(GP0_IO, bitmask);
565 mdelay(200);
566 cx_set(GP0_IO, bitmask);
567 }
568
569 return 0;
8c70017f 570}
73c993a8 571
a6a3f140
ST		 572void cx23885_gpio_setup(struct cx23885_dev *dev)
573{
9c8ced51 574 switch (dev->board) {
a6a3f140
ST		 575 case CX23885_BOARD_HAUPPAUGE_HVR1250:
576 /* GPIO-0 cx24227 demodulator reset */
577 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
578 break;
07b4a835
MK		 579 case CX23885_BOARD_HAUPPAUGE_HVR1500:
580 /* GPIO-0 cx24227 demodulator */
581 /* GPIO-2 xc3028 tuner */
582
583 /* Put the parts into reset */
584 cx_set(GP0_IO, 0x00050000);
585 cx_clear(GP0_IO, 0x00000005);
586 msleep(5);
587
588 /* Bring the parts out of reset */
589 cx_set(GP0_IO, 0x00050005);
590 break;
d1987d55
ST		 591 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
592 /* GPIO-0 cx24227 demodulator reset */
593 /* GPIO-2 xc5000 tuner reset */
594 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
595 break;
a6a3f140
ST		 596 case CX23885_BOARD_HAUPPAUGE_HVR1800:
597 /* GPIO-0 656_CLK */
598 /* GPIO-1 656_D0 */
599 /* GPIO-2 8295A Reset */
600 /* GPIO-3-10 cx23417 data0-7 */
601 /* GPIO-11-14 cx23417 addr0-3 */
602 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
603 /* GPIO-19 IR_RX */
3ba71d21 604
a589b665
ST		 605 /* CX23417 GPIO's */
606 /* EIO15 Zilog Reset */
607 /* EIO14 S5H1409/CX24227 Reset */
f659c513
ST		 608 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
609
610 /* Put the demod into reset and protect the eeprom */
611 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
612 mdelay(100);
613
614 /* Bring the demod and blaster out of reset */
615 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
616 mdelay(100);
a589b665 617
5206d6ec 618 /* Force the TDA8295A into reset and back */
21ff3e4f
ST		 619 cx23885_gpio_enable(dev, GPIO_2, 1);
620 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 621 mdelay(20);
21ff3e4f 622 cx23885_gpio_clear(dev, GPIO_2);
5206d6ec 623 mdelay(20);
21ff3e4f 624 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 625 mdelay(20);
a6a3f140 626 break;
b3ea0166
ST		 627 case CX23885_BOARD_HAUPPAUGE_HVR1200:
628 /* GPIO-0 tda10048 demodulator reset */
629 /* GPIO-2 tda18271 tuner reset */
630
a780a31c
ST		 631 /* Put the parts into reset and back */
632 cx_set(GP0_IO, 0x00050000);
633 mdelay(20);
634 cx_clear(GP0_IO, 0x00000005);
635 mdelay(20);
636 cx_set(GP0_IO, 0x00050005);
637 break;
638 case CX23885_BOARD_HAUPPAUGE_HVR1700:
639 /* GPIO-0 TDA10048 demodulator reset */
640 /* GPIO-2 TDA8295A Reset */
641 /* GPIO-3-10 cx23417 data0-7 */
642 /* GPIO-11-14 cx23417 addr0-3 */
643 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
644
645 /* The following GPIO's are on the interna AVCore (cx25840) */
646 /* GPIO-19 IR_RX */
647 /* GPIO-20 IR_TX 416/DVBT Select */
648 /* GPIO-21 IIS DAT */
649 /* GPIO-22 IIS WCLK */
650 /* GPIO-23 IIS BCLK */
651
66762373
ST		 652 /* Put the parts into reset and back */
653 cx_set(GP0_IO, 0x00050000);
654 mdelay(20);
655 cx_clear(GP0_IO, 0x00000005);
656 mdelay(20);
657 cx_set(GP0_IO, 0x00050005);
658 break;
659 case CX23885_BOARD_HAUPPAUGE_HVR1400:
660 /* GPIO-0 Dibcom7000p demodulator reset */
661 /* GPIO-2 xc3028L tuner reset */
662 /* GPIO-13 LED */
663
b3ea0166
ST		 664 /* Put the parts into reset and back */
665 cx_set(GP0_IO, 0x00050000);
666 mdelay(20);
667 cx_clear(GP0_IO, 0x00000005);
668 mdelay(20);
669 cx_set(GP0_IO, 0x00050005);
670 break;
1ecc5aed
ST		 671 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
672 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
673 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
674 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
675 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
676
aef2d186
ST		 677 /* Put the parts into reset and back */
678 cx_set(GP0_IO, 0x000f0000);
679 mdelay(20);
680 cx_clear(GP0_IO, 0x0000000f);
681 mdelay(20);
682 cx_set(GP0_IO, 0x000f000f);
683 break;
684 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
685 /* GPIO-0 portb xc3028 reset */
686 /* GPIO-1 portb zl10353 reset */
687 /* GPIO-2 portc xc3028 reset */
688 /* GPIO-3 portc zl10353 reset */
689
1ecc5aed
ST		 690 /* Put the parts into reset and back */
691 cx_set(GP0_IO, 0x000f0000);
692 mdelay(20);
693 cx_clear(GP0_IO, 0x0000000f);
694 mdelay(20);
695 cx_set(GP0_IO, 0x000f000f);
696 break;
4c56b04a 697 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 698 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 699 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 700 /* GPIO-2 xc3028 tuner reset */
701
702 /* The following GPIO's are on the internal AVCore (cx25840) */
703 /* GPIO-? zl10353 demod reset */
704
705 /* Put the parts into reset and back */
706 cx_set(GP0_IO, 0x00040000);
707 mdelay(20);
708 cx_clear(GP0_IO, 0x00000004);
709 mdelay(20);
710 cx_set(GP0_IO, 0x00040004);
711 break;
96318d0c 712 case CX23885_BOARD_TBS_6920:
579943f5 713 case CX23885_BOARD_TEVII_S470:
96318d0c
IL		 714 cx_write(MC417_CTL, 0x00000036);
715 cx_write(MC417_OEN, 0x00001000);
716 cx_write(MC417_RWD, 0x00001800);
717 break;
5a23b076
IL		 718 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
719 /* GPIO-0 INTA from CiMax1
720 GPIO-1 INTB from CiMax2
721 GPIO-2 reset chips
722 GPIO-3 to GPIO-10 data/addr for CA
723 GPIO-11 ~CS0 to CiMax1
724 GPIO-12 ~CS1 to CiMax2
725 GPIO-13 ADL0 load LSB addr
726 GPIO-14 ADL1 load MSB addr
727 GPIO-15 ~RDY from CiMax
728 GPIO-17 ~RD to CiMax
729 GPIO-18 ~WR to CiMax
730 */
731 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
732 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
733 cx_clear(GP0_IO, 0x00030004);
734 mdelay(100);/* reset delay */
735 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
736 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
737 /* GPIO-15 IN as ~ACK, rest as OUT */
738 cx_write(MC417_OEN, 0x00001000);
739 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
740 cx_write(MC417_RWD, 0x0000c300);
741 /* enable irq */
742 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
743 break;
2074dffa 744 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 745 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 746 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 747 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 748 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 749 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
750 /* GPIO-9 Demod reset */
2074dffa
ST		 751
752 /* Put the parts into reset and back */
d099becb
MK		 753 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
754 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 755 cx23885_gpio_clear(dev, GPIO_9);
756 mdelay(20);
757 cx23885_gpio_set(dev, GPIO_9);
758 break;
493b7127 759 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 760 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127 761 /* GPIO-1 reset XC5000 */
2365b2d3 762 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
493b7127
DW		 763 cx_set(GP0_IO, 0x00060000);
764 cx_clear(GP0_IO, 0x00000006);
765 mdelay(100);
766 cx_set(GP0_IO, 0x00060006);
767 mdelay(100);
768 break;
13697380
ST		 769 case CX23885_BOARD_HAUPPAUGE_HVR1850:
770 /* GPIO-0 656_CLK */
771 /* GPIO-1 656_D0 */
772 /* GPIO-2 Wake# */
773 /* GPIO-3-10 cx23417 data0-7 */
774 /* GPIO-11-14 cx23417 addr0-3 */
775 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
776 /* GPIO-19 IR_RX */
777 /* GPIO-20 C_IR_TX */
778 /* GPIO-21 I2S DAT */
779 /* GPIO-22 I2S WCLK */
780 /* GPIO-23 I2S BCLK */
781 /* ALT GPIO: EXP GPIO LATCH */
782
783 /* CX23417 GPIO's */
784 /* GPIO-14 S5H1411/CX24228 Reset */
785 /* GPIO-13 EEPROM write protect */
786 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
787
788 /* Put the demod into reset and protect the eeprom */
789 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
790 mdelay(100);
791
792 /* Bring the demod out of reset */
793 mc417_gpio_set(dev, GPIO_14);
794 mdelay(100);
795
796 /* CX24228 GPIO */
797 /* Connected to IF / Mux */
798 break;
a6a3f140
ST		 799 }
800}
801
802int cx23885_ir_init(struct cx23885_dev *dev)
803{
804 switch (dev->board) {
805 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 806 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 807 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 808 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 809 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 810 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 811 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 812 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 813 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 814 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 815 case CX23885_BOARD_HAUPPAUGE_HVR1850:
a6a3f140
ST		 816 /* FIXME: Implement me */
817 break;
12886871
ST		 818 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
819 request_module("ir-kbd-i2c");
820 break;
a6a3f140
ST		 821 }
822
823 return 0;
824}
825
d19770e5
ST		 826void cx23885_card_setup(struct cx23885_dev *dev)
827{
a6a3f140
ST		 828 struct cx23885_tsport *ts1 = &dev->ts1;
829 struct cx23885_tsport *ts2 = &dev->ts2;
830
d19770e5
ST		 831 static u8 eeprom[256];
832
833 if (dev->i2c_bus[0].i2c_rc == 0) {
834 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 835 tveeprom_read(&dev->i2c_bus[0].i2c_client,
836 eeprom, sizeof(eeprom));
d19770e5
ST		 837 }
838
839 switch (dev->board) {
a77743bc 840 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 841 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 842 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 843 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 844 if (dev->i2c_bus[0].i2c_rc == 0)
845 hauppauge_eeprom(dev, eeprom+0x80);
846 break;
d19770e5
ST		 847 case CX23885_BOARD_HAUPPAUGE_HVR1800:
848 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 849 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 850 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 851 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 852 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 853 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 854 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 855 case CX23885_BOARD_HAUPPAUGE_HVR1850:
d19770e5 856 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 857 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST		 858 break;
859 }
a6a3f140
ST		 860
861 switch (dev->board) {
335377b7 862 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 863 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK		 864 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
865 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
866 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
867 /* break omitted intentionally */
a6a3f140
ST		 868 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
869 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
870 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
871 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
872 break;
a589b665
ST		 873 case CX23885_BOARD_HAUPPAUGE_HVR1800:
874 /* Defaults for VID B - Analog encoder */
875 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
876 ts1->gen_ctrl_val = 0x10e;
877 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
878 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
879
880 /* APB_TSVALERR_POL (active low)*/
881 ts1->vld_misc_val = 0x2000;
882 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
883
884 /* Defaults for VID C */
885 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
886 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
887 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c 888 break;
579943f5 889 case CX23885_BOARD_TEVII_S470:
96318d0c 890 case CX23885_BOARD_TBS_6920:
c9b8b04b 891 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL		 892 ts1->gen_ctrl_val = 0x5; /* Parallel */
893 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
894 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 895 break;
5a23b076
IL		 896 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
897 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
898 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
899 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
900 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
901 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
902 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
903 break;
493b7127 904 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 905 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127
DW		 906 ts1->gen_ctrl_val = 0x5; /* Parallel */
907 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
908 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
909 break;
a6a3f140 910 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 911 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 912 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 913 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 914 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 915 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 916 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 917 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 918 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 919 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 920 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 921 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 922 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 923 case CX23885_BOARD_HAUPPAUGE_HVR1850:
34e383dd 924 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
a6a3f140
ST		 925 default:
926 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
927 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
928 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
929 }
930
ce89cfb4
ST		 931 /* Certain boards support analog, or require the avcore to be
932 * loaded, ensure this happens.
933 */
934 switch (dev->board) {
935 case CX23885_BOARD_HAUPPAUGE_HVR1800:
936 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
937 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 938 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 939 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 940 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
34e383dd 941 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
e6574f2f
HV		 942 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
943 &dev->i2c_bus[2].i2c_adap,
53dacb15 944 "cx25840", "cx25840", 0x88 >> 1, NULL);
cc26b076 945 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST		 946 break;
947 }
5a23b076
IL		 948
949 /* AUX-PLL 27MHz CLK */
950 switch (dev->board) {
951 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
952 netup_initialize(dev);
953 break;
954 }
d19770e5
ST		 955}
956
957/* ------------------------------------------------------------------ */
Linux kernel - Deliverables
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