V4L/DVB (10267): Add support for TeVii S470 DVB-S2 PCI-e card.
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
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5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/device.h>
25#include <linux/fs.h>
26#include <linux/kthread.h>
27#include <linux/file.h>
28#include <linux/suspend.h>
29
30#include "cx23885.h"
d19770e5
ST
31#include <media/v4l2-common.h>
32
33#include "s5h1409.h"
52b50450 34#include "s5h1411.h"
d19770e5 35#include "mt2131.h"
3ba71d21 36#include "tda8290.h"
4041f1a5 37#include "tda18271.h"
9bc37caa 38#include "lgdt330x.h"
d1987d55 39#include "xc5000.h"
b3ea0166 40#include "tda10048.h"
07b4a835 41#include "tuner-xc2028.h"
827855d3 42#include "tuner-simple.h"
66762373
ST
43#include "dib7000p.h"
44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
96318d0c 46#include "cx24116.h"
d19770e5 47
4513fc69 48static unsigned int debug;
d19770e5 49
4513fc69
ST
50#define dprintk(level, fmt, arg...)\
51 do { if (debug >= level)\
52 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
53 } while (0)
d19770e5
ST
54
55/* ------------------------------------------------------------------ */
56
3ba71d21
MK
57static unsigned int alt_tuner;
58module_param(alt_tuner, int, 0644);
59MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
60
78e92006
JG
61DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
62
3ba71d21
MK
63/* ------------------------------------------------------------------ */
64
d19770e5
ST
65static int dvb_buf_setup(struct videobuf_queue *q,
66 unsigned int *count, unsigned int *size)
67{
68 struct cx23885_tsport *port = q->priv_data;
69
70 port->ts_packet_size = 188 * 4;
71 port->ts_packet_count = 32;
72
73 *size = port->ts_packet_size * port->ts_packet_count;
74 *count = 32;
75 return 0;
76}
77
44a6481d
MK
78static int dvb_buf_prepare(struct videobuf_queue *q,
79 struct videobuf_buffer *vb, enum v4l2_field field)
d19770e5
ST
80{
81 struct cx23885_tsport *port = q->priv_data;
9c8ced51 82 return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
d19770e5
ST
83}
84
85static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
86{
87 struct cx23885_tsport *port = q->priv_data;
9c8ced51 88 cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
d19770e5
ST
89}
90
44a6481d
MK
91static void dvb_buf_release(struct videobuf_queue *q,
92 struct videobuf_buffer *vb)
d19770e5 93{
9c8ced51 94 cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
d19770e5
ST
95}
96
97static struct videobuf_queue_ops dvb_qops = {
98 .buf_setup = dvb_buf_setup,
99 .buf_prepare = dvb_buf_prepare,
100 .buf_queue = dvb_buf_queue,
101 .buf_release = dvb_buf_release,
102};
103
86184e06 104static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST
105 .demod_address = 0x32 >> 1,
106 .output_mode = S5H1409_SERIAL_OUTPUT,
107 .gpio = S5H1409_GPIO_ON,
2b03238a 108 .qam_if = 44000,
fc959bef 109 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
110 .status_mode = S5H1409_DEMODLOCKING,
111 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST
112};
113
b3ea0166
ST
114static struct tda10048_config hauppauge_hvr1200_config = {
115 .demod_address = 0x10 >> 1,
116 .output_mode = TDA10048_SERIAL_OUTPUT,
117 .fwbulkwritelen = TDA10048_BULKWRITE_200,
118 .inversion = TDA10048_INVERSION_ON
119};
120
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MK
121static struct s5h1409_config hauppauge_ezqam_config = {
122 .demod_address = 0x32 >> 1,
123 .output_mode = S5H1409_SERIAL_OUTPUT,
124 .gpio = S5H1409_GPIO_OFF,
125 .qam_if = 4000,
126 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST
127 .status_mode = S5H1409_DEMODLOCKING,
128 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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MK
129};
130
fc959bef 131static struct s5h1409_config hauppauge_hvr1800lp_config = {
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ST
132 .demod_address = 0x32 >> 1,
133 .output_mode = S5H1409_SERIAL_OUTPUT,
134 .gpio = S5H1409_GPIO_OFF,
2b03238a 135 .qam_if = 44000,
fe475163 136 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
137 .status_mode = S5H1409_DEMODLOCKING,
138 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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ST
139};
140
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MK
141static struct s5h1409_config hauppauge_hvr1500_config = {
142 .demod_address = 0x32 >> 1,
143 .output_mode = S5H1409_SERIAL_OUTPUT,
144 .gpio = S5H1409_GPIO_OFF,
145 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
146 .status_mode = S5H1409_DEMODLOCKING,
147 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK
148};
149
86184e06 150static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST
151 0x61
152};
153
9bc37caa
MK
154static struct lgdt330x_config fusionhdtv_5_express = {
155 .demod_address = 0x0e,
156 .demod_chip = LGDT3303,
157 .serial_mpeg = 0x40,
158};
159
d1987d55
ST
160static struct s5h1409_config hauppauge_hvr1500q_config = {
161 .demod_address = 0x32 >> 1,
162 .output_mode = S5H1409_SERIAL_OUTPUT,
163 .gpio = S5H1409_GPIO_ON,
164 .qam_if = 44000,
165 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
166 .status_mode = S5H1409_DEMODLOCKING,
167 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST
168};
169
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MK
170static struct s5h1409_config dvico_s5h1409_config = {
171 .demod_address = 0x32 >> 1,
172 .output_mode = S5H1409_SERIAL_OUTPUT,
173 .gpio = S5H1409_GPIO_ON,
174 .qam_if = 44000,
175 .inversion = S5H1409_INVERSION_OFF,
176 .status_mode = S5H1409_DEMODLOCKING,
177 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
178};
179
52b50450
MK
180static struct s5h1411_config dvico_s5h1411_config = {
181 .output_mode = S5H1411_SERIAL_OUTPUT,
182 .gpio = S5H1411_GPIO_ON,
183 .qam_if = S5H1411_IF_44000,
184 .vsb_if = S5H1411_IF_44000,
185 .inversion = S5H1411_INVERSION_OFF,
186 .status_mode = S5H1411_DEMODLOCKING,
187 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
188};
189
d1987d55 190static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST
191 .i2c_address = 0x61,
192 .if_khz = 5380,
d1987d55
ST
193};
194
335377b7
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195static struct xc5000_config dvico_xc5000_tunerconfig = {
196 .i2c_address = 0x64,
197 .if_khz = 5380,
335377b7
MK
198};
199
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200static struct tda829x_config tda829x_no_probe = {
201 .probe_tuner = TDA829X_DONT_PROBE,
202};
203
f21e0d7f 204static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK
205 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
206 .if_lvl = 6, .rfagc_top = 0x37 },
207 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
208 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK
209};
210
211static struct tda18271_config hauppauge_tda18271_config = {
212 .std_map = &hauppauge_tda18271_std_map,
213 .gate = TDA18271_GATE_ANALOG,
214};
215
b3ea0166
ST
216static struct tda18271_config hauppauge_hvr1200_tuner_config = {
217 .gate = TDA18271_GATE_ANALOG,
218};
219
b1721d0d 220static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST
221 BAND_VHF | BAND_UHF, /* band_caps */
222
223 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
224 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
225 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
226 * P_agc_nb_est=2, P_agc_write=0
227 */
228 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
229 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
230
231 712, /* inv_gain */
232 21, /* time_stabiliz */
233
234 0, /* alpha_level */
235 118, /* thlock */
236
237 0, /* wbd_inv */
238 2867, /* wbd_ref */
239 0, /* wbd_sel */
240 2, /* wbd_alpha */
241
242 0, /* agc1_max */
243 0, /* agc1_min */
244 39718, /* agc2_max */
245 9930, /* agc2_min */
246 0, /* agc1_pt1 */
247 0, /* agc1_pt2 */
248 0, /* agc1_pt3 */
249 0, /* agc1_slope1 */
250 0, /* agc1_slope2 */
251 0, /* agc2_pt1 */
252 128, /* agc2_pt2 */
253 29, /* agc2_slope1 */
254 29, /* agc2_slope2 */
255
256 17, /* alpha_mant */
257 27, /* alpha_exp */
258 23, /* beta_mant */
259 51, /* beta_exp */
260
261 1, /* perform_agc_softsplit */
262};
263
264/* PLL Configuration for COFDM BW_MHz = 8.000000
265 * With external clock = 30.000000 */
b1721d0d 266static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST
267 60000, /* internal */
268 30000, /* sampling */
269 1, /* pll_cfg: prediv */
270 8, /* pll_cfg: ratio */
271 3, /* pll_cfg: range */
272 1, /* pll_cfg: reset */
273 0, /* pll_cfg: bypass */
274 0, /* misc: refdiv */
275 0, /* misc: bypclk_div */
276 1, /* misc: IO_CLK_en_core */
277 1, /* misc: ADClkSrc */
278 0, /* misc: modulo */
279 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
280 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
281 20452225, /* timf */
282 30000000 /* xtal_hz */
283};
284
285static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
286 .output_mpeg2_in_188_bytes = 1,
287 .hostbus_diversity = 1,
288 .tuner_is_baseband = 0,
289 .update_lna = NULL,
290
291 .agc_config_count = 1,
292 .agc = &xc3028_agc_config,
293 .bw = &xc3028_bw_config,
294
295 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
296 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
297 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
298
299 .pwm_freq_div = 0,
300 .agc_control = NULL,
301 .spur_protect = 0,
302
303 .output_mode = OUTMODE_MPEG2_SERIAL,
304};
305
aef2d186
ST
306static struct zl10353_config dvico_fusionhdtv_xc3028 = {
307 .demod_address = 0x0f,
308 .if2 = 45600,
309 .no_tuner = 1,
310};
311
96318d0c
IL
312static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
313{
314 struct cx23885_tsport *port = fe->dvb->priv;
315 struct cx23885_dev *dev = port->dev;
316
317 if (voltage == SEC_VOLTAGE_18)
318 cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
319 else if (voltage == SEC_VOLTAGE_13)
320 cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
321 else
322 cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
323 return 0;
324}
325
326static struct cx24116_config tbs_cx24116_config = {
327 .demod_address = 0x05,
328};
329
579943f5
IL
330static struct cx24116_config tevii_cx24116_config = {
331 .demod_address = 0x55,
332};
333
d19770e5
ST
334static int dvb_register(struct cx23885_tsport *port)
335{
336 struct cx23885_dev *dev = port->dev;
f139fa71 337 struct cx23885_i2c *i2c_bus = NULL;
363c35fc
ST
338 struct videobuf_dvb_frontend *fe0;
339
f972e0bd 340 /* Get the first frontend */
92abe9ee 341 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST
342 if (!fe0)
343 return -EINVAL;
d19770e5
ST
344
345 /* init struct videobuf_dvb */
363c35fc 346 fe0->dvb.name = dev->name;
d19770e5
ST
347
348 /* init frontend */
349 switch (dev->board) {
a77743bc 350 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 351 i2c_bus = &dev->i2c_bus[0];
363c35fc 352 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 353 &hauppauge_generic_config,
f139fa71 354 &i2c_bus->i2c_adap);
363c35fc
ST
355 if (fe0->dvb.frontend != NULL) {
356 dvb_attach(mt2131_attach, fe0->dvb.frontend,
f139fa71 357 &i2c_bus->i2c_adap,
86184e06 358 &hauppauge_generic_tunerconfig, 0);
d19770e5
ST
359 }
360 break;
3ba71d21
MK
361 case CX23885_BOARD_HAUPPAUGE_HVR1800:
362 i2c_bus = &dev->i2c_bus[0];
92abe9ee 363 switch (alt_tuner) {
3ba71d21 364 case 1:
363c35fc 365 fe0->dvb.frontend =
3ba71d21
MK
366 dvb_attach(s5h1409_attach,
367 &hauppauge_ezqam_config,
368 &i2c_bus->i2c_adap);
363c35fc
ST
369 if (fe0->dvb.frontend != NULL) {
370 dvb_attach(tda829x_attach, fe0->dvb.frontend,
3ba71d21 371 &dev->i2c_bus[1].i2c_adap, 0x42,
4041f1a5 372 &tda829x_no_probe);
363c35fc 373 dvb_attach(tda18271_attach, fe0->dvb.frontend,
4041f1a5 374 0x60, &dev->i2c_bus[1].i2c_adap,
f21e0d7f 375 &hauppauge_tda18271_config);
3ba71d21
MK
376 }
377 break;
378 case 0:
379 default:
363c35fc 380 fe0->dvb.frontend =
3ba71d21
MK
381 dvb_attach(s5h1409_attach,
382 &hauppauge_generic_config,
383 &i2c_bus->i2c_adap);
363c35fc
ST
384 if (fe0->dvb.frontend != NULL)
385 dvb_attach(mt2131_attach, fe0->dvb.frontend,
3ba71d21
MK
386 &i2c_bus->i2c_adap,
387 &hauppauge_generic_tunerconfig, 0);
388 break;
389 }
390 break;
fc959bef 391 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 392 i2c_bus = &dev->i2c_bus[0];
363c35fc 393 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 394 &hauppauge_hvr1800lp_config,
f139fa71 395 &i2c_bus->i2c_adap);
363c35fc
ST
396 if (fe0->dvb.frontend != NULL) {
397 dvb_attach(mt2131_attach, fe0->dvb.frontend,
f139fa71 398 &i2c_bus->i2c_adap,
fc959bef
ST
399 &hauppauge_generic_tunerconfig, 0);
400 }
401 break;
9bc37caa 402 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 403 i2c_bus = &dev->i2c_bus[0];
363c35fc 404 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 405 &fusionhdtv_5_express,
f139fa71 406 &i2c_bus->i2c_adap);
363c35fc
ST
407 if (fe0->dvb.frontend != NULL) {
408 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
827855d3
MK
409 &i2c_bus->i2c_adap, 0x61,
410 TUNER_LG_TDVS_H06XF);
9bc37caa
MK
411 }
412 break;
d1987d55
ST
413 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
414 i2c_bus = &dev->i2c_bus[1];
363c35fc 415 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST
416 &hauppauge_hvr1500q_config,
417 &dev->i2c_bus[0].i2c_adap);
363c35fc
ST
418 if (fe0->dvb.frontend != NULL)
419 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK
420 &i2c_bus->i2c_adap,
421 &hauppauge_hvr1500q_tunerconfig);
d1987d55 422 break;
07b4a835
MK
423 case CX23885_BOARD_HAUPPAUGE_HVR1500:
424 i2c_bus = &dev->i2c_bus[1];
363c35fc 425 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK
426 &hauppauge_hvr1500_config,
427 &dev->i2c_bus[0].i2c_adap);
363c35fc 428 if (fe0->dvb.frontend != NULL) {
07b4a835
MK
429 struct dvb_frontend *fe;
430 struct xc2028_config cfg = {
431 .i2c_adap = &i2c_bus->i2c_adap,
432 .i2c_addr = 0x61,
07b4a835
MK
433 };
434 static struct xc2028_ctrl ctl = {
ef80bfeb 435 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 436 .max_len = 64,
33e53161 437 .scode_table = XC3028_FE_OREN538,
07b4a835
MK
438 };
439
440 fe = dvb_attach(xc2028_attach,
363c35fc 441 fe0->dvb.frontend, &cfg);
07b4a835
MK
442 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
443 fe->ops.tuner_ops.set_config(fe, &ctl);
444 }
445 break;
b3ea0166 446 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 447 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 448 i2c_bus = &dev->i2c_bus[0];
363c35fc 449 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST
450 &hauppauge_hvr1200_config,
451 &i2c_bus->i2c_adap);
363c35fc
ST
452 if (fe0->dvb.frontend != NULL) {
453 dvb_attach(tda829x_attach, fe0->dvb.frontend,
b3ea0166
ST
454 &dev->i2c_bus[1].i2c_adap, 0x42,
455 &tda829x_no_probe);
363c35fc 456 dvb_attach(tda18271_attach, fe0->dvb.frontend,
b3ea0166
ST
457 0x60, &dev->i2c_bus[1].i2c_adap,
458 &hauppauge_hvr1200_tuner_config);
459 }
460 break;
66762373
ST
461 case CX23885_BOARD_HAUPPAUGE_HVR1400:
462 i2c_bus = &dev->i2c_bus[0];
363c35fc 463 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
66762373
ST
464 &i2c_bus->i2c_adap,
465 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 466 if (fe0->dvb.frontend != NULL) {
66762373
ST
467 struct dvb_frontend *fe;
468 struct xc2028_config cfg = {
469 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
470 .i2c_addr = 0x64,
66762373
ST
471 };
472 static struct xc2028_ctrl ctl = {
ef80bfeb 473 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373
ST
474 .max_len = 64,
475 .demod = 5000,
9c8ced51
ST
476 /* This is true for all demods with
477 v36 firmware? */
0975fc68 478 .type = XC2028_D2633,
66762373
ST
479 };
480
481 fe = dvb_attach(xc2028_attach,
363c35fc 482 fe0->dvb.frontend, &cfg);
66762373
ST
483 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
484 fe->ops.tuner_ops.set_config(fe, &ctl);
485 }
486 break;
335377b7
MK
487 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
488 i2c_bus = &dev->i2c_bus[port->nr - 1];
489
363c35fc 490 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK
491 &dvico_s5h1409_config,
492 &i2c_bus->i2c_adap);
363c35fc
ST
493 if (fe0->dvb.frontend == NULL)
494 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK
495 &dvico_s5h1411_config,
496 &i2c_bus->i2c_adap);
363c35fc
ST
497 if (fe0->dvb.frontend != NULL)
498 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK
499 &i2c_bus->i2c_adap,
500 &dvico_xc5000_tunerconfig);
335377b7 501 break;
aef2d186
ST
502 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
503 i2c_bus = &dev->i2c_bus[port->nr - 1];
504
363c35fc 505 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST
506 &dvico_fusionhdtv_xc3028,
507 &i2c_bus->i2c_adap);
363c35fc 508 if (fe0->dvb.frontend != NULL) {
aef2d186
ST
509 struct dvb_frontend *fe;
510 struct xc2028_config cfg = {
511 .i2c_adap = &i2c_bus->i2c_adap,
512 .i2c_addr = 0x61,
aef2d186
ST
513 };
514 static struct xc2028_ctrl ctl = {
ef80bfeb 515 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST
516 .max_len = 64,
517 .demod = XC3028_FE_ZARLINK456,
518 };
519
363c35fc 520 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST
521 &cfg);
522 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
523 fe->ops.tuner_ops.set_config(fe, &ctl);
524 }
525 break;
526 }
4c56b04a 527 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 528 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
4c56b04a
ST
529 i2c_bus = &dev->i2c_bus[0];
530
363c35fc 531 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST
532 &dvico_fusionhdtv_xc3028,
533 &i2c_bus->i2c_adap);
363c35fc 534 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST
535 struct dvb_frontend *fe;
536 struct xc2028_config cfg = {
537 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
538 .i2c_addr = 0x61,
4c56b04a
ST
539 };
540 static struct xc2028_ctrl ctl = {
ef80bfeb 541 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST
542 .max_len = 64,
543 .demod = XC3028_FE_ZARLINK456,
544 };
545
363c35fc 546 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST
547 &cfg);
548 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
549 fe->ops.tuner_ops.set_config(fe, &ctl);
550 }
96318d0c
IL
551 break;
552 case CX23885_BOARD_TBS_6920:
553 i2c_bus = &dev->i2c_bus[0];
554
555 fe0->dvb.frontend = dvb_attach(cx24116_attach,
556 &tbs_cx24116_config,
557 &i2c_bus->i2c_adap);
558 if (fe0->dvb.frontend != NULL)
559 fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
560
579943f5
IL
561 break;
562 case CX23885_BOARD_TEVII_S470:
563 i2c_bus = &dev->i2c_bus[1];
564
565 fe0->dvb.frontend = dvb_attach(cx24116_attach,
566 &tevii_cx24116_config,
567 &i2c_bus->i2c_adap);
568 if (fe0->dvb.frontend != NULL)
569 fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
570
4c56b04a 571 break;
d19770e5 572 default:
9c8ced51
ST
573 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
574 " isn't supported yet\n",
d19770e5
ST
575 dev->name);
576 break;
577 }
363c35fc 578 if (NULL == fe0->dvb.frontend) {
9c8ced51
ST
579 printk(KERN_ERR "%s: frontend initialization failed\n",
580 dev->name);
d19770e5
ST
581 return -1;
582 }
d7cba043 583 /* define general-purpose callback pointer */
363c35fc 584 fe0->dvb.frontend->callback = cx23885_tuner_callback;
d19770e5
ST
585
586 /* Put the analog decoder in standby to keep it quiet */
f139fa71 587 cx23885_call_i2c_clients(i2c_bus, TUNER_SET_STANDBY, NULL);
d19770e5 588
363c35fc
ST
589 if (fe0->dvb.frontend->ops.analog_ops.standby)
590 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 591
d19770e5 592 /* register everything */
363c35fc 593 return videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
59b1842d 594 &dev->pci->dev, adapter_nr, 0);
363c35fc 595
d19770e5
ST
596}
597
598int cx23885_dvb_register(struct cx23885_tsport *port)
599{
363c35fc
ST
600
601 struct videobuf_dvb_frontend *fe0;
d19770e5 602 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST
603 int err, i;
604
605 /* Here we need to allocate the correct number of frontends,
606 * as reflected in the cards struct. The reality is that currrently
607 * no cx23885 boards support this - yet. But, if we don't modify this
608 * code then the second frontend would never be allocated (later)
609 * and fail with error before the attach in dvb_register().
610 * Without these changes we risk an OOPS later. The changes here
611 * are for safety, and should provide a good foundation for the
612 * future addition of any multi-frontend cx23885 based boards.
613 */
614 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
615 port->num_frontends);
d19770e5 616
eb0c58bb 617 for (i = 1; i <= port->num_frontends; i++) {
96b7a1a8 618 if (videobuf_dvb_alloc_frontend(
9c8ced51 619 &port->frontends, i) == NULL) {
eb0c58bb
ST
620 printk(KERN_ERR "%s() failed to alloc\n", __func__);
621 return -ENOMEM;
622 }
623
624 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
625 if (!fe0)
626 err = -EINVAL;
363c35fc 627
eb0c58bb 628 dprintk(1, "%s\n", __func__);
9c8ced51 629 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST
630 dev->board,
631 dev->name,
632 dev->pci_bus,
633 dev->pci_slot);
d19770e5 634
eb0c58bb 635 err = -ENODEV;
d19770e5 636
eb0c58bb
ST
637 /* dvb stuff */
638 /* We have to init the queue for each frontend on a port. */
9c8ced51
ST
639 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
640 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
641 &dev->pci->dev, &port->slock,
44a6481d
MK
642 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
643 sizeof(struct cx23885_buffer), port);
eb0c58bb 644 }
d19770e5
ST
645 err = dvb_register(port);
646 if (err != 0)
9c8ced51
ST
647 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
648 __func__, err);
d19770e5 649
d19770e5
ST
650 return err;
651}
652
653int cx23885_dvb_unregister(struct cx23885_tsport *port)
654{
363c35fc
ST
655 struct videobuf_dvb_frontend *fe0;
656
eb0c58bb
ST
657 /* FIXME: in an error condition where the we have
658 * an expected number of frontends (attach problem)
659 * then this might not clean up correctly, if 1
660 * is invalid.
661 * This comment only applies to future boards IF they
662 * implement MFE support.
663 */
92abe9ee 664 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
9c8ced51 665 if (fe0->dvb.frontend)
363c35fc 666 videobuf_dvb_unregister_bus(&port->frontends);
d19770e5
ST
667
668 return 0;
669}
44a6481d 670
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