Commit | Line | Data |
---|---|---|
d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
4 | * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/pci.h> | |
23 | #include <linux/i2c.h> | |
24 | #include <linux/i2c-algo-bit.h> | |
25 | #include <linux/kdev_t.h> | |
26 | ||
27 | #include <media/v4l2-common.h> | |
28 | #include <media/tuner.h> | |
29 | #include <media/tveeprom.h> | |
409d84f8 TP |
30 | #include <media/videobuf-dma-sg.h> |
31 | #include <media/videobuf-dvb.h> | |
d19770e5 ST |
32 | |
33 | #include "btcx-risc.h" | |
34 | #include "cx23885-reg.h" | |
35 | ||
36 | #include <linux/version.h> | |
37 | #include <linux/mutex.h> | |
38 | ||
047646bf | 39 | #define CX23885_VERSION_CODE KERNEL_VERSION(0,0,1) |
d19770e5 ST |
40 | |
41 | #define UNSET (-1U) | |
42 | ||
43 | #define CX23885_MAXBOARDS 8 | |
44 | ||
d19770e5 ST |
45 | /* Max number of inputs by card */ |
46 | #define MAX_CX23885_INPUT 8 | |
7b888014 ST |
47 | #define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) |
48 | #define RESOURCE_OVERLAY 1 | |
49 | #define RESOURCE_VIDEO 2 | |
50 | #define RESOURCE_VBI 4 | |
d19770e5 | 51 | |
d19770e5 ST |
52 | #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ |
53 | ||
54 | #define CX23885_BOARD_NOAUTO UNSET | |
55 | #define CX23885_BOARD_UNKNOWN 0 | |
56 | #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 | |
57 | #define CX23885_BOARD_HAUPPAUGE_HVR1800 2 | |
a77743bc | 58 | #define CX23885_BOARD_HAUPPAUGE_HVR1250 3 |
9bc37caa | 59 | #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 |
d1987d55 | 60 | #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 |
07b4a835 | 61 | #define CX23885_BOARD_HAUPPAUGE_HVR1500 6 |
b3ea0166 | 62 | #define CX23885_BOARD_HAUPPAUGE_HVR1200 7 |
a780a31c | 63 | #define CX23885_BOARD_HAUPPAUGE_HVR1700 8 |
d19770e5 | 64 | |
7b888014 ST |
65 | /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ |
66 | #define CX23885_NORMS (\ | |
67 | V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ | |
68 | V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ | |
69 | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ | |
70 | V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) | |
71 | ||
72 | struct cx23885_fmt { | |
73 | char *name; | |
74 | u32 fourcc; /* v4l2 format id */ | |
75 | int depth; | |
76 | int flags; | |
77 | u32 cxformat; | |
78 | }; | |
79 | ||
80 | struct cx23885_ctrl { | |
81 | struct v4l2_queryctrl v; | |
82 | u32 off; | |
83 | u32 reg; | |
84 | u32 mask; | |
85 | u32 shift; | |
86 | }; | |
87 | ||
88 | struct cx23885_tvnorm { | |
89 | char *name; | |
90 | v4l2_std_id id; | |
91 | u32 cxiformat; | |
92 | u32 cxoformat; | |
93 | }; | |
94 | ||
95 | struct cx23885_fh { | |
96 | struct cx23885_dev *dev; | |
97 | enum v4l2_buf_type type; | |
98 | int radio; | |
99 | u32 resources; | |
100 | ||
101 | /* video overlay */ | |
102 | struct v4l2_window win; | |
103 | struct v4l2_clip *clips; | |
104 | unsigned int nclips; | |
105 | ||
106 | /* video capture */ | |
107 | struct cx23885_fmt *fmt; | |
108 | unsigned int width, height; | |
109 | ||
110 | /* vbi capture */ | |
111 | struct videobuf_queue vidq; | |
112 | struct videobuf_queue vbiq; | |
113 | ||
114 | /* MPEG Encoder specifics ONLY */ | |
115 | struct videobuf_queue mpegq; | |
116 | atomic_t v4l_reading; | |
117 | }; | |
118 | ||
d19770e5 ST |
119 | enum cx23885_itype { |
120 | CX23885_VMUX_COMPOSITE1 = 1, | |
121 | CX23885_VMUX_COMPOSITE2, | |
122 | CX23885_VMUX_COMPOSITE3, | |
123 | CX23885_VMUX_COMPOSITE4, | |
124 | CX23885_VMUX_SVIDEO, | |
125 | CX23885_VMUX_TELEVISION, | |
126 | CX23885_VMUX_CABLE, | |
127 | CX23885_VMUX_DVB, | |
128 | CX23885_VMUX_DEBUG, | |
129 | CX23885_RADIO, | |
130 | }; | |
131 | ||
579f1163 ST |
132 | enum cx23885_src_sel_type { |
133 | CX23885_SRC_SEL_EXT_656_VIDEO = 0, | |
134 | CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO | |
135 | }; | |
136 | ||
d19770e5 ST |
137 | /* buffer for one video frame */ |
138 | struct cx23885_buffer { | |
139 | /* common v4l buffer stuff -- must be first */ | |
140 | struct videobuf_buffer vb; | |
141 | ||
142 | /* cx23885 specific */ | |
143 | unsigned int bpl; | |
144 | struct btcx_riscmem risc; | |
145 | struct cx23885_fmt *fmt; | |
146 | u32 count; | |
147 | }; | |
148 | ||
149 | struct cx23885_input { | |
150 | enum cx23885_itype type; | |
151 | unsigned int vmux; | |
152 | u32 gpio0, gpio1, gpio2, gpio3; | |
153 | }; | |
154 | ||
661c7e44 ST |
155 | typedef enum { |
156 | CX23885_MPEG_UNDEFINED = 0, | |
7b888014 ST |
157 | CX23885_MPEG_DVB, |
158 | CX23885_ANALOG_VIDEO, | |
661c7e44 ST |
159 | } port_t; |
160 | ||
d19770e5 ST |
161 | struct cx23885_board { |
162 | char *name; | |
7b888014 ST |
163 | port_t porta, portb, portc; |
164 | unsigned int tuner_type; | |
165 | unsigned int radio_type; | |
166 | unsigned char tuner_addr; | |
167 | unsigned char radio_addr; | |
c7712613 ST |
168 | |
169 | /* Vendors can and do run the PCIe bridge at different | |
170 | * clock rates, driven physically by crystals on the PCBs. | |
171 | * The core has to accomodate this. This allows the user | |
172 | * to add new boards with new frequencys. The value is | |
173 | * expressed in Hz. | |
174 | * | |
175 | * The core framework will default this value based on | |
176 | * current designs, but it can vary. | |
177 | */ | |
178 | u32 clk_freq; | |
d19770e5 ST |
179 | struct cx23885_input input[MAX_CX23885_INPUT]; |
180 | }; | |
181 | ||
182 | struct cx23885_subid { | |
183 | u16 subvendor; | |
184 | u16 subdevice; | |
185 | u32 card; | |
186 | }; | |
187 | ||
188 | struct cx23885_i2c { | |
189 | struct cx23885_dev *dev; | |
190 | ||
191 | int nr; | |
192 | ||
193 | /* i2c i/o */ | |
194 | struct i2c_adapter i2c_adap; | |
195 | struct i2c_algo_bit_data i2c_algo; | |
196 | struct i2c_client i2c_client; | |
197 | u32 i2c_rc; | |
198 | ||
199 | /* 885 registers used for raw addess */ | |
200 | u32 i2c_period; | |
201 | u32 reg_ctrl; | |
202 | u32 reg_stat; | |
203 | u32 reg_addr; | |
204 | u32 reg_rdata; | |
205 | u32 reg_wdata; | |
206 | }; | |
207 | ||
208 | struct cx23885_dmaqueue { | |
209 | struct list_head active; | |
210 | struct list_head queued; | |
211 | struct timer_list timeout; | |
212 | struct btcx_riscmem stopper; | |
213 | u32 count; | |
214 | }; | |
215 | ||
216 | struct cx23885_tsport { | |
217 | struct cx23885_dev *dev; | |
218 | ||
219 | int nr; | |
220 | int sram_chno; | |
221 | ||
222 | struct videobuf_dvb dvb; | |
223 | ||
224 | /* dma queues */ | |
225 | struct cx23885_dmaqueue mpegq; | |
226 | u32 ts_packet_size; | |
227 | u32 ts_packet_count; | |
228 | ||
229 | int width; | |
230 | int height; | |
231 | ||
232 | spinlock_t slock; | |
233 | ||
234 | /* registers */ | |
235 | u32 reg_gpcnt; | |
236 | u32 reg_gpcnt_ctl; | |
237 | u32 reg_dma_ctl; | |
238 | u32 reg_lngth; | |
239 | u32 reg_hw_sop_ctrl; | |
240 | u32 reg_gen_ctrl; | |
241 | u32 reg_bd_pkt_status; | |
242 | u32 reg_sop_status; | |
243 | u32 reg_fifo_ovfl_stat; | |
244 | u32 reg_vld_misc; | |
245 | u32 reg_ts_clk_en; | |
246 | u32 reg_ts_int_msk; | |
a6a3f140 | 247 | u32 reg_ts_int_stat; |
579f1163 | 248 | u32 reg_src_sel; |
d19770e5 ST |
249 | |
250 | /* Default register vals */ | |
251 | int pci_irqmask; | |
252 | u32 dma_ctl_val; | |
253 | u32 ts_int_msk_val; | |
254 | u32 gen_ctrl_val; | |
255 | u32 ts_clk_en_val; | |
579f1163 | 256 | u32 src_sel_val; |
d19770e5 ST |
257 | }; |
258 | ||
259 | struct cx23885_dev { | |
260 | struct list_head devlist; | |
261 | atomic_t refcount; | |
262 | ||
263 | /* pci stuff */ | |
264 | struct pci_dev *pci; | |
265 | unsigned char pci_rev, pci_lat; | |
266 | int pci_bus, pci_slot; | |
267 | u32 __iomem *lmmio; | |
268 | u8 __iomem *bmmio; | |
d19770e5 | 269 | int pci_irqmask; |
0ac5881a | 270 | int hwrevision; |
d19770e5 | 271 | |
c7712613 ST |
272 | /* This valud is board specific and is used to configure the |
273 | * AV core so we see nice clean and stable video and audio. */ | |
274 | u32 clk_freq; | |
275 | ||
44a6481d | 276 | /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ |
d19770e5 ST |
277 | struct cx23885_i2c i2c_bus[3]; |
278 | ||
279 | int nr; | |
280 | struct mutex lock; | |
281 | ||
282 | /* board details */ | |
283 | unsigned int board; | |
284 | char name[32]; | |
285 | ||
a6a3f140 | 286 | struct cx23885_tsport ts1, ts2; |
d19770e5 ST |
287 | |
288 | /* sram configuration */ | |
289 | struct sram_channel *sram_channels; | |
e133be0f ST |
290 | |
291 | enum { | |
292 | CX23885_BRIDGE_UNDEFINED = 0, | |
293 | CX23885_BRIDGE_885 = 885, | |
294 | CX23885_BRIDGE_887 = 887, | |
295 | } bridge; | |
7b888014 ST |
296 | |
297 | /* Analog video */ | |
298 | u32 resources; | |
299 | unsigned int input; | |
300 | u32 tvaudio; | |
301 | v4l2_std_id tvnorm; | |
302 | unsigned int tuner_type; | |
303 | unsigned char tuner_addr; | |
304 | unsigned int radio_type; | |
305 | unsigned char radio_addr; | |
306 | unsigned int has_radio; | |
307 | ||
308 | /* V4l */ | |
309 | u32 freq; | |
310 | struct video_device *video_dev; | |
311 | struct video_device *vbi_dev; | |
312 | struct video_device *radio_dev; | |
313 | ||
314 | struct cx23885_dmaqueue vidq; | |
315 | struct cx23885_dmaqueue vbiq; | |
316 | spinlock_t slock; | |
d19770e5 ST |
317 | }; |
318 | ||
7b888014 ST |
319 | extern struct list_head cx23885_devlist; |
320 | ||
d19770e5 ST |
321 | #define SRAM_CH01 0 /* Video A */ |
322 | #define SRAM_CH02 1 /* VBI A */ | |
323 | #define SRAM_CH03 2 /* Video B */ | |
324 | #define SRAM_CH04 3 /* Transport via B */ | |
325 | #define SRAM_CH05 4 /* VBI B */ | |
326 | #define SRAM_CH06 5 /* Video C */ | |
327 | #define SRAM_CH07 6 /* Transport via C */ | |
328 | #define SRAM_CH08 7 /* Audio Internal A */ | |
329 | #define SRAM_CH09 8 /* Audio Internal B */ | |
330 | #define SRAM_CH10 9 /* Audio External */ | |
331 | #define SRAM_CH11 10 /* COMB_3D_N */ | |
332 | #define SRAM_CH12 11 /* Comb 3D N1 */ | |
333 | #define SRAM_CH13 12 /* Comb 3D N2 */ | |
334 | #define SRAM_CH14 13 /* MOE Vid */ | |
335 | #define SRAM_CH15 14 /* MOE RSLT */ | |
336 | ||
337 | struct sram_channel { | |
338 | char *name; | |
339 | u32 cmds_start; | |
340 | u32 ctrl_start; | |
341 | u32 cdt; | |
342 | u32 fifo_start;; | |
343 | u32 fifo_size; | |
344 | u32 ptr1_reg; | |
345 | u32 ptr2_reg; | |
346 | u32 cnt1_reg; | |
347 | u32 cnt2_reg; | |
348 | u32 jumponly; | |
349 | }; | |
350 | ||
351 | /* ----------------------------------------------------------- */ | |
352 | ||
353 | #define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) | |
354 | #define cx_write(reg,value) writel((value), dev->lmmio + ((reg)>>2)) | |
355 | ||
356 | #define cx_andor(reg,mask,value) \ | |
357 | writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ | |
358 | ((value) & (mask)), dev->lmmio+((reg)>>2)) | |
359 | ||
360 | #define cx_set(reg,bit) cx_andor((reg),(bit),(bit)) | |
361 | #define cx_clear(reg,bit) cx_andor((reg),(bit),0) | |
362 | ||
d19770e5 | 363 | /* ----------------------------------------------------------- */ |
7b888014 ST |
364 | /* cx23885-core.c */ |
365 | ||
366 | extern int cx23885_sram_channel_setup(struct cx23885_dev *dev, | |
367 | struct sram_channel *ch, | |
368 | unsigned int bpl, u32 risc); | |
369 | ||
370 | extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, | |
371 | struct sram_channel *ch); | |
d19770e5 | 372 | |
7b888014 ST |
373 | extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, |
374 | u32 reg, u32 mask, u32 value); | |
375 | ||
376 | extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc, | |
377 | struct scatterlist *sglist, | |
378 | unsigned int top_offset, unsigned int bottom_offset, | |
379 | unsigned int bpl, unsigned int padding, unsigned int lines); | |
380 | ||
381 | void cx23885_cancel_buffers(struct cx23885_tsport *port); | |
382 | ||
383 | extern int cx23885_restart_queue(struct cx23885_tsport *port, | |
384 | struct cx23885_dmaqueue *q); | |
385 | ||
386 | extern void cx23885_wakeup(struct cx23885_tsport *port, | |
387 | struct cx23885_dmaqueue *q, u32 count); | |
388 | ||
389 | ||
390 | /* ----------------------------------------------------------- */ | |
391 | /* cx23885-cards.c */ | |
d19770e5 ST |
392 | extern struct cx23885_board cx23885_boards[]; |
393 | extern const unsigned int cx23885_bcount; | |
394 | ||
395 | extern struct cx23885_subid cx23885_subids[]; | |
396 | extern const unsigned int cx23885_idcount; | |
397 | ||
73c993a8 | 398 | extern int cx23885_tuner_callback(void *priv, int command, int arg); |
d19770e5 | 399 | extern void cx23885_card_list(struct cx23885_dev *dev); |
a6a3f140 ST |
400 | extern int cx23885_ir_init(struct cx23885_dev *dev); |
401 | extern void cx23885_gpio_setup(struct cx23885_dev *dev); | |
d19770e5 ST |
402 | extern void cx23885_card_setup(struct cx23885_dev *dev); |
403 | extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); | |
404 | ||
405 | extern int cx23885_dvb_register(struct cx23885_tsport *port); | |
406 | extern int cx23885_dvb_unregister(struct cx23885_tsport *port); | |
407 | ||
44a6481d MK |
408 | extern int cx23885_buf_prepare(struct videobuf_queue *q, |
409 | struct cx23885_tsport *port, | |
410 | struct cx23885_buffer *buf, | |
411 | enum v4l2_field field); | |
44a6481d MK |
412 | extern void cx23885_buf_queue(struct cx23885_tsport *port, |
413 | struct cx23885_buffer *buf); | |
414 | extern void cx23885_free_buffer(struct videobuf_queue *q, | |
415 | struct cx23885_buffer *buf); | |
d19770e5 ST |
416 | |
417 | /* ----------------------------------------------------------- */ | |
7b888014 ST |
418 | /* cx23885-video.c */ |
419 | /* Video */ | |
420 | extern int cx23885_video_register(struct cx23885_dev *dev); | |
421 | extern void cx23885_video_unregister(struct cx23885_dev *dev); | |
422 | extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); | |
423 | ||
424 | /* ----------------------------------------------------------- */ | |
425 | /* cx23885-vbi.c */ | |
426 | extern int cx23885_vbi_fmt(struct file *file, void *priv, | |
427 | struct v4l2_format *f); | |
428 | extern void cx23885_vbi_timeout(unsigned long data); | |
429 | extern struct videobuf_queue_ops cx23885_vbi_qops; | |
430 | ||
d19770e5 ST |
431 | /* cx23885-i2c.c */ |
432 | extern int cx23885_i2c_register(struct cx23885_i2c *bus); | |
433 | extern int cx23885_i2c_unregister(struct cx23885_i2c *bus); | |
44a6481d MK |
434 | extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd, |
435 | void *arg); | |
d19770e5 | 436 | |
7b888014 ST |
437 | /* ----------------------------------------------------------- */ |
438 | /* tv norms */ | |
439 | ||
440 | static inline unsigned int norm_maxw(v4l2_std_id norm) | |
441 | { | |
442 | return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768; | |
443 | } | |
444 | ||
445 | static inline unsigned int norm_maxh(v4l2_std_id norm) | |
446 | { | |
447 | return (norm & V4L2_STD_625_50) ? 576 : 480; | |
448 | } | |
449 | ||
450 | static inline unsigned int norm_swidth(v4l2_std_id norm) | |
451 | { | |
452 | return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922; | |
453 | } | |
454 | ||
455 | ||
d19770e5 ST |
456 | /* |
457 | * Local variables: | |
458 | * c-basic-offset: 8 | |
459 | * End: | |
460 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off | |
461 | */ |