[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885.h

/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/pci.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/kdev_t.h>

#include <media/v4l2-common.h>
#include <media/tuner.h>
#include <media/tveeprom.h>
#include <media/videobuf-dma-sg.h>
#include <media/videobuf-dvb.h>

#include "btcx-risc.h"
#include "cx23885-reg.h"
#include "media/cx2341x.h"

#include <linux/version.h>
#include <linux/mutex.h>

#define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 1)

#define UNSET (-1U)

#define CX23885_MAXBOARDS 8

/* Max number of inputs by card */
#define MAX_CX23885_INPUT 8
#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
#define RESOURCE_OVERLAY       1
#define RESOURCE_VIDEO         2
#define RESOURCE_VBI           4

#define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */

#define CX23885_BOARD_NOAUTO               UNSET
#define CX23885_BOARD_UNKNOWN                  0
#define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
#define CX23885_BOARD_HAUPPAUGE_HVR1800        2
#define CX23885_BOARD_HAUPPAUGE_HVR1250        3
#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
#define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
#define CX23885_BOARD_HAUPPAUGE_HVR1500        6
#define CX23885_BOARD_HAUPPAUGE_HVR1200        7
#define CX23885_BOARD_HAUPPAUGE_HVR1700        8
#define CX23885_BOARD_HAUPPAUGE_HVR1400        9
#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F   13
#define CX23885_BOARD_TBS_6920                 14
#define CX23885_BOARD_TEVII_S470               15

/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
#define CX23885_NORMS (\
	V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
	V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
	V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
	V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)

struct cx23885_fmt {
	char  *name;
	u32   fourcc;          /* v4l2 format id */
	int   depth;
	int   flags;
	u32   cxformat;
};

struct cx23885_ctrl {
	struct v4l2_queryctrl v;
	u32                   off;
	u32                   reg;
	u32                   mask;
	u32                   shift;
};

struct cx23885_tvnorm {
	char		*name;
	v4l2_std_id	id;
	u32		cxiformat;
	u32		cxoformat;
};

struct cx23885_fh {
	struct cx23885_dev         *dev;
	enum v4l2_buf_type         type;
	int                        radio;
	u32                        resources;

	/* video overlay */
	struct v4l2_window         win;
	struct v4l2_clip           *clips;
	unsigned int               nclips;

	/* video capture */
	struct cx23885_fmt         *fmt;
	unsigned int               width, height;

	/* vbi capture */
	struct videobuf_queue      vidq;
	struct videobuf_queue      vbiq;

	/* MPEG Encoder specifics ONLY */
	struct videobuf_queue      mpegq;
	atomic_t                   v4l_reading;
};

enum cx23885_itype {
	CX23885_VMUX_COMPOSITE1 = 1,
	CX23885_VMUX_COMPOSITE2,
	CX23885_VMUX_COMPOSITE3,
	CX23885_VMUX_COMPOSITE4,
	CX23885_VMUX_SVIDEO,
	CX23885_VMUX_TELEVISION,
	CX23885_VMUX_CABLE,
	CX23885_VMUX_DVB,
	CX23885_VMUX_DEBUG,
	CX23885_RADIO,
};

enum cx23885_src_sel_type {
	CX23885_SRC_SEL_EXT_656_VIDEO = 0,
	CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
};

/* buffer for one video frame */
struct cx23885_buffer {
	/* common v4l buffer stuff -- must be first */
	struct videobuf_buffer vb;

	/* cx23885 specific */
	unsigned int           bpl;
	struct btcx_riscmem    risc;
	struct cx23885_fmt     *fmt;
	u32                    count;
};

struct cx23885_input {
	enum cx23885_itype type;
	unsigned int    vmux;
	u32             gpio0, gpio1, gpio2, gpio3;
};

typedef enum {
	CX23885_MPEG_UNDEFINED = 0,
	CX23885_MPEG_DVB,
	CX23885_ANALOG_VIDEO,
	CX23885_MPEG_ENCODER,
} port_t;

struct cx23885_board {
	char                    *name;
	port_t			porta, portb, portc;
	unsigned int		tuner_type;
	unsigned int		radio_type;
	unsigned char		tuner_addr;
	unsigned char		radio_addr;

	/* Vendors can and do run the PCIe bridge at different
	 * clock rates, driven physically by crystals on the PCBs.
	 * The core has to accomodate this. This allows the user
	 * to add new boards with new frequencys. The value is
	 * expressed in Hz.
	 *
	 * The core framework will default this value based on
	 * current designs, but it can vary.
	 */
	u32			clk_freq;
	struct cx23885_input    input[MAX_CX23885_INPUT];
};

struct cx23885_subid {
	u16     subvendor;
	u16     subdevice;
	u32     card;
};

struct cx23885_i2c {
	struct cx23885_dev *dev;

	int                        nr;

	/* i2c i/o */
	struct i2c_adapter         i2c_adap;
	struct i2c_algo_bit_data   i2c_algo;
	struct i2c_client          i2c_client;
	u32                        i2c_rc;

	/* 885 registers used for raw addess */
	u32                        i2c_period;
	u32                        reg_ctrl;
	u32                        reg_stat;
	u32                        reg_addr;
	u32                        reg_rdata;
	u32                        reg_wdata;
};

struct cx23885_dmaqueue {
	struct list_head       active;
	struct list_head       queued;
	struct timer_list      timeout;
	struct btcx_riscmem    stopper;
	u32                    count;
};

struct cx23885_tsport {
	struct cx23885_dev *dev;

	int                        nr;
	int                        sram_chno;

	struct videobuf_dvb_frontends frontends;

	/* dma queues */
	struct cx23885_dmaqueue    mpegq;
	u32                        ts_packet_size;
	u32                        ts_packet_count;

	int                        width;
	int                        height;

	spinlock_t                 slock;

	/* registers */
	u32                        reg_gpcnt;
	u32                        reg_gpcnt_ctl;
	u32                        reg_dma_ctl;
	u32                        reg_lngth;
	u32                        reg_hw_sop_ctrl;
	u32                        reg_gen_ctrl;
	u32                        reg_bd_pkt_status;
	u32                        reg_sop_status;
	u32                        reg_fifo_ovfl_stat;
	u32                        reg_vld_misc;
	u32                        reg_ts_clk_en;
	u32                        reg_ts_int_msk;
	u32                        reg_ts_int_stat;
	u32                        reg_src_sel;

	/* Default register vals */
	int                        pci_irqmask;
	u32                        dma_ctl_val;
	u32                        ts_int_msk_val;
	u32                        gen_ctrl_val;
	u32                        ts_clk_en_val;
	u32                        src_sel_val;
	u32                        vld_misc_val;
	u32                        hw_sop_ctrl_val;

	/* Allow a single tsport to have multiple frontends */
	u32                        num_frontends;
};

struct cx23885_dev {
	struct list_head           devlist;
	atomic_t                   refcount;

	/* pci stuff */
	struct pci_dev             *pci;
	unsigned char              pci_rev, pci_lat;
	int                        pci_bus, pci_slot;
	u32                        __iomem *lmmio;
	u8                         __iomem *bmmio;
	int                        pci_irqmask;
	int                        hwrevision;

	/* This valud is board specific and is used to configure the
	 * AV core so we see nice clean and stable video and audio. */
	u32                        clk_freq;

	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
	struct cx23885_i2c         i2c_bus[3];

	int                        nr;
	struct mutex               lock;

	/* board details */
	unsigned int               board;
	char                       name[32];

	struct cx23885_tsport      ts1, ts2;

	/* sram configuration */
	struct sram_channel        *sram_channels;

	enum {
		CX23885_BRIDGE_UNDEFINED = 0,
		CX23885_BRIDGE_885 = 885,
		CX23885_BRIDGE_887 = 887,
	} bridge;

	/* Analog video */
	u32                        resources;
	unsigned int               input;
	u32                        tvaudio;
	v4l2_std_id                tvnorm;
	unsigned int               tuner_type;
	unsigned char              tuner_addr;
	unsigned int               radio_type;
	unsigned char              radio_addr;
	unsigned int               has_radio;

	/* V4l */
	u32                        freq;
	struct video_device        *video_dev;
	struct video_device        *vbi_dev;
	struct video_device        *radio_dev;

	struct cx23885_dmaqueue    vidq;
	struct cx23885_dmaqueue    vbiq;
	spinlock_t                 slock;

	/* MPEG Encoder ONLY settings */
	u32                        cx23417_mailbox;
	struct cx2341x_mpeg_params mpeg_params;
	struct video_device        *v4l_device;
	atomic_t                   v4l_reader_count;
	struct cx23885_tvnorm      encodernorm;

};

extern struct list_head cx23885_devlist;

#define SRAM_CH01  0 /* Video A */
#define SRAM_CH02  1 /* VBI A */
#define SRAM_CH03  2 /* Video B */
#define SRAM_CH04  3 /* Transport via B */
#define SRAM_CH05  4 /* VBI B */
#define SRAM_CH06  5 /* Video C */
#define SRAM_CH07  6 /* Transport via C */
#define SRAM_CH08  7 /* Audio Internal A */
#define SRAM_CH09  8 /* Audio Internal B */
#define SRAM_CH10  9 /* Audio External */
#define SRAM_CH11 10 /* COMB_3D_N */
#define SRAM_CH12 11 /* Comb 3D N1 */
#define SRAM_CH13 12 /* Comb 3D N2 */
#define SRAM_CH14 13 /* MOE Vid */
#define SRAM_CH15 14 /* MOE RSLT */

struct sram_channel {
	char *name;
	u32  cmds_start;
	u32  ctrl_start;
	u32  cdt;
	u32  fifo_start;;
	u32  fifo_size;
	u32  ptr1_reg;
	u32  ptr2_reg;
	u32  cnt1_reg;
	u32  cnt2_reg;
	u32  jumponly;
};

/* ----------------------------------------------------------- */

#define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
#define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))

#define cx_andor(reg, mask, value) \
  writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  ((value) & (mask)), dev->lmmio+((reg)>>2))

#define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
#define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)

/* ----------------------------------------------------------- */
/* cx23885-core.c                                              */

extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
	struct sram_channel *ch,
	unsigned int bpl, u32 risc);

extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
	struct sram_channel *ch);

extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
	u32 reg, u32 mask, u32 value);

extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
	struct scatterlist *sglist,
	unsigned int top_offset, unsigned int bottom_offset,
	unsigned int bpl, unsigned int padding, unsigned int lines);

void cx23885_cancel_buffers(struct cx23885_tsport *port);

extern int cx23885_restart_queue(struct cx23885_tsport *port,
				struct cx23885_dmaqueue *q);

extern void cx23885_wakeup(struct cx23885_tsport *port,
			   struct cx23885_dmaqueue *q, u32 count);


/* ----------------------------------------------------------- */
/* cx23885-cards.c                                             */
extern struct cx23885_board cx23885_boards[];
extern const unsigned int cx23885_bcount;

extern struct cx23885_subid cx23885_subids[];
extern const unsigned int cx23885_idcount;

extern int cx23885_tuner_callback(void *priv, int component,
	int command, int arg);
extern void cx23885_card_list(struct cx23885_dev *dev);
extern int  cx23885_ir_init(struct cx23885_dev *dev);
extern void cx23885_gpio_setup(struct cx23885_dev *dev);
extern void cx23885_card_setup(struct cx23885_dev *dev);
extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);

extern int cx23885_dvb_register(struct cx23885_tsport *port);
extern int cx23885_dvb_unregister(struct cx23885_tsport *port);

extern int cx23885_buf_prepare(struct videobuf_queue *q,
			       struct cx23885_tsport *port,
			       struct cx23885_buffer *buf,
			       enum v4l2_field field);
extern void cx23885_buf_queue(struct cx23885_tsport *port,
			      struct cx23885_buffer *buf);
extern void cx23885_free_buffer(struct videobuf_queue *q,
				struct cx23885_buffer *buf);

/* ----------------------------------------------------------- */
/* cx23885-video.c                                             */
/* Video */
extern int cx23885_video_register(struct cx23885_dev *dev);
extern void cx23885_video_unregister(struct cx23885_dev *dev);
extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);

/* ----------------------------------------------------------- */
/* cx23885-vbi.c                                               */
extern int cx23885_vbi_fmt(struct file *file, void *priv,
	struct v4l2_format *f);
extern void cx23885_vbi_timeout(unsigned long data);
extern struct videobuf_queue_ops cx23885_vbi_qops;

/* cx23885-i2c.c                                                */
extern int cx23885_i2c_register(struct cx23885_i2c *bus);
extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
				     void *arg);
extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);

/* ----------------------------------------------------------- */
/* cx23885-417.c                                               */
extern int cx23885_417_register(struct cx23885_dev *dev);
extern void cx23885_417_unregister(struct cx23885_dev *dev);
extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
extern void cx23885_mc417_init(struct cx23885_dev *dev);
extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);


/* ----------------------------------------------------------- */
/* tv norms                                                    */

static inline unsigned int norm_maxw(v4l2_std_id norm)
{
	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
}

static inline unsigned int norm_maxh(v4l2_std_id norm)
{
	return (norm & V4L2_STD_625_50) ? 576 : 480;
}

static inline unsigned int norm_swidth(v4l2_std_id norm)
{
	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
}
Commit	Line	Data
d19770e5 ST	1	/*
	2	* Driver for the Conexant CX23885 PCIe bridge
	3	*
6d897616	4	* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5 ST	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	*
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*/
	21
	22	#include <linux/pci.h>
	23	#include <linux/i2c.h>
	24	#include <linux/i2c-algo-bit.h>
	25	#include <linux/kdev_t.h>
	26
	27	#include <media/v4l2-common.h>
	28	#include <media/tuner.h>
	29	#include <media/tveeprom.h>
409d84f8 TP	30	#include <media/videobuf-dma-sg.h>
409d84f8 TP	31	#include <media/videobuf-dvb.h>
d19770e5 ST	32
	33	#include "btcx-risc.h"
	34	#include "cx23885-reg.h"
b1b81f1d	35	#include "media/cx2341x.h"
d19770e5 ST	36
	37	#include <linux/version.h>
	38	#include <linux/mutex.h>
	39
9c8ced51	40	#define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 1)
d19770e5 ST	41
	42	#define UNSET (-1U)
	43
	44	#define CX23885_MAXBOARDS 8
	45
d19770e5 ST	46	/* Max number of inputs by card */
d19770e5 ST	47	#define MAX_CX23885_INPUT 8
7b888014 ST	48	#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
	49	#define RESOURCE_OVERLAY 1
	50	#define RESOURCE_VIDEO 2
	51	#define RESOURCE_VBI 4
d19770e5	52
d19770e5 ST	53	#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
	54
	55	#define CX23885_BOARD_NOAUTO UNSET
	56	#define CX23885_BOARD_UNKNOWN 0
	57	#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
	58	#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
a77743bc	59	#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
9bc37caa	60	#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
d1987d55	61	#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
07b4a835	62	#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
b3ea0166	63	#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
a780a31c	64	#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66762373	65	#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
335377b7	66	#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
aef2d186	67	#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
4c56b04a	68	#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
9bb1b7e8	69	#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
96318d0c	70	#define CX23885_BOARD_TBS_6920 14
579943f5	71	#define CX23885_BOARD_TEVII_S470 15
d19770e5	72
7b888014 ST	73	/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
	74	#define CX23885_NORMS (\
	75	V4L2_STD_NTSC_M \| V4L2_STD_NTSC_M_JP \| V4L2_STD_NTSC_443 \| \
	76	V4L2_STD_PAL_BG \| V4L2_STD_PAL_DK \| V4L2_STD_PAL_I \| \
	77	V4L2_STD_PAL_M \| V4L2_STD_PAL_N \| V4L2_STD_PAL_Nc \| \
	78	V4L2_STD_PAL_60 \| V4L2_STD_SECAM_L \| V4L2_STD_SECAM_DK)
	79
	80	struct cx23885_fmt {
	81	char *name;
	82	u32 fourcc; /* v4l2 format id */
	83	int depth;
	84	int flags;
	85	u32 cxformat;
	86	};
	87
	88	struct cx23885_ctrl {
	89	struct v4l2_queryctrl v;
	90	u32 off;
	91	u32 reg;
	92	u32 mask;
	93	u32 shift;
	94	};
	95
	96	struct cx23885_tvnorm {
	97	char *name;
	98	v4l2_std_id id;
	99	u32 cxiformat;
	100	u32 cxoformat;
	101	};
	102
	103	struct cx23885_fh {
	104	struct cx23885_dev *dev;
	105	enum v4l2_buf_type type;
	106	int radio;
	107	u32 resources;
	108
	109	/* video overlay */
	110	struct v4l2_window win;
	111	struct v4l2_clip *clips;
	112	unsigned int nclips;
	113
	114	/* video capture */
	115	struct cx23885_fmt *fmt;
	116	unsigned int width, height;
	117
	118	/* vbi capture */
	119	struct videobuf_queue vidq;
	120	struct videobuf_queue vbiq;
	121
	122	/* MPEG Encoder specifics ONLY */
	123	struct videobuf_queue mpegq;
	124	atomic_t v4l_reading;
	125	};
	126
d19770e5 ST	127	enum cx23885_itype {
	128	CX23885_VMUX_COMPOSITE1 = 1,
	129	CX23885_VMUX_COMPOSITE2,
	130	CX23885_VMUX_COMPOSITE3,
	131	CX23885_VMUX_COMPOSITE4,
	132	CX23885_VMUX_SVIDEO,
	133	CX23885_VMUX_TELEVISION,
	134	CX23885_VMUX_CABLE,
	135	CX23885_VMUX_DVB,
	136	CX23885_VMUX_DEBUG,
	137	CX23885_RADIO,
	138	};
	139
579f1163 ST	140	enum cx23885_src_sel_type {
	141	CX23885_SRC_SEL_EXT_656_VIDEO = 0,
	142	CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
	143	};
	144
d19770e5 ST	145	/* buffer for one video frame */
	146	struct cx23885_buffer {
	147	/* common v4l buffer stuff -- must be first */
	148	struct videobuf_buffer vb;
	149
	150	/* cx23885 specific */
	151	unsigned int bpl;
	152	struct btcx_riscmem risc;
	153	struct cx23885_fmt *fmt;
	154	u32 count;
	155	};
	156
	157	struct cx23885_input {
	158	enum cx23885_itype type;
	159	unsigned int vmux;
	160	u32 gpio0, gpio1, gpio2, gpio3;
	161	};
	162
661c7e44 ST	163	typedef enum {
661c7e44 ST	164	CX23885_MPEG_UNDEFINED = 0,
7b888014 ST	165	CX23885_MPEG_DVB,
7b888014 ST	166	CX23885_ANALOG_VIDEO,
b1b81f1d	167	CX23885_MPEG_ENCODER,
661c7e44 ST	168	} port_t;
661c7e44 ST	169
d19770e5 ST	170	struct cx23885_board {
d19770e5 ST	171	char *name;
7b888014 ST	172	port_t porta, portb, portc;
	173	unsigned int tuner_type;
	174	unsigned int radio_type;
	175	unsigned char tuner_addr;
	176	unsigned char radio_addr;
c7712613 ST	177
	178	/* Vendors can and do run the PCIe bridge at different
	179	* clock rates, driven physically by crystals on the PCBs.
	180	* The core has to accomodate this. This allows the user
	181	* to add new boards with new frequencys. The value is
	182	* expressed in Hz.
	183	*
	184	* The core framework will default this value based on
	185	* current designs, but it can vary.
	186	*/
	187	u32 clk_freq;
d19770e5 ST	188	struct cx23885_input input[MAX_CX23885_INPUT];
	189	};
	190
	191	struct cx23885_subid {
	192	u16 subvendor;
	193	u16 subdevice;
	194	u32 card;
	195	};
	196
	197	struct cx23885_i2c {
	198	struct cx23885_dev *dev;
	199
	200	int nr;
	201
	202	/* i2c i/o */
	203	struct i2c_adapter i2c_adap;
	204	struct i2c_algo_bit_data i2c_algo;
	205	struct i2c_client i2c_client;
	206	u32 i2c_rc;
	207
	208	/* 885 registers used for raw addess */
	209	u32 i2c_period;
	210	u32 reg_ctrl;
	211	u32 reg_stat;
	212	u32 reg_addr;
	213	u32 reg_rdata;
	214	u32 reg_wdata;
	215	};
	216
	217	struct cx23885_dmaqueue {
	218	struct list_head active;
	219	struct list_head queued;
	220	struct timer_list timeout;
	221	struct btcx_riscmem stopper;
	222	u32 count;
	223	};
	224
	225	struct cx23885_tsport {
	226	struct cx23885_dev *dev;
	227
	228	int nr;
	229	int sram_chno;
	230
363c35fc	231	struct videobuf_dvb_frontends frontends;
d19770e5 ST	232
	233	/* dma queues */
	234	struct cx23885_dmaqueue mpegq;
	235	u32 ts_packet_size;
	236	u32 ts_packet_count;
	237
	238	int width;
	239	int height;
	240
	241	spinlock_t slock;
	242
	243	/* registers */
	244	u32 reg_gpcnt;
	245	u32 reg_gpcnt_ctl;
	246	u32 reg_dma_ctl;
	247	u32 reg_lngth;
	248	u32 reg_hw_sop_ctrl;
	249	u32 reg_gen_ctrl;
	250	u32 reg_bd_pkt_status;
	251	u32 reg_sop_status;
	252	u32 reg_fifo_ovfl_stat;
	253	u32 reg_vld_misc;
	254	u32 reg_ts_clk_en;
	255	u32 reg_ts_int_msk;
a6a3f140	256	u32 reg_ts_int_stat;
579f1163	257	u32 reg_src_sel;
d19770e5 ST	258
	259	/* Default register vals */
	260	int pci_irqmask;
	261	u32 dma_ctl_val;
	262	u32 ts_int_msk_val;
	263	u32 gen_ctrl_val;
	264	u32 ts_clk_en_val;
579f1163	265	u32 src_sel_val;
b1b81f1d ST	266	u32 vld_misc_val;
b1b81f1d ST	267	u32 hw_sop_ctrl_val;
a739a7e4 ST	268
	269	/* Allow a single tsport to have multiple frontends */
	270	u32 num_frontends;
d19770e5 ST	271	};
	272
	273	struct cx23885_dev {
	274	struct list_head devlist;
	275	atomic_t refcount;
	276
	277	/* pci stuff */
	278	struct pci_dev *pci;
	279	unsigned char pci_rev, pci_lat;
	280	int pci_bus, pci_slot;
	281	u32 __iomem *lmmio;
	282	u8 __iomem *bmmio;
d19770e5	283	int pci_irqmask;
0ac5881a	284	int hwrevision;
d19770e5	285
c7712613 ST	286	/* This valud is board specific and is used to configure the
	287	* AV core so we see nice clean and stable video and audio. */
	288	u32 clk_freq;
	289
44a6481d	290	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
d19770e5 ST	291	struct cx23885_i2c i2c_bus[3];
	292
	293	int nr;
	294	struct mutex lock;
	295
	296	/* board details */
	297	unsigned int board;
	298	char name[32];
	299
a6a3f140	300	struct cx23885_tsport ts1, ts2;
d19770e5 ST	301
	302	/* sram configuration */
	303	struct sram_channel *sram_channels;
e133be0f ST	304
	305	enum {
	306	CX23885_BRIDGE_UNDEFINED = 0,
	307	CX23885_BRIDGE_885 = 885,
	308	CX23885_BRIDGE_887 = 887,
	309	} bridge;
7b888014 ST	310
	311	/* Analog video */
	312	u32 resources;
	313	unsigned int input;
	314	u32 tvaudio;
	315	v4l2_std_id tvnorm;
	316	unsigned int tuner_type;
	317	unsigned char tuner_addr;
	318	unsigned int radio_type;
	319	unsigned char radio_addr;
	320	unsigned int has_radio;
	321
	322	/* V4l */
	323	u32 freq;
	324	struct video_device *video_dev;
	325	struct video_device *vbi_dev;
	326	struct video_device *radio_dev;
	327
	328	struct cx23885_dmaqueue vidq;
	329	struct cx23885_dmaqueue vbiq;
	330	spinlock_t slock;
b1b81f1d ST	331
	332	/* MPEG Encoder ONLY settings */
	333	u32 cx23417_mailbox;
	334	struct cx2341x_mpeg_params mpeg_params;
	335	struct video_device *v4l_device;
	336	atomic_t v4l_reader_count;
	337	struct cx23885_tvnorm encodernorm;
	338
d19770e5 ST	339	};
d19770e5 ST	340
7b888014 ST	341	extern struct list_head cx23885_devlist;
7b888014 ST	342
d19770e5 ST	343	#define SRAM_CH01 0 /* Video A */
	344	#define SRAM_CH02 1 /* VBI A */
	345	#define SRAM_CH03 2 /* Video B */
	346	#define SRAM_CH04 3 /* Transport via B */
	347	#define SRAM_CH05 4 /* VBI B */
	348	#define SRAM_CH06 5 /* Video C */
	349	#define SRAM_CH07 6 /* Transport via C */
	350	#define SRAM_CH08 7 /* Audio Internal A */
	351	#define SRAM_CH09 8 /* Audio Internal B */
	352	#define SRAM_CH10 9 /* Audio External */
	353	#define SRAM_CH11 10 /* COMB_3D_N */
	354	#define SRAM_CH12 11 /* Comb 3D N1 */
	355	#define SRAM_CH13 12 /* Comb 3D N2 */
	356	#define SRAM_CH14 13 /* MOE Vid */
	357	#define SRAM_CH15 14 /* MOE RSLT */
	358
	359	struct sram_channel {
	360	char *name;
	361	u32 cmds_start;
	362	u32 ctrl_start;
	363	u32 cdt;
	364	u32 fifo_start;;
	365	u32 fifo_size;
	366	u32 ptr1_reg;
	367	u32 ptr2_reg;
	368	u32 cnt1_reg;
	369	u32 cnt2_reg;
	370	u32 jumponly;
	371	};
	372
	373	/* ----------------------------------------------------------- */
	374
	375	#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
9c8ced51	376	#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
d19770e5	377
9c8ced51	378	#define cx_andor(reg, mask, value) \
d19770e5 ST	379	writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) \|\
	380	((value) & (mask)), dev->lmmio+((reg)>>2))
	381
9c8ced51 ST	382	#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
9c8ced51 ST	383	#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
d19770e5	384
d19770e5	385	/* ----------------------------------------------------------- */
7b888014 ST	386	/* cx23885-core.c */
	387
	388	extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
	389	struct sram_channel *ch,
	390	unsigned int bpl, u32 risc);
	391
	392	extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
	393	struct sram_channel *ch);
d19770e5	394
7b888014 ST	395	extern int cx23885_risc_stopper(struct pci_dev pci, struct btcx_riscmem risc,
	396	u32 reg, u32 mask, u32 value);
	397
	398	extern int cx23885_risc_buffer(struct pci_dev pci, struct btcx_riscmem risc,
	399	struct scatterlist *sglist,
	400	unsigned int top_offset, unsigned int bottom_offset,
	401	unsigned int bpl, unsigned int padding, unsigned int lines);
	402
	403	void cx23885_cancel_buffers(struct cx23885_tsport *port);
	404
	405	extern int cx23885_restart_queue(struct cx23885_tsport *port,
	406	struct cx23885_dmaqueue *q);
	407
	408	extern void cx23885_wakeup(struct cx23885_tsport *port,
	409	struct cx23885_dmaqueue *q, u32 count);
	410
	411
	412	/* ----------------------------------------------------------- */
	413	/* cx23885-cards.c */
d19770e5 ST	414	extern struct cx23885_board cx23885_boards[];
	415	extern const unsigned int cx23885_bcount;
	416
	417	extern struct cx23885_subid cx23885_subids[];
	418	extern const unsigned int cx23885_idcount;
	419
9c8ced51 ST	420	extern int cx23885_tuner_callback(void *priv, int component,
9c8ced51 ST	421	int command, int arg);
d19770e5	422	extern void cx23885_card_list(struct cx23885_dev *dev);
a6a3f140 ST	423	extern int cx23885_ir_init(struct cx23885_dev *dev);
a6a3f140 ST	424	extern void cx23885_gpio_setup(struct cx23885_dev *dev);
d19770e5 ST	425	extern void cx23885_card_setup(struct cx23885_dev *dev);
	426	extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
	427
	428	extern int cx23885_dvb_register(struct cx23885_tsport *port);
	429	extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
	430
44a6481d MK	431	extern int cx23885_buf_prepare(struct videobuf_queue *q,
	432	struct cx23885_tsport *port,
	433	struct cx23885_buffer *buf,
	434	enum v4l2_field field);
44a6481d MK	435	extern void cx23885_buf_queue(struct cx23885_tsport *port,
	436	struct cx23885_buffer *buf);
	437	extern void cx23885_free_buffer(struct videobuf_queue *q,
	438	struct cx23885_buffer *buf);
d19770e5 ST	439
d19770e5 ST	440	/* ----------------------------------------------------------- */
7b888014 ST	441	/* cx23885-video.c */
	442	/* Video */
	443	extern int cx23885_video_register(struct cx23885_dev *dev);
	444	extern void cx23885_video_unregister(struct cx23885_dev *dev);
	445	extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
	446
	447	/* ----------------------------------------------------------- */
	448	/* cx23885-vbi.c */
	449	extern int cx23885_vbi_fmt(struct file file, void priv,
	450	struct v4l2_format *f);
	451	extern void cx23885_vbi_timeout(unsigned long data);
	452	extern struct videobuf_queue_ops cx23885_vbi_qops;
	453
d19770e5 ST	454	/* cx23885-i2c.c */
	455	extern int cx23885_i2c_register(struct cx23885_i2c *bus);
	456	extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
44a6481d MK	457	extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
44a6481d MK	458	void *arg);
a589b665	459	extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
d19770e5	460
b1b81f1d ST	461	/* ----------------------------------------------------------- */
	462	/* cx23885-417.c */
	463	extern int cx23885_417_register(struct cx23885_dev *dev);
	464	extern void cx23885_417_unregister(struct cx23885_dev *dev);
	465	extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
	466	extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
	467	extern void cx23885_mc417_init(struct cx23885_dev *dev);
	468	extern int mc417_memory_read(struct cx23885_dev dev, u32 address, u32 value);
	469	extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
	470
	471
7b888014 ST	472	/* ----------------------------------------------------------- */
	473	/* tv norms */
	474
	475	static inline unsigned int norm_maxw(v4l2_std_id norm)
	476	{
	477	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
	478	}
	479
	480	static inline unsigned int norm_maxh(v4l2_std_id norm)
	481	{
	482	return (norm & V4L2_STD_625_50) ? 576 : 480;
	483	}
	484
	485	static inline unsigned int norm_swidth(v4l2_std_id norm)
	486	{
	487	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
	488	}