[deliverable/linux.git] / drivers / media / video / cx88 / cx88-dvb.c

/*
 * $Id: cx88-dvb.c,v 1.48 2005/07/20 05:33:33 mkrufky Exp $
 *
 * device driver for Conexant 2388x based TV cards
 * MPEG Transport Stream (DVB) routines
 *
 * (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au>
 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/kthread.h>
#include <linux/file.h>
#include <linux/suspend.h>

#define CONFIG_DVB_MT352 1
#define CONFIG_DVB_CX22702 1
#define CONFIG_DVB_OR51132 1
#define CONFIG_DVB_LGDT3302 1

#include "cx88.h"
#include "dvb-pll.h"

#if CONFIG_DVB_MT352
# include "mt352.h"
# include "mt352_priv.h"
#endif
#if CONFIG_DVB_CX22702
# include "cx22702.h"
#endif
#if CONFIG_DVB_OR51132
# include "or51132.h"
#endif
#if CONFIG_DVB_LGDT3302
# include "lgdt3302.h"
#endif

MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
MODULE_LICENSE("GPL");

static unsigned int debug = 0;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug,"enable debug messages [dvb]");

#define dprintk(level,fmt, arg...)	if (debug >= level) \
	printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)

/* ------------------------------------------------------------------ */

static int dvb_buf_setup(struct videobuf_queue *q,
			 unsigned int *count, unsigned int *size)
{
	struct cx8802_dev *dev = q->priv_data;

	dev->ts_packet_size  = 188 * 4;
	dev->ts_packet_count = 32;

	*size  = dev->ts_packet_size * dev->ts_packet_count;
	*count = 32;
	return 0;
}

static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
			   enum v4l2_field field)
{
	struct cx8802_dev *dev = q->priv_data;
	return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb);
}

static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
{
	struct cx8802_dev *dev = q->priv_data;
	cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
}

static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
{
	struct cx8802_dev *dev = q->priv_data;
	cx88_free_buffer(dev->pci, (struct cx88_buffer*)vb);
}

static struct videobuf_queue_ops dvb_qops = {
	.buf_setup    = dvb_buf_setup,
	.buf_prepare  = dvb_buf_prepare,
	.buf_queue    = dvb_buf_queue,
	.buf_release  = dvb_buf_release,
};

/* ------------------------------------------------------------------ */

#if CONFIG_DVB_MT352
static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
{
	static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
	static u8 reset []         = { RESET,      0x80 };
	static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
	static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
	static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
	static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };

	mt352_write(fe, clock_config,   sizeof(clock_config));
	udelay(200);
	mt352_write(fe, reset,          sizeof(reset));
	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));

	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
	mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
	return 0;
}

static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
{
	static u8 clock_config []  = { 0x89, 0x38, 0x39 };
	static u8 reset []         = { 0x50, 0x80 };
	static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
	static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
	                               0x00, 0xFF, 0x00, 0x40, 0x40 };
	static u8 dntv_extra[]     = { 0xB5, 0x7A };
	static u8 capt_range_cfg[] = { 0x75, 0x32 };

	mt352_write(fe, clock_config,   sizeof(clock_config));
	udelay(2000);
	mt352_write(fe, reset,          sizeof(reset));
	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));

	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
	udelay(2000);
	mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));

	return 0;
}

static int mt352_pll_set(struct dvb_frontend* fe,
			 struct dvb_frontend_parameters* params,
			 u8* pllbuf)
{
	struct cx8802_dev *dev= fe->dvb->priv;

	pllbuf[0] = dev->core->pll_addr << 1;
	dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
			  params->frequency,
			  params->u.ofdm.bandwidth);
	return 0;
}

static struct mt352_config dvico_fusionhdtv = {
	.demod_address = 0x0F,
	.demod_init    = dvico_fusionhdtv_demod_init,
	.pll_set       = mt352_pll_set,
};

static struct mt352_config dntv_live_dvbt_config = {
	.demod_address = 0x0f,
	.demod_init    = dntv_live_dvbt_demod_init,
	.pll_set       = mt352_pll_set,
};
#endif

#if CONFIG_DVB_CX22702
static struct cx22702_config connexant_refboard_config = {
	.demod_address = 0x43,
	.output_mode   = CX22702_SERIAL_OUTPUT,
	.pll_address   = 0x60,
	.pll_desc      = &dvb_pll_thomson_dtt7579,
};

static struct cx22702_config hauppauge_novat_config = {
	.demod_address = 0x43,
	.output_mode   = CX22702_SERIAL_OUTPUT,
	.pll_address   = 0x61,
	.pll_desc      = &dvb_pll_thomson_dtt759x,
};
#endif

#if CONFIG_DVB_OR51132
static int or51132_set_ts_param(struct dvb_frontend* fe,
				int is_punctured)
{
	struct cx8802_dev *dev= fe->dvb->priv;
	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
	return 0;
}

static struct or51132_config pchdtv_hd3000 = {
	.demod_address    = 0x15,
	.pll_address      = 0x61,
	.pll_desc         = &dvb_pll_thomson_dtt7610,
	.set_ts_params    = or51132_set_ts_param,
};
#endif

#if CONFIG_DVB_LGDT3302
static int lgdt3302_pll_set(struct dvb_frontend* fe,
			    struct dvb_frontend_parameters* params,
			    u8* pllbuf)
{
	struct cx8802_dev *dev= fe->dvb->priv;

	pllbuf[0] = dev->core->pll_addr;
	dvb_pll_configure(dev->core->pll_desc, &pllbuf[1],
			  params->frequency, 0);
	return 0;
}

static int lgdt3302_pll_rf_set(struct dvb_frontend* fe, int index)
{
	struct cx8802_dev *dev= fe->dvb->priv;
	struct cx88_core *core = dev->core;

	dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
	if (index == 0)
		cx_clear(MO_GP0_IO, 8);
	else
		cx_set(MO_GP0_IO, 8);
	return 0;
}

static int lgdt3302_set_ts_param(struct dvb_frontend* fe, int is_punctured)
{
	struct cx8802_dev *dev= fe->dvb->priv;
	if (is_punctured)
		dev->ts_gen_cntrl |= 0x04;
	else
		dev->ts_gen_cntrl &= ~0x04;
	return 0;
}

static struct lgdt3302_config fusionhdtv_3_gold = {
	.demod_address    = 0x0e,
	.pll_set          = lgdt3302_pll_set,
	.set_ts_params    = lgdt3302_set_ts_param,
};
#endif

static int dvb_register(struct cx8802_dev *dev)
{
	/* init struct videobuf_dvb */
	dev->dvb.name = dev->core->name;
	dev->ts_gen_cntrl = 0x0c;

	/* init frontend */
	switch (dev->core->board) {
#if CONFIG_DVB_CX22702
	case CX88_BOARD_HAUPPAUGE_DVB_T1:
		dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
						   &dev->core->i2c_adap);
		break;
	case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
	case CX88_BOARD_CONEXANT_DVB_T1:
		dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
						   &dev->core->i2c_adap);
		break;
#endif
#if CONFIG_DVB_MT352
	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
		dev->core->pll_addr = 0x61;
		dev->core->pll_desc = &dvb_pll_lg_z201;
		dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
						 &dev->core->i2c_adap);
		break;
	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
		dev->core->pll_addr = 0x60;
		dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
		dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
						 &dev->core->i2c_adap);
		break;
	case CX88_BOARD_KWORLD_DVB_T:
	case CX88_BOARD_DNTV_LIVE_DVB_T:
	case CX88_BOARD_ADSTECH_DVB_T_PCI:
		dev->core->pll_addr = 0x61;
		dev->core->pll_desc = &dvb_pll_unknown_1;
		dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
						 &dev->core->i2c_adap);
		break;
#endif
#if CONFIG_DVB_OR51132
	case CX88_BOARD_PCHDTV_HD3000:
		dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
						 &dev->core->i2c_adap);
		break;
#endif
#if CONFIG_DVB_LGDT3302
	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
		dev->ts_gen_cntrl = 0x08;
		{
		/* Do a hardware reset of chip before using it. */
		struct cx88_core *core = dev->core;

		cx_clear(MO_GP0_IO, 1);
		mdelay(100);
		cx_set(MO_GP0_IO, 1);
		mdelay(200);

		/* Select RF connector callback */
		fusionhdtv_3_gold.pll_rf_set = lgdt3302_pll_rf_set;
		dev->core->pll_addr = 0x61;
		dev->core->pll_desc = &dvb_pll_microtune_4042;
		dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold,
						    &dev->core->i2c_adap);
		}
		break;
	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
		dev->ts_gen_cntrl = 0x08;
		{
		/* Do a hardware reset of chip before using it. */
		struct cx88_core *core = dev->core;

		cx_clear(MO_GP0_IO, 1);
		mdelay(100);
		cx_set(MO_GP0_IO, 9); /* ANT connector too FIXME */
		mdelay(200);
		dev->core->pll_addr = 0x61;
		dev->core->pll_desc = &dvb_pll_thomson_dtt7611;
		dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold,
						    &dev->core->i2c_adap);
		}
		break;
#endif
	default:
		printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
		       dev->core->name);
		break;
	}
	if (NULL == dev->dvb.frontend) {
		printk("%s: frontend initialization failed\n",dev->core->name);
		return -1;
	}

	if (dev->core->pll_desc) {
		dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
		dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
	}

	/* Copy the board name into the DVB structure */
	strlcpy(dev->dvb.frontend->ops->info.name,
		cx88_boards[dev->core->board].name,
		sizeof(dev->dvb.frontend->ops->info.name));

	/* register everything */
	return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
}

/* ----------------------------------------------------------- */

static int __devinit dvb_probe(struct pci_dev *pci_dev,
			       const struct pci_device_id *pci_id)
{
	struct cx8802_dev *dev;
	struct cx88_core  *core;
	int err;

	/* general setup */
	core = cx88_core_get(pci_dev);
	if (NULL == core)
		return -EINVAL;

	err = -ENODEV;
	if (!cx88_boards[core->board].dvb)
		goto fail_core;

	err = -ENOMEM;
	dev = kmalloc(sizeof(*dev),GFP_KERNEL);
	if (NULL == dev)
		goto fail_core;
	memset(dev,0,sizeof(*dev));
	dev->pci = pci_dev;
	dev->core = core;

	err = cx8802_init_common(dev);
	if (0 != err)
		goto fail_free;

	/* dvb stuff */
	printk("%s/2: cx2388x based dvb card\n", core->name);
	videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
			    dev->pci, &dev->slock,
			    V4L2_BUF_TYPE_VIDEO_CAPTURE,
			    V4L2_FIELD_TOP,
			    sizeof(struct cx88_buffer),
			    dev);
	err = dvb_register(dev);
	if (0 != err)
		goto fail_fini;
	return 0;

 fail_fini:
	cx8802_fini_common(dev);
 fail_free:
	kfree(dev);
 fail_core:
	cx88_core_put(core,pci_dev);
	return err;
}

static void __devexit dvb_remove(struct pci_dev *pci_dev)
{
        struct cx8802_dev *dev = pci_get_drvdata(pci_dev);

	/* dvb */
	videobuf_dvb_unregister(&dev->dvb);

	/* common */
	cx8802_fini_common(dev);
	cx88_core_put(dev->core,dev->pci);
	kfree(dev);
}

static struct pci_device_id cx8802_pci_tbl[] = {
	{
		.vendor       = 0x14f1,
		.device       = 0x8802,
                .subvendor    = PCI_ANY_ID,
                .subdevice    = PCI_ANY_ID,
	},{
		/* --- end of list --- */
	}
};
MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);

static struct pci_driver dvb_pci_driver = {
        .name     = "cx88-dvb",
        .id_table = cx8802_pci_tbl,
        .probe    = dvb_probe,
        .remove   = __devexit_p(dvb_remove),
	.suspend  = cx8802_suspend_common,
	.resume   = cx8802_resume_common,
};

static int dvb_init(void)
{
	printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
	       (CX88_VERSION_CODE >> 16) & 0xff,
	       (CX88_VERSION_CODE >>  8) & 0xff,
	       CX88_VERSION_CODE & 0xff);
#ifdef SNAPSHOT
	printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
	       SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
#endif
	return pci_register_driver(&dvb_pci_driver);
}

static void dvb_fini(void)
{
	pci_unregister_driver(&dvb_pci_driver);
}

module_init(dvb_init);
module_exit(dvb_fini);

/*
 * Local variables:
 * c-basic-offset: 8
 * compile-command: "make DVB=1"
 * End:
 */
Commit	Line	Data
1da177e4	1	/*
0ccef6db	2	* $Id: cx88-dvb.c,v 1.48 2005/07/20 05:33:33 mkrufky Exp $
1da177e4 LT	3	*
	4	* device driver for Conexant 2388x based TV cards
	5	* MPEG Transport Stream (DVB) routines
	6	*
	7	* (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au>
	8	* (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	23	*/
	24
	25	#include <linux/module.h>
	26	#include <linux/init.h>
	27	#include <linux/device.h>
	28	#include <linux/fs.h>
	29	#include <linux/kthread.h>
	30	#include <linux/file.h>
	31	#include <linux/suspend.h>
	32
55ee3b83 MK	33	#define CONFIG_DVB_MT352 1
	34	#define CONFIG_DVB_CX22702 1
	35	#define CONFIG_DVB_OR51132 1
	36	#define CONFIG_DVB_LGDT3302 1
	37
1da177e4 LT	38	#include "cx88.h"
1da177e4 LT	39	#include "dvb-pll.h"
41ef7c1e MCC	40
	41	#if CONFIG_DVB_MT352
	42	# include "mt352.h"
	43	# include "mt352_priv.h"
	44	#endif
	45	#if CONFIG_DVB_CX22702
1da177e4 LT	46	# include "cx22702.h"
1da177e4 LT	47	#endif
41ef7c1e	48	#if CONFIG_DVB_OR51132
1da177e4 LT	49	# include "or51132.h"
1da177e4 LT	50	#endif
41ef7c1e	51	#if CONFIG_DVB_LGDT3302
f1798495 MK	52	# include "lgdt3302.h"
f1798495 MK	53	#endif
1da177e4 LT	54
	55	MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
	56	MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
	57	MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
	58	MODULE_LICENSE("GPL");
	59
	60	static unsigned int debug = 0;
	61	module_param(debug, int, 0644);
	62	MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
	63
	64	#define dprintk(level,fmt, arg...) if (debug >= level) \
	65	printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
	66
	67	/* ------------------------------------------------------------------ */
	68
	69	static int dvb_buf_setup(struct videobuf_queue *q,
	70	unsigned int count, unsigned int size)
	71	{
	72	struct cx8802_dev *dev = q->priv_data;
	73
	74	dev->ts_packet_size = 188 * 4;
	75	dev->ts_packet_count = 32;
	76
	77	size = dev->ts_packet_size dev->ts_packet_count;
	78	*count = 32;
	79	return 0;
	80	}
	81
	82	static int dvb_buf_prepare(struct videobuf_queue q, struct videobuf_buffer vb,
	83	enum v4l2_field field)
	84	{
	85	struct cx8802_dev *dev = q->priv_data;
	86	return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb);
	87	}
	88
	89	static void dvb_buf_queue(struct videobuf_queue q, struct videobuf_buffer vb)
	90	{
	91	struct cx8802_dev *dev = q->priv_data;
	92	cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
	93	}
	94
	95	static void dvb_buf_release(struct videobuf_queue q, struct videobuf_buffer vb)
	96	{
	97	struct cx8802_dev *dev = q->priv_data;
	98	cx88_free_buffer(dev->pci, (struct cx88_buffer*)vb);
	99	}
	100
408b664a	101	static struct videobuf_queue_ops dvb_qops = {
1da177e4 LT	102	.buf_setup = dvb_buf_setup,
	103	.buf_prepare = dvb_buf_prepare,
	104	.buf_queue = dvb_buf_queue,
	105	.buf_release = dvb_buf_release,
	106	};
	107
	108	/* ------------------------------------------------------------------ */
	109
41ef7c1e	110	#if CONFIG_DVB_MT352
1da177e4 LT	111	static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
	112	{
	113	static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
	114	static u8 reset [] = { RESET, 0x80 };
	115	static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
	116	static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
	117	static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
	118	static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
	119
	120	mt352_write(fe, clock_config, sizeof(clock_config));
	121	udelay(200);
	122	mt352_write(fe, reset, sizeof(reset));
	123	mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
	124
	125	mt352_write(fe, agc_cfg, sizeof(agc_cfg));
	126	mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
	127	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
	128	return 0;
	129	}
	130
	131	static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
	132	{
	133	static u8 clock_config [] = { 0x89, 0x38, 0x39 };
	134	static u8 reset [] = { 0x50, 0x80 };
	135	static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
	136	static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
	137	0x00, 0xFF, 0x00, 0x40, 0x40 };
	138	static u8 dntv_extra[] = { 0xB5, 0x7A };
	139	static u8 capt_range_cfg[] = { 0x75, 0x32 };
	140
	141	mt352_write(fe, clock_config, sizeof(clock_config));
	142	udelay(2000);
	143	mt352_write(fe, reset, sizeof(reset));
	144	mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
	145
	146	mt352_write(fe, agc_cfg, sizeof(agc_cfg));
	147	udelay(2000);
	148	mt352_write(fe, dntv_extra, sizeof(dntv_extra));
	149	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
	150
	151	return 0;
	152	}
	153
	154	static int mt352_pll_set(struct dvb_frontend* fe,
	155	struct dvb_frontend_parameters* params,
	156	u8* pllbuf)
	157	{
	158	struct cx8802_dev *dev= fe->dvb->priv;
	159
	160	pllbuf[0] = dev->core->pll_addr << 1;
	161	dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
	162	params->frequency,
	163	params->u.ofdm.bandwidth);
	164	return 0;
	165	}
	166
	167	static struct mt352_config dvico_fusionhdtv = {
	168	.demod_address = 0x0F,
	169	.demod_init = dvico_fusionhdtv_demod_init,
	170	.pll_set = mt352_pll_set,
	171	};
	172
	173	static struct mt352_config dntv_live_dvbt_config = {
	174	.demod_address = 0x0f,
175	.demod_init = dntv_live_dvbt_demod_init,
176	.pll_set = mt352_pll_set,
177	};
41ef7c1e	178	#endif
1da177e4	179
41ef7c1e	180	#if CONFIG_DVB_CX22702
1da177e4 LT	181	static struct cx22702_config connexant_refboard_config = {
1da177e4 LT	182	.demod_address = 0x43,
38d84c3b	183	.output_mode = CX22702_SERIAL_OUTPUT,
1da177e4 LT	184	.pll_address = 0x60,
	185	.pll_desc = &dvb_pll_thomson_dtt7579,
	186	};
	187
	188	static struct cx22702_config hauppauge_novat_config = {
	189	.demod_address = 0x43,
38d84c3b	190	.output_mode = CX22702_SERIAL_OUTPUT,
1da177e4 LT	191	.pll_address = 0x61,
	192	.pll_desc = &dvb_pll_thomson_dtt759x,
	193	};
	194	#endif
	195
41ef7c1e	196	#if CONFIG_DVB_OR51132
1da177e4 LT	197	static int or51132_set_ts_param(struct dvb_frontend* fe,
	198	int is_punctured)
	199	{
	200	struct cx8802_dev *dev= fe->dvb->priv;
	201	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
	202	return 0;
	203	}
	204
408b664a	205	static struct or51132_config pchdtv_hd3000 = {
1da177e4 LT	206	.demod_address = 0x15,
	207	.pll_address = 0x61,
	208	.pll_desc = &dvb_pll_thomson_dtt7610,
	209	.set_ts_params = or51132_set_ts_param,
	210	};
	211	#endif
	212
41ef7c1e	213	#if CONFIG_DVB_LGDT3302
b6aef071 MK	214	static int lgdt3302_pll_set(struct dvb_frontend* fe,
	215	struct dvb_frontend_parameters* params,
	216	u8* pllbuf)
	217	{
	218	struct cx8802_dev *dev= fe->dvb->priv;
	219
	220	pllbuf[0] = dev->core->pll_addr;
	221	dvb_pll_configure(dev->core->pll_desc, &pllbuf[1],
	222	params->frequency, 0);
	223	return 0;
	224	}
	225
0ccef6db MK	226	static int lgdt3302_pll_rf_set(struct dvb_frontend* fe, int index)
	227	{
	228	struct cx8802_dev *dev= fe->dvb->priv;
	229	struct cx88_core *core = dev->core;
	230
	231	dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
	232	if (index == 0)
	233	cx_clear(MO_GP0_IO, 8);
	234	else
	235	cx_set(MO_GP0_IO, 8);
	236	return 0;
	237	}
	238
f1798495 MK	239	static int lgdt3302_set_ts_param(struct dvb_frontend* fe, int is_punctured)
	240	{
	241	struct cx8802_dev *dev= fe->dvb->priv;
	242	if (is_punctured)
	243	dev->ts_gen_cntrl \|= 0x04;
	244	else
	245	dev->ts_gen_cntrl &= ~0x04;
	246	return 0;
	247	}
	248
b6aef071	249	static struct lgdt3302_config fusionhdtv_3_gold = {
0d723c09	250	.demod_address = 0x0e,
b6aef071	251	.pll_set = lgdt3302_pll_set,
0d723c09 MK	252	.set_ts_params = lgdt3302_set_ts_param,
0d723c09 MK	253	};
f1798495 MK	254	#endif
f1798495 MK	255
1da177e4 LT	256	static int dvb_register(struct cx8802_dev *dev)
	257	{
	258	/* init struct videobuf_dvb */
	259	dev->dvb.name = dev->core->name;
	260	dev->ts_gen_cntrl = 0x0c;
	261
	262	/* init frontend */
	263	switch (dev->core->board) {
41ef7c1e	264	#if CONFIG_DVB_CX22702
1da177e4 LT	265	case CX88_BOARD_HAUPPAUGE_DVB_T1:
	266	dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
	267	&dev->core->i2c_adap);
	268	break;
e057ee11	269	case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
1da177e4 LT	270	case CX88_BOARD_CONEXANT_DVB_T1:
	271	dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
	272	&dev->core->i2c_adap);
	273	break;
	274	#endif
41ef7c1e	275	#if CONFIG_DVB_MT352
1da177e4 LT	276	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
	277	dev->core->pll_addr = 0x61;
	278	dev->core->pll_desc = &dvb_pll_lg_z201;
	279	dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
	280	&dev->core->i2c_adap);
	281	break;
	282	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
	283	dev->core->pll_addr = 0x60;
	284	dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
	285	dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
	286	&dev->core->i2c_adap);
	287	break;
	288	case CX88_BOARD_KWORLD_DVB_T:
	289	case CX88_BOARD_DNTV_LIVE_DVB_T:
a82decf6	290	case CX88_BOARD_ADSTECH_DVB_T_PCI:
1da177e4 LT	291	dev->core->pll_addr = 0x61;
	292	dev->core->pll_desc = &dvb_pll_unknown_1;
	293	dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
	294	&dev->core->i2c_adap);
	295	break;
41ef7c1e MCC	296	#endif
41ef7c1e MCC	297	#if CONFIG_DVB_OR51132
1da177e4 LT	298	case CX88_BOARD_PCHDTV_HD3000:
	299	dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
	300	&dev->core->i2c_adap);
	301	break;
f1798495	302	#endif
41ef7c1e	303	#if CONFIG_DVB_LGDT3302
f1798495 MK	304	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
	305	dev->ts_gen_cntrl = 0x08;
	306	{
	307	/* Do a hardware reset of chip before using it. */
	308	struct cx88_core *core = dev->core;
	309
	310	cx_clear(MO_GP0_IO, 1);
	311	mdelay(100);
0ccef6db	312	cx_set(MO_GP0_IO, 1);
f1798495	313	mdelay(200);
0ccef6db MK	314
	315	/* Select RF connector callback */
	316	fusionhdtv_3_gold.pll_rf_set = lgdt3302_pll_rf_set;
b6aef071 MK	317	dev->core->pll_addr = 0x61;
	318	dev->core->pll_desc = &dvb_pll_microtune_4042;
	319	dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold,
f1798495 MK	320	&dev->core->i2c_adap);
	321	}
	322	break;
0d723c09 MK	323	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
	324	dev->ts_gen_cntrl = 0x08;
	325	{
	326	/* Do a hardware reset of chip before using it. */
	327	struct cx88_core *core = dev->core;
	328
	329	cx_clear(MO_GP0_IO, 1);
	330	mdelay(100);
	331	cx_set(MO_GP0_IO, 9); /* ANT connector too FIXME */
	332	mdelay(200);
b6aef071 MK	333	dev->core->pll_addr = 0x61;
	334	dev->core->pll_desc = &dvb_pll_thomson_dtt7611;
	335	dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold,
0d723c09 MK	336	&dev->core->i2c_adap);
	337	}
	338	break;
1da177e4 LT	339	#endif
1da177e4 LT	340	default:
1622c3fc GK	341	printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
1622c3fc GK	342	dev->core->name);
1da177e4 LT	343	break;
	344	}
	345	if (NULL == dev->dvb.frontend) {
	346	printk("%s: frontend initialization failed\n",dev->core->name);
	347	return -1;
	348	}
	349
	350	if (dev->core->pll_desc) {
	351	dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
	352	dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
	353	}
	354
	355	/* Copy the board name into the DVB structure */
	356	strlcpy(dev->dvb.frontend->ops->info.name,
	357	cx88_boards[dev->core->board].name,
	358	sizeof(dev->dvb.frontend->ops->info.name));
	359
	360	/* register everything */
	361	return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
	362	}
	363
	364	/* ----------------------------------------------------------- */
	365
	366	static int __devinit dvb_probe(struct pci_dev *pci_dev,
	367	const struct pci_device_id *pci_id)
	368	{
	369	struct cx8802_dev *dev;
	370	struct cx88_core *core;
	371	int err;
	372
	373	/* general setup */
	374	core = cx88_core_get(pci_dev);
	375	if (NULL == core)
	376	return -EINVAL;
	377
	378	err = -ENODEV;
	379	if (!cx88_boards[core->board].dvb)
	380	goto fail_core;
	381
	382	err = -ENOMEM;
	383	dev = kmalloc(sizeof(*dev),GFP_KERNEL);
	384	if (NULL == dev)
	385	goto fail_core;
	386	memset(dev,0,sizeof(*dev));
	387	dev->pci = pci_dev;
	388	dev->core = core;
	389
	390	err = cx8802_init_common(dev);
	391	if (0 != err)
	392	goto fail_free;
	393
	394	/* dvb stuff */
	395	printk("%s/2: cx2388x based dvb card\n", core->name);
	396	videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
	397	dev->pci, &dev->slock,
	398	V4L2_BUF_TYPE_VIDEO_CAPTURE,
	399	V4L2_FIELD_TOP,
	400	sizeof(struct cx88_buffer),
	401	dev);
	402	err = dvb_register(dev);
	403	if (0 != err)
1622c3fc	404	goto fail_fini;
1da177e4 LT	405	return 0;
1da177e4 LT	406
1622c3fc GK	407	fail_fini:
1622c3fc GK	408	cx8802_fini_common(dev);
1da177e4 LT	409	fail_free:
	410	kfree(dev);
	411	fail_core:
	412	cx88_core_put(core,pci_dev);
	413	return err;
	414	}
	415
	416	static void __devexit dvb_remove(struct pci_dev *pci_dev)
	417	{
	418	struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
	419
	420	/* dvb */
	421	videobuf_dvb_unregister(&dev->dvb);
	422
	423	/* common */
	424	cx8802_fini_common(dev);
	425	cx88_core_put(dev->core,dev->pci);
	426	kfree(dev);
	427	}
	428
	429	static struct pci_device_id cx8802_pci_tbl[] = {
	430	{
	431	.vendor = 0x14f1,
	432	.device = 0x8802,
	433	.subvendor = PCI_ANY_ID,
	434	.subdevice = PCI_ANY_ID,
	435	},{
	436	/* --- end of list --- */
	437	}
	438	};
	439	MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
	440
	441	static struct pci_driver dvb_pci_driver = {
	442	.name = "cx88-dvb",
	443	.id_table = cx8802_pci_tbl,
	444	.probe = dvb_probe,
	445	.remove = __devexit_p(dvb_remove),
	446	.suspend = cx8802_suspend_common,
	447	.resume = cx8802_resume_common,
	448	};
	449
	450	static int dvb_init(void)
	451	{
	452	printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
	453	(CX88_VERSION_CODE >> 16) & 0xff,
	454	(CX88_VERSION_CODE >> 8) & 0xff,
	455	CX88_VERSION_CODE & 0xff);
	456	#ifdef SNAPSHOT
	457	printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
	458	SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
	459	#endif
	460	return pci_register_driver(&dvb_pci_driver);
	461	}
	462
	463	static void dvb_fini(void)
	464	{
	465	pci_unregister_driver(&dvb_pci_driver);
	466	}
	467
	468	module_init(dvb_init);
	469	module_exit(dvb_fini);
	470
	471	/*
	472	* Local variables:
473	* c-basic-offset: 8
474	* compile-command: "make DVB=1"
475	* End:
476	*/