Commit | Line | Data |
---|---|---|
a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
a6c2ba28 | 7 | |
8 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
3acf2809 MCC |
25 | #ifndef _EM28XX_H |
26 | #define _EM28XX_H | |
a6c2ba28 | 27 | |
cb77d010 | 28 | #include <linux/videodev2.h> |
ad0ebb96 MCC |
29 | #include <media/videobuf-vmalloc.h> |
30 | ||
a6c2ba28 | 31 | #include <linux/i2c.h> |
3593cab5 | 32 | #include <linux/mutex.h> |
d5e52653 | 33 | #include <media/ir-kbd-i2c.h> |
3aefb79a MCC |
34 | #if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE) |
35 | #include <media/videobuf-dvb.h> | |
36 | #endif | |
3ca9c093 | 37 | #include "tuner-xc2028.h" |
2ba890ec | 38 | #include "em28xx-reg.h" |
3aefb79a MCC |
39 | |
40 | /* Boards supported by driver */ | |
41 | #define EM2800_BOARD_UNKNOWN 0 | |
42 | #define EM2820_BOARD_UNKNOWN 1 | |
43 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
44 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
45 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
46 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
47 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
48 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
49 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
50 | #define EM2820_BOARD_PINNACLE_DVC_90 9 | |
51 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 | |
52 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
53 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
54 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 | |
55 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 | |
56 | #define EM2800_BOARD_VGEAR_POCKETTV 15 | |
10ac6603 | 57 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16 |
4fd305b2 | 58 | #define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17 |
17d9d558 | 59 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18 |
a9fc52bc | 60 | #define EM2860_BOARD_POINTNIX_INTRAORAL_CAMERA 19 |
e14b3658 | 61 | #define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20 |
59d07f1b | 62 | #define EM2800_BOARD_GRABBEEX_USB2800 21 |
95b86a9a DSL |
63 | #define EM2750_BOARD_UNKNOWN 22 |
64 | #define EM2750_BOARD_DLCW_130 23 | |
65 | #define EM2820_BOARD_DLINK_USB_TV 24 | |
66 | #define EM2820_BOARD_GADMEI_UTV310 25 | |
67 | #define EM2820_BOARD_HERCULES_SMART_TV_USB2 26 | |
68 | #define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27 | |
69 | #define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28 | |
70 | #define EM2820_BOARD_PINNACLE_DVC_100 29 | |
71 | #define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30 | |
72 | #define EM2821_BOARD_USBGEAR_VD204 31 | |
73 | #define EM2821_BOARD_SUPERCOMP_USB_2 32 | |
74 | #define EM2821_BOARD_PROLINK_PLAYTV_USB2 33 | |
75 | #define EM2860_BOARD_TERRATEC_HYBRID_XS 34 | |
76 | #define EM2860_BOARD_TYPHOON_DVD_MAKER 35 | |
77 | #define EM2860_BOARD_NETGMBH_CAM 36 | |
78 | #define EM2860_BOARD_GADMEI_UTV330 37 | |
79 | #define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38 | |
80 | #define EM2861_BOARD_KWORLD_PVRTV_300U 39 | |
81 | #define EM2861_BOARD_PLEXTOR_PX_TV100U 40 | |
82 | #define EM2870_BOARD_KWORLD_350U 41 | |
83 | #define EM2870_BOARD_KWORLD_355U 42 | |
84 | #define EM2870_BOARD_TERRATEC_XS 43 | |
85 | #define EM2870_BOARD_TERRATEC_XS_MT2060 44 | |
86 | #define EM2870_BOARD_PINNACLE_PCTV_DVB 45 | |
87 | #define EM2870_BOARD_COMPRO_VIDEOMATE 46 | |
88 | #define EM2880_BOARD_KWORLD_DVB_305U 47 | |
89 | #define EM2880_BOARD_KWORLD_DVB_310U 48 | |
90 | #define EM2880_BOARD_MSI_DIGIVOX_AD 49 | |
91 | #define EM2880_BOARD_MSI_DIGIVOX_AD_II 50 | |
92 | #define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51 | |
93 | #define EM2881_BOARD_DNT_DA2_HYBRID 52 | |
94 | #define EM2881_BOARD_PINNACLE_HYBRID_PRO 53 | |
95 | #define EM2882_BOARD_KWORLD_VS_DVBT 54 | |
96 | #define EM2882_BOARD_TERRATEC_HYBRID_XS 55 | |
97 | #define EM2882_BOARD_PINNACLE_HYBRID_PRO 56 | |
98 | #define EM2883_BOARD_KWORLD_HYBRID_A316 57 | |
ee281b85 | 99 | #define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58 |
864ec0b7 | 100 | #define EM2874_BOARD_PINNACLE_PCTV_80E 59 |
3aefb79a MCC |
101 | |
102 | /* Limits minimum and default number of buffers */ | |
103 | #define EM28XX_MIN_BUF 4 | |
104 | #define EM28XX_DEF_BUF 8 | |
a6c2ba28 | 105 | |
c4a98793 MCC |
106 | /*Limits the max URB message size */ |
107 | #define URB_MAX_CTRL_SIZE 80 | |
108 | ||
95b86a9a DSL |
109 | /* Params for validated field */ |
110 | #define EM28XX_BOARD_NOT_VALIDATED 1 | |
111 | #define EM28XX_BOARD_VALIDATED 0 | |
112 | ||
596d92d5 | 113 | /* maximum number of em28xx boards */ |
3687e1e6 | 114 | #define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */ |
596d92d5 | 115 | |
a6c2ba28 | 116 | /* maximum number of frames that can be queued */ |
3acf2809 | 117 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 118 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 119 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 120 | |
121 | /* number of buffers for isoc transfers */ | |
3acf2809 | 122 | #define EM28XX_NUM_BUFS 5 |
a6c2ba28 | 123 | |
d5e52653 MCC |
124 | /* number of packets for each buffer |
125 | windows requests only 40 packets .. so we better do the same | |
126 | this is what I found out for all alternate numbers there! | |
127 | */ | |
3acf2809 | 128 | #define EM28XX_NUM_PACKETS 40 |
a6c2ba28 | 129 | |
a6c2ba28 | 130 | /* default alternate; 0 means choose the best */ |
3acf2809 | 131 | #define EM28XX_PINOUT 0 |
a6c2ba28 | 132 | |
3acf2809 | 133 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 134 | |
135 | /* | |
136 | #define (use usbview if you want to get the other alternate number infos) | |
137 | #define | |
138 | #define alternate number 2 | |
139 | #define Endpoint Address: 82 | |
140 | Direction: in | |
141 | Attribute: 1 | |
142 | Type: Isoc | |
143 | Max Packet Size: 1448 | |
144 | Interval: 125us | |
145 | ||
146 | alternate number 7 | |
147 | ||
148 | Endpoint Address: 82 | |
149 | Direction: in | |
150 | Attribute: 1 | |
151 | Type: Isoc | |
152 | Max Packet Size: 3072 | |
153 | Interval: 125us | |
154 | */ | |
155 | ||
156 | /* time to wait when stopping the isoc transfer */ | |
3acf2809 | 157 | #define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS) |
a6c2ba28 | 158 | |
596d92d5 MCC |
159 | /* time in msecs to wait for i2c writes to finish */ |
160 | #define EM2800_I2C_WRITE_TIMEOUT 20 | |
161 | ||
3aefb79a | 162 | enum em28xx_mode { |
c67ec53f | 163 | EM28XX_MODE_UNDEFINED, |
3aefb79a MCC |
164 | EM28XX_ANALOG_MODE, |
165 | EM28XX_DIGITAL_MODE, | |
166 | }; | |
167 | ||
3acf2809 | 168 | enum em28xx_stream_state { |
a6c2ba28 | 169 | STREAM_OFF, |
170 | STREAM_INTERRUPT, | |
171 | STREAM_ON, | |
172 | }; | |
173 | ||
579f72e4 AT |
174 | struct em28xx; |
175 | ||
ad0ebb96 MCC |
176 | struct em28xx_usb_isoc_ctl { |
177 | /* max packet size of isoc transaction */ | |
178 | int max_pkt_size; | |
179 | ||
180 | /* number of allocated urbs */ | |
181 | int num_bufs; | |
182 | ||
183 | /* urb for isoc transfers */ | |
184 | struct urb **urb; | |
185 | ||
186 | /* transfer buffers for isoc transfer */ | |
187 | char **transfer_buffer; | |
188 | ||
189 | /* Last buffer command and region */ | |
190 | u8 cmd; | |
191 | int pos, size, pktsize; | |
192 | ||
193 | /* Last field: ODD or EVEN? */ | |
194 | int field; | |
195 | ||
196 | /* Stores incomplete commands */ | |
197 | u32 tmp_buf; | |
198 | int tmp_buf_len; | |
199 | ||
200 | /* Stores already requested buffers */ | |
201 | struct em28xx_buffer *buf; | |
202 | ||
203 | /* Stores the number of received fields */ | |
204 | int nfields; | |
579f72e4 AT |
205 | |
206 | /* isoc urb callback */ | |
207 | int (*isoc_copy) (struct em28xx *dev, struct urb *urb); | |
208 | ||
ad0ebb96 MCC |
209 | }; |
210 | ||
211 | struct em28xx_fmt { | |
212 | char *name; | |
213 | u32 fourcc; /* v4l2 format id */ | |
214 | }; | |
215 | ||
216 | /* buffer for one video frame */ | |
217 | struct em28xx_buffer { | |
218 | /* common v4l buffer stuff -- must be first */ | |
219 | struct videobuf_buffer vb; | |
220 | ||
a6c2ba28 | 221 | struct list_head frame; |
a6c2ba28 | 222 | int top_field; |
ad0ebb96 MCC |
223 | int receiving; |
224 | }; | |
225 | ||
226 | struct em28xx_dmaqueue { | |
227 | struct list_head active; | |
228 | struct list_head queued; | |
ad0ebb96 MCC |
229 | |
230 | wait_queue_head_t wq; | |
231 | ||
232 | /* Counters to control buffer fill */ | |
233 | int pos; | |
a6c2ba28 | 234 | }; |
235 | ||
236 | /* io methods */ | |
3acf2809 | 237 | enum em28xx_io_method { |
a6c2ba28 | 238 | IO_NONE, |
239 | IO_READ, | |
240 | IO_MMAP, | |
241 | }; | |
242 | ||
243 | /* inputs */ | |
244 | ||
3acf2809 MCC |
245 | #define MAX_EM28XX_INPUT 4 |
246 | enum enum28xx_itype { | |
247 | EM28XX_VMUX_COMPOSITE1 = 1, | |
248 | EM28XX_VMUX_COMPOSITE2, | |
249 | EM28XX_VMUX_COMPOSITE3, | |
250 | EM28XX_VMUX_COMPOSITE4, | |
251 | EM28XX_VMUX_SVIDEO, | |
252 | EM28XX_VMUX_TELEVISION, | |
253 | EM28XX_VMUX_CABLE, | |
254 | EM28XX_VMUX_DVB, | |
255 | EM28XX_VMUX_DEBUG, | |
256 | EM28XX_RADIO, | |
a6c2ba28 | 257 | }; |
258 | ||
539c96d0 MCC |
259 | enum em28xx_amux { |
260 | EM28XX_AMUX_VIDEO, | |
261 | EM28XX_AMUX_LINE_IN, | |
262 | EM28XX_AMUX_AC97_VIDEO, | |
263 | EM28XX_AMUX_AC97_LINE_IN, | |
264 | }; | |
265 | ||
3acf2809 MCC |
266 | struct em28xx_input { |
267 | enum enum28xx_itype type; | |
a6c2ba28 | 268 | unsigned int vmux; |
539c96d0 | 269 | enum em28xx_amux amux; |
a6c2ba28 | 270 | }; |
271 | ||
3acf2809 | 272 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 273 | |
3acf2809 | 274 | enum em28xx_decoder { |
1ed1dd54 | 275 | EM28XX_NODECODER, |
3acf2809 MCC |
276 | EM28XX_TVP5150, |
277 | EM28XX_SAA7113, | |
278 | EM28XX_SAA7114 | |
a6c2ba28 | 279 | }; |
280 | ||
102a0b08 MCC |
281 | struct em28xx_reg_seq { |
282 | int reg; | |
c67ec53f | 283 | unsigned char val, mask; |
102a0b08 | 284 | int sleep; |
ee6e3a86 MCC |
285 | }; |
286 | ||
3acf2809 | 287 | struct em28xx_board { |
a6c2ba28 | 288 | char *name; |
a6c2ba28 | 289 | int vchannels; |
a6c2ba28 | 290 | int tuner_type; |
66767920 | 291 | int tuner_addr; |
a6c2ba28 | 292 | |
293 | /* i2c flags */ | |
294 | unsigned int tda9887_conf; | |
295 | ||
74f38a82 | 296 | unsigned int is_em2800:1; |
a6c2ba28 | 297 | unsigned int has_msp34xx:1; |
5add9a6f | 298 | unsigned int mts_firmware:1; |
3abee53e | 299 | unsigned int has_12mhz_i2s:1; |
c8793b03 | 300 | unsigned int max_range_640_480:1; |
3aefb79a | 301 | unsigned int has_dvb:1; |
a9fc52bc | 302 | unsigned int has_snapshot_button:1; |
95b86a9a | 303 | unsigned int valid:1; |
3abee53e | 304 | |
3acf2809 | 305 | enum em28xx_decoder decoder; |
a6c2ba28 | 306 | |
3acf2809 | 307 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 308 | struct em28xx_input radio; |
4b92253a | 309 | IR_KEYTAB_TYPE *ir_codes; |
a6c2ba28 | 310 | }; |
311 | ||
3acf2809 | 312 | struct em28xx_eeprom { |
a6c2ba28 | 313 | u32 id; /* 0x9567eb1a */ |
314 | u16 vendor_ID; | |
315 | u16 product_ID; | |
316 | ||
317 | u16 chip_conf; | |
318 | ||
319 | u16 board_conf; | |
320 | ||
321 | u16 string1, string2, string3; | |
322 | ||
323 | u8 string_idx_table; | |
324 | }; | |
325 | ||
326 | /* device states */ | |
3acf2809 | 327 | enum em28xx_dev_state { |
a6c2ba28 | 328 | DEV_INITIALIZED = 0x01, |
329 | DEV_DISCONNECTED = 0x02, | |
330 | DEV_MISCONFIGURED = 0x04, | |
331 | }; | |
332 | ||
6d79468d MCC |
333 | #define EM28XX_AUDIO_BUFS 5 |
334 | #define EM28XX_NUM_AUDIO_PACKETS 64 | |
335 | #define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */ | |
336 | #define EM28XX_CAPTURE_STREAM_EN 1 | |
3aefb79a MCC |
337 | |
338 | /* em28xx extensions */ | |
6d79468d | 339 | #define EM28XX_AUDIO 0x10 |
3aefb79a | 340 | #define EM28XX_DVB 0x20 |
6d79468d MCC |
341 | |
342 | struct em28xx_audio { | |
343 | char name[50]; | |
344 | char *transfer_buffer[EM28XX_AUDIO_BUFS]; | |
345 | struct urb *urb[EM28XX_AUDIO_BUFS]; | |
346 | struct usb_device *udev; | |
347 | unsigned int capture_transfer_done; | |
348 | struct snd_pcm_substream *capture_pcm_substream; | |
349 | ||
350 | unsigned int hwptr_done_capture; | |
351 | struct snd_card *sndcard; | |
352 | ||
353 | int users, shutdown; | |
354 | enum em28xx_stream_state capture_stream; | |
355 | spinlock_t slock; | |
356 | }; | |
357 | ||
52284c3e MCC |
358 | struct em28xx; |
359 | ||
360 | struct em28xx_fh { | |
361 | struct em28xx *dev; | |
362 | unsigned int stream_on:1; /* Locks streams */ | |
363 | int radio; | |
364 | ||
365 | struct videobuf_queue vb_vidq; | |
366 | ||
367 | enum v4l2_buf_type type; | |
368 | }; | |
369 | ||
a6c2ba28 | 370 | /* main device struct */ |
3acf2809 | 371 | struct em28xx { |
a6c2ba28 | 372 | /* generic device properties */ |
373 | char name[30]; /* name (including minor) of the device */ | |
374 | int model; /* index in the device_data struct */ | |
e5589bef | 375 | int devno; /* marks the number of this device */ |
600bd7f0 | 376 | enum em28xx_chip_id chip_id; |
74f38a82 | 377 | unsigned int is_em2800:1; |
a6c2ba28 | 378 | unsigned int has_msp34xx:1; |
379 | unsigned int has_tda9887:1; | |
a225452e | 380 | unsigned int stream_on:1; /* Locks streams */ |
d7448a8d | 381 | unsigned int has_audio_class:1; |
24a613e4 | 382 | unsigned int has_alsa_audio:1; |
3abee53e | 383 | unsigned int has_12mhz_i2s:1; |
c8793b03 | 384 | unsigned int max_range_640_480:1; |
3aefb79a | 385 | unsigned int has_dvb:1; |
a9fc52bc | 386 | unsigned int has_snapshot_button:1; |
95b86a9a | 387 | unsigned int valid:1; /* report for validated boards */ |
a225452e | 388 | |
a924a499 MCC |
389 | struct em28xx_IR *ir; |
390 | ||
89b329ef MCC |
391 | /* Some older em28xx chips needs a waiting time after writing */ |
392 | unsigned int wait_after_write; | |
393 | ||
c67ec53f | 394 | /* GPIO sequences for analog and digital mode */ |
102a0b08 | 395 | struct em28xx_reg_seq *analog_gpio, *digital_gpio; |
ee6e3a86 | 396 | |
c67ec53f MCC |
397 | /* GPIO sequences for tuner callbacks */ |
398 | struct em28xx_reg_seq *tun_analog_gpio, *tun_digital_gpio; | |
399 | ||
74f38a82 MCC |
400 | int video_inputs; /* number of video inputs */ |
401 | struct list_head devlist; | |
402 | ||
9bb13a6d MCC |
403 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
404 | ||
3acf2809 | 405 | enum em28xx_decoder decoder; |
a6c2ba28 | 406 | |
407 | int tuner_type; /* type of the tuner */ | |
408 | int tuner_addr; /* tuner address */ | |
409 | int tda9887_conf; | |
410 | /* i2c i/o */ | |
411 | struct i2c_adapter i2c_adap; | |
412 | struct i2c_client i2c_client; | |
413 | /* video for linux */ | |
414 | int users; /* user count for exclusive use */ | |
415 | struct video_device *vdev; /* video for linux device struct */ | |
7d497f8a | 416 | v4l2_std_id norm; /* selected tv norm */ |
a6c2ba28 | 417 | int ctl_freq; /* selected frequency */ |
418 | unsigned int ctl_input; /* selected input */ | |
95b86a9a | 419 | unsigned int ctl_ainput;/* selected audio input */ |
a6c2ba28 | 420 | int mute; |
421 | int volume; | |
422 | /* frame properties */ | |
a6c2ba28 | 423 | int width; /* current frame width */ |
424 | int height; /* current frame height */ | |
d45b9b8a HV |
425 | unsigned hscale; /* horizontal scale factor (see datasheet) */ |
426 | unsigned vscale; /* vertical scale factor (see datasheet) */ | |
a6c2ba28 | 427 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ |
9e31ced8 | 428 | unsigned int video_bytesread; /* Number of bytes read */ |
a6c2ba28 | 429 | |
03910cc3 | 430 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
6ea54d93 DSL |
431 | unsigned long i2c_hash; /* i2c devicelist hash - |
432 | for boards with generic ID */ | |
03910cc3 | 433 | |
6d79468d MCC |
434 | struct em28xx_audio *adev; |
435 | ||
a6c2ba28 | 436 | /* states */ |
3acf2809 | 437 | enum em28xx_dev_state state; |
3acf2809 | 438 | enum em28xx_io_method io; |
9e31ced8 | 439 | |
d7448a8d MCC |
440 | struct work_struct request_module_wk; |
441 | ||
a6c2ba28 | 442 | /* locks */ |
5a80415b | 443 | struct mutex lock; |
f2a2e491 | 444 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
d7aa8020 | 445 | /* spinlock_t queue_lock; */ |
a6c2ba28 | 446 | struct list_head inqueue, outqueue; |
447 | wait_queue_head_t open, wait_frame, wait_stream; | |
448 | struct video_device *vbi_dev; | |
0be43754 | 449 | struct video_device *radio_dev; |
a6c2ba28 | 450 | |
451 | unsigned char eedata[256]; | |
452 | ||
ad0ebb96 MCC |
453 | /* Isoc control struct */ |
454 | struct em28xx_dmaqueue vidq; | |
455 | struct em28xx_usb_isoc_ctl isoc_ctl; | |
456 | spinlock_t slock; | |
457 | ||
a6c2ba28 | 458 | /* usb transfer */ |
459 | struct usb_device *udev; /* the usb device */ | |
460 | int alt; /* alternate */ | |
461 | int max_pkt_size; /* max packet size of isoc transaction */ | |
9d4d9c05 MCC |
462 | int num_alt; /* Number of alternative settings */ |
463 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ | |
3acf2809 MCC |
464 | struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */ |
465 | char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */ | |
c4a98793 MCC |
466 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ |
467 | ||
a6c2ba28 | 468 | /* helper funcs that call usb_control_msg */ |
6ea54d93 | 469 | int (*em28xx_write_regs) (struct em28xx *dev, u16 reg, |
a6c2ba28 | 470 | char *buf, int len); |
6ea54d93 DSL |
471 | int (*em28xx_read_reg) (struct em28xx *dev, u16 reg); |
472 | int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg, | |
473 | char *buf, int len); | |
474 | int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg, | |
a6c2ba28 | 475 | char *buf, int len); |
6ea54d93 | 476 | int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg); |
3aefb79a MCC |
477 | |
478 | enum em28xx_mode mode; | |
479 | ||
6a1acc3b DH |
480 | /* register numbers for GPO/GPIO registers */ |
481 | u16 reg_gpo_num, reg_gpio_num; | |
482 | ||
c67ec53f MCC |
483 | /* Caches GPO and GPIO registers */ |
484 | unsigned char reg_gpo, reg_gpio; | |
485 | ||
4b92253a DH |
486 | /* Infrared remote control support */ |
487 | IR_KEYTAB_TYPE *ir_codes; | |
488 | ||
a9fc52bc DH |
489 | /* Snapshot button */ |
490 | char snapshot_button_path[30]; /* path of the input dev */ | |
491 | struct input_dev *sbutton_input_dev; | |
492 | struct delayed_work sbutton_query_work; | |
493 | ||
3421b778 | 494 | struct em28xx_dvb *dvb; |
a6c2ba28 | 495 | }; |
496 | ||
6d79468d MCC |
497 | struct em28xx_ops { |
498 | struct list_head next; | |
499 | char *name; | |
500 | int id; | |
501 | int (*init)(struct em28xx *); | |
502 | int (*fini)(struct em28xx *); | |
a3a048ce MCC |
503 | }; |
504 | ||
3acf2809 | 505 | /* Provided by em28xx-i2c.c */ |
a6c2ba28 | 506 | |
3acf2809 | 507 | void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg); |
fad7b958 | 508 | void em28xx_do_i2c_scan(struct em28xx *dev); |
3acf2809 MCC |
509 | int em28xx_i2c_register(struct em28xx *dev); |
510 | int em28xx_i2c_unregister(struct em28xx *dev); | |
a6c2ba28 | 511 | |
3acf2809 | 512 | /* Provided by em28xx-core.c */ |
a6c2ba28 | 513 | |
3acf2809 MCC |
514 | u32 em28xx_request_buffers(struct em28xx *dev, u32 count); |
515 | void em28xx_queue_unusedframes(struct em28xx *dev); | |
516 | void em28xx_release_buffers(struct em28xx *dev); | |
a6c2ba28 | 517 | |
3acf2809 | 518 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 519 | char *buf, int len); |
3acf2809 MCC |
520 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
521 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
522 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 523 | int len); |
3acf2809 | 524 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
3acf2809 | 525 | int em28xx_audio_analog_set(struct em28xx *dev); |
539c96d0 | 526 | |
3acf2809 MCC |
527 | int em28xx_colorlevels_set_default(struct em28xx *dev); |
528 | int em28xx_capture_start(struct em28xx *dev, int start); | |
529 | int em28xx_outfmt_set_yuv422(struct em28xx *dev); | |
3acf2809 | 530 | int em28xx_resolution_set(struct em28xx *dev); |
3acf2809 | 531 | int em28xx_set_alternate(struct em28xx *dev); |
579f72e4 AT |
532 | int em28xx_init_isoc(struct em28xx *dev, int max_packets, |
533 | int num_bufs, int max_pkt_size, | |
c67ec53f | 534 | int (*isoc_copy) (struct em28xx *dev, struct urb *urb)); |
579f72e4 | 535 | void em28xx_uninit_isoc(struct em28xx *dev); |
c67ec53f MCC |
536 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode); |
537 | int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio); | |
3acf2809 | 538 | |
6d79468d MCC |
539 | /* Provided by em28xx-video.c */ |
540 | int em28xx_register_extension(struct em28xx_ops *dev); | |
541 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
542 | ||
3acf2809 | 543 | /* Provided by em28xx-cards.c */ |
6ea54d93 | 544 | extern int em2800_variant_detect(struct usb_device *udev, int model); |
a94e95b4 | 545 | extern void em28xx_pre_card_setup(struct em28xx *dev); |
3acf2809 MCC |
546 | extern void em28xx_card_setup(struct em28xx *dev); |
547 | extern struct em28xx_board em28xx_boards[]; | |
548 | extern struct usb_device_id em28xx_id_table[]; | |
549 | extern const unsigned int em28xx_bcount; | |
c8793b03 | 550 | void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir); |
d7cba043 | 551 | int em28xx_tuner_callback(void *ptr, int component, int command, int arg); |
c8793b03 MCC |
552 | |
553 | /* Provided by em28xx-input.c */ | |
c8793b03 MCC |
554 | int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); |
555 | int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | |
556 | int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key, | |
557 | u32 *ir_raw); | |
a9fc52bc DH |
558 | void em28xx_register_snapshot_button(struct em28xx *dev); |
559 | void em28xx_deregister_snapshot_button(struct em28xx *dev); | |
a6c2ba28 | 560 | |
a924a499 MCC |
561 | int em28xx_ir_init(struct em28xx *dev); |
562 | int em28xx_ir_fini(struct em28xx *dev); | |
563 | ||
a6c2ba28 | 564 | /* printk macros */ |
565 | ||
3acf2809 | 566 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 567 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 568 | |
3acf2809 | 569 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 570 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 571 | dev->name , ##arg); } while (0) |
a6c2ba28 | 572 | |
3acf2809 | 573 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 574 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 575 | dev->name , ##arg); } while (0) |
3acf2809 | 576 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 577 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 578 | dev->name , ##arg); } while (0) |
a6c2ba28 | 579 | |
6ea54d93 | 580 | static inline int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 | 581 | { |
582 | /* side effect of disabling scaler and mixer */ | |
41facaa4 | 583 | return em28xx_write_regs(dev, EM28XX_R26_COMPR, "\x00", 1); |
a6c2ba28 | 584 | } |
585 | ||
6ea54d93 | 586 | static inline int em28xx_contrast_get(struct em28xx *dev) |
a6c2ba28 | 587 | { |
41facaa4 | 588 | return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f; |
a6c2ba28 | 589 | } |
590 | ||
6ea54d93 | 591 | static inline int em28xx_brightness_get(struct em28xx *dev) |
a6c2ba28 | 592 | { |
41facaa4 | 593 | return em28xx_read_reg(dev, EM28XX_R21_YOFFSET); |
a6c2ba28 | 594 | } |
595 | ||
6ea54d93 | 596 | static inline int em28xx_saturation_get(struct em28xx *dev) |
a6c2ba28 | 597 | { |
41facaa4 | 598 | return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f; |
a6c2ba28 | 599 | } |
600 | ||
6ea54d93 | 601 | static inline int em28xx_u_balance_get(struct em28xx *dev) |
a6c2ba28 | 602 | { |
41facaa4 | 603 | return em28xx_read_reg(dev, EM28XX_R23_UOFFSET); |
a6c2ba28 | 604 | } |
605 | ||
6ea54d93 | 606 | static inline int em28xx_v_balance_get(struct em28xx *dev) |
a6c2ba28 | 607 | { |
41facaa4 | 608 | return em28xx_read_reg(dev, EM28XX_R24_VOFFSET); |
a6c2ba28 | 609 | } |
610 | ||
6ea54d93 | 611 | static inline int em28xx_gamma_get(struct em28xx *dev) |
a6c2ba28 | 612 | { |
41facaa4 | 613 | return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f; |
a6c2ba28 | 614 | } |
615 | ||
6ea54d93 | 616 | static inline int em28xx_contrast_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 617 | { |
618 | u8 tmp = (u8) val; | |
41facaa4 | 619 | return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1); |
a6c2ba28 | 620 | } |
621 | ||
6ea54d93 | 622 | static inline int em28xx_brightness_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 623 | { |
624 | u8 tmp = (u8) val; | |
41facaa4 | 625 | return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1); |
a6c2ba28 | 626 | } |
627 | ||
6ea54d93 | 628 | static inline int em28xx_saturation_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 629 | { |
630 | u8 tmp = (u8) val; | |
41facaa4 | 631 | return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1); |
a6c2ba28 | 632 | } |
633 | ||
6ea54d93 | 634 | static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 635 | { |
636 | u8 tmp = (u8) val; | |
41facaa4 | 637 | return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1); |
a6c2ba28 | 638 | } |
639 | ||
6ea54d93 | 640 | static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 641 | { |
642 | u8 tmp = (u8) val; | |
41facaa4 | 643 | return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1); |
a6c2ba28 | 644 | } |
645 | ||
6ea54d93 | 646 | static inline int em28xx_gamma_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 647 | { |
648 | u8 tmp = (u8) val; | |
41facaa4 | 649 | return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1); |
a6c2ba28 | 650 | } |
651 | ||
652 | /*FIXME: maxw should be dependent of alt mode */ | |
6ea54d93 | 653 | static inline unsigned int norm_maxw(struct em28xx *dev) |
30556b23 | 654 | { |
c8793b03 | 655 | if (dev->max_range_640_480) |
7d497f8a | 656 | return 640; |
c8793b03 | 657 | else |
7d497f8a | 658 | return 720; |
30556b23 MR |
659 | } |
660 | ||
6ea54d93 | 661 | static inline unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 662 | { |
c8793b03 | 663 | if (dev->max_range_640_480) |
7d497f8a | 664 | return 480; |
c8793b03 | 665 | else |
7d497f8a | 666 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; |
a6c2ba28 | 667 | } |
a6c2ba28 | 668 | #endif |