Commit | Line | Data |
---|---|---|
1a0adaf3 HV |
1 | /* |
2 | I2C functions | |
3 | Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com> | |
4 | Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl> | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | /* | |
22 | This file includes an i2c implementation that was reverse engineered | |
23 | from the Hauppauge windows driver. Older ivtv versions used i2c-algo-bit, | |
24 | which whilst fine under most circumstances, had trouble with the Zilog | |
25 | CPU on the PVR-150 which handles IR functions (occasional inability to | |
26 | communicate with the chip until it was reset) and also with the i2c | |
27 | bus being completely unreachable when multiple PVR cards were present. | |
28 | ||
29 | The implementation is very similar to i2c-algo-bit, but there are enough | |
30 | subtle differences that the two are hard to merge. The general strategy | |
31 | employed by i2c-algo-bit is to use udelay() to implement the timing | |
32 | when putting out bits on the scl/sda lines. The general strategy taken | |
33 | here is to poll the lines for state changes (see ivtv_waitscl and | |
34 | ivtv_waitsda). In addition there are small delays at various locations | |
35 | which poll the SCL line 5 times (ivtv_scldelay). I would guess that | |
36 | since this is memory mapped I/O that the length of those delays is tied | |
37 | to the PCI bus clock. There is some extra code to do with recovery | |
38 | and retries. Since it is not known what causes the actual i2c problems | |
39 | in the first place, the only goal if one was to attempt to use | |
40 | i2c-algo-bit would be to try to make it follow the same code path. | |
41 | This would be a lot of work, and I'm also not convinced that it would | |
42 | provide a generic benefit to i2c-algo-bit. Therefore consider this | |
43 | an engineering solution -- not pretty, but it works. | |
44 | ||
45 | Some more general comments about what we are doing: | |
46 | ||
47 | The i2c bus is a 2 wire serial bus, with clock (SCL) and data (SDA) | |
48 | lines. To communicate on the bus (as a master, we don't act as a slave), | |
49 | we first initiate a start condition (ivtv_start). We then write the | |
50 | address of the device that we want to communicate with, along with a flag | |
51 | that indicates whether this is a read or a write. The slave then issues | |
52 | an ACK signal (ivtv_ack), which tells us that it is ready for reading / | |
53 | writing. We then proceed with reading or writing (ivtv_read/ivtv_write), | |
54 | and finally issue a stop condition (ivtv_stop) to make the bus available | |
55 | to other masters. | |
56 | ||
57 | There is an additional form of transaction where a write may be | |
58 | immediately followed by a read. In this case, there is no intervening | |
59 | stop condition. (Only the msp3400 chip uses this method of data transfer). | |
60 | */ | |
61 | ||
62 | #include "ivtv-driver.h" | |
63 | #include "ivtv-cards.h" | |
64 | #include "ivtv-gpio.h" | |
83df8e7b | 65 | #include "ivtv-i2c.h" |
72c851b0 | 66 | #include <media/cx25840.h> |
1a0adaf3 | 67 | |
1a0adaf3 HV |
68 | /* i2c implementation for cx23415/6 chip, ivtv project. |
69 | * Author: Kevin Thayer (nufan_wfk at yahoo.com) | |
70 | */ | |
71 | /* i2c stuff */ | |
72 | #define IVTV_REG_I2C_SETSCL_OFFSET 0x7000 | |
73 | #define IVTV_REG_I2C_SETSDA_OFFSET 0x7004 | |
74 | #define IVTV_REG_I2C_GETSCL_OFFSET 0x7008 | |
75 | #define IVTV_REG_I2C_GETSDA_OFFSET 0x700c | |
76 | ||
1a0adaf3 | 77 | #define IVTV_CS53L32A_I2C_ADDR 0x11 |
e2a1774d | 78 | #define IVTV_M52790_I2C_ADDR 0x48 |
1a0adaf3 HV |
79 | #define IVTV_CX25840_I2C_ADDR 0x44 |
80 | #define IVTV_SAA7115_I2C_ADDR 0x21 | |
81 | #define IVTV_SAA7127_I2C_ADDR 0x44 | |
82 | #define IVTV_SAA717x_I2C_ADDR 0x21 | |
83 | #define IVTV_MSP3400_I2C_ADDR 0x40 | |
84 | #define IVTV_HAUPPAUGE_I2C_ADDR 0x50 | |
85 | #define IVTV_WM8739_I2C_ADDR 0x1a | |
86 | #define IVTV_WM8775_I2C_ADDR 0x1b | |
87 | #define IVTV_TEA5767_I2C_ADDR 0x60 | |
88 | #define IVTV_UPD64031A_I2C_ADDR 0x12 | |
89 | #define IVTV_UPD64083_I2C_ADDR 0x5c | |
d9009201 HV |
90 | #define IVTV_VP27SMPX_I2C_ADDR 0x5b |
91 | #define IVTV_M52790_I2C_ADDR 0x48 | |
ad2fe2d4 | 92 | #define IVTV_AVERMEDIA_IR_RX_I2C_ADDR 0x40 |
7ce5c41d AW |
93 | #define IVTV_HAUP_EXT_IR_RX_I2C_ADDR 0x1a |
94 | #define IVTV_HAUP_INT_IR_RX_I2C_ADDR 0x18 | |
95 | #define IVTV_Z8F0811_IR_TX_I2C_ADDR 0x70 | |
96 | #define IVTV_Z8F0811_IR_RX_I2C_ADDR 0x71 | |
e1e2c575 | 97 | #define IVTV_ADAPTEC_IR_ADDR 0x6b |
1a0adaf3 | 98 | |
d9009201 HV |
99 | /* This array should match the IVTV_HW_ defines */ |
100 | static const u8 hw_addrs[] = { | |
101 | IVTV_CX25840_I2C_ADDR, | |
102 | IVTV_SAA7115_I2C_ADDR, | |
103 | IVTV_SAA7127_I2C_ADDR, | |
104 | IVTV_MSP3400_I2C_ADDR, | |
105 | 0, | |
106 | IVTV_WM8775_I2C_ADDR, | |
107 | IVTV_CS53L32A_I2C_ADDR, | |
108 | 0, | |
109 | IVTV_SAA7115_I2C_ADDR, | |
110 | IVTV_UPD64031A_I2C_ADDR, | |
111 | IVTV_UPD64083_I2C_ADDR, | |
112 | IVTV_SAA717x_I2C_ADDR, | |
113 | IVTV_WM8739_I2C_ADDR, | |
114 | IVTV_VP27SMPX_I2C_ADDR, | |
115 | IVTV_M52790_I2C_ADDR, | |
ad2fe2d4 | 116 | 0, /* IVTV_HW_GPIO dummy driver ID */ |
7ce5c41d AW |
117 | IVTV_AVERMEDIA_IR_RX_I2C_ADDR, /* IVTV_HW_I2C_IR_RX_AVER */ |
118 | IVTV_HAUP_EXT_IR_RX_I2C_ADDR, /* IVTV_HW_I2C_IR_RX_HAUP_EXT */ | |
119 | IVTV_HAUP_INT_IR_RX_I2C_ADDR, /* IVTV_HW_I2C_IR_RX_HAUP_INT */ | |
120 | IVTV_Z8F0811_IR_TX_I2C_ADDR, /* IVTV_HW_Z8F0811_IR_TX_HAUP */ | |
121 | IVTV_Z8F0811_IR_RX_I2C_ADDR, /* IVTV_HW_Z8F0811_IR_RX_HAUP */ | |
e1e2c575 | 122 | IVTV_ADAPTEC_IR_ADDR, /* IVTV_HW_I2C_IR_RX_ADAPTEC */ |
d9009201 HV |
123 | }; |
124 | ||
1a0adaf3 | 125 | /* This array should match the IVTV_HW_ defines */ |
af294867 | 126 | static const char * const hw_devicenames[] = { |
d9009201 | 127 | "cx25840", |
1a0adaf3 | 128 | "saa7115", |
5daed074 | 129 | "saa7127_auto", /* saa7127 or saa7129 */ |
1a0adaf3 HV |
130 | "msp3400", |
131 | "tuner", | |
132 | "wm8775", | |
133 | "cs53l32a", | |
134 | "tveeprom", | |
af294867 | 135 | "saa7114", |
1a0adaf3 HV |
136 | "upd64031a", |
137 | "upd64083", | |
138 | "saa717x", | |
139 | "wm8739", | |
ac247433 | 140 | "vp27smpx", |
e2a1774d | 141 | "m52790", |
1a0adaf3 | 142 | "gpio", |
7ce5c41d AW |
143 | "ir_video", /* IVTV_HW_I2C_IR_RX_AVER */ |
144 | "ir_video", /* IVTV_HW_I2C_IR_RX_HAUP_EXT */ | |
145 | "ir_video", /* IVTV_HW_I2C_IR_RX_HAUP_INT */ | |
146 | "ir_tx_z8f0811_haup", /* IVTV_HW_Z8F0811_IR_TX_HAUP */ | |
147 | "ir_rx_z8f0811_haup", /* IVTV_HW_Z8F0811_IR_RX_HAUP */ | |
e1e2c575 | 148 | "ir_video", /* IVTV_HW_I2C_IR_RX_ADAPTEC */ |
1a0adaf3 HV |
149 | }; |
150 | ||
e1e2c575 MCC |
151 | static int get_key_adaptec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) |
152 | { | |
153 | unsigned char keybuf[4]; | |
154 | ||
155 | keybuf[0] = 0x00; | |
156 | i2c_master_send(ir->c, keybuf, 1); | |
157 | /* poll IR chip */ | |
158 | if (i2c_master_recv(ir->c, keybuf, sizeof(keybuf)) != sizeof(keybuf)) { | |
159 | return 0; | |
160 | } | |
161 | ||
162 | /* key pressed ? */ | |
163 | if (keybuf[2] == 0xff) | |
164 | return 0; | |
165 | ||
166 | /* remove repeat bit */ | |
167 | keybuf[2] &= 0x7f; | |
168 | keybuf[3] |= 0x80; | |
169 | ||
9804ed9e MCC |
170 | *ir_key = keybuf[3] | keybuf[2] << 8 | keybuf[1] << 16 |keybuf[0] << 24; |
171 | *ir_raw = *ir_key; | |
e1e2c575 MCC |
172 | |
173 | return 1; | |
174 | } | |
175 | ||
ad2fe2d4 AW |
176 | static int ivtv_i2c_new_ir(struct ivtv *itv, u32 hw, const char *type, u8 addr) |
177 | { | |
178 | struct i2c_board_info info; | |
179 | struct i2c_adapter *adap = &itv->i2c_adap; | |
180 | struct IR_i2c_init_data *init_data = &itv->ir_i2c_init_data; | |
181 | unsigned short addr_list[2] = { addr, I2C_CLIENT_END }; | |
182 | ||
7ce5c41d AW |
183 | /* Only allow one IR transmitter to be registered per board */ |
184 | if (hw & IVTV_HW_IR_TX_ANY) { | |
185 | if (itv->hw_flags & IVTV_HW_IR_TX_ANY) | |
186 | return -1; | |
187 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
188 | strlcpy(info.type, type, I2C_NAME_SIZE); | |
9a94241a JD |
189 | return i2c_new_probed_device(adap, &info, addr_list, NULL) |
190 | == NULL ? -1 : 0; | |
7ce5c41d AW |
191 | } |
192 | ||
193 | /* Only allow one IR receiver to be registered per board */ | |
194 | if (itv->hw_flags & IVTV_HW_IR_RX_ANY) | |
195 | return -1; | |
196 | ||
ad2fe2d4 AW |
197 | /* Our default information for ir-kbd-i2c.c to use */ |
198 | switch (hw) { | |
199 | case IVTV_HW_I2C_IR_RX_AVER: | |
02858eed | 200 | init_data->ir_codes = RC_MAP_AVERMEDIA_CARDBUS; |
ad2fe2d4 AW |
201 | init_data->internal_get_key_func = |
202 | IR_KBD_GET_KEY_AVERMEDIA_CARDBUS; | |
52b66144 | 203 | init_data->type = RC_TYPE_OTHER; |
ad2fe2d4 AW |
204 | init_data->name = "AVerMedia AVerTV card"; |
205 | break; | |
7ce5c41d AW |
206 | case IVTV_HW_I2C_IR_RX_HAUP_EXT: |
207 | case IVTV_HW_I2C_IR_RX_HAUP_INT: | |
20624106 | 208 | init_data->ir_codes = RC_MAP_HAUPPAUGE; |
7ce5c41d | 209 | init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP; |
52b66144 | 210 | init_data->type = RC_TYPE_RC5; |
7ce5c41d AW |
211 | init_data->name = itv->card_name; |
212 | break; | |
213 | case IVTV_HW_Z8F0811_IR_RX_HAUP: | |
214 | /* Default to grey remote */ | |
af86ce79 | 215 | init_data->ir_codes = RC_MAP_HAUPPAUGE; |
7ce5c41d | 216 | init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR; |
52b66144 | 217 | init_data->type = RC_TYPE_RC5; |
7ce5c41d AW |
218 | init_data->name = itv->card_name; |
219 | break; | |
e1e2c575 MCC |
220 | case IVTV_HW_I2C_IR_RX_ADAPTEC: |
221 | init_data->get_key = get_key_adaptec; | |
222 | init_data->name = itv->card_name; | |
223 | /* FIXME: The protocol and RC_MAP needs to be corrected */ | |
224 | init_data->ir_codes = RC_MAP_EMPTY; | |
225 | init_data->type = RC_TYPE_UNKNOWN; | |
226 | break; | |
ad2fe2d4 AW |
227 | } |
228 | ||
229 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
230 | info.platform_data = init_data; | |
231 | strlcpy(info.type, type, I2C_NAME_SIZE); | |
232 | ||
9a94241a JD |
233 | return i2c_new_probed_device(adap, &info, addr_list, NULL) == NULL ? |
234 | -1 : 0; | |
ad2fe2d4 AW |
235 | } |
236 | ||
bfbde8ee AW |
237 | /* Instantiate the IR receiver device using probing -- undesirable */ |
238 | struct i2c_client *ivtv_i2c_new_ir_legacy(struct ivtv *itv) | |
239 | { | |
240 | struct i2c_board_info info; | |
241 | /* | |
242 | * The external IR receiver is at i2c address 0x34. | |
243 | * The internal IR receiver is at i2c address 0x30. | |
244 | * | |
245 | * In theory, both can be fitted, and Hauppauge suggests an external | |
246 | * overrides an internal. That's why we probe 0x1a (~0x34) first. CB | |
247 | * | |
248 | * Some of these addresses we probe may collide with other i2c address | |
249 | * allocations, so this function must be called after all other i2c | |
250 | * devices we care about are registered. | |
251 | */ | |
252 | const unsigned short addr_list[] = { | |
253 | 0x1a, /* Hauppauge IR external - collides with WM8739 */ | |
254 | 0x18, /* Hauppauge IR internal */ | |
bfbde8ee AW |
255 | I2C_CLIENT_END |
256 | }; | |
257 | ||
258 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
259 | strlcpy(info.type, "ir_video", I2C_NAME_SIZE); | |
9a94241a | 260 | return i2c_new_probed_device(&itv->i2c_adap, &info, addr_list, NULL); |
bfbde8ee AW |
261 | } |
262 | ||
d9009201 | 263 | int ivtv_i2c_register(struct ivtv *itv, unsigned idx) |
1a0adaf3 | 264 | { |
67ec09fd HV |
265 | struct v4l2_subdev *sd; |
266 | struct i2c_adapter *adap = &itv->i2c_adap; | |
67ec09fd HV |
267 | const char *type = hw_devicenames[idx]; |
268 | u32 hw = 1 << idx; | |
1a0adaf3 | 269 | |
67ec09fd | 270 | if (idx >= ARRAY_SIZE(hw_addrs)) |
d9009201 | 271 | return -1; |
67ec09fd HV |
272 | if (hw == IVTV_HW_TUNER) { |
273 | /* special tuner handling */ | |
9a1f8b34 LP |
274 | sd = v4l2_i2c_new_subdev(&itv->v4l2_dev, adap, type, 0, |
275 | itv->card_i2c->radio); | |
67ec09fd HV |
276 | if (sd) |
277 | sd->grp_id = 1 << idx; | |
9a1f8b34 LP |
278 | sd = v4l2_i2c_new_subdev(&itv->v4l2_dev, adap, type, 0, |
279 | itv->card_i2c->demod); | |
67ec09fd HV |
280 | if (sd) |
281 | sd->grp_id = 1 << idx; | |
9a1f8b34 LP |
282 | sd = v4l2_i2c_new_subdev(&itv->v4l2_dev, adap, type, 0, |
283 | itv->card_i2c->tv); | |
67ec09fd HV |
284 | if (sd) |
285 | sd->grp_id = 1 << idx; | |
286 | return sd ? 0 : -1; | |
1a0adaf3 | 287 | } |
ad2fe2d4 AW |
288 | |
289 | if (hw & IVTV_HW_IR_ANY) | |
290 | return ivtv_i2c_new_ir(itv, hw, type, hw_addrs[idx]); | |
291 | ||
292 | /* Is it not an I2C device or one we do not wish to register? */ | |
67ec09fd HV |
293 | if (!hw_addrs[idx]) |
294 | return -1; | |
ad2fe2d4 AW |
295 | |
296 | /* It's an I2C device other than an analog tuner or IR chip */ | |
67ec09fd | 297 | if (hw == IVTV_HW_UPD64031A || hw == IVTV_HW_UPD6408X) { |
53dacb15 | 298 | sd = v4l2_i2c_new_subdev(&itv->v4l2_dev, |
9a1f8b34 | 299 | adap, type, 0, I2C_ADDRS(hw_addrs[idx])); |
72c851b0 HV |
300 | } else if (hw == IVTV_HW_CX25840) { |
301 | struct cx25840_platform_data pdata; | |
3c7c9370 HV |
302 | struct i2c_board_info cx25840_info = { |
303 | .type = "cx25840", | |
304 | .addr = hw_addrs[idx], | |
305 | .platform_data = &pdata, | |
306 | }; | |
72c851b0 HV |
307 | |
308 | pdata.pvr150_workaround = itv->pvr150_workaround; | |
3c7c9370 HV |
309 | sd = v4l2_i2c_new_subdev_board(&itv->v4l2_dev, adap, |
310 | &cx25840_info, NULL); | |
67ec09fd | 311 | } else { |
e6574f2f | 312 | sd = v4l2_i2c_new_subdev(&itv->v4l2_dev, |
9a1f8b34 | 313 | adap, type, hw_addrs[idx], NULL); |
d9009201 | 314 | } |
67ec09fd HV |
315 | if (sd) |
316 | sd->grp_id = 1 << idx; | |
317 | return sd ? 0 : -1; | |
1a0adaf3 HV |
318 | } |
319 | ||
67ec09fd | 320 | struct v4l2_subdev *ivtv_find_hw(struct ivtv *itv, u32 hw) |
1a0adaf3 | 321 | { |
67ec09fd HV |
322 | struct v4l2_subdev *result = NULL; |
323 | struct v4l2_subdev *sd; | |
1a0adaf3 | 324 | |
8ac05ae3 HV |
325 | spin_lock(&itv->v4l2_dev.lock); |
326 | v4l2_device_for_each_subdev(sd, &itv->v4l2_dev) { | |
67ec09fd HV |
327 | if (sd->grp_id == hw) { |
328 | result = sd; | |
1a0adaf3 HV |
329 | break; |
330 | } | |
331 | } | |
8ac05ae3 | 332 | spin_unlock(&itv->v4l2_dev.lock); |
67ec09fd | 333 | return result; |
1a0adaf3 HV |
334 | } |
335 | ||
336 | /* Set the serial clock line to the desired state */ | |
337 | static void ivtv_setscl(struct ivtv *itv, int state) | |
338 | { | |
339 | /* write them out */ | |
340 | /* write bits are inverted */ | |
341 | write_reg(~state, IVTV_REG_I2C_SETSCL_OFFSET); | |
342 | } | |
343 | ||
344 | /* Set the serial data line to the desired state */ | |
345 | static void ivtv_setsda(struct ivtv *itv, int state) | |
346 | { | |
347 | /* write them out */ | |
348 | /* write bits are inverted */ | |
349 | write_reg(~state & 1, IVTV_REG_I2C_SETSDA_OFFSET); | |
350 | } | |
351 | ||
352 | /* Read the serial clock line */ | |
353 | static int ivtv_getscl(struct ivtv *itv) | |
354 | { | |
355 | return read_reg(IVTV_REG_I2C_GETSCL_OFFSET) & 1; | |
356 | } | |
357 | ||
358 | /* Read the serial data line */ | |
359 | static int ivtv_getsda(struct ivtv *itv) | |
360 | { | |
361 | return read_reg(IVTV_REG_I2C_GETSDA_OFFSET) & 1; | |
362 | } | |
363 | ||
364 | /* Implement a short delay by polling the serial clock line */ | |
365 | static void ivtv_scldelay(struct ivtv *itv) | |
366 | { | |
367 | int i; | |
368 | ||
369 | for (i = 0; i < 5; ++i) | |
370 | ivtv_getscl(itv); | |
371 | } | |
372 | ||
373 | /* Wait for the serial clock line to become set to a specific value */ | |
374 | static int ivtv_waitscl(struct ivtv *itv, int val) | |
375 | { | |
376 | int i; | |
377 | ||
378 | ivtv_scldelay(itv); | |
379 | for (i = 0; i < 1000; ++i) { | |
380 | if (ivtv_getscl(itv) == val) | |
381 | return 1; | |
382 | } | |
383 | return 0; | |
384 | } | |
385 | ||
386 | /* Wait for the serial data line to become set to a specific value */ | |
387 | static int ivtv_waitsda(struct ivtv *itv, int val) | |
388 | { | |
389 | int i; | |
390 | ||
391 | ivtv_scldelay(itv); | |
392 | for (i = 0; i < 1000; ++i) { | |
393 | if (ivtv_getsda(itv) == val) | |
394 | return 1; | |
395 | } | |
396 | return 0; | |
397 | } | |
398 | ||
399 | /* Wait for the slave to issue an ACK */ | |
400 | static int ivtv_ack(struct ivtv *itv) | |
401 | { | |
402 | int ret = 0; | |
403 | ||
404 | if (ivtv_getscl(itv) == 1) { | |
11d28766 | 405 | IVTV_DEBUG_HI_I2C("SCL was high starting an ack\n"); |
1a0adaf3 HV |
406 | ivtv_setscl(itv, 0); |
407 | if (!ivtv_waitscl(itv, 0)) { | |
408 | IVTV_DEBUG_I2C("Could not set SCL low starting an ack\n"); | |
409 | return -EREMOTEIO; | |
410 | } | |
411 | } | |
412 | ivtv_setsda(itv, 1); | |
413 | ivtv_scldelay(itv); | |
414 | ivtv_setscl(itv, 1); | |
415 | if (!ivtv_waitsda(itv, 0)) { | |
416 | IVTV_DEBUG_I2C("Slave did not ack\n"); | |
417 | ret = -EREMOTEIO; | |
418 | } | |
419 | ivtv_setscl(itv, 0); | |
420 | if (!ivtv_waitscl(itv, 0)) { | |
421 | IVTV_DEBUG_I2C("Failed to set SCL low after ACK\n"); | |
422 | ret = -EREMOTEIO; | |
423 | } | |
424 | return ret; | |
425 | } | |
426 | ||
427 | /* Write a single byte to the i2c bus and wait for the slave to ACK */ | |
428 | static int ivtv_sendbyte(struct ivtv *itv, unsigned char byte) | |
429 | { | |
430 | int i, bit; | |
431 | ||
11d28766 | 432 | IVTV_DEBUG_HI_I2C("write %x\n",byte); |
1a0adaf3 HV |
433 | for (i = 0; i < 8; ++i, byte<<=1) { |
434 | ivtv_setscl(itv, 0); | |
435 | if (!ivtv_waitscl(itv, 0)) { | |
436 | IVTV_DEBUG_I2C("Error setting SCL low\n"); | |
437 | return -EREMOTEIO; | |
438 | } | |
439 | bit = (byte>>7)&1; | |
440 | ivtv_setsda(itv, bit); | |
441 | if (!ivtv_waitsda(itv, bit)) { | |
442 | IVTV_DEBUG_I2C("Error setting SDA\n"); | |
443 | return -EREMOTEIO; | |
444 | } | |
445 | ivtv_setscl(itv, 1); | |
446 | if (!ivtv_waitscl(itv, 1)) { | |
447 | IVTV_DEBUG_I2C("Slave not ready for bit\n"); | |
448 | return -EREMOTEIO; | |
449 | } | |
450 | } | |
451 | ivtv_setscl(itv, 0); | |
452 | if (!ivtv_waitscl(itv, 0)) { | |
453 | IVTV_DEBUG_I2C("Error setting SCL low\n"); | |
454 | return -EREMOTEIO; | |
455 | } | |
456 | return ivtv_ack(itv); | |
457 | } | |
458 | ||
459 | /* Read a byte from the i2c bus and send a NACK if applicable (i.e. for the | |
460 | final byte) */ | |
461 | static int ivtv_readbyte(struct ivtv *itv, unsigned char *byte, int nack) | |
462 | { | |
463 | int i; | |
464 | ||
465 | *byte = 0; | |
466 | ||
467 | ivtv_setsda(itv, 1); | |
468 | ivtv_scldelay(itv); | |
469 | for (i = 0; i < 8; ++i) { | |
470 | ivtv_setscl(itv, 0); | |
471 | ivtv_scldelay(itv); | |
472 | ivtv_setscl(itv, 1); | |
473 | if (!ivtv_waitscl(itv, 1)) { | |
474 | IVTV_DEBUG_I2C("Error setting SCL high\n"); | |
475 | return -EREMOTEIO; | |
476 | } | |
477 | *byte = ((*byte)<<1)|ivtv_getsda(itv); | |
478 | } | |
479 | ivtv_setscl(itv, 0); | |
480 | ivtv_scldelay(itv); | |
481 | ivtv_setsda(itv, nack); | |
482 | ivtv_scldelay(itv); | |
483 | ivtv_setscl(itv, 1); | |
484 | ivtv_scldelay(itv); | |
485 | ivtv_setscl(itv, 0); | |
486 | ivtv_scldelay(itv); | |
11d28766 | 487 | IVTV_DEBUG_HI_I2C("read %x\n",*byte); |
1a0adaf3 HV |
488 | return 0; |
489 | } | |
490 | ||
491 | /* Issue a start condition on the i2c bus to alert slaves to prepare for | |
492 | an address write */ | |
493 | static int ivtv_start(struct ivtv *itv) | |
494 | { | |
495 | int sda; | |
496 | ||
497 | sda = ivtv_getsda(itv); | |
498 | if (sda != 1) { | |
11d28766 | 499 | IVTV_DEBUG_HI_I2C("SDA was low at start\n"); |
1a0adaf3 HV |
500 | ivtv_setsda(itv, 1); |
501 | if (!ivtv_waitsda(itv, 1)) { | |
502 | IVTV_DEBUG_I2C("SDA stuck low\n"); | |
503 | return -EREMOTEIO; | |
504 | } | |
505 | } | |
506 | if (ivtv_getscl(itv) != 1) { | |
507 | ivtv_setscl(itv, 1); | |
508 | if (!ivtv_waitscl(itv, 1)) { | |
509 | IVTV_DEBUG_I2C("SCL stuck low at start\n"); | |
510 | return -EREMOTEIO; | |
511 | } | |
512 | } | |
513 | ivtv_setsda(itv, 0); | |
514 | ivtv_scldelay(itv); | |
515 | return 0; | |
516 | } | |
517 | ||
518 | /* Issue a stop condition on the i2c bus to release it */ | |
519 | static int ivtv_stop(struct ivtv *itv) | |
520 | { | |
521 | int i; | |
522 | ||
523 | if (ivtv_getscl(itv) != 0) { | |
11d28766 | 524 | IVTV_DEBUG_HI_I2C("SCL not low when stopping\n"); |
1a0adaf3 HV |
525 | ivtv_setscl(itv, 0); |
526 | if (!ivtv_waitscl(itv, 0)) { | |
527 | IVTV_DEBUG_I2C("SCL could not be set low\n"); | |
528 | } | |
529 | } | |
530 | ivtv_setsda(itv, 0); | |
531 | ivtv_scldelay(itv); | |
532 | ivtv_setscl(itv, 1); | |
533 | if (!ivtv_waitscl(itv, 1)) { | |
534 | IVTV_DEBUG_I2C("SCL could not be set high\n"); | |
535 | return -EREMOTEIO; | |
536 | } | |
537 | ivtv_scldelay(itv); | |
538 | ivtv_setsda(itv, 1); | |
539 | if (!ivtv_waitsda(itv, 1)) { | |
540 | IVTV_DEBUG_I2C("resetting I2C\n"); | |
541 | for (i = 0; i < 16; ++i) { | |
542 | ivtv_setscl(itv, 0); | |
543 | ivtv_scldelay(itv); | |
544 | ivtv_setscl(itv, 1); | |
545 | ivtv_scldelay(itv); | |
546 | ivtv_setsda(itv, 1); | |
547 | } | |
548 | ivtv_waitsda(itv, 1); | |
549 | return -EREMOTEIO; | |
550 | } | |
551 | return 0; | |
552 | } | |
553 | ||
554 | /* Write a message to the given i2c slave. do_stop may be 0 to prevent | |
555 | issuing the i2c stop condition (when following with a read) */ | |
556 | static int ivtv_write(struct ivtv *itv, unsigned char addr, unsigned char *data, u32 len, int do_stop) | |
557 | { | |
558 | int retry, ret = -EREMOTEIO; | |
559 | u32 i; | |
560 | ||
561 | for (retry = 0; ret != 0 && retry < 8; ++retry) { | |
562 | ret = ivtv_start(itv); | |
563 | ||
564 | if (ret == 0) { | |
565 | ret = ivtv_sendbyte(itv, addr<<1); | |
566 | for (i = 0; ret == 0 && i < len; ++i) | |
567 | ret = ivtv_sendbyte(itv, data[i]); | |
568 | } | |
569 | if (ret != 0 || do_stop) { | |
570 | ivtv_stop(itv); | |
571 | } | |
572 | } | |
573 | if (ret) | |
574 | IVTV_DEBUG_I2C("i2c write to %x failed\n", addr); | |
575 | return ret; | |
576 | } | |
577 | ||
578 | /* Read data from the given i2c slave. A stop condition is always issued. */ | |
579 | static int ivtv_read(struct ivtv *itv, unsigned char addr, unsigned char *data, u32 len) | |
580 | { | |
581 | int retry, ret = -EREMOTEIO; | |
582 | u32 i; | |
583 | ||
584 | for (retry = 0; ret != 0 && retry < 8; ++retry) { | |
585 | ret = ivtv_start(itv); | |
586 | if (ret == 0) | |
587 | ret = ivtv_sendbyte(itv, (addr << 1) | 1); | |
588 | for (i = 0; ret == 0 && i < len; ++i) { | |
589 | ret = ivtv_readbyte(itv, &data[i], i == len - 1); | |
590 | } | |
591 | ivtv_stop(itv); | |
592 | } | |
593 | if (ret) | |
594 | IVTV_DEBUG_I2C("i2c read from %x failed\n", addr); | |
595 | return ret; | |
596 | } | |
597 | ||
598 | /* Kernel i2c transfer implementation. Takes a number of messages to be read | |
599 | or written. If a read follows a write, this will occur without an | |
600 | intervening stop condition */ | |
601 | static int ivtv_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) | |
602 | { | |
8ac05ae3 HV |
603 | struct v4l2_device *v4l2_dev = i2c_get_adapdata(i2c_adap); |
604 | struct ivtv *itv = to_ivtv(v4l2_dev); | |
1a0adaf3 HV |
605 | int retval; |
606 | int i; | |
607 | ||
608 | mutex_lock(&itv->i2c_bus_lock); | |
609 | for (i = retval = 0; retval == 0 && i < num; i++) { | |
610 | if (msgs[i].flags & I2C_M_RD) | |
611 | retval = ivtv_read(itv, msgs[i].addr, msgs[i].buf, msgs[i].len); | |
612 | else { | |
613 | /* if followed by a read, don't stop */ | |
614 | int stop = !(i + 1 < num && msgs[i + 1].flags == I2C_M_RD); | |
615 | ||
616 | retval = ivtv_write(itv, msgs[i].addr, msgs[i].buf, msgs[i].len, stop); | |
617 | } | |
618 | } | |
619 | mutex_unlock(&itv->i2c_bus_lock); | |
620 | return retval ? retval : num; | |
621 | } | |
622 | ||
623 | /* Kernel i2c capabilities */ | |
624 | static u32 ivtv_functionality(struct i2c_adapter *adap) | |
625 | { | |
626 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; | |
627 | } | |
628 | ||
629 | static struct i2c_algorithm ivtv_algo = { | |
630 | .master_xfer = ivtv_xfer, | |
631 | .functionality = ivtv_functionality, | |
632 | }; | |
633 | ||
634 | /* template for our-bit banger */ | |
635 | static struct i2c_adapter ivtv_i2c_adap_hw_template = { | |
636 | .name = "ivtv i2c driver", | |
1a0adaf3 HV |
637 | .algo = &ivtv_algo, |
638 | .algo_data = NULL, /* filled from template */ | |
1a0adaf3 | 639 | .owner = THIS_MODULE, |
1a0adaf3 HV |
640 | }; |
641 | ||
642 | static void ivtv_setscl_old(void *data, int state) | |
643 | { | |
644 | struct ivtv *itv = (struct ivtv *)data; | |
645 | ||
646 | if (state) | |
647 | itv->i2c_state |= 0x01; | |
648 | else | |
649 | itv->i2c_state &= ~0x01; | |
650 | ||
651 | /* write them out */ | |
652 | /* write bits are inverted */ | |
653 | write_reg(~itv->i2c_state, IVTV_REG_I2C_SETSCL_OFFSET); | |
654 | } | |
655 | ||
656 | static void ivtv_setsda_old(void *data, int state) | |
657 | { | |
658 | struct ivtv *itv = (struct ivtv *)data; | |
659 | ||
660 | if (state) | |
661 | itv->i2c_state |= 0x01; | |
662 | else | |
663 | itv->i2c_state &= ~0x01; | |
664 | ||
665 | /* write them out */ | |
666 | /* write bits are inverted */ | |
667 | write_reg(~itv->i2c_state, IVTV_REG_I2C_SETSDA_OFFSET); | |
668 | } | |
669 | ||
670 | static int ivtv_getscl_old(void *data) | |
671 | { | |
672 | struct ivtv *itv = (struct ivtv *)data; | |
673 | ||
674 | return read_reg(IVTV_REG_I2C_GETSCL_OFFSET) & 1; | |
675 | } | |
676 | ||
677 | static int ivtv_getsda_old(void *data) | |
678 | { | |
679 | struct ivtv *itv = (struct ivtv *)data; | |
680 | ||
681 | return read_reg(IVTV_REG_I2C_GETSDA_OFFSET) & 1; | |
682 | } | |
683 | ||
684 | /* template for i2c-bit-algo */ | |
685 | static struct i2c_adapter ivtv_i2c_adap_template = { | |
686 | .name = "ivtv i2c driver", | |
1a0adaf3 HV |
687 | .algo = NULL, /* set by i2c-algo-bit */ |
688 | .algo_data = NULL, /* filled from template */ | |
1a0adaf3 | 689 | .owner = THIS_MODULE, |
1a0adaf3 HV |
690 | }; |
691 | ||
f412d36a AW |
692 | #define IVTV_ALGO_BIT_TIMEOUT (2) /* seconds */ |
693 | ||
aeb292d1 JD |
694 | static const struct i2c_algo_bit_data ivtv_i2c_algo_template = { |
695 | .setsda = ivtv_setsda_old, | |
696 | .setscl = ivtv_setscl_old, | |
697 | .getsda = ivtv_getsda_old, | |
698 | .getscl = ivtv_getscl_old, | |
f412d36a AW |
699 | .udelay = IVTV_DEFAULT_I2C_CLOCK_PERIOD / 2, /* microseconds */ |
700 | .timeout = IVTV_ALGO_BIT_TIMEOUT * HZ, /* jiffies */ | |
1a0adaf3 HV |
701 | }; |
702 | ||
703 | static struct i2c_client ivtv_i2c_client_template = { | |
a415783b | 704 | .name = "ivtv internal", |
1a0adaf3 HV |
705 | }; |
706 | ||
bfbde8ee | 707 | /* init + register i2c adapter */ |
056827a4 | 708 | int init_ivtv_i2c(struct ivtv *itv) |
1a0adaf3 | 709 | { |
c668f32d JD |
710 | int retval; |
711 | ||
1a0adaf3 HV |
712 | IVTV_DEBUG_I2C("i2c init\n"); |
713 | ||
d9009201 | 714 | /* Sanity checks for the I2C hardware arrays. They must be the |
ad2fe2d4 | 715 | * same size. |
d9009201 | 716 | */ |
84d0d4f0 | 717 | if (ARRAY_SIZE(hw_devicenames) != ARRAY_SIZE(hw_addrs)) { |
d9009201 HV |
718 | IVTV_ERR("Mismatched I2C hardware arrays\n"); |
719 | return -ENODEV; | |
720 | } | |
1a0adaf3 HV |
721 | if (itv->options.newi2c > 0) { |
722 | memcpy(&itv->i2c_adap, &ivtv_i2c_adap_hw_template, | |
723 | sizeof(struct i2c_adapter)); | |
724 | } else { | |
725 | memcpy(&itv->i2c_adap, &ivtv_i2c_adap_template, | |
726 | sizeof(struct i2c_adapter)); | |
727 | memcpy(&itv->i2c_algo, &ivtv_i2c_algo_template, | |
728 | sizeof(struct i2c_algo_bit_data)); | |
1a0adaf3 | 729 | } |
f412d36a | 730 | itv->i2c_algo.udelay = itv->options.i2c_clock_period / 2; |
0e614cd1 HV |
731 | itv->i2c_algo.data = itv; |
732 | itv->i2c_adap.algo_data = &itv->i2c_algo; | |
1a0adaf3 HV |
733 | |
734 | sprintf(itv->i2c_adap.name + strlen(itv->i2c_adap.name), " #%d", | |
67ec09fd | 735 | itv->instance); |
8ac05ae3 | 736 | i2c_set_adapdata(&itv->i2c_adap, &itv->v4l2_dev); |
1a0adaf3 HV |
737 | |
738 | memcpy(&itv->i2c_client, &ivtv_i2c_client_template, | |
739 | sizeof(struct i2c_client)); | |
740 | itv->i2c_client.adapter = &itv->i2c_adap; | |
8ac05ae3 | 741 | itv->i2c_adap.dev.parent = &itv->pdev->dev; |
1a0adaf3 HV |
742 | |
743 | IVTV_DEBUG_I2C("setting scl and sda to 1\n"); | |
744 | ivtv_setscl(itv, 1); | |
745 | ivtv_setsda(itv, 1); | |
746 | ||
747 | if (itv->options.newi2c > 0) | |
c668f32d | 748 | retval = i2c_add_adapter(&itv->i2c_adap); |
1a0adaf3 | 749 | else |
c668f32d JD |
750 | retval = i2c_bit_add_bus(&itv->i2c_adap); |
751 | ||
c668f32d | 752 | return retval; |
1a0adaf3 HV |
753 | } |
754 | ||
bb374b7b | 755 | void exit_ivtv_i2c(struct ivtv *itv) |
1a0adaf3 HV |
756 | { |
757 | IVTV_DEBUG_I2C("i2c exit\n"); | |
758 | ||
759 | i2c_del_adapter(&itv->i2c_adap); | |
760 | } |