Commit | Line | Data |
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8f37cf25 GL |
1 | /* |
2 | * Driver for RJ54N1CB0C CMOS Image Sensor from Micron | |
3 | * | |
4 | * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/delay.h> | |
12 | #include <linux/i2c.h> | |
13 | #include <linux/slab.h> | |
14 | #include <linux/videodev2.h> | |
15 | ||
a6b5f200 | 16 | #include <media/rj54n1cb0c.h> |
8f37cf25 | 17 | #include <media/soc_camera.h> |
760697be | 18 | #include <media/soc_mediabus.h> |
a6b5f200 GL |
19 | #include <media/v4l2-subdev.h> |
20 | #include <media/v4l2-chip-ident.h> | |
8f37cf25 GL |
21 | |
22 | #define RJ54N1_DEV_CODE 0x0400 | |
23 | #define RJ54N1_DEV_CODE2 0x0401 | |
24 | #define RJ54N1_OUT_SEL 0x0403 | |
25 | #define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404 | |
26 | #define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405 | |
27 | #define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406 | |
28 | #define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407 | |
29 | #define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408 | |
30 | #define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409 | |
31 | #define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a | |
32 | #define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b | |
33 | #define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c | |
34 | #define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d | |
35 | #define RJ54N1_RESIZE_N 0x040e | |
36 | #define RJ54N1_RESIZE_N_STEP 0x040f | |
37 | #define RJ54N1_RESIZE_STEP 0x0410 | |
38 | #define RJ54N1_RESIZE_HOLD_H 0x0411 | |
39 | #define RJ54N1_RESIZE_HOLD_L 0x0412 | |
40 | #define RJ54N1_H_OBEN_OFS 0x0413 | |
41 | #define RJ54N1_V_OBEN_OFS 0x0414 | |
42 | #define RJ54N1_RESIZE_CONTROL 0x0415 | |
a6b5f200 | 43 | #define RJ54N1_STILL_CONTROL 0x0417 |
8f37cf25 GL |
44 | #define RJ54N1_INC_USE_SEL_H 0x0425 |
45 | #define RJ54N1_INC_USE_SEL_L 0x0426 | |
46 | #define RJ54N1_MIRROR_STILL_MODE 0x0427 | |
47 | #define RJ54N1_INIT_START 0x0428 | |
48 | #define RJ54N1_SCALE_1_2_LEV 0x0429 | |
49 | #define RJ54N1_SCALE_4_LEV 0x042a | |
50 | #define RJ54N1_Y_GAIN 0x04d8 | |
51 | #define RJ54N1_APT_GAIN_UP 0x04fa | |
52 | #define RJ54N1_RA_SEL_UL 0x0530 | |
53 | #define RJ54N1_BYTE_SWAP 0x0531 | |
54 | #define RJ54N1_OUT_SIGPO 0x053b | |
a6b5f200 GL |
55 | #define RJ54N1_WB_SEL_WEIGHT_I 0x054e |
56 | #define RJ54N1_BIT8_WB 0x0569 | |
57 | #define RJ54N1_HCAPS_WB 0x056a | |
58 | #define RJ54N1_VCAPS_WB 0x056b | |
59 | #define RJ54N1_HCAPE_WB 0x056c | |
60 | #define RJ54N1_VCAPE_WB 0x056d | |
61 | #define RJ54N1_EXPOSURE_CONTROL 0x058c | |
8f37cf25 GL |
62 | #define RJ54N1_FRAME_LENGTH_S_H 0x0595 |
63 | #define RJ54N1_FRAME_LENGTH_S_L 0x0596 | |
64 | #define RJ54N1_FRAME_LENGTH_P_H 0x0597 | |
65 | #define RJ54N1_FRAME_LENGTH_P_L 0x0598 | |
a6b5f200 GL |
66 | #define RJ54N1_PEAK_H 0x05b7 |
67 | #define RJ54N1_PEAK_50 0x05b8 | |
68 | #define RJ54N1_PEAK_60 0x05b9 | |
69 | #define RJ54N1_PEAK_DIFF 0x05ba | |
8f37cf25 GL |
70 | #define RJ54N1_IOC 0x05ef |
71 | #define RJ54N1_TG_BYPASS 0x0700 | |
72 | #define RJ54N1_PLL_L 0x0701 | |
73 | #define RJ54N1_PLL_N 0x0702 | |
74 | #define RJ54N1_PLL_EN 0x0704 | |
75 | #define RJ54N1_RATIO_TG 0x0706 | |
76 | #define RJ54N1_RATIO_T 0x0707 | |
77 | #define RJ54N1_RATIO_R 0x0708 | |
78 | #define RJ54N1_RAMP_TGCLK_EN 0x0709 | |
79 | #define RJ54N1_OCLK_DSP 0x0710 | |
80 | #define RJ54N1_RATIO_OP 0x0711 | |
81 | #define RJ54N1_RATIO_O 0x0712 | |
82 | #define RJ54N1_OCLK_SEL_EN 0x0713 | |
83 | #define RJ54N1_CLK_RST 0x0717 | |
84 | #define RJ54N1_RESET_STANDBY 0x0718 | |
a6b5f200 | 85 | #define RJ54N1_FWFLG 0x07fe |
8f37cf25 GL |
86 | |
87 | #define E_EXCLK (1 << 7) | |
88 | #define SOFT_STDBY (1 << 4) | |
89 | #define SEN_RSTX (1 << 2) | |
90 | #define TG_RSTX (1 << 1) | |
91 | #define DSP_RSTX (1 << 0) | |
92 | ||
93 | #define RESIZE_HOLD_SEL (1 << 2) | |
94 | #define RESIZE_GO (1 << 1) | |
95 | ||
a6b5f200 GL |
96 | /* |
97 | * When cropping, the camera automatically centers the cropped region, there | |
98 | * doesn't seem to be a way to specify an explicit location of the rectangle. | |
99 | */ | |
8f37cf25 GL |
100 | #define RJ54N1_COLUMN_SKIP 0 |
101 | #define RJ54N1_ROW_SKIP 0 | |
102 | #define RJ54N1_MAX_WIDTH 1600 | |
103 | #define RJ54N1_MAX_HEIGHT 1200 | |
104 | ||
a6b5f200 GL |
105 | #define PLL_L 2 |
106 | #define PLL_N 0x31 | |
107 | ||
8f37cf25 GL |
108 | /* I2C addresses: 0x50, 0x51, 0x60, 0x61 */ |
109 | ||
760697be GL |
110 | /* RJ54N1CB0C has only one fixed colorspace per pixelcode */ |
111 | struct rj54n1_datafmt { | |
112 | enum v4l2_mbus_pixelcode code; | |
113 | enum v4l2_colorspace colorspace; | |
114 | }; | |
115 | ||
116 | /* Find a data format by a pixel code in an array */ | |
117 | static const struct rj54n1_datafmt *rj54n1_find_datafmt( | |
118 | enum v4l2_mbus_pixelcode code, const struct rj54n1_datafmt *fmt, | |
119 | int n) | |
120 | { | |
121 | int i; | |
122 | for (i = 0; i < n; i++) | |
123 | if (fmt[i].code == code) | |
124 | return fmt + i; | |
125 | ||
126 | return NULL; | |
127 | } | |
128 | ||
129 | static const struct rj54n1_datafmt rj54n1_colour_fmts[] = { | |
ace6e979 GL |
130 | {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG}, |
131 | {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG}, | |
760697be GL |
132 | {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, |
133 | {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, | |
134 | {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, | |
135 | {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB}, | |
136 | {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, | |
137 | {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB}, | |
138 | {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB}, | |
8f37cf25 GL |
139 | }; |
140 | ||
141 | struct rj54n1_clock_div { | |
a6b5f200 | 142 | u8 ratio_tg; /* can be 0 or an odd number */ |
8f37cf25 GL |
143 | u8 ratio_t; |
144 | u8 ratio_r; | |
145 | u8 ratio_op; | |
146 | u8 ratio_o; | |
147 | }; | |
148 | ||
149 | struct rj54n1 { | |
150 | struct v4l2_subdev subdev; | |
a6b5f200 | 151 | struct rj54n1_clock_div clk_div; |
760697be | 152 | const struct rj54n1_datafmt *fmt; |
8f37cf25 | 153 | struct v4l2_rect rect; /* Sensor window */ |
a6b5f200 GL |
154 | unsigned int tgclk_mhz; |
155 | bool auto_wb; | |
8f37cf25 GL |
156 | unsigned short width; /* Output window */ |
157 | unsigned short height; | |
158 | unsigned short resize; /* Sensor * 1024 / resize = Output */ | |
8f37cf25 GL |
159 | unsigned short scale; |
160 | u8 bank; | |
161 | }; | |
162 | ||
163 | struct rj54n1_reg_val { | |
164 | u16 reg; | |
165 | u8 val; | |
166 | }; | |
167 | ||
9d68e8de | 168 | static const struct rj54n1_reg_val bank_4[] = { |
8f37cf25 GL |
169 | {0x417, 0}, |
170 | {0x42c, 0}, | |
171 | {0x42d, 0xf0}, | |
172 | {0x42e, 0}, | |
173 | {0x42f, 0x50}, | |
174 | {0x430, 0xf5}, | |
175 | {0x431, 0x16}, | |
176 | {0x432, 0x20}, | |
177 | {0x433, 0}, | |
178 | {0x434, 0xc8}, | |
179 | {0x43c, 8}, | |
180 | {0x43e, 0x90}, | |
181 | {0x445, 0x83}, | |
182 | {0x4ba, 0x58}, | |
183 | {0x4bb, 4}, | |
184 | {0x4bc, 0x20}, | |
185 | {0x4db, 4}, | |
186 | {0x4fe, 2}, | |
187 | }; | |
188 | ||
9d68e8de | 189 | static const struct rj54n1_reg_val bank_5[] = { |
8f37cf25 GL |
190 | {0x514, 0}, |
191 | {0x516, 0}, | |
192 | {0x518, 0}, | |
193 | {0x51a, 0}, | |
194 | {0x51d, 0xff}, | |
195 | {0x56f, 0x28}, | |
196 | {0x575, 0x40}, | |
197 | {0x5bc, 0x48}, | |
198 | {0x5c1, 6}, | |
199 | {0x5e5, 0x11}, | |
200 | {0x5e6, 0x43}, | |
201 | {0x5e7, 0x33}, | |
202 | {0x5e8, 0x21}, | |
203 | {0x5e9, 0x30}, | |
204 | {0x5ea, 0x0}, | |
205 | {0x5eb, 0xa5}, | |
206 | {0x5ec, 0xff}, | |
207 | {0x5fe, 2}, | |
208 | }; | |
209 | ||
9d68e8de | 210 | static const struct rj54n1_reg_val bank_7[] = { |
8f37cf25 GL |
211 | {0x70a, 0}, |
212 | {0x714, 0xff}, | |
213 | {0x715, 0xff}, | |
214 | {0x716, 0x1f}, | |
a6b5f200 | 215 | {0x7FE, 2}, |
8f37cf25 GL |
216 | }; |
217 | ||
9d68e8de | 218 | static const struct rj54n1_reg_val bank_8[] = { |
8f37cf25 GL |
219 | {0x800, 0x00}, |
220 | {0x801, 0x01}, | |
221 | {0x802, 0x61}, | |
222 | {0x805, 0x00}, | |
223 | {0x806, 0x00}, | |
224 | {0x807, 0x00}, | |
225 | {0x808, 0x00}, | |
226 | {0x809, 0x01}, | |
227 | {0x80A, 0x61}, | |
228 | {0x80B, 0x00}, | |
229 | {0x80C, 0x01}, | |
230 | {0x80D, 0x00}, | |
231 | {0x80E, 0x00}, | |
232 | {0x80F, 0x00}, | |
233 | {0x810, 0x00}, | |
234 | {0x811, 0x01}, | |
235 | {0x812, 0x61}, | |
236 | {0x813, 0x00}, | |
237 | {0x814, 0x11}, | |
238 | {0x815, 0x00}, | |
239 | {0x816, 0x41}, | |
240 | {0x817, 0x00}, | |
241 | {0x818, 0x51}, | |
242 | {0x819, 0x01}, | |
243 | {0x81A, 0x1F}, | |
244 | {0x81B, 0x00}, | |
245 | {0x81C, 0x01}, | |
246 | {0x81D, 0x00}, | |
247 | {0x81E, 0x11}, | |
248 | {0x81F, 0x00}, | |
249 | {0x820, 0x41}, | |
250 | {0x821, 0x00}, | |
251 | {0x822, 0x51}, | |
252 | {0x823, 0x00}, | |
253 | {0x824, 0x00}, | |
254 | {0x825, 0x00}, | |
255 | {0x826, 0x47}, | |
256 | {0x827, 0x01}, | |
257 | {0x828, 0x4F}, | |
258 | {0x829, 0x00}, | |
259 | {0x82A, 0x00}, | |
260 | {0x82B, 0x00}, | |
261 | {0x82C, 0x30}, | |
262 | {0x82D, 0x00}, | |
263 | {0x82E, 0x40}, | |
264 | {0x82F, 0x00}, | |
265 | {0x830, 0xB3}, | |
266 | {0x831, 0x00}, | |
267 | {0x832, 0xE3}, | |
268 | {0x833, 0x00}, | |
269 | {0x834, 0x00}, | |
270 | {0x835, 0x00}, | |
271 | {0x836, 0x00}, | |
272 | {0x837, 0x00}, | |
273 | {0x838, 0x00}, | |
274 | {0x839, 0x01}, | |
275 | {0x83A, 0x61}, | |
276 | {0x83B, 0x00}, | |
277 | {0x83C, 0x01}, | |
278 | {0x83D, 0x00}, | |
279 | {0x83E, 0x00}, | |
280 | {0x83F, 0x00}, | |
281 | {0x840, 0x00}, | |
282 | {0x841, 0x01}, | |
283 | {0x842, 0x61}, | |
284 | {0x843, 0x00}, | |
285 | {0x844, 0x1D}, | |
286 | {0x845, 0x00}, | |
287 | {0x846, 0x00}, | |
288 | {0x847, 0x00}, | |
289 | {0x848, 0x00}, | |
290 | {0x849, 0x01}, | |
291 | {0x84A, 0x1F}, | |
292 | {0x84B, 0x00}, | |
293 | {0x84C, 0x05}, | |
294 | {0x84D, 0x00}, | |
295 | {0x84E, 0x19}, | |
296 | {0x84F, 0x01}, | |
297 | {0x850, 0x21}, | |
298 | {0x851, 0x01}, | |
299 | {0x852, 0x5D}, | |
300 | {0x853, 0x00}, | |
301 | {0x854, 0x00}, | |
302 | {0x855, 0x00}, | |
303 | {0x856, 0x19}, | |
304 | {0x857, 0x01}, | |
305 | {0x858, 0x21}, | |
306 | {0x859, 0x00}, | |
307 | {0x85A, 0x00}, | |
308 | {0x85B, 0x00}, | |
309 | {0x85C, 0x00}, | |
310 | {0x85D, 0x00}, | |
311 | {0x85E, 0x00}, | |
312 | {0x85F, 0x00}, | |
313 | {0x860, 0xB3}, | |
314 | {0x861, 0x00}, | |
315 | {0x862, 0xE3}, | |
316 | {0x863, 0x00}, | |
317 | {0x864, 0x00}, | |
318 | {0x865, 0x00}, | |
319 | {0x866, 0x00}, | |
320 | {0x867, 0x00}, | |
321 | {0x868, 0x00}, | |
322 | {0x869, 0xE2}, | |
323 | {0x86A, 0x00}, | |
324 | {0x86B, 0x01}, | |
325 | {0x86C, 0x06}, | |
326 | {0x86D, 0x00}, | |
327 | {0x86E, 0x00}, | |
328 | {0x86F, 0x00}, | |
329 | {0x870, 0x60}, | |
330 | {0x871, 0x8C}, | |
331 | {0x872, 0x10}, | |
332 | {0x873, 0x00}, | |
333 | {0x874, 0xE0}, | |
334 | {0x875, 0x00}, | |
335 | {0x876, 0x27}, | |
336 | {0x877, 0x01}, | |
337 | {0x878, 0x00}, | |
338 | {0x879, 0x00}, | |
339 | {0x87A, 0x00}, | |
340 | {0x87B, 0x03}, | |
341 | {0x87C, 0x00}, | |
342 | {0x87D, 0x00}, | |
343 | {0x87E, 0x00}, | |
344 | {0x87F, 0x00}, | |
345 | {0x880, 0x00}, | |
346 | {0x881, 0x00}, | |
347 | {0x882, 0x00}, | |
348 | {0x883, 0x00}, | |
349 | {0x884, 0x00}, | |
350 | {0x885, 0x00}, | |
351 | {0x886, 0xF8}, | |
352 | {0x887, 0x00}, | |
353 | {0x888, 0x03}, | |
354 | {0x889, 0x00}, | |
355 | {0x88A, 0x64}, | |
356 | {0x88B, 0x00}, | |
357 | {0x88C, 0x03}, | |
358 | {0x88D, 0x00}, | |
359 | {0x88E, 0xB1}, | |
360 | {0x88F, 0x00}, | |
361 | {0x890, 0x03}, | |
362 | {0x891, 0x01}, | |
363 | {0x892, 0x1D}, | |
364 | {0x893, 0x00}, | |
365 | {0x894, 0x03}, | |
366 | {0x895, 0x01}, | |
367 | {0x896, 0x4B}, | |
368 | {0x897, 0x00}, | |
369 | {0x898, 0xE5}, | |
370 | {0x899, 0x00}, | |
371 | {0x89A, 0x01}, | |
372 | {0x89B, 0x00}, | |
373 | {0x89C, 0x01}, | |
374 | {0x89D, 0x04}, | |
375 | {0x89E, 0xC8}, | |
376 | {0x89F, 0x00}, | |
377 | {0x8A0, 0x01}, | |
378 | {0x8A1, 0x01}, | |
379 | {0x8A2, 0x61}, | |
380 | {0x8A3, 0x00}, | |
381 | {0x8A4, 0x01}, | |
382 | {0x8A5, 0x00}, | |
383 | {0x8A6, 0x00}, | |
384 | {0x8A7, 0x00}, | |
385 | {0x8A8, 0x00}, | |
386 | {0x8A9, 0x00}, | |
387 | {0x8AA, 0x7F}, | |
388 | {0x8AB, 0x03}, | |
389 | {0x8AC, 0x00}, | |
390 | {0x8AD, 0x00}, | |
391 | {0x8AE, 0x00}, | |
392 | {0x8AF, 0x00}, | |
393 | {0x8B0, 0x00}, | |
394 | {0x8B1, 0x00}, | |
395 | {0x8B6, 0x00}, | |
396 | {0x8B7, 0x01}, | |
397 | {0x8B8, 0x00}, | |
398 | {0x8B9, 0x00}, | |
399 | {0x8BA, 0x02}, | |
400 | {0x8BB, 0x00}, | |
401 | {0x8BC, 0xFF}, | |
402 | {0x8BD, 0x00}, | |
a6b5f200 | 403 | {0x8FE, 2}, |
8f37cf25 GL |
404 | }; |
405 | ||
9d68e8de | 406 | static const struct rj54n1_reg_val bank_10[] = { |
8f37cf25 GL |
407 | {0x10bf, 0x69} |
408 | }; | |
409 | ||
410 | /* Clock dividers - these are default register values, divider = register + 1 */ | |
9d68e8de | 411 | static const struct rj54n1_clock_div clk_div = { |
8f37cf25 GL |
412 | .ratio_tg = 3 /* default: 5 */, |
413 | .ratio_t = 4 /* default: 1 */, | |
414 | .ratio_r = 4 /* default: 0 */, | |
415 | .ratio_op = 1 /* default: 5 */, | |
416 | .ratio_o = 9 /* default: 0 */, | |
417 | }; | |
418 | ||
419 | static struct rj54n1 *to_rj54n1(const struct i2c_client *client) | |
420 | { | |
421 | return container_of(i2c_get_clientdata(client), struct rj54n1, subdev); | |
422 | } | |
423 | ||
424 | static int reg_read(struct i2c_client *client, const u16 reg) | |
425 | { | |
426 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
427 | int ret; | |
428 | ||
429 | /* set bank */ | |
430 | if (rj54n1->bank != reg >> 8) { | |
431 | dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8); | |
432 | ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8); | |
433 | if (ret < 0) | |
434 | return ret; | |
435 | rj54n1->bank = reg >> 8; | |
436 | } | |
437 | return i2c_smbus_read_byte_data(client, reg & 0xff); | |
438 | } | |
439 | ||
440 | static int reg_write(struct i2c_client *client, const u16 reg, | |
441 | const u8 data) | |
442 | { | |
443 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
444 | int ret; | |
445 | ||
446 | /* set bank */ | |
447 | if (rj54n1->bank != reg >> 8) { | |
448 | dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8); | |
449 | ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8); | |
450 | if (ret < 0) | |
451 | return ret; | |
452 | rj54n1->bank = reg >> 8; | |
453 | } | |
454 | dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data); | |
455 | return i2c_smbus_write_byte_data(client, reg & 0xff, data); | |
456 | } | |
457 | ||
458 | static int reg_set(struct i2c_client *client, const u16 reg, | |
459 | const u8 data, const u8 mask) | |
460 | { | |
461 | int ret; | |
462 | ||
463 | ret = reg_read(client, reg); | |
464 | if (ret < 0) | |
465 | return ret; | |
466 | return reg_write(client, reg, (ret & ~mask) | (data & mask)); | |
467 | } | |
468 | ||
469 | static int reg_write_multiple(struct i2c_client *client, | |
470 | const struct rj54n1_reg_val *rv, const int n) | |
471 | { | |
472 | int i, ret; | |
473 | ||
474 | for (i = 0; i < n; i++) { | |
475 | ret = reg_write(client, rv->reg, rv->val); | |
476 | if (ret < 0) | |
477 | return ret; | |
478 | rv++; | |
479 | } | |
480 | ||
481 | return 0; | |
482 | } | |
483 | ||
3805f201 | 484 | static int rj54n1_enum_fmt(struct v4l2_subdev *sd, unsigned int index, |
760697be GL |
485 | enum v4l2_mbus_pixelcode *code) |
486 | { | |
3805f201 | 487 | if (index >= ARRAY_SIZE(rj54n1_colour_fmts)) |
760697be GL |
488 | return -EINVAL; |
489 | ||
490 | *code = rj54n1_colour_fmts[index].code; | |
491 | return 0; | |
492 | } | |
493 | ||
8f37cf25 GL |
494 | static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable) |
495 | { | |
a6b5f200 GL |
496 | struct i2c_client *client = sd->priv; |
497 | ||
498 | /* Switch between preview and still shot modes */ | |
499 | return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80); | |
8f37cf25 GL |
500 | } |
501 | ||
502 | static int rj54n1_set_bus_param(struct soc_camera_device *icd, | |
503 | unsigned long flags) | |
504 | { | |
505 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | |
506 | struct i2c_client *client = sd->priv; | |
507 | /* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */ | |
508 | ||
509 | if (flags & SOCAM_PCLK_SAMPLE_RISING) | |
510 | return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4); | |
511 | else | |
512 | return reg_write(client, RJ54N1_OUT_SIGPO, 0); | |
513 | } | |
514 | ||
515 | static unsigned long rj54n1_query_bus_param(struct soc_camera_device *icd) | |
516 | { | |
517 | struct soc_camera_link *icl = to_soc_camera_link(icd); | |
518 | const unsigned long flags = | |
519 | SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | | |
520 | SOCAM_MASTER | SOCAM_DATAWIDTH_8 | | |
521 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH | | |
522 | SOCAM_DATA_ACTIVE_HIGH; | |
523 | ||
524 | return soc_camera_apply_sensor_flags(icl, flags); | |
525 | } | |
526 | ||
527 | static int rj54n1_set_rect(struct i2c_client *client, | |
528 | u16 reg_x, u16 reg_y, u16 reg_xy, | |
529 | u32 width, u32 height) | |
530 | { | |
531 | int ret; | |
532 | ||
533 | ret = reg_write(client, reg_xy, | |
534 | ((width >> 4) & 0x70) | | |
535 | ((height >> 8) & 7)); | |
536 | ||
537 | if (!ret) | |
538 | ret = reg_write(client, reg_x, width & 0xff); | |
539 | if (!ret) | |
540 | ret = reg_write(client, reg_y, height & 0xff); | |
541 | ||
542 | return ret; | |
543 | } | |
544 | ||
545 | /* | |
546 | * Some commands, specifically certain initialisation sequences, require | |
547 | * a commit operation. | |
548 | */ | |
549 | static int rj54n1_commit(struct i2c_client *client) | |
550 | { | |
551 | int ret = reg_write(client, RJ54N1_INIT_START, 1); | |
552 | msleep(10); | |
553 | if (!ret) | |
554 | ret = reg_write(client, RJ54N1_INIT_START, 0); | |
555 | return ret; | |
556 | } | |
557 | ||
e26b3144 MN |
558 | static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h, |
559 | s32 *out_w, s32 *out_h); | |
a6b5f200 GL |
560 | |
561 | static int rj54n1_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
562 | { | |
563 | struct i2c_client *client = sd->priv; | |
564 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
565 | struct v4l2_rect *rect = &a->c; | |
e26b3144 | 566 | int dummy = 0, output_w, output_h, |
a6b5f200 GL |
567 | input_w = rect->width, input_h = rect->height; |
568 | int ret; | |
569 | ||
570 | /* arbitrary minimum width and height, edges unimportant */ | |
571 | soc_camera_limit_side(&dummy, &input_w, | |
572 | RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH); | |
573 | ||
574 | soc_camera_limit_side(&dummy, &input_h, | |
575 | RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT); | |
576 | ||
577 | output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize; | |
578 | output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize; | |
579 | ||
e26b3144 | 580 | dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n", |
a6b5f200 GL |
581 | input_w, input_h, rj54n1->resize, output_w, output_h); |
582 | ||
583 | ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h); | |
584 | if (ret < 0) | |
585 | return ret; | |
586 | ||
587 | rj54n1->width = output_w; | |
588 | rj54n1->height = output_h; | |
589 | rj54n1->resize = ret; | |
590 | rj54n1->rect.width = input_w; | |
591 | rj54n1->rect.height = input_h; | |
592 | ||
593 | return 0; | |
594 | } | |
595 | ||
8f37cf25 GL |
596 | static int rj54n1_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) |
597 | { | |
598 | struct i2c_client *client = sd->priv; | |
599 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
600 | ||
601 | a->c = rj54n1->rect; | |
602 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
603 | ||
604 | return 0; | |
605 | } | |
606 | ||
607 | static int rj54n1_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
608 | { | |
609 | a->bounds.left = RJ54N1_COLUMN_SKIP; | |
610 | a->bounds.top = RJ54N1_ROW_SKIP; | |
611 | a->bounds.width = RJ54N1_MAX_WIDTH; | |
612 | a->bounds.height = RJ54N1_MAX_HEIGHT; | |
613 | a->defrect = a->bounds; | |
614 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
615 | a->pixelaspect.numerator = 1; | |
616 | a->pixelaspect.denominator = 1; | |
617 | ||
618 | return 0; | |
619 | } | |
620 | ||
760697be GL |
621 | static int rj54n1_g_fmt(struct v4l2_subdev *sd, |
622 | struct v4l2_mbus_framefmt *mf) | |
8f37cf25 GL |
623 | { |
624 | struct i2c_client *client = sd->priv; | |
625 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
8f37cf25 | 626 | |
760697be GL |
627 | mf->code = rj54n1->fmt->code; |
628 | mf->colorspace = rj54n1->fmt->colorspace; | |
629 | mf->field = V4L2_FIELD_NONE; | |
630 | mf->width = rj54n1->width; | |
631 | mf->height = rj54n1->height; | |
8f37cf25 GL |
632 | |
633 | return 0; | |
634 | } | |
635 | ||
636 | /* | |
637 | * The actual geometry configuration routine. It scales the input window into | |
638 | * the output one, updates the window sizes and returns an error or the resize | |
639 | * coefficient on success. Note: we only use the "Fixed Scaling" on this camera. | |
640 | */ | |
e26b3144 MN |
641 | static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h, |
642 | s32 *out_w, s32 *out_h) | |
8f37cf25 GL |
643 | { |
644 | struct i2c_client *client = sd->priv; | |
a6b5f200 | 645 | struct rj54n1 *rj54n1 = to_rj54n1(client); |
8f37cf25 GL |
646 | unsigned int skip, resize, input_w = *in_w, input_h = *in_h, |
647 | output_w = *out_w, output_h = *out_h; | |
a6b5f200 GL |
648 | u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom; |
649 | unsigned int peak, peak_50, peak_60; | |
8f37cf25 GL |
650 | int ret; |
651 | ||
a6b5f200 GL |
652 | /* |
653 | * We have a problem with crops, where the window is larger than 512x384 | |
654 | * and output window is larger than a half of the input one. In this | |
655 | * case we have to either reduce the input window to equal or below | |
656 | * 512x384 or the output window to equal or below 1/2 of the input. | |
657 | */ | |
658 | if (output_w > max(512U, input_w / 2)) { | |
659 | if (2 * output_w > RJ54N1_MAX_WIDTH) { | |
660 | input_w = RJ54N1_MAX_WIDTH; | |
661 | output_w = RJ54N1_MAX_WIDTH / 2; | |
662 | } else { | |
663 | input_w = output_w * 2; | |
664 | } | |
665 | ||
666 | dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n", | |
667 | input_w, output_w); | |
668 | } | |
669 | ||
670 | if (output_h > max(384U, input_h / 2)) { | |
671 | if (2 * output_h > RJ54N1_MAX_HEIGHT) { | |
672 | input_h = RJ54N1_MAX_HEIGHT; | |
673 | output_h = RJ54N1_MAX_HEIGHT / 2; | |
674 | } else { | |
675 | input_h = output_h * 2; | |
676 | } | |
677 | ||
678 | dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n", | |
679 | input_h, output_h); | |
680 | } | |
681 | ||
682 | /* Idea: use the read mode for snapshots, handle separate geometries */ | |
8f37cf25 GL |
683 | ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L, |
684 | RJ54N1_Y_OUTPUT_SIZE_S_L, | |
685 | RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h); | |
686 | if (!ret) | |
687 | ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L, | |
688 | RJ54N1_Y_OUTPUT_SIZE_P_L, | |
689 | RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h); | |
690 | ||
691 | if (ret < 0) | |
692 | return ret; | |
693 | ||
a6b5f200 | 694 | if (output_w > input_w && output_h > input_h) { |
8f37cf25 GL |
695 | input_w = output_w; |
696 | input_h = output_h; | |
697 | ||
698 | resize = 1024; | |
699 | } else { | |
700 | unsigned int resize_x, resize_y; | |
a6b5f200 GL |
701 | resize_x = (input_w * 1024 + output_w / 2) / output_w; |
702 | resize_y = (input_h * 1024 + output_h / 2) / output_h; | |
703 | ||
704 | /* We want max(resize_x, resize_y), check if it still fits */ | |
705 | if (resize_x > resize_y && | |
706 | (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT) | |
707 | resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) / | |
708 | output_h; | |
709 | else if (resize_y > resize_x && | |
710 | (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH) | |
711 | resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) / | |
712 | output_w; | |
713 | else | |
714 | resize = max(resize_x, resize_y); | |
8f37cf25 GL |
715 | |
716 | /* Prohibited value ranges */ | |
717 | switch (resize) { | |
718 | case 2040 ... 2047: | |
719 | resize = 2039; | |
720 | break; | |
721 | case 4080 ... 4095: | |
722 | resize = 4079; | |
723 | break; | |
724 | case 8160 ... 8191: | |
725 | resize = 8159; | |
726 | break; | |
a6b5f200 | 727 | case 16320 ... 16384: |
8f37cf25 GL |
728 | resize = 16319; |
729 | } | |
8f37cf25 GL |
730 | } |
731 | ||
732 | /* Set scaling */ | |
733 | ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff); | |
734 | if (!ret) | |
735 | ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8); | |
736 | ||
737 | if (ret < 0) | |
738 | return ret; | |
739 | ||
740 | /* | |
741 | * Configure a skipping bitmask. The sensor will select a skipping value | |
a6b5f200 GL |
742 | * among set bits automatically. This is very unclear in the datasheet |
743 | * too. I was told, in this register one enables all skipping values, | |
744 | * that are required for a specific resize, and the camera selects | |
745 | * automatically, which ones to use. But it is unclear how to identify, | |
746 | * which cropping values are needed. Secondly, why don't we just set all | |
747 | * bits and let the camera choose? Would it increase processing time and | |
748 | * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to | |
749 | * improve the image quality or stability for larger frames (see comment | |
750 | * above), but I didn't check the framerate. | |
8f37cf25 | 751 | */ |
e26b3144 | 752 | skip = min(resize / 1024, 15U); |
a6b5f200 | 753 | |
8f37cf25 GL |
754 | inc_sel = 1 << skip; |
755 | ||
756 | if (inc_sel <= 2) | |
757 | inc_sel = 0xc; | |
758 | else if (resize & 1023 && skip < 15) | |
759 | inc_sel |= 1 << (skip + 1); | |
760 | ||
761 | ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc); | |
762 | if (!ret) | |
763 | ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8); | |
764 | ||
a6b5f200 GL |
765 | if (!rj54n1->auto_wb) { |
766 | /* Auto white balance window */ | |
767 | wb_left = output_w / 16; | |
768 | wb_right = (3 * output_w / 4 - 3) / 4; | |
769 | wb_top = output_h / 16; | |
770 | wb_bottom = (3 * output_h / 4 - 3) / 4; | |
771 | wb_bit8 = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) | | |
772 | ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1); | |
773 | ||
774 | if (!ret) | |
775 | ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8); | |
776 | if (!ret) | |
777 | ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left); | |
778 | if (!ret) | |
779 | ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top); | |
780 | if (!ret) | |
781 | ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right); | |
782 | if (!ret) | |
783 | ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom); | |
784 | } | |
785 | ||
786 | /* Antiflicker */ | |
787 | peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz / | |
788 | 10000; | |
789 | peak_50 = peak / 6; | |
790 | peak_60 = peak / 5; | |
791 | ||
792 | if (!ret) | |
793 | ret = reg_write(client, RJ54N1_PEAK_H, | |
794 | ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8)); | |
795 | if (!ret) | |
796 | ret = reg_write(client, RJ54N1_PEAK_50, peak_50); | |
797 | if (!ret) | |
798 | ret = reg_write(client, RJ54N1_PEAK_60, peak_60); | |
799 | if (!ret) | |
800 | ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150); | |
801 | ||
8f37cf25 GL |
802 | /* Start resizing */ |
803 | if (!ret) | |
804 | ret = reg_write(client, RJ54N1_RESIZE_CONTROL, | |
805 | RESIZE_HOLD_SEL | RESIZE_GO | 1); | |
806 | ||
807 | if (ret < 0) | |
808 | return ret; | |
809 | ||
8f37cf25 GL |
810 | /* Constant taken from manufacturer's example */ |
811 | msleep(230); | |
812 | ||
813 | ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1); | |
814 | if (ret < 0) | |
815 | return ret; | |
816 | ||
a6b5f200 GL |
817 | *in_w = (output_w * resize + 512) / 1024; |
818 | *in_h = (output_h * resize + 512) / 1024; | |
8f37cf25 GL |
819 | *out_w = output_w; |
820 | *out_h = output_h; | |
821 | ||
e26b3144 | 822 | dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n", |
a6b5f200 GL |
823 | *in_w, *in_h, resize, output_w, output_h, skip); |
824 | ||
8f37cf25 GL |
825 | return resize; |
826 | } | |
827 | ||
828 | static int rj54n1_set_clock(struct i2c_client *client) | |
829 | { | |
830 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
831 | int ret; | |
832 | ||
833 | /* Enable external clock */ | |
834 | ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY); | |
a6b5f200 | 835 | /* Leave stand-by. Note: use this when implementing suspend / resume */ |
8f37cf25 GL |
836 | if (!ret) |
837 | ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK); | |
838 | ||
839 | if (!ret) | |
a6b5f200 | 840 | ret = reg_write(client, RJ54N1_PLL_L, PLL_L); |
8f37cf25 | 841 | if (!ret) |
a6b5f200 | 842 | ret = reg_write(client, RJ54N1_PLL_N, PLL_N); |
8f37cf25 GL |
843 | |
844 | /* TGCLK dividers */ | |
845 | if (!ret) | |
846 | ret = reg_write(client, RJ54N1_RATIO_TG, | |
847 | rj54n1->clk_div.ratio_tg); | |
848 | if (!ret) | |
849 | ret = reg_write(client, RJ54N1_RATIO_T, | |
850 | rj54n1->clk_div.ratio_t); | |
851 | if (!ret) | |
852 | ret = reg_write(client, RJ54N1_RATIO_R, | |
853 | rj54n1->clk_div.ratio_r); | |
854 | ||
855 | /* Enable TGCLK & RAMP */ | |
856 | if (!ret) | |
857 | ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3); | |
858 | ||
859 | /* Disable clock output */ | |
860 | if (!ret) | |
861 | ret = reg_write(client, RJ54N1_OCLK_DSP, 0); | |
862 | ||
863 | /* Set divisors */ | |
864 | if (!ret) | |
865 | ret = reg_write(client, RJ54N1_RATIO_OP, | |
866 | rj54n1->clk_div.ratio_op); | |
867 | if (!ret) | |
868 | ret = reg_write(client, RJ54N1_RATIO_O, | |
869 | rj54n1->clk_div.ratio_o); | |
870 | ||
871 | /* Enable OCLK */ | |
872 | if (!ret) | |
873 | ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1); | |
874 | ||
875 | /* Use PLL for Timing Generator, write 2 to reserved bits */ | |
876 | if (!ret) | |
877 | ret = reg_write(client, RJ54N1_TG_BYPASS, 2); | |
878 | ||
879 | /* Take sensor out of reset */ | |
880 | if (!ret) | |
881 | ret = reg_write(client, RJ54N1_RESET_STANDBY, | |
882 | E_EXCLK | SEN_RSTX); | |
883 | /* Enable PLL */ | |
884 | if (!ret) | |
885 | ret = reg_write(client, RJ54N1_PLL_EN, 1); | |
886 | ||
887 | /* Wait for PLL to stabilise */ | |
888 | msleep(10); | |
889 | ||
890 | /* Enable clock to frequency divider */ | |
891 | if (!ret) | |
892 | ret = reg_write(client, RJ54N1_CLK_RST, 1); | |
893 | ||
894 | if (!ret) | |
895 | ret = reg_read(client, RJ54N1_CLK_RST); | |
896 | if (ret != 1) { | |
897 | dev_err(&client->dev, | |
898 | "Resetting RJ54N1CB0C clock failed: %d!\n", ret); | |
899 | return -EIO; | |
900 | } | |
a6b5f200 | 901 | |
8f37cf25 GL |
902 | /* Start the PLL */ |
903 | ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1); | |
904 | ||
905 | /* Enable OCLK */ | |
906 | if (!ret) | |
907 | ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1); | |
908 | ||
909 | return ret; | |
910 | } | |
911 | ||
912 | static int rj54n1_reg_init(struct i2c_client *client) | |
913 | { | |
a6b5f200 | 914 | struct rj54n1 *rj54n1 = to_rj54n1(client); |
8f37cf25 GL |
915 | int ret = rj54n1_set_clock(client); |
916 | ||
917 | if (!ret) | |
918 | ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7)); | |
919 | if (!ret) | |
920 | ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10)); | |
921 | ||
922 | /* Set binning divisors */ | |
923 | if (!ret) | |
924 | ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4)); | |
925 | if (!ret) | |
926 | ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf); | |
927 | ||
928 | /* Switch to fixed resize mode */ | |
929 | if (!ret) | |
930 | ret = reg_write(client, RJ54N1_RESIZE_CONTROL, | |
931 | RESIZE_HOLD_SEL | 1); | |
932 | ||
933 | /* Set gain */ | |
934 | if (!ret) | |
935 | ret = reg_write(client, RJ54N1_Y_GAIN, 0x84); | |
936 | ||
a6b5f200 GL |
937 | /* |
938 | * Mirror the image back: default is upside down and left-to-right... | |
939 | * Set manual preview / still shot switching | |
940 | */ | |
8f37cf25 | 941 | if (!ret) |
a6b5f200 | 942 | ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27); |
8f37cf25 GL |
943 | |
944 | if (!ret) | |
945 | ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4)); | |
a6b5f200 GL |
946 | |
947 | /* Auto exposure area */ | |
948 | if (!ret) | |
949 | ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80); | |
950 | /* Check current auto WB config */ | |
8f37cf25 | 951 | if (!ret) |
a6b5f200 GL |
952 | ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I); |
953 | if (ret >= 0) { | |
954 | rj54n1->auto_wb = ret & 0x80; | |
8f37cf25 | 955 | ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5)); |
a6b5f200 | 956 | } |
8f37cf25 GL |
957 | if (!ret) |
958 | ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8)); | |
959 | ||
960 | if (!ret) | |
961 | ret = reg_write(client, RJ54N1_RESET_STANDBY, | |
962 | E_EXCLK | DSP_RSTX | SEN_RSTX); | |
963 | ||
964 | /* Commit init */ | |
965 | if (!ret) | |
966 | ret = rj54n1_commit(client); | |
967 | ||
968 | /* Take DSP, TG, sensor out of reset */ | |
969 | if (!ret) | |
970 | ret = reg_write(client, RJ54N1_RESET_STANDBY, | |
971 | E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX); | |
972 | ||
a6b5f200 | 973 | /* Start register update? Same register as 0x?FE in many bank_* sets */ |
8f37cf25 | 974 | if (!ret) |
a6b5f200 | 975 | ret = reg_write(client, RJ54N1_FWFLG, 2); |
8f37cf25 GL |
976 | |
977 | /* Constant taken from manufacturer's example */ | |
978 | msleep(700); | |
979 | ||
980 | return ret; | |
981 | } | |
982 | ||
760697be GL |
983 | static int rj54n1_try_fmt(struct v4l2_subdev *sd, |
984 | struct v4l2_mbus_framefmt *mf) | |
8f37cf25 | 985 | { |
760697be GL |
986 | struct i2c_client *client = sd->priv; |
987 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
988 | const struct rj54n1_datafmt *fmt; | |
989 | int align = mf->code == V4L2_MBUS_FMT_SBGGR10_1X10 || | |
990 | mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE || | |
991 | mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE || | |
992 | mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE || | |
993 | mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE; | |
994 | ||
995 | dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n", | |
996 | __func__, mf->code, mf->width, mf->height); | |
997 | ||
998 | fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts, | |
999 | ARRAY_SIZE(rj54n1_colour_fmts)); | |
1000 | if (!fmt) { | |
1001 | fmt = rj54n1->fmt; | |
1002 | mf->code = fmt->code; | |
1003 | } | |
8f37cf25 | 1004 | |
760697be GL |
1005 | mf->field = V4L2_FIELD_NONE; |
1006 | mf->colorspace = fmt->colorspace; | |
8f37cf25 | 1007 | |
760697be GL |
1008 | v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align, |
1009 | &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0); | |
8f37cf25 GL |
1010 | |
1011 | return 0; | |
1012 | } | |
1013 | ||
760697be GL |
1014 | static int rj54n1_s_fmt(struct v4l2_subdev *sd, |
1015 | struct v4l2_mbus_framefmt *mf) | |
8f37cf25 GL |
1016 | { |
1017 | struct i2c_client *client = sd->priv; | |
1018 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
760697be | 1019 | const struct rj54n1_datafmt *fmt; |
e26b3144 | 1020 | int output_w, output_h, max_w, max_h, |
8f37cf25 GL |
1021 | input_w = rj54n1->rect.width, input_h = rj54n1->rect.height; |
1022 | int ret; | |
1023 | ||
1024 | /* | |
1025 | * The host driver can call us without .try_fmt(), so, we have to take | |
1026 | * care ourseleves | |
1027 | */ | |
a6b5f200 | 1028 | rj54n1_try_fmt(sd, mf); |
8f37cf25 GL |
1029 | |
1030 | /* | |
1031 | * Verify if the sensor has just been powered on. TODO: replace this | |
1032 | * with proper PM, when a suitable API is available. | |
1033 | */ | |
a6b5f200 | 1034 | ret = reg_read(client, RJ54N1_RESET_STANDBY); |
8f37cf25 GL |
1035 | if (ret < 0) |
1036 | return ret; | |
1037 | ||
1038 | if (!(ret & E_EXCLK)) { | |
1039 | ret = rj54n1_reg_init(client); | |
1040 | if (ret < 0) | |
1041 | return ret; | |
1042 | } | |
1043 | ||
a6b5f200 GL |
1044 | dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n", |
1045 | __func__, mf->code, mf->width, mf->height); | |
1046 | ||
8f37cf25 | 1047 | /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */ |
760697be | 1048 | switch (mf->code) { |
ace6e979 | 1049 | case V4L2_MBUS_FMT_YUYV8_2X8: |
8f37cf25 GL |
1050 | ret = reg_write(client, RJ54N1_OUT_SEL, 0); |
1051 | if (!ret) | |
1052 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | |
1053 | break; | |
ace6e979 | 1054 | case V4L2_MBUS_FMT_YVYU8_2X8: |
760697be GL |
1055 | ret = reg_write(client, RJ54N1_OUT_SEL, 0); |
1056 | if (!ret) | |
1057 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | |
1058 | break; | |
1059 | case V4L2_MBUS_FMT_RGB565_2X8_LE: | |
8f37cf25 GL |
1060 | ret = reg_write(client, RJ54N1_OUT_SEL, 0x11); |
1061 | if (!ret) | |
1062 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | |
1063 | break; | |
760697be GL |
1064 | case V4L2_MBUS_FMT_RGB565_2X8_BE: |
1065 | ret = reg_write(client, RJ54N1_OUT_SEL, 0x11); | |
1066 | if (!ret) | |
1067 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | |
1068 | break; | |
1069 | case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE: | |
1070 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | |
1071 | if (!ret) | |
1072 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | |
1073 | if (!ret) | |
1074 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 0); | |
1075 | break; | |
1076 | case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE: | |
1077 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | |
1078 | if (!ret) | |
1079 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | |
1080 | if (!ret) | |
1081 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 8); | |
1082 | break; | |
1083 | case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE: | |
1084 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | |
1085 | if (!ret) | |
1086 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | |
1087 | if (!ret) | |
1088 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 0); | |
1089 | break; | |
1090 | case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE: | |
1091 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | |
1092 | if (!ret) | |
1093 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | |
1094 | if (!ret) | |
1095 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 8); | |
1096 | break; | |
1097 | case V4L2_MBUS_FMT_SBGGR10_1X10: | |
1098 | ret = reg_write(client, RJ54N1_OUT_SEL, 5); | |
1099 | break; | |
8f37cf25 GL |
1100 | default: |
1101 | ret = -EINVAL; | |
1102 | } | |
1103 | ||
760697be GL |
1104 | /* Special case: a raw mode with 10 bits of data per clock tick */ |
1105 | if (!ret) | |
1106 | ret = reg_set(client, RJ54N1_OCLK_SEL_EN, | |
1107 | (mf->code == V4L2_MBUS_FMT_SBGGR10_1X10) << 1, 2); | |
1108 | ||
8f37cf25 GL |
1109 | if (ret < 0) |
1110 | return ret; | |
1111 | ||
760697be GL |
1112 | /* Supported scales 1:1 >= scale > 1:16 */ |
1113 | max_w = mf->width * (16 * 1024 - 1) / 1024; | |
1114 | if (input_w > max_w) | |
1115 | input_w = max_w; | |
1116 | max_h = mf->height * (16 * 1024 - 1) / 1024; | |
1117 | if (input_h > max_h) | |
1118 | input_h = max_h; | |
8f37cf25 | 1119 | |
760697be GL |
1120 | output_w = mf->width; |
1121 | output_h = mf->height; | |
8f37cf25 GL |
1122 | |
1123 | ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h); | |
1124 | if (ret < 0) | |
1125 | return ret; | |
1126 | ||
760697be GL |
1127 | fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts, |
1128 | ARRAY_SIZE(rj54n1_colour_fmts)); | |
1129 | ||
1130 | rj54n1->fmt = fmt; | |
8f37cf25 GL |
1131 | rj54n1->resize = ret; |
1132 | rj54n1->rect.width = input_w; | |
1133 | rj54n1->rect.height = input_h; | |
1134 | rj54n1->width = output_w; | |
1135 | rj54n1->height = output_h; | |
1136 | ||
760697be GL |
1137 | mf->width = output_w; |
1138 | mf->height = output_h; | |
1139 | mf->field = V4L2_FIELD_NONE; | |
1140 | mf->colorspace = fmt->colorspace; | |
8f37cf25 | 1141 | |
760697be | 1142 | return 0; |
8f37cf25 GL |
1143 | } |
1144 | ||
1145 | static int rj54n1_g_chip_ident(struct v4l2_subdev *sd, | |
1146 | struct v4l2_dbg_chip_ident *id) | |
1147 | { | |
1148 | struct i2c_client *client = sd->priv; | |
1149 | ||
1150 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) | |
1151 | return -EINVAL; | |
1152 | ||
1153 | if (id->match.addr != client->addr) | |
1154 | return -ENODEV; | |
1155 | ||
1156 | id->ident = V4L2_IDENT_RJ54N1CB0C; | |
1157 | id->revision = 0; | |
1158 | ||
1159 | return 0; | |
1160 | } | |
1161 | ||
1162 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1163 | static int rj54n1_g_register(struct v4l2_subdev *sd, | |
1164 | struct v4l2_dbg_register *reg) | |
1165 | { | |
1166 | struct i2c_client *client = sd->priv; | |
1167 | ||
1168 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || | |
1169 | reg->reg < 0x400 || reg->reg > 0x1fff) | |
1170 | /* Registers > 0x0800 are only available from Sharp support */ | |
1171 | return -EINVAL; | |
1172 | ||
1173 | if (reg->match.addr != client->addr) | |
1174 | return -ENODEV; | |
1175 | ||
1176 | reg->size = 1; | |
1177 | reg->val = reg_read(client, reg->reg); | |
1178 | ||
1179 | if (reg->val > 0xff) | |
1180 | return -EIO; | |
1181 | ||
1182 | return 0; | |
1183 | } | |
1184 | ||
1185 | static int rj54n1_s_register(struct v4l2_subdev *sd, | |
1186 | struct v4l2_dbg_register *reg) | |
1187 | { | |
1188 | struct i2c_client *client = sd->priv; | |
1189 | ||
1190 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || | |
1191 | reg->reg < 0x400 || reg->reg > 0x1fff) | |
1192 | /* Registers >= 0x0800 are only available from Sharp support */ | |
1193 | return -EINVAL; | |
1194 | ||
1195 | if (reg->match.addr != client->addr) | |
1196 | return -ENODEV; | |
1197 | ||
1198 | if (reg_write(client, reg->reg, reg->val) < 0) | |
1199 | return -EIO; | |
1200 | ||
1201 | return 0; | |
1202 | } | |
1203 | #endif | |
1204 | ||
1205 | static const struct v4l2_queryctrl rj54n1_controls[] = { | |
1206 | { | |
1207 | .id = V4L2_CID_VFLIP, | |
1208 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
1209 | .name = "Flip Vertically", | |
1210 | .minimum = 0, | |
1211 | .maximum = 1, | |
1212 | .step = 1, | |
1213 | .default_value = 0, | |
1214 | }, { | |
1215 | .id = V4L2_CID_HFLIP, | |
1216 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
1217 | .name = "Flip Horizontally", | |
1218 | .minimum = 0, | |
1219 | .maximum = 1, | |
1220 | .step = 1, | |
1221 | .default_value = 0, | |
1222 | }, { | |
1223 | .id = V4L2_CID_GAIN, | |
1224 | .type = V4L2_CTRL_TYPE_INTEGER, | |
1225 | .name = "Gain", | |
1226 | .minimum = 0, | |
1227 | .maximum = 127, | |
1228 | .step = 1, | |
1229 | .default_value = 66, | |
1230 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
a6b5f200 GL |
1231 | }, { |
1232 | .id = V4L2_CID_AUTO_WHITE_BALANCE, | |
1233 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
1234 | .name = "Auto white balance", | |
1235 | .minimum = 0, | |
1236 | .maximum = 1, | |
1237 | .step = 1, | |
1238 | .default_value = 1, | |
8f37cf25 GL |
1239 | }, |
1240 | }; | |
1241 | ||
1242 | static struct soc_camera_ops rj54n1_ops = { | |
1243 | .set_bus_param = rj54n1_set_bus_param, | |
1244 | .query_bus_param = rj54n1_query_bus_param, | |
1245 | .controls = rj54n1_controls, | |
1246 | .num_controls = ARRAY_SIZE(rj54n1_controls), | |
1247 | }; | |
1248 | ||
1249 | static int rj54n1_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |
1250 | { | |
1251 | struct i2c_client *client = sd->priv; | |
a6b5f200 | 1252 | struct rj54n1 *rj54n1 = to_rj54n1(client); |
8f37cf25 GL |
1253 | int data; |
1254 | ||
1255 | switch (ctrl->id) { | |
1256 | case V4L2_CID_VFLIP: | |
1257 | data = reg_read(client, RJ54N1_MIRROR_STILL_MODE); | |
1258 | if (data < 0) | |
1259 | return -EIO; | |
1260 | ctrl->value = !(data & 1); | |
1261 | break; | |
1262 | case V4L2_CID_HFLIP: | |
1263 | data = reg_read(client, RJ54N1_MIRROR_STILL_MODE); | |
1264 | if (data < 0) | |
1265 | return -EIO; | |
1266 | ctrl->value = !(data & 2); | |
1267 | break; | |
1268 | case V4L2_CID_GAIN: | |
1269 | data = reg_read(client, RJ54N1_Y_GAIN); | |
1270 | if (data < 0) | |
1271 | return -EIO; | |
1272 | ||
1273 | ctrl->value = data / 2; | |
1274 | break; | |
a6b5f200 GL |
1275 | case V4L2_CID_AUTO_WHITE_BALANCE: |
1276 | ctrl->value = rj54n1->auto_wb; | |
1277 | break; | |
8f37cf25 GL |
1278 | } |
1279 | ||
1280 | return 0; | |
1281 | } | |
1282 | ||
1283 | static int rj54n1_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |
1284 | { | |
1285 | int data; | |
1286 | struct i2c_client *client = sd->priv; | |
a6b5f200 | 1287 | struct rj54n1 *rj54n1 = to_rj54n1(client); |
8f37cf25 GL |
1288 | const struct v4l2_queryctrl *qctrl; |
1289 | ||
1290 | qctrl = soc_camera_find_qctrl(&rj54n1_ops, ctrl->id); | |
1291 | if (!qctrl) | |
1292 | return -EINVAL; | |
1293 | ||
1294 | switch (ctrl->id) { | |
1295 | case V4L2_CID_VFLIP: | |
1296 | if (ctrl->value) | |
1297 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1); | |
1298 | else | |
1299 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1); | |
1300 | if (data < 0) | |
1301 | return -EIO; | |
1302 | break; | |
1303 | case V4L2_CID_HFLIP: | |
1304 | if (ctrl->value) | |
1305 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2); | |
1306 | else | |
1307 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2); | |
1308 | if (data < 0) | |
1309 | return -EIO; | |
1310 | break; | |
1311 | case V4L2_CID_GAIN: | |
1312 | if (ctrl->value > qctrl->maximum || | |
1313 | ctrl->value < qctrl->minimum) | |
1314 | return -EINVAL; | |
1315 | else if (reg_write(client, RJ54N1_Y_GAIN, ctrl->value * 2) < 0) | |
1316 | return -EIO; | |
1317 | break; | |
a6b5f200 GL |
1318 | case V4L2_CID_AUTO_WHITE_BALANCE: |
1319 | /* Auto WB area - whole image */ | |
1320 | if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->value << 7, | |
1321 | 0x80) < 0) | |
1322 | return -EIO; | |
1323 | rj54n1->auto_wb = ctrl->value; | |
1324 | break; | |
8f37cf25 GL |
1325 | } |
1326 | ||
1327 | return 0; | |
1328 | } | |
1329 | ||
1330 | static struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = { | |
1331 | .g_ctrl = rj54n1_g_ctrl, | |
1332 | .s_ctrl = rj54n1_s_ctrl, | |
1333 | .g_chip_ident = rj54n1_g_chip_ident, | |
1334 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1335 | .g_register = rj54n1_g_register, | |
1336 | .s_register = rj54n1_s_register, | |
1337 | #endif | |
1338 | }; | |
1339 | ||
1340 | static struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = { | |
1341 | .s_stream = rj54n1_s_stream, | |
760697be GL |
1342 | .s_mbus_fmt = rj54n1_s_fmt, |
1343 | .g_mbus_fmt = rj54n1_g_fmt, | |
1344 | .try_mbus_fmt = rj54n1_try_fmt, | |
1345 | .enum_mbus_fmt = rj54n1_enum_fmt, | |
8f37cf25 | 1346 | .g_crop = rj54n1_g_crop, |
a6b5f200 | 1347 | .s_crop = rj54n1_s_crop, |
8f37cf25 GL |
1348 | .cropcap = rj54n1_cropcap, |
1349 | }; | |
1350 | ||
1351 | static struct v4l2_subdev_ops rj54n1_subdev_ops = { | |
1352 | .core = &rj54n1_subdev_core_ops, | |
1353 | .video = &rj54n1_subdev_video_ops, | |
1354 | }; | |
1355 | ||
8f37cf25 GL |
1356 | /* |
1357 | * Interface active, can use i2c. If it fails, it can indeed mean, that | |
1358 | * this wasn't our capture interface, so, we wait for the right one | |
1359 | */ | |
1360 | static int rj54n1_video_probe(struct soc_camera_device *icd, | |
a6b5f200 GL |
1361 | struct i2c_client *client, |
1362 | struct rj54n1_pdata *priv) | |
8f37cf25 GL |
1363 | { |
1364 | int data1, data2; | |
1365 | int ret; | |
1366 | ||
1367 | /* This could be a BUG_ON() or a WARN_ON(), or remove it completely */ | |
1368 | if (!icd->dev.parent || | |
1369 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | |
1370 | return -ENODEV; | |
1371 | ||
1372 | /* Read out the chip version register */ | |
1373 | data1 = reg_read(client, RJ54N1_DEV_CODE); | |
1374 | data2 = reg_read(client, RJ54N1_DEV_CODE2); | |
1375 | ||
1376 | if (data1 != 0x51 || data2 != 0x10) { | |
1377 | ret = -ENODEV; | |
1378 | dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n", | |
1379 | data1, data2); | |
1380 | goto ei2c; | |
1381 | } | |
1382 | ||
a6b5f200 GL |
1383 | /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */ |
1384 | ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7); | |
8f37cf25 GL |
1385 | if (ret < 0) |
1386 | goto ei2c; | |
1387 | ||
1388 | dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n", | |
1389 | data1, data2); | |
1390 | ||
1391 | ei2c: | |
1392 | return ret; | |
1393 | } | |
1394 | ||
1395 | static int rj54n1_probe(struct i2c_client *client, | |
1396 | const struct i2c_device_id *did) | |
1397 | { | |
1398 | struct rj54n1 *rj54n1; | |
1399 | struct soc_camera_device *icd = client->dev.platform_data; | |
1400 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | |
1401 | struct soc_camera_link *icl; | |
a6b5f200 | 1402 | struct rj54n1_pdata *rj54n1_priv; |
8f37cf25 GL |
1403 | int ret; |
1404 | ||
1405 | if (!icd) { | |
1406 | dev_err(&client->dev, "RJ54N1CB0C: missing soc-camera data!\n"); | |
1407 | return -EINVAL; | |
1408 | } | |
1409 | ||
1410 | icl = to_soc_camera_link(icd); | |
a6b5f200 | 1411 | if (!icl || !icl->priv) { |
8f37cf25 GL |
1412 | dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n"); |
1413 | return -EINVAL; | |
1414 | } | |
1415 | ||
a6b5f200 GL |
1416 | rj54n1_priv = icl->priv; |
1417 | ||
8f37cf25 GL |
1418 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { |
1419 | dev_warn(&adapter->dev, | |
1420 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n"); | |
1421 | return -EIO; | |
1422 | } | |
1423 | ||
1424 | rj54n1 = kzalloc(sizeof(struct rj54n1), GFP_KERNEL); | |
1425 | if (!rj54n1) | |
1426 | return -ENOMEM; | |
1427 | ||
1428 | v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops); | |
1429 | ||
1430 | icd->ops = &rj54n1_ops; | |
1431 | ||
1432 | rj54n1->clk_div = clk_div; | |
1433 | rj54n1->rect.left = RJ54N1_COLUMN_SKIP; | |
1434 | rj54n1->rect.top = RJ54N1_ROW_SKIP; | |
1435 | rj54n1->rect.width = RJ54N1_MAX_WIDTH; | |
1436 | rj54n1->rect.height = RJ54N1_MAX_HEIGHT; | |
1437 | rj54n1->width = RJ54N1_MAX_WIDTH; | |
1438 | rj54n1->height = RJ54N1_MAX_HEIGHT; | |
760697be | 1439 | rj54n1->fmt = &rj54n1_colour_fmts[0]; |
8f37cf25 | 1440 | rj54n1->resize = 1024; |
a6b5f200 GL |
1441 | rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) / |
1442 | (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1); | |
8f37cf25 | 1443 | |
a6b5f200 | 1444 | ret = rj54n1_video_probe(icd, client, rj54n1_priv); |
8f37cf25 GL |
1445 | if (ret < 0) { |
1446 | icd->ops = NULL; | |
8f37cf25 GL |
1447 | kfree(rj54n1); |
1448 | return ret; | |
1449 | } | |
1450 | ||
8f37cf25 GL |
1451 | return ret; |
1452 | } | |
1453 | ||
1454 | static int rj54n1_remove(struct i2c_client *client) | |
1455 | { | |
1456 | struct rj54n1 *rj54n1 = to_rj54n1(client); | |
1457 | struct soc_camera_device *icd = client->dev.platform_data; | |
1458 | struct soc_camera_link *icl = to_soc_camera_link(icd); | |
1459 | ||
1460 | icd->ops = NULL; | |
1461 | if (icl->free_bus) | |
1462 | icl->free_bus(icl); | |
8f37cf25 GL |
1463 | client->driver = NULL; |
1464 | kfree(rj54n1); | |
1465 | ||
1466 | return 0; | |
1467 | } | |
1468 | ||
1469 | static const struct i2c_device_id rj54n1_id[] = { | |
1470 | { "rj54n1cb0c", 0 }, | |
1471 | { } | |
1472 | }; | |
1473 | MODULE_DEVICE_TABLE(i2c, rj54n1_id); | |
1474 | ||
1475 | static struct i2c_driver rj54n1_i2c_driver = { | |
1476 | .driver = { | |
1477 | .name = "rj54n1cb0c", | |
1478 | }, | |
1479 | .probe = rj54n1_probe, | |
1480 | .remove = rj54n1_remove, | |
1481 | .id_table = rj54n1_id, | |
1482 | }; | |
1483 | ||
1484 | static int __init rj54n1_mod_init(void) | |
1485 | { | |
1486 | return i2c_add_driver(&rj54n1_i2c_driver); | |
1487 | } | |
1488 | ||
1489 | static void __exit rj54n1_mod_exit(void) | |
1490 | { | |
1491 | i2c_del_driver(&rj54n1_i2c_driver); | |
1492 | } | |
1493 | ||
1494 | module_init(rj54n1_mod_init); | |
1495 | module_exit(rj54n1_mod_exit); | |
1496 | ||
1497 | MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver"); | |
1498 | MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); | |
1499 | MODULE_LICENSE("GPL v2"); |