V4L/DVB (7237): Convert videobuf-dma-sg to generic DMA API
[deliverable/linux.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
1da177e4 36
1f10c7af
AQ
37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
1da177e4 41
e2ac28fa
IL
42#include "tda10086.h"
43#include "tda826x.h"
8ce47dad 44#include "tda827x.h"
e2ac28fa 45#include "isl6421.h"
4b1431ca 46#include "isl6405.h"
6ab465a8 47#include "lnbp21.h"
8ce47dad 48
1da177e4
LT
49MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
50MODULE_LICENSE("GPL");
51
ff699e6b 52static unsigned int antenna_pwr;
86ddd96f 53
1da177e4
LT
54module_param(antenna_pwr, int, 0444);
55MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
56
ff699e6b 57static int use_frontend;
b331daa0
SB
58module_param(use_frontend, int, 0644);
59MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 60
ff699e6b 61static int debug;
58ef4f92
HH
62module_param(debug, int, 0644);
63MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
64
cf3c34c8
TP
65#define dprintk(fmt, arg...) do { if (debug) \
66 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
67
68/* Print a warning */
69#define wprintk(fmt, arg...) \
70 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
71
72/* ------------------------------------------------------------------
73 * mt352 based DVB-T cards
74 */
75
1da177e4
LT
76static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
77{
78 u32 ok;
79
80 if (!on) {
81 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
82 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
83 return 0;
84 }
85
86 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
87 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
88 udelay(10);
89
90 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
91 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
92 udelay(10);
93 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
94 udelay(10);
95 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
cf3c34c8 96 dprintk("%s %s\n", __FUNCTION__, ok ? "on" : "off");
1da177e4
LT
97
98 if (!ok)
99 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
100 return ok;
101}
102
103static int mt352_pinnacle_init(struct dvb_frontend* fe)
104{
105 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
106 static u8 reset [] = { RESET, 0x80 };
107 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
108 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
109 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
110 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
111 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
112 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
113 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
114 struct saa7134_dev *dev= fe->dvb->priv;
115
cf3c34c8 116 dprintk("%s called\n", __FUNCTION__);
1da177e4
LT
117
118 mt352_write(fe, clock_config, sizeof(clock_config));
119 udelay(200);
120 mt352_write(fe, reset, sizeof(reset));
121 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
122 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
123 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
124 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
125
126 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
127 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
128 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 129
1da177e4
LT
130 return 0;
131}
132
a78d0bfa
JAR
133static int mt352_aver777_init(struct dvb_frontend* fe)
134{
135 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
136 static u8 reset [] = { RESET, 0x80 };
137 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
138 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
139 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
140
141 mt352_write(fe, clock_config, sizeof(clock_config));
142 udelay(200);
143 mt352_write(fe, reset, sizeof(reset));
144 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
145 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
146 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
147
148 return 0;
149}
150
0463f12c
AQ
151static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
152 struct dvb_frontend_parameters* params)
1da177e4 153{
df8cf706
HH
154 u8 off[] = { 0x00, 0xf1};
155 u8 on[] = { 0x00, 0x71};
156 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
157
1da177e4
LT
158 struct saa7134_dev *dev = fe->dvb->priv;
159 struct v4l2_frequency f;
160
161 /* set frequency (mt2050) */
162 f.tuner = 0;
163 f.type = V4L2_TUNER_DIGITAL_TV;
164 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
165 if (fe->ops.i2c_gate_ctrl)
166 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 167 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 168 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 169 msg.buf = on;
dea74869
PB
170 if (fe->ops.i2c_gate_ctrl)
171 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 172 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
173
174 pinnacle_antenna_pwr(dev, antenna_pwr);
175
176 /* mt352 setup */
0463f12c 177 return mt352_pinnacle_init(fe);
1da177e4
LT
178}
179
180static struct mt352_config pinnacle_300i = {
181 .demod_address = 0x3c >> 1,
182 .adc_clock = 20333,
183 .if2 = 36150,
184 .no_tuner = 1,
185 .demod_init = mt352_pinnacle_init,
1da177e4 186};
a78d0bfa
JAR
187
188static struct mt352_config avermedia_777 = {
189 .demod_address = 0xf,
190 .demod_init = mt352_aver777_init,
a78d0bfa 191};
1da177e4 192
58ef4f92
HH
193/* ==================================================================
194 * tda1004x based DVB-T cards, helper functions
195 */
196
197static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
198 const struct firmware **fw, char *name)
1da177e4
LT
199{
200 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
201 return request_firmware(fw, name, &dev->pci->dev);
202}
203
58ef4f92
HH
204/* ------------------------------------------------------------------
205 * these tuners are tu1216, td1316(a)
206 */
207
208static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
209{
210 struct saa7134_dev *dev = fe->dvb->priv;
211 struct tda1004x_state *state = fe->demodulator_priv;
212 u8 addr = state->config->tuner_address;
86ddd96f 213 u8 tuner_buf[4];
2cf36ac4 214 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
215 sizeof(tuner_buf) };
216 int tuner_frequency = 0;
217 u8 band, cp, filter;
218
219 /* determine charge pump */
220 tuner_frequency = params->frequency + 36166000;
221 if (tuner_frequency < 87000000)
222 return -EINVAL;
223 else if (tuner_frequency < 130000000)
224 cp = 3;
225 else if (tuner_frequency < 160000000)
226 cp = 5;
227 else if (tuner_frequency < 200000000)
228 cp = 6;
229 else if (tuner_frequency < 290000000)
230 cp = 3;
231 else if (tuner_frequency < 420000000)
232 cp = 5;
233 else if (tuner_frequency < 480000000)
234 cp = 6;
235 else if (tuner_frequency < 620000000)
236 cp = 3;
237 else if (tuner_frequency < 830000000)
238 cp = 5;
239 else if (tuner_frequency < 895000000)
240 cp = 7;
241 else
242 return -EINVAL;
243
244 /* determine band */
245 if (params->frequency < 49000000)
246 return -EINVAL;
247 else if (params->frequency < 161000000)
248 band = 1;
249 else if (params->frequency < 444000000)
250 band = 2;
251 else if (params->frequency < 861000000)
252 band = 4;
253 else
254 return -EINVAL;
255
256 /* setup PLL filter */
257 switch (params->u.ofdm.bandwidth) {
258 case BANDWIDTH_6_MHZ:
259 filter = 0;
260 break;
261
262 case BANDWIDTH_7_MHZ:
263 filter = 0;
264 break;
265
266 case BANDWIDTH_8_MHZ:
267 filter = 1;
268 break;
1da177e4 269
86ddd96f
MCC
270 default:
271 return -EINVAL;
272 }
273
274 /* calculate divisor
275 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 276 */
86ddd96f
MCC
277 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
278
279 /* setup tuner buffer */
280 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
281 tuner_buf[1] = tuner_frequency & 0xff;
282 tuner_buf[2] = 0xca;
283 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
284
dea74869
PB
285 if (fe->ops.i2c_gate_ctrl)
286 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 287 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
288 wprintk("could not write to tuner at addr: 0x%02x\n",
289 addr << 1);
86ddd96f 290 return -EIO;
58ef4f92 291 }
2cf36ac4
HH
292 msleep(1);
293 return 0;
294}
295
58ef4f92 296static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
297{
298 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
299 struct tda1004x_state *state = fe->demodulator_priv;
300 u8 addr = state->config->tuner_address;
2cf36ac4
HH
301 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
302 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 303
2cf36ac4 304 /* setup PLL configuration */
dea74869
PB
305 if (fe->ops.i2c_gate_ctrl)
306 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
307 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
308 return -EIO;
86ddd96f 309 msleep(1);
2cf36ac4 310
1da177e4
LT
311 return 0;
312}
313
2cf36ac4
HH
314/* ------------------------------------------------------------------ */
315
2cf36ac4 316static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
317 .demod_address = 0x8,
318 .invert = 1,
2cf36ac4 319 .invert_oclk = 0,
86ddd96f
MCC
320 .xtal_freq = TDA10046_XTAL_4M,
321 .agc_config = TDA10046_AGC_DEFAULT,
322 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
323 .tuner_address = 0x60,
324 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
325};
326
2cf36ac4
HH
327static struct tda1004x_config philips_tu1216_61_config = {
328
329 .demod_address = 0x8,
330 .invert = 1,
331 .invert_oclk = 0,
332 .xtal_freq = TDA10046_XTAL_4M,
333 .agc_config = TDA10046_AGC_DEFAULT,
334 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
335 .tuner_address = 0x61,
336 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
337};
338
339/* ------------------------------------------------------------------ */
340
cbb94521 341static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
342{
343 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
344 struct tda1004x_state *state = fe->demodulator_priv;
345 u8 addr = state->config->tuner_address;
2cf36ac4 346 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 347 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
348
349 /* setup PLL configuration */
dea74869
PB
350 if (fe->ops.i2c_gate_ctrl)
351 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
352 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
353 return -EIO;
2cf36ac4
HH
354 return 0;
355}
356
a79ddae9 357static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 358{
58ef4f92
HH
359 return philips_tda6651_pll_set(fe, params);
360}
361
362static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
363{
364 struct saa7134_dev *dev = fe->dvb->priv;
365 struct tda1004x_state *state = fe->demodulator_priv;
366 u8 addr = state->config->tuner_address;
367 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
368 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
369
370 /* switch the tuner to analog mode */
371 if (fe->ops.i2c_gate_ctrl)
372 fe->ops.i2c_gate_ctrl(fe, 1);
373 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
374 return -EIO;
375 return 0;
2cf36ac4
HH
376}
377
58ef4f92
HH
378/* ------------------------------------------------------------------ */
379
cbb94521
HH
380static int philips_europa_tuner_init(struct dvb_frontend *fe)
381{
382 struct saa7134_dev *dev = fe->dvb->priv;
383 static u8 msg[] = { 0x00, 0x40};
384 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
385
386
387 if (philips_td1316_tuner_init(fe))
388 return -EIO;
389 msleep(1);
390 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
391 return -EIO;
392
393 return 0;
394}
395
a79ddae9 396static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
397{
398 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 399
58ef4f92
HH
400 static u8 msg[] = { 0x00, 0x14 };
401 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
402
403 if (philips_td1316_tuner_sleep(fe))
404 return -EIO;
2cf36ac4
HH
405
406 /* switch the board to analog mode */
dea74869
PB
407 if (fe->ops.i2c_gate_ctrl)
408 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 409 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
410 return 0;
411}
412
413static int philips_europa_demod_sleep(struct dvb_frontend *fe)
414{
415 struct saa7134_dev *dev = fe->dvb->priv;
416
417 if (dev->original_demod_sleep)
418 dev->original_demod_sleep(fe);
dea74869 419 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 420 return 0;
2cf36ac4
HH
421}
422
423static struct tda1004x_config philips_europa_config = {
424
425 .demod_address = 0x8,
426 .invert = 0,
427 .invert_oclk = 0,
428 .xtal_freq = TDA10046_XTAL_4M,
429 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
430 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
431 .tuner_address = 0x61,
432 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
433};
434
435/* ------------------------------------------------------------------ */
86ddd96f 436
408b664a 437static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
438 .demod_address = 0x08,
439 .invert = 1,
440 .invert_oclk = 0,
441 .xtal_freq = TDA10046_XTAL_16M,
442 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
443 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
444 .tuner_address = 0x61,
445 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
446};
447
58ef4f92
HH
448/* ------------------------------------------------------------------
449 * tda 1004x based cards with philips silicon tuner
450 */
451
452static void philips_tda827x_lna_gain(struct dvb_frontend *fe, int high)
453{
454 struct saa7134_dev *dev = fe->dvb->priv;
455 struct tda1004x_state *state = fe->demodulator_priv;
456 u8 addr = state->config->i2c_gate;
457 u8 config = state->config->tuner_config;
458 u8 GP00_CF[] = {0x20, 0x01};
459 u8 GP00_LEV[] = {0x22, 0x00};
460
461 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = GP00_CF, .len = 2};
462 if (config) {
463 if (high) {
464 dprintk("setting LNA to high gain\n");
465 } else {
466 dprintk("setting LNA to low gain\n");
467 }
468 }
469 switch (config) {
470 case 0: /* no LNA */
471 break;
472 case 1: /* switch is GPIO 0 of tda8290 */
473 case 2:
474 /* turn Vsync off */
475 saa7134_set_gpio(dev, 22, 0);
476 GP00_LEV[1] = high ? 0 : 1;
477 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
cf3c34c8
TP
478 wprintk("could not access tda8290 at addr: 0x%02x\n",
479 addr << 1);
58ef4f92
HH
480 return;
481 }
482 msg.buf = GP00_LEV;
483 if (config == 2)
484 GP00_LEV[1] = high ? 1 : 0;
485 i2c_transfer(&dev->i2c_adap, &msg, 1);
486 break;
487 case 3: /* switch with GPIO of saa713x */
488 saa7134_set_gpio(dev, 22, high);
489 break;
490 }
491}
492
493static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
494{
58ef4f92
HH
495 struct tda1004x_state *state = fe->demodulator_priv;
496
497 u8 addr = state->config->i2c_gate;
498 static u8 tda8290_close[] = { 0x21, 0xc0};
499 static u8 tda8290_open[] = { 0x21, 0x80};
500 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
501 if (enable) {
502 tda8290_msg.buf = tda8290_close;
503 } else {
504 tda8290_msg.buf = tda8290_open;
505 }
06be3035 506 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
507 struct saa7134_dev *dev = fe->dvb->priv;
508 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
509 return -EIO;
510 }
511 msleep(20);
512 return 0;
513}
514
86ddd96f
MCC
515/* ------------------------------------------------------------------ */
516
58ef4f92 517static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 518{
90e9df7f 519 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 520 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 521
58ef4f92
HH
522 switch (state->config->antenna_switch) {
523 case 0: break;
524 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
525 saa7134_set_gpio(dev, 21, 0);
526 break;
527 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
528 saa7134_set_gpio(dev, 21, 1);
529 break;
587d2fd7 530 }
587d2fd7
HH
531 return 0;
532}
533
58ef4f92 534static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 535{
58ef4f92
HH
536 struct saa7134_dev *dev = fe->dvb->priv;
537 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 538
58ef4f92
HH
539 switch (state->config->antenna_switch) {
540 case 0: break;
541 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
542 saa7134_set_gpio(dev, 21, 1);
543 break;
544 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
545 saa7134_set_gpio(dev, 21, 0);
546 break;
547 }
587d2fd7 548 return 0;
2d6b5f62 549}
90e9df7f 550
8ce47dad
MK
551static struct tda827x_config tda827x_cfg = {
552 .lna_gain = philips_tda827x_lna_gain,
553 .init = philips_tda827x_tuner_init,
554 .sleep = philips_tda827x_tuner_sleep
555};
90e9df7f 556
b8bc76d8 557static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config *tda_conf)
90e9df7f 558{
58ef4f92
HH
559 dev->dvb.frontend = dvb_attach(tda10046_attach, tda_conf, &dev->i2c_adap);
560 if (dev->dvb.frontend) {
561 if (tda_conf->i2c_gate)
562 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
ede2200d
HH
563 if (dvb_attach(tda827x_attach, dev->dvb.frontend, tda_conf->tuner_address,
564 &dev->i2c_adap,&tda827x_cfg) == NULL) {
cf3c34c8 565 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d
HH
566 tda_conf->tuner_address);
567 }
58ef4f92 568 }
90e9df7f
HH
569}
570
58ef4f92 571/* ------------------------------------------------------------------ */
261f5081 572
58ef4f92 573static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
574 .demod_address = 0x08,
575 .invert = 1,
576 .invert_oclk = 0,
577 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
578 .agc_config = TDA10046_AGC_TDA827X,
579 .gpio_config = TDA10046_GP11_I,
550a9a5e 580 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
581 .tuner_address = 0x60,
582 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 583};
550a9a5e 584
58ef4f92
HH
585static struct tda1004x_config philips_tiger_config = {
586 .demod_address = 0x08,
587 .invert = 1,
588 .invert_oclk = 0,
589 .xtal_freq = TDA10046_XTAL_16M,
590 .agc_config = TDA10046_AGC_TDA827X,
591 .gpio_config = TDA10046_GP11_I,
592 .if_freq = TDA10046_FREQ_045,
593 .i2c_gate = 0x4b,
594 .tuner_address = 0x61,
595 .tuner_config = 0,
596 .antenna_switch= 1,
597 .request_firmware = philips_tda1004x_request_firmware
598};
550a9a5e
HH
599
600static struct tda1004x_config cinergy_ht_config = {
601 .demod_address = 0x08,
602 .invert = 1,
603 .invert_oclk = 0,
604 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
605 .agc_config = TDA10046_AGC_TDA827X,
606 .gpio_config = TDA10046_GP01_I,
90e9df7f 607 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
608 .i2c_gate = 0x4b,
609 .tuner_address = 0x61,
610 .tuner_config = 0,
611 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
612};
613
58ef4f92
HH
614static struct tda1004x_config cinergy_ht_pci_config = {
615 .demod_address = 0x08,
616 .invert = 1,
617 .invert_oclk = 0,
618 .xtal_freq = TDA10046_XTAL_16M,
619 .agc_config = TDA10046_AGC_TDA827X,
620 .gpio_config = TDA10046_GP01_I,
621 .if_freq = TDA10046_FREQ_045,
622 .i2c_gate = 0x4b,
623 .tuner_address = 0x60,
624 .tuner_config = 0,
625 .request_firmware = philips_tda1004x_request_firmware
626};
627
628static struct tda1004x_config philips_tiger_s_config = {
629 .demod_address = 0x08,
630 .invert = 1,
631 .invert_oclk = 0,
632 .xtal_freq = TDA10046_XTAL_16M,
633 .agc_config = TDA10046_AGC_TDA827X,
634 .gpio_config = TDA10046_GP01_I,
635 .if_freq = TDA10046_FREQ_045,
636 .i2c_gate = 0x4b,
637 .tuner_address = 0x61,
638 .tuner_config = 2,
639 .antenna_switch= 1,
640 .request_firmware = philips_tda1004x_request_firmware
641};
df42eaf2 642
587d2fd7
HH
643static struct tda1004x_config pinnacle_pctv_310i_config = {
644 .demod_address = 0x08,
645 .invert = 1,
646 .invert_oclk = 0,
647 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
648 .agc_config = TDA10046_AGC_TDA827X,
649 .gpio_config = TDA10046_GP11_I,
587d2fd7 650 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
651 .i2c_gate = 0x4b,
652 .tuner_address = 0x61,
653 .tuner_config = 1,
654 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
655};
656
c6e53daf
TG
657static struct tda1004x_config hauppauge_hvr_1110_config = {
658 .demod_address = 0x08,
659 .invert = 1,
660 .invert_oclk = 0,
661 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
662 .agc_config = TDA10046_AGC_TDA827X,
663 .gpio_config = TDA10046_GP11_I,
c6e53daf 664 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
665 .i2c_gate = 0x4b,
666 .tuner_address = 0x61,
bc548370 667 .tuner_config = 1,
58ef4f92 668 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
669};
670
83646817
HH
671static struct tda1004x_config asus_p7131_dual_config = {
672 .demod_address = 0x08,
673 .invert = 1,
674 .invert_oclk = 0,
675 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
676 .agc_config = TDA10046_AGC_TDA827X,
677 .gpio_config = TDA10046_GP11_I,
83646817 678 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
679 .i2c_gate = 0x4b,
680 .tuner_address = 0x61,
681 .tuner_config = 0,
682 .antenna_switch= 2,
683 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
684};
685
420f32fe
NS
686static struct tda1004x_config lifeview_trio_config = {
687 .demod_address = 0x09,
688 .invert = 1,
689 .invert_oclk = 0,
690 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
691 .agc_config = TDA10046_AGC_TDA827X,
692 .gpio_config = TDA10046_GP00_I,
420f32fe 693 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
694 .tuner_address = 0x60,
695 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
696};
697
58ef4f92 698static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
699 .demod_address = 0x08,
700 .invert = 1,
701 .invert_oclk = 0,
702 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 703 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 704 .gpio_config = TDA10046_GP11_I,
df42eaf2 705 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
706 .tuner_address = 0x60,
707 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
708};
709
58ef4f92 710static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
711 .demod_address = 0x08,
712 .invert = 1,
713 .invert_oclk = 0,
714 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 715 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 716 .gpio_config = TDA10046_GP01_I,
3dfb729f 717 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
718 .i2c_gate = 0x4b,
719 .tuner_address = 0x60,
720 .tuner_config = 0,
721 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
722};
723
e06cea4c
HH
724static struct tda1004x_config asus_p7131_4871_config = {
725 .demod_address = 0x08,
726 .invert = 1,
727 .invert_oclk = 0,
728 .xtal_freq = TDA10046_XTAL_16M,
729 .agc_config = TDA10046_AGC_TDA827X,
730 .gpio_config = TDA10046_GP01_I,
731 .if_freq = TDA10046_FREQ_045,
732 .i2c_gate = 0x4b,
733 .tuner_address = 0x61,
734 .tuner_config = 2,
735 .antenna_switch= 2,
736 .request_firmware = philips_tda1004x_request_firmware
737};
738
f3eec0c0 739static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
740 .demod_address = 0x08,
741 .invert = 1,
742 .invert_oclk = 0,
743 .xtal_freq = TDA10046_XTAL_16M,
744 .agc_config = TDA10046_AGC_TDA827X,
745 .gpio_config = TDA10046_GP11_I,
746 .if_freq = TDA10046_FREQ_045,
747 .i2c_gate = 0x4b,
748 .tuner_address = 0x61,
749 .tuner_config = 2,
750 .antenna_switch= 2,
751 .request_firmware = philips_tda1004x_request_firmware
752};
261f5081 753
b39423a9
SF
754static struct tda1004x_config kworld_dvb_t_210_config = {
755 .demod_address = 0x08,
756 .invert = 1,
757 .invert_oclk = 0,
758 .xtal_freq = TDA10046_XTAL_16M,
759 .agc_config = TDA10046_AGC_TDA827X,
760 .gpio_config = TDA10046_GP11_I,
761 .if_freq = TDA10046_FREQ_045,
762 .i2c_gate = 0x4b,
763 .tuner_address = 0x61,
764 .tuner_config = 2,
765 .antenna_switch= 1,
766 .request_firmware = philips_tda1004x_request_firmware
767};
261f5081 768
d90d9f5a
ES
769static struct tda1004x_config avermedia_super_007_config = {
770 .demod_address = 0x08,
771 .invert = 1,
772 .invert_oclk = 0,
773 .xtal_freq = TDA10046_XTAL_16M,
774 .agc_config = TDA10046_AGC_TDA827X,
775 .gpio_config = TDA10046_GP01_I,
776 .if_freq = TDA10046_FREQ_045,
777 .i2c_gate = 0x4b,
778 .tuner_address = 0x60,
779 .tuner_config = 0,
780 .antenna_switch= 1,
781 .request_firmware = philips_tda1004x_request_firmware
782};
783
4ba24373
HP
784static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
785 .demod_address = 0x08,
786 .invert = 1,
787 .invert_oclk = 0,
788 .xtal_freq = TDA10046_XTAL_16M,
789 .agc_config = TDA10046_AGC_TDA827X,
790 .gpio_config = TDA10046_GP01_I,
791 .if_freq = TDA10046_FREQ_045,
792 .i2c_gate = 0x42,
793 .tuner_address = 0x61,
794 .tuner_config = 2,
795 .antenna_switch = 1,
796 .request_firmware = philips_tda1004x_request_firmware
797};
798
58ef4f92
HH
799/* ------------------------------------------------------------------
800 * special case: this card uses saa713x GPIO22 for the mode switch
801 */
5eda227f 802
58ef4f92 803static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
804{
805 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
806 philips_tda827x_tuner_init(fe);
807 /* route TDA8275a AGC input to the channel decoder */
06be3035 808 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
809 return 0;
810}
811
58ef4f92 812static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 813{
5eda227f 814 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 815 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 816 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
817 philips_tda827x_tuner_sleep(fe);
818 return 0;
5eda227f
HH
819}
820
8ce47dad
MK
821static struct tda827x_config ads_duo_cfg = {
822 .lna_gain = philips_tda827x_lna_gain,
823 .init = ads_duo_tuner_init,
824 .sleep = ads_duo_tuner_sleep
825};
826
58ef4f92 827static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
828 .demod_address = 0x08,
829 .invert = 1,
830 .invert_oclk = 0,
831 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 832 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 833 .gpio_config = TDA10046_GP00_I,
5eda227f 834 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
835 .tuner_address = 0x61,
836 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
837};
838
58ef4f92
HH
839/* ==================================================================
840 * tda10086 based DVB-S cards, helper functions
841 */
842
e2ac28fa
IL
843static struct tda10086_config flydvbs = {
844 .demod_address = 0x0e,
845 .invert = 0,
ea75baf4 846 .diseqc_tone = 0,
e2ac28fa
IL
847};
848
1b1cee35
HH
849/* ------------------------------------------------------------------
850 * special case: lnb supply is connected to the gated i2c
851 */
852
853static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
854{
855 int res = -EIO;
856 struct saa7134_dev *dev = fe->dvb->priv;
857 if (fe->ops.i2c_gate_ctrl) {
858 fe->ops.i2c_gate_ctrl(fe, 1);
859 if (dev->original_set_voltage)
860 res = dev->original_set_voltage(fe, voltage);
861 fe->ops.i2c_gate_ctrl(fe, 0);
862 }
863 return res;
864};
865
866static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
867{
868 int res = -EIO;
869 struct saa7134_dev *dev = fe->dvb->priv;
870 if (fe->ops.i2c_gate_ctrl) {
871 fe->ops.i2c_gate_ctrl(fe, 1);
872 if (dev->original_set_high_voltage)
873 res = dev->original_set_high_voltage(fe, arg);
874 fe->ops.i2c_gate_ctrl(fe, 0);
875 }
876 return res;
877};
878
58ef4f92
HH
879/* ==================================================================
880 * nxt200x based ATSC cards, helper functions
881 */
90e9df7f 882
3b64e8e2
MK
883static struct nxt200x_config avertvhda180 = {
884 .demod_address = 0x0a,
3b64e8e2 885};
3e1410ad
AB
886
887static struct nxt200x_config kworldatsc110 = {
888 .demod_address = 0x0a,
3e1410ad 889};
3b64e8e2 890
58ef4f92
HH
891/* ==================================================================
892 * Core code
893 */
1da177e4
LT
894
895static int dvb_init(struct saa7134_dev *dev)
896{
1c4f76ab 897 int ret;
1da177e4
LT
898 /* init struct videobuf_dvb */
899 dev->ts.nr_bufs = 32;
900 dev->ts.nr_packets = 32*4;
901 dev->dvb.name = dev->name;
0705135e
GL
902 videobuf_queue_sg_init(&dev->dvb.dvbq, &saa7134_ts_qops,
903 &dev->pci->dev, &dev->slock,
1da177e4
LT
904 V4L2_BUF_TYPE_VIDEO_CAPTURE,
905 V4L2_FIELD_ALTERNATE,
906 sizeof(struct saa7134_buf),
907 dev);
908
909 switch (dev->board) {
910 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 911 dprintk("pinnacle 300i dvb setup\n");
2bfe031d 912 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 913 &dev->i2c_adap);
6b3ccab7 914 if (dev->dvb.frontend) {
dea74869 915 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 916 }
1da177e4 917 break;
a78d0bfa 918 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 919 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 920 dprintk("avertv 777 dvb setup\n");
2bfe031d 921 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 922 &dev->i2c_adap);
6b3ccab7 923 if (dev->dvb.frontend) {
8511df9e 924 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 925 NULL, DVB_PLL_PHILIPS_TD1316);
6b3ccab7 926 }
a78d0bfa 927 break;
1da177e4 928 case SAA7134_BOARD_MD7134:
f7b54b10
MK
929 dev->dvb.frontend = dvb_attach(tda10046_attach,
930 &medion_cardbus,
931 &dev->i2c_adap);
6b3ccab7 932 if (dev->dvb.frontend) {
b7754d74 933 dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address,
47a9991e 934 &dev->i2c_adap, DVB_PLL_FMD1216ME);
6b3ccab7 935 }
1da177e4 936 break;
86ddd96f 937 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK
938 dev->dvb.frontend = dvb_attach(tda10046_attach,
939 &philips_tu1216_60_config,
940 &dev->i2c_adap);
6b3ccab7 941 if (dev->dvb.frontend) {
58ef4f92
HH
942 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
943 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 944 }
86ddd96f
MCC
945 break;
946 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 947 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
b8bc76d8 948 configure_tda827x_fe(dev, &tda827x_lifeview_config);
86ddd96f 949 break;
2cf36ac4 950 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 951 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK
952 dev->dvb.frontend = dvb_attach(tda10046_attach,
953 &philips_europa_config,
954 &dev->i2c_adap);
6b3ccab7 955 if (dev->dvb.frontend) {
588f9831
HH
956 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
957 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB
958 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
959 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
960 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 961 }
2cf36ac4
HH
962 break;
963 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK
964 dev->dvb.frontend = dvb_attach(tda10046_attach,
965 &philips_tu1216_61_config,
966 &dev->i2c_adap);
6b3ccab7 967 if (dev->dvb.frontend) {
58ef4f92
HH
968 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
969 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 970 }
2cf36ac4 971 break;
b39423a9
SF
972 case SAA7134_BOARD_KWORLD_DVBT_210:
973 configure_tda827x_fe(dev, &kworld_dvb_t_210_config);
974 break;
90e9df7f 975 case SAA7134_BOARD_PHILIPS_TIGER:
b8bc76d8 976 configure_tda827x_fe(dev, &philips_tiger_config);
587d2fd7
HH
977 break;
978 case SAA7134_BOARD_PINNACLE_PCTV_310i:
b8bc76d8 979 configure_tda827x_fe(dev, &pinnacle_pctv_310i_config);
90e9df7f 980 break;
c6e53daf 981 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
b8bc76d8 982 configure_tda827x_fe(dev, &hauppauge_hvr_1110_config);
c6e53daf 983 break;
d4b0aba4 984 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
b8bc76d8 985 configure_tda827x_fe(dev, &asus_p7131_dual_config);
d4b0aba4 986 break;
3d8466ec 987 case SAA7134_BOARD_FLYDVBT_LR301:
b8bc76d8 988 configure_tda827x_fe(dev, &tda827x_lifeview_config);
3d8466ec 989 break;
420f32fe 990 case SAA7134_BOARD_FLYDVB_TRIO:
ea75baf4 991 if(! use_frontend) { /* terrestrial */
b8bc76d8 992 configure_tda827x_fe(dev, &lifeview_trio_config);
ea75baf4 993 } else { /* satellite */
1f683cd8
NS
994 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
995 if (dev->dvb.frontend) {
996 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63,
997 &dev->i2c_adap, 0) == NULL) {
cf3c34c8 998 wprintk("%s: Lifeview Trio, No tda826x found!\n", __FUNCTION__);
1f683cd8
NS
999 }
1000 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap,
1001 0x08, 0, 0) == NULL) {
cf3c34c8 1002 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __FUNCTION__);
1f683cd8
NS
1003 }
1004 }
6b3ccab7 1005 }
420f32fe 1006 break;
df42eaf2 1007 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1008 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK
1009 dev->dvb.frontend = dvb_attach(tda10046_attach,
1010 &ads_tech_duo_config,
1011 &dev->i2c_adap);
6b3ccab7 1012 if (dev->dvb.frontend) {
ede2200d 1013 if (dvb_attach(tda827x_attach,dev->dvb.frontend,
8ce47dad 1014 ads_tech_duo_config.tuner_address,
ede2200d 1015 &dev->i2c_adap,&ads_duo_cfg) == NULL) {
cf3c34c8 1016 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d
HH
1017 ads_tech_duo_config.tuner_address);
1018 }
6b3ccab7 1019 }
df42eaf2 1020 break;
3dfb729f 1021 case SAA7134_BOARD_TEVION_DVBT_220RF:
b8bc76d8 1022 configure_tda827x_fe(dev, &tevion_dvbt220rf_config);
d95b8942 1023 break;
5eda227f 1024 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca
HH
1025 if (!use_frontend) { /* terrestrial */
1026 configure_tda827x_fe(dev, &md8800_dvbt_config);
1027 } else { /* satellite */
1028 dev->dvb.frontend = dvb_attach(tda10086_attach,
1029 &flydvbs, &dev->i2c_adap);
1030 if (dev->dvb.frontend) {
1b1cee35 1031 struct dvb_frontend *fe;
4b1431ca
HH
1032 if (dvb_attach(tda826x_attach, dev->dvb.frontend,
1033 0x60, &dev->i2c_adap, 0) == NULL)
1034 wprintk("%s: Medion Quadro, no tda826x "
1035 "found !\n", __FUNCTION__);
1b1cee35
HH
1036 /* Note 10.2. Hac
1037 * up to here. configuration for ctx948 and and one branch
1038 * of md8800 should be identical
1039 */
1040 /* we need to open the i2c gate (we know it exists) */
1041 fe = dev->dvb.frontend;
1042 fe->ops.i2c_gate_ctrl(fe, 1);
1043 if (dvb_attach(isl6405_attach, fe,
4b1431ca
HH
1044 &dev->i2c_adap, 0x08, 0, 0) == NULL)
1045 wprintk("%s: Medion Quadro, no ISL6405 "
1046 "found !\n", __FUNCTION__);
1b1cee35
HH
1047 fe->ops.i2c_gate_ctrl(fe, 0);
1048 dev->original_set_voltage = fe->ops.set_voltage;
1049 fe->ops.set_voltage = md8800_set_voltage;
1050 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1051 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
4b1431ca
HH
1052 }
1053 }
5eda227f 1054 break;
3b64e8e2 1055 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK
1056 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
1057 &dev->i2c_adap);
a79ddae9 1058 if (dev->dvb.frontend) {
4ad8eee5 1059 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 1060 NULL, DVB_PLL_TDHU2);
a79ddae9 1061 }
3b64e8e2 1062 break;
3e1410ad 1063 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK
1064 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
1065 &dev->i2c_adap);
a79ddae9 1066 if (dev->dvb.frontend) {
4ad8eee5 1067 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 1068 NULL, DVB_PLL_TUV1236D);
a79ddae9 1069 }
3e1410ad 1070 break;
e2ac28fa 1071 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK
1072 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1073 &dev->i2c_adap);
e2ac28fa 1074 if (dev->dvb.frontend) {
f7b54b10
MK
1075 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1076 &dev->i2c_adap, 0) == NULL) {
cf3c34c8 1077 wprintk("%s: No tda826x found!\n", __FUNCTION__);
e2ac28fa 1078 }
f7b54b10
MK
1079 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1080 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
cf3c34c8 1081 wprintk("%s: No ISL6421 found!\n", __FUNCTION__);
e2ac28fa
IL
1082 }
1083 }
1084 break;
cf146ca4 1085 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
0e8f4cc5
MS
1086 dev->dvb.frontend = dvb_attach(tda10046_attach,
1087 &medion_cardbus,
1088 &dev->i2c_adap);
cf146ca4
HH
1089 if (dev->dvb.frontend) {
1090 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1091 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74
TP
1092
1093 dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address,
47a9991e 1094 &dev->i2c_adap, DVB_PLL_FMD1216ME);
cf146ca4
HH
1095 }
1096 break;
cbb94521
HH
1097 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
1098 dev->dvb.frontend = dvb_attach(tda10046_attach,
1099 &philips_europa_config,
1100 &dev->i2c_adap);
1101 if (dev->dvb.frontend) {
1102 dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1103 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1104 }
1105 break;
550a9a5e 1106 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
b8bc76d8 1107 configure_tda827x_fe(dev, &cinergy_ht_config);
9de271e6
MK
1108 break;
1109 case SAA7134_BOARD_CINERGY_HT_PCI:
b8bc76d8 1110 configure_tda827x_fe(dev, &cinergy_ht_pci_config);
58ef4f92
HH
1111 break;
1112 case SAA7134_BOARD_PHILIPS_TIGER_S:
b8bc76d8 1113 configure_tda827x_fe(dev, &philips_tiger_s_config);
550a9a5e 1114 break;
e06cea4c
HH
1115 case SAA7134_BOARD_ASUS_P7131_4871:
1116 configure_tda827x_fe(dev, &asus_p7131_4871_config);
1117 break;
f3eec0c0
HH
1118 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
1119 configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config);
e06cea4c 1120 break;
d90d9f5a
ES
1121 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
1122 configure_tda827x_fe(dev, &avermedia_super_007_config);
1123 break;
4ba24373
HP
1124 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
1125 configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config);
1126 break;
6ab465a8
HH
1127 case SAA7134_BOARD_PHILIPS_SNAKE:
1128 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1129 &dev->i2c_adap);
1130 if (dev->dvb.frontend) {
1131 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1132 &dev->i2c_adap, 0) == NULL)
1133 wprintk("%s: No tda826x found!\n", __FUNCTION__);
1134 if (dvb_attach(lnbp21_attach, dev->dvb.frontend,
1135 &dev->i2c_adap, 0, 0) == NULL)
1136 wprintk("%s: No lnbp21 found!\n", __FUNCTION__);
1137 }
1138 break;
7b5b3f17
HP
1139 case SAA7134_BOARD_CREATIX_CTX953:
1140 configure_tda827x_fe(dev, &md8800_dvbt_config);
1141 break;
6a6179b6
RK
1142 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
1143 configure_tda827x_fe(dev, &philips_tiger_s_config);
1144 break;
1da177e4 1145 default:
cf3c34c8 1146 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1147 break;
1148 }
1149
1150 if (NULL == dev->dvb.frontend) {
cf3c34c8 1151 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
1da177e4
LT
1152 return -1;
1153 }
1154
1155 /* register everything else */
1c4f76ab
HH
1156 ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
1157
1158 /* this sequence is necessary to make the tda1004x load its firmware
1159 * and to enter analog mode of hybrid boards
1160 */
1161 if (!ret) {
1162 if (dev->dvb.frontend->ops.init)
1163 dev->dvb.frontend->ops.init(dev->dvb.frontend);
1164 if (dev->dvb.frontend->ops.sleep)
1165 dev->dvb.frontend->ops.sleep(dev->dvb.frontend);
9971f4f1
HH
1166 if (dev->dvb.frontend->ops.tuner_ops.sleep)
1167 dev->dvb.frontend->ops.tuner_ops.sleep(dev->dvb.frontend);
1c4f76ab
HH
1168 }
1169 return ret;
1da177e4
LT
1170}
1171
1172static int dvb_fini(struct saa7134_dev *dev)
1173{
7f171123
MCC
1174 /* FIXME: I suspect that this code is bogus, since the entry for
1175 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1176 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1177 */
1178 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1179 struct v4l2_priv_tun_config tda9887_cfg;
1180 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1181
1182 tda9887_cfg.tuner = TUNER_TDA9887;
1183 tda9887_cfg.priv = &on;
1da177e4 1184
1da177e4 1185 /* otherwise we don't detect the tuner on next insmod */
7f171123
MCC
1186 saa7134_i2c_call_clients(dev, TUNER_SET_CONFIG, &tda9887_cfg);
1187 }
1188
1da177e4
LT
1189 videobuf_dvb_unregister(&dev->dvb);
1190 return 0;
1191}
1192
1193static struct saa7134_mpeg_ops dvb_ops = {
1194 .type = SAA7134_MPEG_DVB,
1195 .init = dvb_init,
1196 .fini = dvb_fini,
1197};
1198
1199static int __init dvb_register(void)
1200{
1201 return saa7134_ts_register(&dvb_ops);
1202}
1203
1204static void __exit dvb_unregister(void)
1205{
1206 saa7134_ts_unregister(&dvb_ops);
1207}
1208
1209module_init(dvb_register);
1210module_exit(dvb_unregister);
1211
1212/* ------------------------------------------------------------------ */
1213/*
1214 * Local variables:
1215 * c-basic-offset: 8
1216 * End:
1217 */
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