projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| cf1c5fae SA |
1 | /* |
| 2 | * drivers/media/video/smiapp-pll.h | |
| 3 | * | |
| 4 | * Generic driver for SMIA/SMIA++ compliant camera modules | |
| 5 | * | |
| 6 | * Copyright (C) 2012 Nokia Corporation | |
| 7 | * Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com> | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or | |
| 10 | * modify it under the terms of the GNU General Public License | |
| 11 | * version 2 as published by the Free Software Foundation. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, but | |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 16 | * General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
| 21 | * 02110-1301 USA | |
| 22 | * | |
| 23 | */ | |
| 24 | ||
| 25 | #ifndef SMIAPP_PLL_H | |
| 26 | #define SMIAPP_PLL_H | |
| 27 | ||
| 28 | #include <linux/device.h> | |
| 29 | ||
| 30 | struct smiapp_pll { | |
| 31 | uint8_t lanes; | |
| 32 | uint8_t binning_horizontal; | |
| 33 | uint8_t binning_vertical; | |
| 34 | uint8_t scale_m; | |
| 35 | uint8_t scale_n; | |
| 36 | uint8_t bits_per_pixel; | |
| 37 | uint16_t flags; | |
| 38 | uint32_t link_freq; | |
| 39 | ||
| 40 | uint16_t pre_pll_clk_div; | |
| 41 | uint16_t pll_multiplier; | |
| 42 | uint16_t op_sys_clk_div; | |
| 43 | uint16_t op_pix_clk_div; | |
| 44 | uint16_t vt_sys_clk_div; | |
| 45 | uint16_t vt_pix_clk_div; | |
| 46 | ||
| 47 | uint32_t ext_clk_freq_hz; | |
| 48 | uint32_t pll_ip_clk_freq_hz; | |
| 49 | uint32_t pll_op_clk_freq_hz; | |
| 50 | uint32_t op_sys_clk_freq_hz; | |
| 51 | uint32_t op_pix_clk_freq_hz; | |
| 52 | uint32_t vt_sys_clk_freq_hz; | |
| 53 | uint32_t vt_pix_clk_freq_hz; | |
| 54 | ||
| 55 | uint32_t pixel_rate_csi; | |
| 56 | }; | |
| 57 | ||
| 58 | struct smiapp_pll_limits { | |
| 59 | /* Strict PLL limits */ | |
| 60 | uint32_t min_ext_clk_freq_hz; | |
| 61 | uint32_t max_ext_clk_freq_hz; | |
| 62 | uint16_t min_pre_pll_clk_div; | |
| 63 | uint16_t max_pre_pll_clk_div; | |
| 64 | uint32_t min_pll_ip_freq_hz; | |
| 65 | uint32_t max_pll_ip_freq_hz; | |
| 66 | uint16_t min_pll_multiplier; | |
| 67 | uint16_t max_pll_multiplier; | |
| 68 | uint32_t min_pll_op_freq_hz; | |
| 69 | uint32_t max_pll_op_freq_hz; | |
| 70 | ||
| 71 | uint16_t min_vt_sys_clk_div; | |
| 72 | uint16_t max_vt_sys_clk_div; | |
| 73 | uint32_t min_vt_sys_clk_freq_hz; | |
| 74 | uint32_t max_vt_sys_clk_freq_hz; | |
| 75 | uint16_t min_vt_pix_clk_div; | |
| 76 | uint16_t max_vt_pix_clk_div; | |
| 77 | uint32_t min_vt_pix_clk_freq_hz; | |
| 78 | uint32_t max_vt_pix_clk_freq_hz; | |
| 79 | ||
| 80 | uint16_t min_op_sys_clk_div; | |
| 81 | uint16_t max_op_sys_clk_div; | |
| 82 | uint32_t min_op_sys_clk_freq_hz; | |
| 83 | uint32_t max_op_sys_clk_freq_hz; | |
| 84 | uint16_t min_op_pix_clk_div; | |
| 85 | uint16_t max_op_pix_clk_div; | |
| 86 | uint32_t min_op_pix_clk_freq_hz; | |
| 87 | uint32_t max_op_pix_clk_freq_hz; | |
| 88 | ||
| 89 | /* Other relevant limits */ | |
| 90 | uint32_t min_line_length_pck_bin; | |
| 91 | uint32_t min_line_length_pck; | |
| 92 | }; | |
| 93 | ||
| 94 | /* op pix clock is for all lanes in total normally */ | |
| 95 | #define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0) | |
| 96 | #define SMIAPP_PLL_FLAG_NO_OP_CLOCKS (1 << 1) | |
| 97 | ||
| 98 | struct device; | |
| 99 | ||
| 100 | int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits, | |
| 101 | struct smiapp_pll *pll); | |
| 102 | ||
| 103 | #endif /* SMIAPP_PLL_H */ |