[deliverable/linux.git] / drivers / media / video / sn9c102 / sn9c102_ov7660.c

/***************************************************************************
 * Plug-in for OV7660 image sensor connected to the SN9C1xx PC Camera      *
 * Controllers                                                             *
 *                                                                         *
 * Copyright (C) 2007 by Luca Risolia <luca.risolia@studio.unibo.it>       *
 *                                                                         *
 * This program is free software; you can redistribute it and/or modify    *
 * it under the terms of the GNU General Public License as published by    *
 * the Free Software Foundation; either version 2 of the License, or       *
 * (at your option) any later version.                                     *
 *                                                                         *
 * This program is distributed in the hope that it will be useful,         *
 * but WITHOUT ANY WARRANTY; without even the implied warranty of          *
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *
 * GNU General Public License for more details.                            *
 *                                                                         *
 * You should have received a copy of the GNU General Public License       *
 * along with this program; if not, write to the Free Software             *
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *
 ***************************************************************************/

#include "sn9c102_sensor.h"


static int ov7660_init(struct sn9c102_device* cam)
{
	int err = 0;

	err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03},
				       {0x1a, 0x04}, {0x03, 0x10},
				       {0x08, 0x14}, {0x20, 0x17},
				       {0x8b, 0x18}, {0x00, 0x19},
				       {0x1d, 0x1a}, {0x10, 0x1b},
				       {0x02, 0x1c}, {0x03, 0x1d},
				       {0x0f, 0x1e}, {0x0c, 0x1f},
				       {0x00, 0x20}, {0x29, 0x21},
				       {0x40, 0x22}, {0x54, 0x23},
				       {0x66, 0x24}, {0x76, 0x25},
				       {0x85, 0x26}, {0x94, 0x27},
				       {0xa1, 0x28}, {0xae, 0x29},
				       {0xbb, 0x2a}, {0xc7, 0x2b},
				       {0xd3, 0x2c}, {0xde, 0x2d},
				       {0xea, 0x2e}, {0xf4, 0x2f},
				       {0xff, 0x30}, {0x00, 0x3f},
				       {0xc7, 0x40}, {0x01, 0x41},
				       {0x44, 0x42}, {0x00, 0x43},
				       {0x44, 0x44}, {0x00, 0x45},
				       {0x44, 0x46}, {0x00, 0x47},
				       {0xc7, 0x48}, {0x01, 0x49},
				       {0xc7, 0x4a}, {0x01, 0x4b},
				       {0xc7, 0x4c}, {0x01, 0x4d},
				       {0x44, 0x4e}, {0x00, 0x4f},
				       {0x44, 0x50}, {0x00, 0x51},
				       {0x44, 0x52}, {0x00, 0x53},
				       {0xc7, 0x54}, {0x01, 0x55},
				       {0xc7, 0x56}, {0x01, 0x57},
				       {0xc7, 0x58}, {0x01, 0x59},
				       {0x44, 0x5a}, {0x00, 0x5b},
				       {0x44, 0x5c}, {0x00, 0x5d},
				       {0x44, 0x5e}, {0x00, 0x5f},
				       {0xc7, 0x60}, {0x01, 0x61},
				       {0xc7, 0x62}, {0x01, 0x63},
				       {0xc7, 0x64}, {0x01, 0x65},
				       {0x44, 0x66}, {0x00, 0x67},
				       {0x44, 0x68}, {0x00, 0x69},
				       {0x44, 0x6a}, {0x00, 0x6b},
				       {0xc7, 0x6c}, {0x01, 0x6d},
				       {0xc7, 0x6e}, {0x01, 0x6f},
				       {0xc7, 0x70}, {0x01, 0x71},
				       {0x44, 0x72}, {0x00, 0x73},
				       {0x44, 0x74}, {0x00, 0x75},
				       {0x44, 0x76}, {0x00, 0x77},
				       {0xc7, 0x78}, {0x01, 0x79},
				       {0xc7, 0x7a}, {0x01, 0x7b},
				       {0xc7, 0x7c}, {0x01, 0x7d},
				       {0x44, 0x7e}, {0x00, 0x7f},
				       {0x14, 0x84}, {0x00, 0x85},
				       {0x27, 0x86}, {0x00, 0x87},
				       {0x07, 0x88}, {0x00, 0x89},
				       {0xec, 0x8a}, {0x0f, 0x8b},
				       {0xd8, 0x8c}, {0x0f, 0x8d},
				       {0x3d, 0x8e}, {0x00, 0x8f},
				       {0x3d, 0x90}, {0x00, 0x91},
				       {0xcd, 0x92}, {0x0f, 0x93},
				       {0xf7, 0x94}, {0x0f, 0x95},
				       {0x0c, 0x96}, {0x00, 0x97},
				       {0x00, 0x98}, {0x66, 0x99},
				       {0x05, 0x9a}, {0x00, 0x9b},
				       {0x04, 0x9c}, {0x00, 0x9d},
				       {0x08, 0x9e}, {0x00, 0x9f},
				       {0x2d, 0xc0}, {0x2d, 0xc1},
				       {0x3a, 0xc2}, {0x05, 0xc3},
				       {0x04, 0xc4}, {0x3f, 0xc5},
				       {0x00, 0xc6}, {0x00, 0xc7},
				       {0x50, 0xc8}, {0x3C, 0xc9},
				       {0x28, 0xca}, {0xd8, 0xcb},
				       {0x14, 0xcc}, {0xec, 0xcd},
				       {0x32, 0xce}, {0xdd, 0xcf},
				       {0x32, 0xd0}, {0xdd, 0xd1},
				       {0x6a, 0xd2}, {0x50, 0xd3},
				       {0x00, 0xd4}, {0x00, 0xd5},
				       {0x00, 0xd6});

	err += sn9c102_i2c_write(cam, 0x12, 0x80);
	err += sn9c102_i2c_write(cam, 0x11, 0x09);
	err += sn9c102_i2c_write(cam, 0x00, 0x0A);
	err += sn9c102_i2c_write(cam, 0x01, 0x80);
	err += sn9c102_i2c_write(cam, 0x02, 0x80);
	err += sn9c102_i2c_write(cam, 0x03, 0x00);
	err += sn9c102_i2c_write(cam, 0x04, 0x00);
	err += sn9c102_i2c_write(cam, 0x05, 0x08);
	err += sn9c102_i2c_write(cam, 0x06, 0x0B);
	err += sn9c102_i2c_write(cam, 0x07, 0x00);
	err += sn9c102_i2c_write(cam, 0x08, 0x1C);
	err += sn9c102_i2c_write(cam, 0x09, 0x01);
	err += sn9c102_i2c_write(cam, 0x0A, 0x76);
	err += sn9c102_i2c_write(cam, 0x0B, 0x60);
	err += sn9c102_i2c_write(cam, 0x0C, 0x00);
	err += sn9c102_i2c_write(cam, 0x0D, 0x08);
	err += sn9c102_i2c_write(cam, 0x0E, 0x04);
	err += sn9c102_i2c_write(cam, 0x0F, 0x6F);
	err += sn9c102_i2c_write(cam, 0x10, 0x20);
	err += sn9c102_i2c_write(cam, 0x11, 0x03);
	err += sn9c102_i2c_write(cam, 0x12, 0x05);
	err += sn9c102_i2c_write(cam, 0x13, 0xC7);
	err += sn9c102_i2c_write(cam, 0x14, 0x2C);
	err += sn9c102_i2c_write(cam, 0x15, 0x00);
	err += sn9c102_i2c_write(cam, 0x16, 0x02);
	err += sn9c102_i2c_write(cam, 0x17, 0x10);
	err += sn9c102_i2c_write(cam, 0x18, 0x60);
	err += sn9c102_i2c_write(cam, 0x19, 0x02);
	err += sn9c102_i2c_write(cam, 0x1A, 0x7B);
	err += sn9c102_i2c_write(cam, 0x1B, 0x02);
	err += sn9c102_i2c_write(cam, 0x1C, 0x7F);
	err += sn9c102_i2c_write(cam, 0x1D, 0xA2);
	err += sn9c102_i2c_write(cam, 0x1E, 0x01);
	err += sn9c102_i2c_write(cam, 0x1F, 0x0E);
	err += sn9c102_i2c_write(cam, 0x20, 0x05);
	err += sn9c102_i2c_write(cam, 0x21, 0x05);
	err += sn9c102_i2c_write(cam, 0x22, 0x05);
	err += sn9c102_i2c_write(cam, 0x23, 0x05);
	err += sn9c102_i2c_write(cam, 0x24, 0x68);
	err += sn9c102_i2c_write(cam, 0x25, 0x58);
	err += sn9c102_i2c_write(cam, 0x26, 0xD4);
	err += sn9c102_i2c_write(cam, 0x27, 0x80);
	err += sn9c102_i2c_write(cam, 0x28, 0x80);
	err += sn9c102_i2c_write(cam, 0x29, 0x30);
	err += sn9c102_i2c_write(cam, 0x2A, 0x00);
	err += sn9c102_i2c_write(cam, 0x2B, 0x00);
	err += sn9c102_i2c_write(cam, 0x2C, 0x80);
	err += sn9c102_i2c_write(cam, 0x2D, 0x00);
	err += sn9c102_i2c_write(cam, 0x2E, 0x00);
	err += sn9c102_i2c_write(cam, 0x2F, 0x0E);
	err += sn9c102_i2c_write(cam, 0x30, 0x08);
	err += sn9c102_i2c_write(cam, 0x31, 0x30);
	err += sn9c102_i2c_write(cam, 0x32, 0xB4);
	err += sn9c102_i2c_write(cam, 0x33, 0x00);
	err += sn9c102_i2c_write(cam, 0x34, 0x07);
	err += sn9c102_i2c_write(cam, 0x35, 0x84);
	err += sn9c102_i2c_write(cam, 0x36, 0x00);
	err += sn9c102_i2c_write(cam, 0x37, 0x0C);
	err += sn9c102_i2c_write(cam, 0x38, 0x02);
	err += sn9c102_i2c_write(cam, 0x39, 0x43);
	err += sn9c102_i2c_write(cam, 0x3A, 0x00);
	err += sn9c102_i2c_write(cam, 0x3B, 0x0A);
	err += sn9c102_i2c_write(cam, 0x3C, 0x6C);
	err += sn9c102_i2c_write(cam, 0x3D, 0x99);
	err += sn9c102_i2c_write(cam, 0x3E, 0x0E);
	err += sn9c102_i2c_write(cam, 0x3F, 0x41);
	err += sn9c102_i2c_write(cam, 0x40, 0xC1);
	err += sn9c102_i2c_write(cam, 0x41, 0x22);
	err += sn9c102_i2c_write(cam, 0x42, 0x08);
	err += sn9c102_i2c_write(cam, 0x43, 0xF0);
	err += sn9c102_i2c_write(cam, 0x44, 0x10);
	err += sn9c102_i2c_write(cam, 0x45, 0x78);
	err += sn9c102_i2c_write(cam, 0x46, 0xA8);
	err += sn9c102_i2c_write(cam, 0x47, 0x60);
	err += sn9c102_i2c_write(cam, 0x48, 0x80);
	err += sn9c102_i2c_write(cam, 0x49, 0x00);
	err += sn9c102_i2c_write(cam, 0x4A, 0x00);
	err += sn9c102_i2c_write(cam, 0x4B, 0x00);
	err += sn9c102_i2c_write(cam, 0x4C, 0x00);
	err += sn9c102_i2c_write(cam, 0x4D, 0x00);
	err += sn9c102_i2c_write(cam, 0x4E, 0x00);
	err += sn9c102_i2c_write(cam, 0x4F, 0x46);
	err += sn9c102_i2c_write(cam, 0x50, 0x36);
	err += sn9c102_i2c_write(cam, 0x51, 0x0F);
	err += sn9c102_i2c_write(cam, 0x52, 0x17);
	err += sn9c102_i2c_write(cam, 0x53, 0x7F);
	err += sn9c102_i2c_write(cam, 0x54, 0x96);
	err += sn9c102_i2c_write(cam, 0x55, 0x40);
	err += sn9c102_i2c_write(cam, 0x56, 0x40);
	err += sn9c102_i2c_write(cam, 0x57, 0x40);
	err += sn9c102_i2c_write(cam, 0x58, 0x0F);
	err += sn9c102_i2c_write(cam, 0x59, 0xBA);
	err += sn9c102_i2c_write(cam, 0x5A, 0x9A);
	err += sn9c102_i2c_write(cam, 0x5B, 0x22);
	err += sn9c102_i2c_write(cam, 0x5C, 0xB9);
	err += sn9c102_i2c_write(cam, 0x5D, 0x9B);
	err += sn9c102_i2c_write(cam, 0x5E, 0x10);
	err += sn9c102_i2c_write(cam, 0x5F, 0xF0);
	err += sn9c102_i2c_write(cam, 0x60, 0x05);
	err += sn9c102_i2c_write(cam, 0x61, 0x60);
	err += sn9c102_i2c_write(cam, 0x62, 0x00);
	err += sn9c102_i2c_write(cam, 0x63, 0x00);
	err += sn9c102_i2c_write(cam, 0x64, 0x50);
	err += sn9c102_i2c_write(cam, 0x65, 0x30);
	err += sn9c102_i2c_write(cam, 0x66, 0x00);
	err += sn9c102_i2c_write(cam, 0x67, 0x80);
	err += sn9c102_i2c_write(cam, 0x68, 0x7A);
	err += sn9c102_i2c_write(cam, 0x69, 0x90);
	err += sn9c102_i2c_write(cam, 0x6A, 0x80);
	err += sn9c102_i2c_write(cam, 0x6B, 0x0A);
	err += sn9c102_i2c_write(cam, 0x6C, 0x30);
	err += sn9c102_i2c_write(cam, 0x6D, 0x48);
	err += sn9c102_i2c_write(cam, 0x6E, 0x80);
	err += sn9c102_i2c_write(cam, 0x6F, 0x74);
	err += sn9c102_i2c_write(cam, 0x70, 0x64);
	err += sn9c102_i2c_write(cam, 0x71, 0x60);
	err += sn9c102_i2c_write(cam, 0x72, 0x5C);
	err += sn9c102_i2c_write(cam, 0x73, 0x58);
	err += sn9c102_i2c_write(cam, 0x74, 0x54);
	err += sn9c102_i2c_write(cam, 0x75, 0x4C);
	err += sn9c102_i2c_write(cam, 0x76, 0x40);
	err += sn9c102_i2c_write(cam, 0x77, 0x38);
	err += sn9c102_i2c_write(cam, 0x78, 0x34);
	err += sn9c102_i2c_write(cam, 0x79, 0x30);
	err += sn9c102_i2c_write(cam, 0x7A, 0x2F);
	err += sn9c102_i2c_write(cam, 0x7B, 0x2B);
	err += sn9c102_i2c_write(cam, 0x7C, 0x03);
	err += sn9c102_i2c_write(cam, 0x7D, 0x07);
	err += sn9c102_i2c_write(cam, 0x7E, 0x17);
	err += sn9c102_i2c_write(cam, 0x7F, 0x34);
	err += sn9c102_i2c_write(cam, 0x80, 0x41);
	err += sn9c102_i2c_write(cam, 0x81, 0x4D);
	err += sn9c102_i2c_write(cam, 0x82, 0x58);
	err += sn9c102_i2c_write(cam, 0x83, 0x63);
	err += sn9c102_i2c_write(cam, 0x84, 0x6E);
	err += sn9c102_i2c_write(cam, 0x85, 0x77);
	err += sn9c102_i2c_write(cam, 0x86, 0x87);
	err += sn9c102_i2c_write(cam, 0x87, 0x95);
	err += sn9c102_i2c_write(cam, 0x88, 0xAF);
	err += sn9c102_i2c_write(cam, 0x89, 0xC7);
	err += sn9c102_i2c_write(cam, 0x8A, 0xDF);
	err += sn9c102_i2c_write(cam, 0x8B, 0x99);
	err += sn9c102_i2c_write(cam, 0x8C, 0x99);
	err += sn9c102_i2c_write(cam, 0x8D, 0xCF);
	err += sn9c102_i2c_write(cam, 0x8E, 0x20);
	err += sn9c102_i2c_write(cam, 0x8F, 0x26);
	err += sn9c102_i2c_write(cam, 0x90, 0x10);
	err += sn9c102_i2c_write(cam, 0x91, 0x0C);
	err += sn9c102_i2c_write(cam, 0x92, 0x25);
	err += sn9c102_i2c_write(cam, 0x93, 0x00);
	err += sn9c102_i2c_write(cam, 0x94, 0x50);
	err += sn9c102_i2c_write(cam, 0x95, 0x50);
	err += sn9c102_i2c_write(cam, 0x96, 0x00);
	err += sn9c102_i2c_write(cam, 0x97, 0x01);
	err += sn9c102_i2c_write(cam, 0x98, 0x10);
	err += sn9c102_i2c_write(cam, 0x99, 0x40);
	err += sn9c102_i2c_write(cam, 0x9A, 0x40);
	err += sn9c102_i2c_write(cam, 0x9B, 0x20);
	err += sn9c102_i2c_write(cam, 0x9C, 0x00);
	err += sn9c102_i2c_write(cam, 0x9D, 0x99);
	err += sn9c102_i2c_write(cam, 0x9E, 0x7F);
	err += sn9c102_i2c_write(cam, 0x9F, 0x00);
	err += sn9c102_i2c_write(cam, 0xA0, 0x00);
	err += sn9c102_i2c_write(cam, 0xA1, 0x00);

	return err;
}


static int ov7660_get_ctrl(struct sn9c102_device* cam,
			   struct v4l2_control* ctrl)
{
	int err = 0;

	switch (ctrl->id) {
	case V4L2_CID_EXPOSURE:
		if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
			return -EIO;
		break;
	case V4L2_CID_DO_WHITE_BALANCE:
		if ((ctrl->value = sn9c102_read_reg(cam, 0x02)) < 0)
			return -EIO;
		ctrl->value = (ctrl->value & 0x04) ? 1 : 0;
		break;
	case V4L2_CID_RED_BALANCE:
		if ((ctrl->value = sn9c102_read_reg(cam, 0x05)) < 0)
			return -EIO;
		ctrl->value &= 0x7f;
		break;
	case V4L2_CID_BLUE_BALANCE:
		if ((ctrl->value = sn9c102_read_reg(cam, 0x06)) < 0)
			return -EIO;
		ctrl->value &= 0x7f;
		break;
	case SN9C102_V4L2_CID_GREEN_BALANCE:
		if ((ctrl->value = sn9c102_read_reg(cam, 0x07)) < 0)
			return -EIO;
		ctrl->value &= 0x7f;
		break;
	case SN9C102_V4L2_CID_BAND_FILTER:
		if ((ctrl->value = sn9c102_i2c_read(cam, 0x3b)) < 0)
			return -EIO;
		ctrl->value &= 0x08;
		break;
	case V4L2_CID_GAIN:
		if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
			return -EIO;
		ctrl->value &= 0x1f;
		break;
	case V4L2_CID_AUTOGAIN:
		if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
			return -EIO;
		ctrl->value &= 0x01;
		break;
	default:
		return -EINVAL;
	}

	return err ? -EIO : 0;
}


static int ov7660_set_ctrl(struct sn9c102_device* cam,
			   const struct v4l2_control* ctrl)
{
	int err = 0;

	switch (ctrl->id) {
	case V4L2_CID_EXPOSURE:
		err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
		break;
	case V4L2_CID_DO_WHITE_BALANCE:
		err += sn9c102_write_reg(cam, 0x43 | (ctrl->value << 2), 0x02);
		break;
	case V4L2_CID_RED_BALANCE:
		err += sn9c102_write_reg(cam, ctrl->value, 0x05);
		break;
	case V4L2_CID_BLUE_BALANCE:
		err += sn9c102_write_reg(cam, ctrl->value, 0x06);
		break;
	case SN9C102_V4L2_CID_GREEN_BALANCE:
		err += sn9c102_write_reg(cam, ctrl->value, 0x07);
		break;
	case SN9C102_V4L2_CID_BAND_FILTER:
		err += sn9c102_i2c_write(cam, ctrl->value << 3, 0x3b);
		break;
	case V4L2_CID_GAIN:
		err += sn9c102_i2c_write(cam, 0x00, 0x60 + ctrl->value);
		break;
	case V4L2_CID_AUTOGAIN:
		err += sn9c102_i2c_write(cam, 0x13, 0xc0 |
						    (ctrl->value * 0x07));
		break;
	default:
		return -EINVAL;
	}

	return err ? -EIO : 0;
}


static int ov7660_set_crop(struct sn9c102_device* cam,
			   const struct v4l2_rect* rect)
{
	struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
	int err = 0;
	u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1,
	   v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;

	err += sn9c102_write_reg(cam, h_start, 0x12);
	err += sn9c102_write_reg(cam, v_start, 0x13);

	return err;
}


static int ov7660_set_pix_format(struct sn9c102_device* cam,
				 const struct v4l2_pix_format* pix)
{
	int r0, err = 0;

	r0 = sn9c102_pread_reg(cam, 0x01);

	if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
		err += sn9c102_write_reg(cam, r0 | 0x40, 0x01);
		err += sn9c102_write_reg(cam, 0xa2, 0x17);
		err += sn9c102_i2c_write(cam, 0x11, 0x00);
	} else {
		err += sn9c102_write_reg(cam, r0 | 0x40, 0x01);
		err += sn9c102_write_reg(cam, 0xa2, 0x17);
		err += sn9c102_i2c_write(cam, 0x11, 0x0d);
	}

	return err;
}


static const struct sn9c102_sensor ov7660 = {
	.name = "OV7660",
	.maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
	.supported_bridge = BRIDGE_SN9C105 | BRIDGE_SN9C120,
	.sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
	.frequency = SN9C102_I2C_100KHZ,
	.interface = SN9C102_I2C_2WIRES,
	.i2c_slave_id = 0x21,
	.init = &ov7660_init,
	.qctrl = {
		{
			.id = V4L2_CID_GAIN,
			.type = V4L2_CTRL_TYPE_INTEGER,
			.name = "global gain",
			.minimum = 0x00,
			.maximum = 0x1f,
			.step = 0x01,
			.default_value = 0x09,
			.flags = 0,
		},
		{
			.id = V4L2_CID_EXPOSURE,
			.type = V4L2_CTRL_TYPE_INTEGER,
			.name = "exposure",
			.minimum = 0x00,
			.maximum = 0xff,
			.step = 0x01,
			.default_value = 0x27,
			.flags = 0,
		},
		{
			.id = V4L2_CID_DO_WHITE_BALANCE,
			.type = V4L2_CTRL_TYPE_BOOLEAN,
			.name = "night mode",
			.minimum = 0x00,
			.maximum = 0x01,
			.step = 0x01,
			.default_value = 0x00,
			.flags = 0,
		},
		{
			.id = V4L2_CID_RED_BALANCE,
			.type = V4L2_CTRL_TYPE_INTEGER,
			.name = "red balance",
			.minimum = 0x00,
			.maximum = 0x7f,
			.step = 0x01,
			.default_value = 0x14,
			.flags = 0,
		},
		{
			.id = V4L2_CID_BLUE_BALANCE,
			.type = V4L2_CTRL_TYPE_INTEGER,
			.name = "blue balance",
			.minimum = 0x00,
			.maximum = 0x7f,
			.step = 0x01,
			.default_value = 0x14,
			.flags = 0,
		},
		{
			.id = V4L2_CID_AUTOGAIN,
			.type = V4L2_CTRL_TYPE_BOOLEAN,
			.name = "auto adjust",
			.minimum = 0x00,
			.maximum = 0x01,
			.step = 0x01,
			.default_value = 0x01,
			.flags = 0,
		},
		{
			.id = SN9C102_V4L2_CID_GREEN_BALANCE,
			.type = V4L2_CTRL_TYPE_INTEGER,
			.name = "green balance",
			.minimum = 0x00,
			.maximum = 0x7f,
			.step = 0x01,
			.default_value = 0x14,
			.flags = 0,
		},
		{
			.id = SN9C102_V4L2_CID_BAND_FILTER,
			.type = V4L2_CTRL_TYPE_BOOLEAN,
			.name = "band filter",
			.minimum = 0x00,
			.maximum = 0x01,
			.step = 0x01,
			.default_value = 0x00,
			.flags = 0,
		},
	},
	.get_ctrl = &ov7660_get_ctrl,
	.set_ctrl = &ov7660_set_ctrl,
	.cropcap = {
		.bounds = {
			.left = 0,
			.top = 0,
			.width = 640,
			.height = 480,
		},
		.defrect = {
			.left = 0,
			.top = 0,
			.width = 640,
			.height = 480,
		},
	},
	.set_crop = &ov7660_set_crop,
	.pix_format = {
		.width = 640,
		.height = 480,
		.pixelformat = V4L2_PIX_FMT_JPEG,
		.priv = 8,
	},
	.set_pix_format = &ov7660_set_pix_format
};


int sn9c102_probe_ov7660(struct sn9c102_device* cam)
{
	int pid, ver, err;

	err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1},
				       {0x01, 0x01}, {0x00, 0x01},
				       {0x28, 0x17});

	pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a);
	ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b);
	if (err || pid < 0 || ver < 0)
		return -EIO;
	if (pid != 0x76 || ver != 0x60)
		return -ENODEV;

	sn9c102_attach_sensor(cam, &ov7660);

	return 0;
}
Commit	Line	Data
f327ebbd LR	1	/***************************************************************************
	2	* Plug-in for OV7660 image sensor connected to the SN9C1xx PC Camera *
	3	* Controllers *
	4	* *
	5	* Copyright (C) 2007 by Luca Risolia <luca.risolia@studio.unibo.it> *
	6	* *
	7	* This program is free software; you can redistribute it and/or modify *
	8	* it under the terms of the GNU General Public License as published by *
	9	* the Free Software Foundation; either version 2 of the License, or *
	10	* (at your option) any later version. *
	11	* *
	12	* This program is distributed in the hope that it will be useful, *
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of *
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
	15	* GNU General Public License for more details. *
	16	* *
	17	* You should have received a copy of the GNU General Public License *
	18	* along with this program; if not, write to the Free Software *
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
	20	***************************************************************************/
	21
	22	#include "sn9c102_sensor.h"
	23
	24
f327ebbd LR	25	static int ov7660_init(struct sn9c102_device* cam)
	26	{
	27	int err = 0;
	28
c680dd60 TP	29	err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03},
	30	{0x1a, 0x04}, {0x03, 0x10},
	31	{0x08, 0x14}, {0x20, 0x17},
	32	{0x8b, 0x18}, {0x00, 0x19},
	33	{0x1d, 0x1a}, {0x10, 0x1b},
	34	{0x02, 0x1c}, {0x03, 0x1d},
	35	{0x0f, 0x1e}, {0x0c, 0x1f},
	36	{0x00, 0x20}, {0x29, 0x21},
	37	{0x40, 0x22}, {0x54, 0x23},
	38	{0x66, 0x24}, {0x76, 0x25},
	39	{0x85, 0x26}, {0x94, 0x27},
	40	{0xa1, 0x28}, {0xae, 0x29},
	41	{0xbb, 0x2a}, {0xc7, 0x2b},
	42	{0xd3, 0x2c}, {0xde, 0x2d},
	43	{0xea, 0x2e}, {0xf4, 0x2f},
3770be34 LR	44	{0xff, 0x30}, {0x00, 0x3f},
3770be34 LR	45	{0xc7, 0x40}, {0x01, 0x41},
c680dd60 TP	46	{0x44, 0x42}, {0x00, 0x43},
	47	{0x44, 0x44}, {0x00, 0x45},
	48	{0x44, 0x46}, {0x00, 0x47},
3770be34 LR	49	{0xc7, 0x48}, {0x01, 0x49},
	50	{0xc7, 0x4a}, {0x01, 0x4b},
	51	{0xc7, 0x4c}, {0x01, 0x4d},
	52	{0x44, 0x4e}, {0x00, 0x4f},
c680dd60 TP	53	{0x44, 0x50}, {0x00, 0x51},
c680dd60 TP	54	{0x44, 0x52}, {0x00, 0x53},
3770be34 LR	55	{0xc7, 0x54}, {0x01, 0x55},
	56	{0xc7, 0x56}, {0x01, 0x57},
	57	{0xc7, 0x58}, {0x01, 0x59},
	58	{0x44, 0x5a}, {0x00, 0x5b},
	59	{0x44, 0x5c}, {0x00, 0x5d},
	60	{0x44, 0x5e}, {0x00, 0x5f},
	61	{0xc7, 0x60}, {0x01, 0x61},
	62	{0xc7, 0x62}, {0x01, 0x63},
	63	{0xc7, 0x64}, {0x01, 0x65},
c680dd60 TP	64	{0x44, 0x66}, {0x00, 0x67},
c680dd60 TP	65	{0x44, 0x68}, {0x00, 0x69},
3770be34 LR	66	{0x44, 0x6a}, {0x00, 0x6b},
	67	{0xc7, 0x6c}, {0x01, 0x6d},
	68	{0xc7, 0x6e}, {0x01, 0x6f},
	69	{0xc7, 0x70}, {0x01, 0x71},
c680dd60 TP	70	{0x44, 0x72}, {0x00, 0x73},
	71	{0x44, 0x74}, {0x00, 0x75},
	72	{0x44, 0x76}, {0x00, 0x77},
3770be34 LR	73	{0xc7, 0x78}, {0x01, 0x79},
	74	{0xc7, 0x7a}, {0x01, 0x7b},
	75	{0xc7, 0x7c}, {0x01, 0x7d},
	76	{0x44, 0x7e}, {0x00, 0x7f},
c680dd60 TP	77	{0x14, 0x84}, {0x00, 0x85},
	78	{0x27, 0x86}, {0x00, 0x87},
	79	{0x07, 0x88}, {0x00, 0x89},
3770be34 LR	80	{0xec, 0x8a}, {0x0f, 0x8b},
	81	{0xd8, 0x8c}, {0x0f, 0x8d},
	82	{0x3d, 0x8e}, {0x00, 0x8f},
	83	{0x3d, 0x90}, {0x00, 0x91},
	84	{0xcd, 0x92}, {0x0f, 0x93},
c680dd60	85	{0xf7, 0x94}, {0x0f, 0x95},
3770be34	86	{0x0c, 0x96}, {0x00, 0x97},
c680dd60	87	{0x00, 0x98}, {0x66, 0x99},
3770be34 LR	88	{0x05, 0x9a}, {0x00, 0x9b},
	89	{0x04, 0x9c}, {0x00, 0x9d},
	90	{0x08, 0x9e}, {0x00, 0x9f},
	91	{0x2d, 0xc0}, {0x2d, 0xc1},
	92	{0x3a, 0xc2}, {0x05, 0xc3},
	93	{0x04, 0xc4}, {0x3f, 0xc5},
	94	{0x00, 0xc6}, {0x00, 0xc7},
	95	{0x50, 0xc8}, {0x3C, 0xc9},
	96	{0x28, 0xca}, {0xd8, 0xcb},
	97	{0x14, 0xcc}, {0xec, 0xcd},
	98	{0x32, 0xce}, {0xdd, 0xcf},
	99	{0x32, 0xd0}, {0xdd, 0xd1},
	100	{0x6a, 0xd2}, {0x50, 0xd3},
	101	{0x00, 0xd4}, {0x00, 0xd5},
	102	{0x00, 0xd6});
f327ebbd LR	103
	104	err += sn9c102_i2c_write(cam, 0x12, 0x80);
	105	err += sn9c102_i2c_write(cam, 0x11, 0x09);
	106	err += sn9c102_i2c_write(cam, 0x00, 0x0A);
480b55c2 LR	107	err += sn9c102_i2c_write(cam, 0x01, 0x80);
480b55c2 LR	108	err += sn9c102_i2c_write(cam, 0x02, 0x80);
f327ebbd LR	109	err += sn9c102_i2c_write(cam, 0x03, 0x00);
	110	err += sn9c102_i2c_write(cam, 0x04, 0x00);
	111	err += sn9c102_i2c_write(cam, 0x05, 0x08);
	112	err += sn9c102_i2c_write(cam, 0x06, 0x0B);
	113	err += sn9c102_i2c_write(cam, 0x07, 0x00);
	114	err += sn9c102_i2c_write(cam, 0x08, 0x1C);
	115	err += sn9c102_i2c_write(cam, 0x09, 0x01);
	116	err += sn9c102_i2c_write(cam, 0x0A, 0x76);
	117	err += sn9c102_i2c_write(cam, 0x0B, 0x60);
	118	err += sn9c102_i2c_write(cam, 0x0C, 0x00);
	119	err += sn9c102_i2c_write(cam, 0x0D, 0x08);
	120	err += sn9c102_i2c_write(cam, 0x0E, 0x04);
	121	err += sn9c102_i2c_write(cam, 0x0F, 0x6F);
	122	err += sn9c102_i2c_write(cam, 0x10, 0x20);
	123	err += sn9c102_i2c_write(cam, 0x11, 0x03);
	124	err += sn9c102_i2c_write(cam, 0x12, 0x05);
480b55c2	125	err += sn9c102_i2c_write(cam, 0x13, 0xC7);
f327ebbd LR	126	err += sn9c102_i2c_write(cam, 0x14, 0x2C);
	127	err += sn9c102_i2c_write(cam, 0x15, 0x00);
	128	err += sn9c102_i2c_write(cam, 0x16, 0x02);
	129	err += sn9c102_i2c_write(cam, 0x17, 0x10);
	130	err += sn9c102_i2c_write(cam, 0x18, 0x60);
	131	err += sn9c102_i2c_write(cam, 0x19, 0x02);
	132	err += sn9c102_i2c_write(cam, 0x1A, 0x7B);
	133	err += sn9c102_i2c_write(cam, 0x1B, 0x02);
	134	err += sn9c102_i2c_write(cam, 0x1C, 0x7F);
	135	err += sn9c102_i2c_write(cam, 0x1D, 0xA2);
	136	err += sn9c102_i2c_write(cam, 0x1E, 0x01);
	137	err += sn9c102_i2c_write(cam, 0x1F, 0x0E);
	138	err += sn9c102_i2c_write(cam, 0x20, 0x05);
	139	err += sn9c102_i2c_write(cam, 0x21, 0x05);
	140	err += sn9c102_i2c_write(cam, 0x22, 0x05);
	141	err += sn9c102_i2c_write(cam, 0x23, 0x05);
	142	err += sn9c102_i2c_write(cam, 0x24, 0x68);
	143	err += sn9c102_i2c_write(cam, 0x25, 0x58);
	144	err += sn9c102_i2c_write(cam, 0x26, 0xD4);
	145	err += sn9c102_i2c_write(cam, 0x27, 0x80);
	146	err += sn9c102_i2c_write(cam, 0x28, 0x80);
	147	err += sn9c102_i2c_write(cam, 0x29, 0x30);
	148	err += sn9c102_i2c_write(cam, 0x2A, 0x00);
	149	err += sn9c102_i2c_write(cam, 0x2B, 0x00);
	150	err += sn9c102_i2c_write(cam, 0x2C, 0x80);
	151	err += sn9c102_i2c_write(cam, 0x2D, 0x00);
	152	err += sn9c102_i2c_write(cam, 0x2E, 0x00);
	153	err += sn9c102_i2c_write(cam, 0x2F, 0x0E);
	154	err += sn9c102_i2c_write(cam, 0x30, 0x08);
	155	err += sn9c102_i2c_write(cam, 0x31, 0x30);
	156	err += sn9c102_i2c_write(cam, 0x32, 0xB4);
	157	err += sn9c102_i2c_write(cam, 0x33, 0x00);
	158	err += sn9c102_i2c_write(cam, 0x34, 0x07);
	159	err += sn9c102_i2c_write(cam, 0x35, 0x84);
	160	err += sn9c102_i2c_write(cam, 0x36, 0x00);
	161	err += sn9c102_i2c_write(cam, 0x37, 0x0C);
	162	err += sn9c102_i2c_write(cam, 0x38, 0x02);
	163	err += sn9c102_i2c_write(cam, 0x39, 0x43);
	164	err += sn9c102_i2c_write(cam, 0x3A, 0x00);
480b55c2	165	err += sn9c102_i2c_write(cam, 0x3B, 0x0A);
f327ebbd LR	166	err += sn9c102_i2c_write(cam, 0x3C, 0x6C);
	167	err += sn9c102_i2c_write(cam, 0x3D, 0x99);
	168	err += sn9c102_i2c_write(cam, 0x3E, 0x0E);
	169	err += sn9c102_i2c_write(cam, 0x3F, 0x41);
	170	err += sn9c102_i2c_write(cam, 0x40, 0xC1);
	171	err += sn9c102_i2c_write(cam, 0x41, 0x22);
	172	err += sn9c102_i2c_write(cam, 0x42, 0x08);
	173	err += sn9c102_i2c_write(cam, 0x43, 0xF0);
	174	err += sn9c102_i2c_write(cam, 0x44, 0x10);
	175	err += sn9c102_i2c_write(cam, 0x45, 0x78);
	176	err += sn9c102_i2c_write(cam, 0x46, 0xA8);
	177	err += sn9c102_i2c_write(cam, 0x47, 0x60);
	178	err += sn9c102_i2c_write(cam, 0x48, 0x80);
	179	err += sn9c102_i2c_write(cam, 0x49, 0x00);
	180	err += sn9c102_i2c_write(cam, 0x4A, 0x00);
	181	err += sn9c102_i2c_write(cam, 0x4B, 0x00);
	182	err += sn9c102_i2c_write(cam, 0x4C, 0x00);
	183	err += sn9c102_i2c_write(cam, 0x4D, 0x00);
	184	err += sn9c102_i2c_write(cam, 0x4E, 0x00);
	185	err += sn9c102_i2c_write(cam, 0x4F, 0x46);
	186	err += sn9c102_i2c_write(cam, 0x50, 0x36);
	187	err += sn9c102_i2c_write(cam, 0x51, 0x0F);
	188	err += sn9c102_i2c_write(cam, 0x52, 0x17);
	189	err += sn9c102_i2c_write(cam, 0x53, 0x7F);
	190	err += sn9c102_i2c_write(cam, 0x54, 0x96);
	191	err += sn9c102_i2c_write(cam, 0x55, 0x40);
	192	err += sn9c102_i2c_write(cam, 0x56, 0x40);
	193	err += sn9c102_i2c_write(cam, 0x57, 0x40);
	194	err += sn9c102_i2c_write(cam, 0x58, 0x0F);
	195	err += sn9c102_i2c_write(cam, 0x59, 0xBA);
	196	err += sn9c102_i2c_write(cam, 0x5A, 0x9A);
	197	err += sn9c102_i2c_write(cam, 0x5B, 0x22);
	198	err += sn9c102_i2c_write(cam, 0x5C, 0xB9);
	199	err += sn9c102_i2c_write(cam, 0x5D, 0x9B);
	200	err += sn9c102_i2c_write(cam, 0x5E, 0x10);
	201	err += sn9c102_i2c_write(cam, 0x5F, 0xF0);
	202	err += sn9c102_i2c_write(cam, 0x60, 0x05);
	203	err += sn9c102_i2c_write(cam, 0x61, 0x60);
	204	err += sn9c102_i2c_write(cam, 0x62, 0x00);
	205	err += sn9c102_i2c_write(cam, 0x63, 0x00);
	206	err += sn9c102_i2c_write(cam, 0x64, 0x50);
	207	err += sn9c102_i2c_write(cam, 0x65, 0x30);
	208	err += sn9c102_i2c_write(cam, 0x66, 0x00);
	209	err += sn9c102_i2c_write(cam, 0x67, 0x80);
	210	err += sn9c102_i2c_write(cam, 0x68, 0x7A);
	211	err += sn9c102_i2c_write(cam, 0x69, 0x90);
	212	err += sn9c102_i2c_write(cam, 0x6A, 0x80);
	213	err += sn9c102_i2c_write(cam, 0x6B, 0x0A);
	214	err += sn9c102_i2c_write(cam, 0x6C, 0x30);
	215	err += sn9c102_i2c_write(cam, 0x6D, 0x48);
	216	err += sn9c102_i2c_write(cam, 0x6E, 0x80);
	217	err += sn9c102_i2c_write(cam, 0x6F, 0x74);
	218	err += sn9c102_i2c_write(cam, 0x70, 0x64);
	219	err += sn9c102_i2c_write(cam, 0x71, 0x60);
	220	err += sn9c102_i2c_write(cam, 0x72, 0x5C);
	221	err += sn9c102_i2c_write(cam, 0x73, 0x58);
	222	err += sn9c102_i2c_write(cam, 0x74, 0x54);
	223	err += sn9c102_i2c_write(cam, 0x75, 0x4C);
	224	err += sn9c102_i2c_write(cam, 0x76, 0x40);
	225	err += sn9c102_i2c_write(cam, 0x77, 0x38);
	226	err += sn9c102_i2c_write(cam, 0x78, 0x34);
	227	err += sn9c102_i2c_write(cam, 0x79, 0x30);
	228	err += sn9c102_i2c_write(cam, 0x7A, 0x2F);
	229	err += sn9c102_i2c_write(cam, 0x7B, 0x2B);
230	err += sn9c102_i2c_write(cam, 0x7C, 0x03);
231	err += sn9c102_i2c_write(cam, 0x7D, 0x07);
232	err += sn9c102_i2c_write(cam, 0x7E, 0x17);
233	err += sn9c102_i2c_write(cam, 0x7F, 0x34);
234	err += sn9c102_i2c_write(cam, 0x80, 0x41);
235	err += sn9c102_i2c_write(cam, 0x81, 0x4D);
236	err += sn9c102_i2c_write(cam, 0x82, 0x58);
237	err += sn9c102_i2c_write(cam, 0x83, 0x63);
238	err += sn9c102_i2c_write(cam, 0x84, 0x6E);
239	err += sn9c102_i2c_write(cam, 0x85, 0x77);
240	err += sn9c102_i2c_write(cam, 0x86, 0x87);
241	err += sn9c102_i2c_write(cam, 0x87, 0x95);
242	err += sn9c102_i2c_write(cam, 0x88, 0xAF);
243	err += sn9c102_i2c_write(cam, 0x89, 0xC7);
244	err += sn9c102_i2c_write(cam, 0x8A, 0xDF);
245	err += sn9c102_i2c_write(cam, 0x8B, 0x99);
246	err += sn9c102_i2c_write(cam, 0x8C, 0x99);
247	err += sn9c102_i2c_write(cam, 0x8D, 0xCF);
248	err += sn9c102_i2c_write(cam, 0x8E, 0x20);
249	err += sn9c102_i2c_write(cam, 0x8F, 0x26);
250	err += sn9c102_i2c_write(cam, 0x90, 0x10);
251	err += sn9c102_i2c_write(cam, 0x91, 0x0C);
252	err += sn9c102_i2c_write(cam, 0x92, 0x25);
253	err += sn9c102_i2c_write(cam, 0x93, 0x00);
254	err += sn9c102_i2c_write(cam, 0x94, 0x50);
255	err += sn9c102_i2c_write(cam, 0x95, 0x50);
256	err += sn9c102_i2c_write(cam, 0x96, 0x00);
257	err += sn9c102_i2c_write(cam, 0x97, 0x01);
258	err += sn9c102_i2c_write(cam, 0x98, 0x10);
259	err += sn9c102_i2c_write(cam, 0x99, 0x40);
260	err += sn9c102_i2c_write(cam, 0x9A, 0x40);
261	err += sn9c102_i2c_write(cam, 0x9B, 0x20);
262	err += sn9c102_i2c_write(cam, 0x9C, 0x00);
263	err += sn9c102_i2c_write(cam, 0x9D, 0x99);
264	err += sn9c102_i2c_write(cam, 0x9E, 0x7F);
265	err += sn9c102_i2c_write(cam, 0x9F, 0x00);
266	err += sn9c102_i2c_write(cam, 0xA0, 0x00);
267	err += sn9c102_i2c_write(cam, 0xA1, 0x00);
268
269	return err;
270	}
271
272
273	static int ov7660_get_ctrl(struct sn9c102_device* cam,
274	struct v4l2_control* ctrl)
275	{
276	int err = 0;
277
278	switch (ctrl->id) {
279	case V4L2_CID_EXPOSURE:
280	if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
281	return -EIO;
282	break;
283	case V4L2_CID_DO_WHITE_BALANCE:
480b55c2 LR	284	if ((ctrl->value = sn9c102_read_reg(cam, 0x02)) < 0)
480b55c2 LR	285	return -EIO;
f327ebbd LR	286	ctrl->value = (ctrl->value & 0x04) ? 1 : 0;
	287	break;
	288	case V4L2_CID_RED_BALANCE:
480b55c2 LR	289	if ((ctrl->value = sn9c102_read_reg(cam, 0x05)) < 0)
480b55c2 LR	290	return -EIO;
f327ebbd LR	291	ctrl->value &= 0x7f;
	292	break;
	293	case V4L2_CID_BLUE_BALANCE:
480b55c2 LR	294	if ((ctrl->value = sn9c102_read_reg(cam, 0x06)) < 0)
480b55c2 LR	295	return -EIO;
f327ebbd LR	296	ctrl->value &= 0x7f;
	297	break;
	298	case SN9C102_V4L2_CID_GREEN_BALANCE:
480b55c2 LR	299	if ((ctrl->value = sn9c102_read_reg(cam, 0x07)) < 0)
480b55c2 LR	300	return -EIO;
f327ebbd LR	301	ctrl->value &= 0x7f;
f327ebbd LR	302	break;
480b55c2 LR	303	case SN9C102_V4L2_CID_BAND_FILTER:
	304	if ((ctrl->value = sn9c102_i2c_read(cam, 0x3b)) < 0)
	305	return -EIO;
	306	ctrl->value &= 0x08;
	307	break;
f327ebbd LR	308	case V4L2_CID_GAIN:
	309	if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
	310	return -EIO;
480b55c2	311	ctrl->value &= 0x1f;
f327ebbd LR	312	break;
	313	case V4L2_CID_AUTOGAIN:
	314	if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
	315	return -EIO;
	316	ctrl->value &= 0x01;
	317	break;
	318	default:
	319	return -EINVAL;
	320	}
	321
	322	return err ? -EIO : 0;
	323	}
	324
	325
	326	static int ov7660_set_ctrl(struct sn9c102_device* cam,
	327	const struct v4l2_control* ctrl)
	328	{
	329	int err = 0;
	330
	331	switch (ctrl->id) {
	332	case V4L2_CID_EXPOSURE:
	333	err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
	334	break;
	335	case V4L2_CID_DO_WHITE_BALANCE:
	336	err += sn9c102_write_reg(cam, 0x43 \| (ctrl->value << 2), 0x02);
	337	break;
	338	case V4L2_CID_RED_BALANCE:
	339	err += sn9c102_write_reg(cam, ctrl->value, 0x05);
	340	break;
	341	case V4L2_CID_BLUE_BALANCE:
	342	err += sn9c102_write_reg(cam, ctrl->value, 0x06);
	343	break;
	344	case SN9C102_V4L2_CID_GREEN_BALANCE:
	345	err += sn9c102_write_reg(cam, ctrl->value, 0x07);
	346	break;
480b55c2 LR	347	case SN9C102_V4L2_CID_BAND_FILTER:
	348	err += sn9c102_i2c_write(cam, ctrl->value << 3, 0x3b);
	349	break;
f327ebbd	350	case V4L2_CID_GAIN:
480b55c2	351	err += sn9c102_i2c_write(cam, 0x00, 0x60 + ctrl->value);
f327ebbd LR	352	break;
f327ebbd LR	353	case V4L2_CID_AUTOGAIN:
480b55c2 LR	354	err += sn9c102_i2c_write(cam, 0x13, 0xc0 \|
480b55c2 LR	355	(ctrl->value * 0x07));
f327ebbd LR	356	break;
	357	default:
	358	return -EINVAL;
	359	}
	360
	361	return err ? -EIO : 0;
	362	}
	363
	364
	365	static int ov7660_set_crop(struct sn9c102_device* cam,
	366	const struct v4l2_rect* rect)
	367	{
	368	struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
	369	int err = 0;
	370	u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1,
	371	v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
	372
	373	err += sn9c102_write_reg(cam, h_start, 0x12);
	374	err += sn9c102_write_reg(cam, v_start, 0x13);
	375
	376	return err;
	377	}
	378
	379
	380	static int ov7660_set_pix_format(struct sn9c102_device* cam,
	381	const struct v4l2_pix_format* pix)
	382	{
	383	int r0, err = 0;
	384
	385	r0 = sn9c102_pread_reg(cam, 0x01);
	386
	387	if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
	388	err += sn9c102_write_reg(cam, r0 \| 0x40, 0x01);
	389	err += sn9c102_write_reg(cam, 0xa2, 0x17);
	390	err += sn9c102_i2c_write(cam, 0x11, 0x00);
	391	} else {
	392	err += sn9c102_write_reg(cam, r0 \| 0x40, 0x01);
	393	err += sn9c102_write_reg(cam, 0xa2, 0x17);
	394	err += sn9c102_i2c_write(cam, 0x11, 0x0d);
	395	}
	396
	397	return err;
	398	}
	399
	400
480b55c2	401	static const struct sn9c102_sensor ov7660 = {
f327ebbd LR	402	.name = "OV7660",
	403	.maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
	404	.supported_bridge = BRIDGE_SN9C105 \| BRIDGE_SN9C120,
	405	.sysfs_ops = SN9C102_I2C_READ \| SN9C102_I2C_WRITE,
	406	.frequency = SN9C102_I2C_100KHZ,
	407	.interface = SN9C102_I2C_2WIRES,
	408	.i2c_slave_id = 0x21,
	409	.init = &ov7660_init,
	410	.qctrl = {
	411	{
	412	.id = V4L2_CID_GAIN,
	413	.type = V4L2_CTRL_TYPE_INTEGER,
	414	.name = "global gain",
	415	.minimum = 0x00,
480b55c2	416	.maximum = 0x1f,
f327ebbd	417	.step = 0x01,
480b55c2	418	.default_value = 0x09,
f327ebbd LR	419	.flags = 0,
	420	},
	421	{
	422	.id = V4L2_CID_EXPOSURE,
	423	.type = V4L2_CTRL_TYPE_INTEGER,
	424	.name = "exposure",
	425	.minimum = 0x00,
	426	.maximum = 0xff,
	427	.step = 0x01,
480b55c2	428	.default_value = 0x27,
f327ebbd LR	429	.flags = 0,
	430	},
	431	{
	432	.id = V4L2_CID_DO_WHITE_BALANCE,
	433	.type = V4L2_CTRL_TYPE_BOOLEAN,
	434	.name = "night mode",
	435	.minimum = 0x00,
	436	.maximum = 0x01,
	437	.step = 0x01,
	438	.default_value = 0x00,
	439	.flags = 0,
	440	},
	441	{
	442	.id = V4L2_CID_RED_BALANCE,
	443	.type = V4L2_CTRL_TYPE_INTEGER,
	444	.name = "red balance",
	445	.minimum = 0x00,
	446	.maximum = 0x7f,
	447	.step = 0x01,
480b55c2	448	.default_value = 0x14,
f327ebbd LR	449	.flags = 0,
	450	},
	451	{
	452	.id = V4L2_CID_BLUE_BALANCE,
	453	.type = V4L2_CTRL_TYPE_INTEGER,
	454	.name = "blue balance",
	455	.minimum = 0x00,
	456	.maximum = 0x7f,
	457	.step = 0x01,
480b55c2	458	.default_value = 0x14,
f327ebbd LR	459	.flags = 0,
	460	},
	461	{
	462	.id = V4L2_CID_AUTOGAIN,
	463	.type = V4L2_CTRL_TYPE_BOOLEAN,
	464	.name = "auto adjust",
	465	.minimum = 0x00,
	466	.maximum = 0x01,
	467	.step = 0x01,
480b55c2	468	.default_value = 0x01,
f327ebbd LR	469	.flags = 0,
	470	},
	471	{
	472	.id = SN9C102_V4L2_CID_GREEN_BALANCE,
	473	.type = V4L2_CTRL_TYPE_INTEGER,
	474	.name = "green balance",
	475	.minimum = 0x00,
	476	.maximum = 0x7f,
	477	.step = 0x01,
480b55c2 LR	478	.default_value = 0x14,
	479	.flags = 0,
	480	},
	481	{
	482	.id = SN9C102_V4L2_CID_BAND_FILTER,
	483	.type = V4L2_CTRL_TYPE_BOOLEAN,
	484	.name = "band filter",
	485	.minimum = 0x00,
	486	.maximum = 0x01,
	487	.step = 0x01,
	488	.default_value = 0x00,
f327ebbd LR	489	.flags = 0,
	490	},
	491	},
	492	.get_ctrl = &ov7660_get_ctrl,
	493	.set_ctrl = &ov7660_set_ctrl,
	494	.cropcap = {
	495	.bounds = {
	496	.left = 0,
	497	.top = 0,
	498	.width = 640,
	499	.height = 480,
	500	},
	501	.defrect = {
	502	.left = 0,
	503	.top = 0,
	504	.width = 640,
	505	.height = 480,
	506	},
	507	},
	508	.set_crop = &ov7660_set_crop,
	509	.pix_format = {
	510	.width = 640,
	511	.height = 480,
	512	.pixelformat = V4L2_PIX_FMT_JPEG,
	513	.priv = 8,
	514	},
	515	.set_pix_format = &ov7660_set_pix_format
	516	};
	517
	518
	519	int sn9c102_probe_ov7660(struct sn9c102_device* cam)
	520	{
c680dd60	521	int pid, ver, err;
f327ebbd	522
c680dd60 TP	523	err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1},
	524	{0x01, 0x01}, {0x00, 0x01},
	525	{0x28, 0x17});
f327ebbd LR	526
	527	pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a);
	528	ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b);
	529	if (err \|\| pid < 0 \|\| ver < 0)
	530	return -EIO;
	531	if (pid != 0x76 \|\| ver != 0x60)
	532	return -ENODEV;
480b55c2	533
f327ebbd LR	534	sn9c102_attach_sensor(cam, &ov7660);
	535
	536	return 0;
	537	}