Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
33b687cf | 10 | #include <linux/videodev2.h> |
cd4665c5 | 11 | #include <linux/delay.h> |
6b8fe025 | 12 | #include <media/v4l2-device.h> |
c7c0b34c | 13 | #include <media/tvp5150.h> |
bc974305 | 14 | #include <media/v4l2-chip-ident.h> |
cd4665c5 MCC |
15 | |
16 | #include "tvp5150_reg.h" | |
17 | ||
6ac48b45 | 18 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
19 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
20 | MODULE_LICENSE("GPL"); | |
21 | ||
cd4665c5 | 22 | |
ff699e6b | 23 | static int debug; |
cd4665c5 | 24 | module_param(debug, int, 0); |
6b8fe025 | 25 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 | 26 | |
a6c2ba28 | 27 | /* supported controls */ |
28 | static struct v4l2_queryctrl tvp5150_qctrl[] = { | |
29 | { | |
c0477ad9 MCC |
30 | .id = V4L2_CID_BRIGHTNESS, |
31 | .type = V4L2_CTRL_TYPE_INTEGER, | |
32 | .name = "Brightness", | |
33 | .minimum = 0, | |
34 | .maximum = 255, | |
35 | .step = 1, | |
75bc8019 | 36 | .default_value = 128, |
c0477ad9 MCC |
37 | .flags = 0, |
38 | }, { | |
39 | .id = V4L2_CID_CONTRAST, | |
40 | .type = V4L2_CTRL_TYPE_INTEGER, | |
41 | .name = "Contrast", | |
42 | .minimum = 0, | |
43 | .maximum = 255, | |
44 | .step = 0x1, | |
75bc8019 | 45 | .default_value = 128, |
c0477ad9 MCC |
46 | .flags = 0, |
47 | }, { | |
a6c2ba28 | 48 | .id = V4L2_CID_SATURATION, |
49 | .type = V4L2_CTRL_TYPE_INTEGER, | |
50 | .name = "Saturation", | |
51 | .minimum = 0, | |
52 | .maximum = 255, | |
53 | .step = 0x1, | |
75bc8019 | 54 | .default_value = 128, |
a6c2ba28 | 55 | .flags = 0, |
c0477ad9 MCC |
56 | }, { |
57 | .id = V4L2_CID_HUE, | |
58 | .type = V4L2_CTRL_TYPE_INTEGER, | |
59 | .name = "Hue", | |
60 | .minimum = -128, | |
61 | .maximum = 127, | |
62 | .step = 0x1, | |
75bc8019 | 63 | .default_value = 0, |
c0477ad9 MCC |
64 | .flags = 0, |
65 | } | |
a6c2ba28 | 66 | }; |
67 | ||
cd4665c5 | 68 | struct tvp5150 { |
6b8fe025 | 69 | struct v4l2_subdev sd; |
84486d53 | 70 | |
3ad96835 | 71 | v4l2_std_id norm; /* Current set standard */ |
5325b427 HV |
72 | u32 input; |
73 | u32 output; | |
84486d53 MCC |
74 | int enable; |
75 | int bright; | |
76 | int contrast; | |
77 | int hue; | |
78 | int sat; | |
cd4665c5 MCC |
79 | }; |
80 | ||
6b8fe025 | 81 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 82 | { |
6b8fe025 HV |
83 | return container_of(sd, struct tvp5150, sd); |
84 | } | |
85 | ||
86 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) | |
87 | { | |
88 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 MCC |
89 | unsigned char buffer[1]; |
90 | int rc; | |
cd4665c5 MCC |
91 | |
92 | buffer[0] = addr; | |
93 | if (1 != (rc = i2c_master_send(c, buffer, 1))) | |
6b8fe025 | 94 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc); |
cd4665c5 MCC |
95 | |
96 | msleep(10); | |
97 | ||
98 | if (1 != (rc = i2c_master_recv(c, buffer, 1))) | |
6b8fe025 | 99 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc); |
e1bc80ad | 100 | |
6b8fe025 | 101 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]); |
cd4665c5 MCC |
102 | |
103 | return (buffer[0]); | |
104 | } | |
105 | ||
6b8fe025 | 106 | static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 107 | unsigned char value) |
cd4665c5 | 108 | { |
6b8fe025 | 109 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 MCC |
110 | unsigned char buffer[2]; |
111 | int rc; | |
cd4665c5 MCC |
112 | |
113 | buffer[0] = addr; | |
84486d53 | 114 | buffer[1] = value; |
6b8fe025 | 115 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]); |
cd4665c5 | 116 | if (2 != (rc = i2c_master_send(c, buffer, 2))) |
6b8fe025 | 117 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 2)\n", rc); |
cd4665c5 MCC |
118 | } |
119 | ||
6b8fe025 HV |
120 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
121 | const u8 end, int max_line) | |
3ad96835 | 122 | { |
6b8fe025 | 123 | int i = 0; |
3ad96835 | 124 | |
6b8fe025 HV |
125 | while (init != (u8)(end + 1)) { |
126 | if ((i % max_line) == 0) { | |
127 | if (i > 0) | |
3ad96835 | 128 | printk("\n"); |
6b8fe025 | 129 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 130 | } |
6b8fe025 | 131 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
132 | |
133 | init++; | |
134 | i++; | |
135 | } | |
136 | printk("\n"); | |
137 | } | |
138 | ||
6b8fe025 | 139 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 140 | { |
84486d53 | 141 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 142 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 143 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 144 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 145 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 146 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 147 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 148 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 149 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 150 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 151 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 152 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 153 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
154 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
155 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
156 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 157 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 158 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 159 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 160 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 161 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 162 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 163 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 164 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 165 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 166 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 167 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 168 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 169 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
170 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
171 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 172 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
173 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
174 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 175 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 176 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 177 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 178 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 179 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 180 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 181 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 182 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 183 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
184 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
185 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 186 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 187 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 188 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 189 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 190 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 191 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 192 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 193 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 194 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
195 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
196 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 197 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 198 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 199 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 200 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 201 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 202 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 203 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
204 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
205 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 206 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
207 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
208 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 209 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
210 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
211 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 212 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 213 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 214 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 215 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 216 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
217 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
218 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
219 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
220 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
221 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 222 | |
6b8fe025 HV |
223 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
224 | TVP5150_TELETEXT_FIL1_END, 8); | |
225 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
226 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 227 | |
84486d53 | 228 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 229 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 230 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 231 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 232 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 233 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 234 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 235 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 236 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 237 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 238 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 239 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 240 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 241 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 242 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 243 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 244 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 245 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 246 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
247 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
248 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 249 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 250 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 251 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 252 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 253 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 254 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 255 | |
6b8fe025 HV |
256 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
257 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 258 | |
6b8fe025 HV |
259 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
260 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 261 | |
6b8fe025 HV |
262 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
263 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 264 | |
6b8fe025 HV |
265 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
266 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 267 | |
6b8fe025 HV |
268 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
269 | TVP5150_LINE_MODE_END, 8); | |
270 | return 0; | |
cd4665c5 MCC |
271 | } |
272 | ||
273 | /**************************************************************************** | |
274 | Basic functions | |
275 | ****************************************************************************/ | |
cd4665c5 | 276 | |
6b8fe025 | 277 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 278 | { |
2962fc01 | 279 | int opmode = 0; |
6b8fe025 | 280 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 281 | int input = 0; |
f4b8b3ae | 282 | unsigned char val; |
84486d53 | 283 | |
5325b427 | 284 | if ((decoder->output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
c7c0b34c | 285 | input = 8; |
4c86f973 | 286 | |
5325b427 | 287 | switch (decoder->input) { |
c7c0b34c HV |
288 | case TVP5150_COMPOSITE1: |
289 | input |= 2; | |
290 | /* fall through */ | |
291 | case TVP5150_COMPOSITE0: | |
c0477ad9 | 292 | break; |
c7c0b34c | 293 | case TVP5150_SVIDEO: |
c0477ad9 | 294 | default: |
c7c0b34c | 295 | input |= 1; |
c0477ad9 MCC |
296 | break; |
297 | } | |
298 | ||
6b8fe025 | 299 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 | 300 | "=> tvp5150 input=%i, opmode=%i\n", |
5325b427 HV |
301 | decoder->input, decoder->output, |
302 | input, opmode); | |
12500f07 | 303 | |
6b8fe025 HV |
304 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
305 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
306 | |
307 | /* Svideo should enable YCrCb output and disable GPCL output | |
308 | * For Composite and TV, it should be the reverse | |
309 | */ | |
6b8fe025 | 310 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
5325b427 | 311 | if (decoder->input == TVP5150_SVIDEO) |
f4b8b3ae MCC |
312 | val = (val & ~0x40) | 0x10; |
313 | else | |
314 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 315 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
316 | }; |
317 | ||
e1bc80ad MCC |
318 | struct i2c_reg_value { |
319 | unsigned char reg; | |
320 | unsigned char value; | |
321 | }; | |
322 | ||
323 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
324 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
325 | { /* 0x00 */ | |
326 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
327 | }, | |
328 | { /* 0x01 */ | |
329 | TVP5150_ANAL_CHL_CTL,0x15 | |
330 | }, | |
331 | { /* 0x02 */ | |
332 | TVP5150_OP_MODE_CTL,0x00 | |
333 | }, | |
334 | { /* 0x03 */ | |
335 | TVP5150_MISC_CTL,0x01 | |
336 | }, | |
337 | { /* 0x06 */ | |
338 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
339 | }, | |
340 | { /* 0x07 */ | |
341 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
342 | }, | |
343 | { /* 0x08 */ | |
344 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
345 | }, | |
346 | { /* 0x09 */ | |
347 | TVP5150_BRIGHT_CTL,0x80 | |
348 | }, | |
349 | { /* 0x0a */ | |
350 | TVP5150_SATURATION_CTL,0x80 | |
351 | }, | |
352 | { /* 0x0b */ | |
353 | TVP5150_HUE_CTL,0x00 | |
354 | }, | |
355 | { /* 0x0c */ | |
356 | TVP5150_CONTRAST_CTL,0x80 | |
357 | }, | |
358 | { /* 0x0d */ | |
359 | TVP5150_DATA_RATE_SEL,0x47 | |
360 | }, | |
361 | { /* 0x0e */ | |
362 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
363 | }, | |
364 | { /* 0x0f */ | |
365 | TVP5150_CONF_SHARED_PIN,0x08 | |
366 | }, | |
367 | { /* 0x11 */ | |
368 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
369 | }, | |
370 | { /* 0x12 */ | |
371 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
372 | }, | |
373 | { /* 0x13 */ | |
374 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
375 | }, | |
376 | { /* 0x14 */ | |
377 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
378 | }, | |
379 | { /* 0x15 */ | |
380 | TVP5150_GENLOCK,0x01 | |
381 | }, | |
382 | { /* 0x16 */ | |
383 | TVP5150_HORIZ_SYNC_START,0x80 | |
384 | }, | |
385 | { /* 0x18 */ | |
386 | TVP5150_VERT_BLANKING_START,0x00 | |
387 | }, | |
388 | { /* 0x19 */ | |
389 | TVP5150_VERT_BLANKING_STOP,0x00 | |
390 | }, | |
391 | { /* 0x1a */ | |
392 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
393 | }, | |
394 | { /* 0x1b */ | |
395 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
396 | }, | |
397 | { /* 0x1c */ | |
398 | TVP5150_INT_RESET_REG_B,0x00 | |
399 | }, | |
400 | { /* 0x1d */ | |
401 | TVP5150_INT_ENABLE_REG_B,0x00 | |
402 | }, | |
403 | { /* 0x1e */ | |
404 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
405 | }, | |
406 | { /* 0x28 */ | |
407 | TVP5150_VIDEO_STD,0x00 | |
408 | }, | |
409 | { /* 0x2e */ | |
410 | TVP5150_MACROVISION_ON_CTR,0x0f | |
411 | }, | |
412 | { /* 0x2f */ | |
413 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
414 | }, | |
415 | { /* 0xbb */ | |
416 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
417 | }, | |
418 | { /* 0xc0 */ | |
419 | TVP5150_INT_STATUS_REG_A,0x00 | |
420 | }, | |
421 | { /* 0xc1 */ | |
422 | TVP5150_INT_ENABLE_REG_A,0x00 | |
423 | }, | |
424 | { /* 0xc2 */ | |
425 | TVP5150_INT_CONF,0x04 | |
426 | }, | |
427 | { /* 0xc8 */ | |
428 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
429 | }, | |
430 | { /* 0xc9 */ | |
431 | TVP5150_FIFO_RESET,0x00 | |
432 | }, | |
433 | { /* 0xca */ | |
434 | TVP5150_LINE_NUMBER_INT,0x00 | |
435 | }, | |
436 | { /* 0xcb */ | |
437 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
438 | }, | |
439 | { /* 0xcc */ | |
440 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
441 | }, | |
442 | { /* 0xcd */ | |
443 | TVP5150_FIFO_OUT_CTRL,0x01 | |
444 | }, | |
445 | { /* 0xcf */ | |
3ad96835 | 446 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
447 | }, |
448 | { /* 0xd0 */ | |
3ad96835 | 449 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
450 | }, |
451 | { /* 0xfc */ | |
452 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
453 | }, | |
454 | { /* end of data */ | |
455 | 0xff,0xff | |
456 | } | |
457 | }; | |
458 | ||
459 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
460 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
461 | { | |
462 | TVP5150_CONF_SHARED_PIN, 2 | |
463 | },{ /* Automatic offset and AGC enabled */ | |
464 | TVP5150_ANAL_CHL_CTL, 0x15 | |
465 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
466 | TVP5150_MISC_CTL, 0x6f | |
467 | },{ /* Activates video std autodetection for all standards */ | |
468 | TVP5150_AUTOSW_MSK, 0x0 | |
469 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
470 | TVP5150_DATA_RATE_SEL, 0x47 | |
471 | },{ | |
472 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
473 | },{ | |
474 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
475 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
476 | 0x27, 0x20 | |
477 | },{ | |
478 | 0xff,0xff | |
479 | } | |
480 | }; | |
481 | ||
6ac48b45 MCC |
482 | struct tvp5150_vbi_type { |
483 | unsigned int vbi_type; | |
484 | unsigned int ini_line; | |
485 | unsigned int end_line; | |
486 | unsigned int by_field :1; | |
487 | }; | |
488 | ||
e1bc80ad MCC |
489 | struct i2c_vbi_ram_value { |
490 | u16 reg; | |
6ac48b45 MCC |
491 | struct tvp5150_vbi_type type; |
492 | unsigned char values[16]; | |
e1bc80ad MCC |
493 | }; |
494 | ||
6ac48b45 MCC |
495 | /* This struct have the values for each supported VBI Standard |
496 | * by | |
497 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
498 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
499 | * and so on. There are 16 possible locations from 0 to 15. | |
500 | */ | |
3ad96835 | 501 | |
a9cff90e | 502 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 503 | { |
9bc7400a HV |
504 | /* FIXME: Current api doesn't handle all VBI types, those not |
505 | yet supported are placed under #if 0 */ | |
506 | #if 0 | |
6ac48b45 MCC |
507 | {0x010, /* Teletext, SECAM, WST System A */ |
508 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
509 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
510 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 511 | }, |
9bc7400a | 512 | #endif |
6ac48b45 | 513 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 514 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
515 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
516 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 517 | }, |
9bc7400a | 518 | #if 0 |
6ac48b45 MCC |
519 | {0x050, /* Teletext, PAL, WST System C */ |
520 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
521 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
522 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 523 | }, |
6ac48b45 MCC |
524 | {0x070, /* Teletext, NTSC, WST System B */ |
525 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
526 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
527 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 528 | }, |
6ac48b45 MCC |
529 | {0x090, /* Tetetext, NTSC NABTS System C */ |
530 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
531 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
532 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 533 | }, |
6ac48b45 MCC |
534 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
535 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
536 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
537 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 538 | }, |
6ac48b45 MCC |
539 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
540 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
541 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
542 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 543 | }, |
9bc7400a | 544 | #endif |
6ac48b45 MCC |
545 | {0x0f0, /* Closed Caption, NTSC */ |
546 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
547 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
548 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 549 | }, |
6ac48b45 | 550 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 551 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
552 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
553 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 554 | }, |
9bc7400a | 555 | #if 0 |
6ac48b45 MCC |
556 | {0x130, /* Wide Screen Signal, NTSC C */ |
557 | {V4L2_SLICED_WSS_525,20,20,1}, | |
558 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
559 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 560 | }, |
6ac48b45 MCC |
561 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
562 | {V4l2_SLICED_VITC_625,6,22,0}, | |
563 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
564 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 565 | }, |
6ac48b45 MCC |
566 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
567 | {V4l2_SLICED_VITC_525,10,20,0}, | |
568 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
569 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 570 | }, |
9bc7400a | 571 | #endif |
6ac48b45 MCC |
572 | {0x190, /* Video Program System (VPS), PAL */ |
573 | {V4L2_SLICED_VPS,16,16,0}, | |
574 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
575 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 576 | }, |
6ac48b45 MCC |
577 | /* 0x1d0 User programmable */ |
578 | ||
579 | /* End of struct */ | |
580 | { (u16)-1 } | |
e1bc80ad | 581 | }; |
4c86f973 | 582 | |
6b8fe025 | 583 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 584 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
585 | { |
586 | while (regs->reg != 0xff) { | |
6b8fe025 | 587 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
588 | regs++; |
589 | } | |
590 | return 0; | |
591 | } | |
84486d53 | 592 | |
6b8fe025 | 593 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 594 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
595 | { |
596 | unsigned int i; | |
cd4665c5 | 597 | |
e1bc80ad | 598 | /* Disable Full Field */ |
6b8fe025 | 599 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 600 | |
e1bc80ad | 601 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
602 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
603 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 604 | |
e1bc80ad | 605 | /* Load Ram Table */ |
6b8fe025 HV |
606 | while (regs->reg != (u16)-1) { |
607 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
608 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 609 | |
6b8fe025 HV |
610 | for (i = 0; i < 16; i++) |
611 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 612 | |
e1bc80ad MCC |
613 | regs++; |
614 | } | |
615 | return 0; | |
616 | } | |
cd4665c5 | 617 | |
6ac48b45 | 618 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 619 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
620 | struct v4l2_sliced_vbi_cap *cap) |
621 | { | |
6b8fe025 | 622 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
623 | int line; |
624 | ||
bccfa449 | 625 | v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n"); |
6ac48b45 MCC |
626 | memset(cap, 0, sizeof *cap); |
627 | ||
628 | while (regs->reg != (u16)-1 ) { | |
629 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
630 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
631 | } | |
632 | cap->service_set |= regs->type.vbi_type; | |
633 | ||
634 | regs++; | |
635 | } | |
6b8fe025 | 636 | return 0; |
6ac48b45 MCC |
637 | } |
638 | ||
3ad96835 MCC |
639 | /* Set vbi processing |
640 | * type - one of tvp5150_vbi_types | |
641 | * line - line to gather data | |
642 | * fields: bit 0 field1, bit 1, field2 | |
643 | * flags (default=0xf0) is a bitmask, were set means: | |
644 | * bit 7: enable filtering null bytes on CC | |
645 | * bit 6: send data also to FIFO | |
646 | * bit 5: don't allow data with errors on FIFO | |
647 | * bit 4: enable ECC when possible | |
648 | * pix_align = pix alignment: | |
649 | * LSB = field1 | |
650 | * MSB = field2 | |
651 | */ | |
6b8fe025 | 652 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
653 | const struct i2c_vbi_ram_value *regs, |
654 | unsigned int type,u8 flags, int line, | |
655 | const int fields) | |
3ad96835 | 656 | { |
6b8fe025 HV |
657 | struct tvp5150 *decoder = to_tvp5150(sd); |
658 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 659 | u8 reg; |
2701dacb | 660 | int pos=0; |
3ad96835 MCC |
661 | |
662 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 663 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 664 | return 0; |
7d5b7b98 | 665 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
666 | /* Don't follow NTSC Line number convension */ |
667 | line += 3; | |
668 | } | |
669 | ||
670 | if (line<6||line>27) | |
2701dacb MCC |
671 | return 0; |
672 | ||
673 | while (regs->reg != (u16)-1 ) { | |
674 | if ((type & regs->type.vbi_type) && | |
675 | (line>=regs->type.ini_line) && | |
676 | (line<=regs->type.end_line)) { | |
677 | type=regs->type.vbi_type; | |
678 | break; | |
679 | } | |
680 | ||
681 | regs++; | |
682 | pos++; | |
683 | } | |
684 | if (regs->reg == (u16)-1) | |
685 | return 0; | |
3ad96835 | 686 | |
2701dacb | 687 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
688 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
689 | ||
690 | if (fields&1) { | |
6b8fe025 | 691 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
692 | } |
693 | ||
694 | if (fields&2) { | |
6b8fe025 | 695 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
696 | } |
697 | ||
2701dacb | 698 | return type; |
3ad96835 MCC |
699 | } |
700 | ||
6b8fe025 | 701 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
702 | const struct i2c_vbi_ram_value *regs, int line) |
703 | { | |
6b8fe025 HV |
704 | struct tvp5150 *decoder = to_tvp5150(sd); |
705 | v4l2_std_id std = decoder->norm; | |
12db5607 | 706 | u8 reg; |
6b8fe025 | 707 | int pos, type = 0; |
12db5607 MCC |
708 | |
709 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 710 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 711 | return 0; |
7d5b7b98 | 712 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
713 | /* Don't follow NTSC Line number convension */ |
714 | line += 3; | |
715 | } | |
716 | ||
6b8fe025 | 717 | if (line < 6 || line > 27) |
12db5607 MCC |
718 | return 0; |
719 | ||
6b8fe025 | 720 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 721 | |
6b8fe025 HV |
722 | pos = tvp5150_read(sd, reg) & 0x0f; |
723 | if (pos < 0x0f) | |
724 | type = regs[pos].type.vbi_type; | |
12db5607 | 725 | |
6b8fe025 HV |
726 | pos = tvp5150_read(sd, reg + 1) & 0x0f; |
727 | if (pos < 0x0f) | |
728 | type |= regs[pos].type.vbi_type; | |
12db5607 MCC |
729 | |
730 | return type; | |
731 | } | |
6b8fe025 HV |
732 | |
733 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 734 | { |
6b8fe025 HV |
735 | struct tvp5150 *decoder = to_tvp5150(sd); |
736 | int fmt = 0; | |
e1bc80ad | 737 | |
6b8fe025 | 738 | decoder->norm = std; |
e1bc80ad MCC |
739 | |
740 | /* First tests should be against specific std */ | |
741 | ||
742 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 743 | fmt = 0; /* Autodetect mode */ |
e1bc80ad | 744 | } else if (std & V4L2_STD_NTSC_443) { |
6b8fe025 | 745 | fmt = 0xa; |
e1bc80ad | 746 | } else if (std & V4L2_STD_PAL_M) { |
6b8fe025 HV |
747 | fmt = 0x6; |
748 | } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) { | |
749 | fmt = 0x8; | |
e1bc80ad MCC |
750 | } else { |
751 | /* Then, test against generic ones */ | |
6b8fe025 HV |
752 | if (std & V4L2_STD_NTSC) |
753 | fmt = 0x2; | |
754 | else if (std & V4L2_STD_PAL) | |
755 | fmt = 0x4; | |
756 | else if (std & V4L2_STD_SECAM) | |
757 | fmt = 0xc; | |
e1bc80ad | 758 | } |
84486d53 | 759 | |
6b8fe025 HV |
760 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
761 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
762 | return 0; |
763 | } | |
764 | ||
6b8fe025 HV |
765 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
766 | { | |
767 | struct tvp5150 *decoder = to_tvp5150(sd); | |
768 | ||
769 | if (decoder->norm == std) | |
770 | return 0; | |
771 | ||
772 | return tvp5150_set_std(sd, std); | |
773 | } | |
774 | ||
775 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 776 | { |
6b8fe025 | 777 | struct tvp5150 *decoder = to_tvp5150(sd); |
e36eaa71 | 778 | u8 msb_id, lsb_id, msb_rom, lsb_rom; |
e1bc80ad | 779 | |
6b8fe025 HV |
780 | msb_id = tvp5150_read(sd, TVP5150_MSB_DEV_ID); |
781 | lsb_id = tvp5150_read(sd, TVP5150_LSB_DEV_ID); | |
782 | msb_rom = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER); | |
783 | lsb_rom = tvp5150_read(sd, TVP5150_ROM_MINOR_VER); | |
e1bc80ad | 784 | |
6b8fe025 HV |
785 | if (msb_rom == 4 && lsb_rom == 0) { /* Is TVP5150AM1 */ |
786 | v4l2_info(sd, "tvp%02x%02xam1 detected.\n", msb_id, lsb_id); | |
e36eaa71 MCC |
787 | |
788 | /* ITU-T BT.656.4 timing */ | |
6b8fe025 | 789 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); |
e1bc80ad | 790 | } else { |
6b8fe025 HV |
791 | if (msb_rom == 3 || lsb_rom == 0x21) { /* Is TVP5150A */ |
792 | v4l2_info(sd, "tvp%02x%02xa detected.\n", msb_id, lsb_id); | |
e36eaa71 | 793 | } else { |
6b8fe025 HV |
794 | v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n", |
795 | msb_id, lsb_id); | |
796 | v4l2_info(sd, "*** Rom ver is %d.%d\n", msb_rom, lsb_rom); | |
e36eaa71 | 797 | } |
e1bc80ad | 798 | } |
84486d53 | 799 | |
e1bc80ad | 800 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 801 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
802 | |
803 | /* Initializes VDP registers */ | |
6b8fe025 | 804 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
805 | |
806 | /* Selects decoder input */ | |
6b8fe025 | 807 | tvp5150_selmux(sd); |
e1bc80ad MCC |
808 | |
809 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 810 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
811 | |
812 | /* Initialize image preferences */ | |
6b8fe025 HV |
813 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, decoder->bright); |
814 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, decoder->contrast); | |
815 | tvp5150_write(sd, TVP5150_SATURATION_CTL, decoder->contrast); | |
816 | tvp5150_write(sd, TVP5150_HUE_CTL, decoder->hue); | |
e1bc80ad | 817 | |
6b8fe025 HV |
818 | tvp5150_set_std(sd, decoder->norm); |
819 | return 0; | |
cd4665c5 MCC |
820 | }; |
821 | ||
6b8fe025 | 822 | static int tvp5150_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
a6c2ba28 | 823 | { |
bccfa449 | 824 | v4l2_dbg(1, debug, sd, "g_ctrl called\n"); |
a6c2ba28 | 825 | |
826 | switch (ctrl->id) { | |
827 | case V4L2_CID_BRIGHTNESS: | |
6b8fe025 | 828 | ctrl->value = tvp5150_read(sd, TVP5150_BRIGHT_CTL); |
a6c2ba28 | 829 | return 0; |
830 | case V4L2_CID_CONTRAST: | |
6b8fe025 | 831 | ctrl->value = tvp5150_read(sd, TVP5150_CONTRAST_CTL); |
a6c2ba28 | 832 | return 0; |
833 | case V4L2_CID_SATURATION: | |
6b8fe025 | 834 | ctrl->value = tvp5150_read(sd, TVP5150_SATURATION_CTL); |
a6c2ba28 | 835 | return 0; |
836 | case V4L2_CID_HUE: | |
6b8fe025 | 837 | ctrl->value = tvp5150_read(sd, TVP5150_HUE_CTL); |
a6c2ba28 | 838 | return 0; |
a6c2ba28 | 839 | } |
c0477ad9 | 840 | return -EINVAL; |
a6c2ba28 | 841 | } |
842 | ||
6b8fe025 | 843 | static int tvp5150_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
a6c2ba28 | 844 | { |
6b8fe025 HV |
845 | u8 i, n; |
846 | n = ARRAY_SIZE(tvp5150_qctrl); | |
847 | ||
848 | for (i = 0; i < n; i++) { | |
849 | if (ctrl->id != tvp5150_qctrl[i].id) | |
850 | continue; | |
851 | if (ctrl->value < tvp5150_qctrl[i].minimum || | |
852 | ctrl->value > tvp5150_qctrl[i].maximum) | |
853 | return -ERANGE; | |
bccfa449 | 854 | v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n", |
6b8fe025 HV |
855 | ctrl->id, ctrl->value); |
856 | break; | |
857 | } | |
a6c2ba28 | 858 | |
859 | switch (ctrl->id) { | |
860 | case V4L2_CID_BRIGHTNESS: | |
6b8fe025 | 861 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->value); |
a6c2ba28 | 862 | return 0; |
863 | case V4L2_CID_CONTRAST: | |
6b8fe025 | 864 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->value); |
a6c2ba28 | 865 | return 0; |
866 | case V4L2_CID_SATURATION: | |
6b8fe025 | 867 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->value); |
a6c2ba28 | 868 | return 0; |
869 | case V4L2_CID_HUE: | |
6b8fe025 | 870 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->value); |
a6c2ba28 | 871 | return 0; |
a6c2ba28 | 872 | } |
c0477ad9 | 873 | return -EINVAL; |
a6c2ba28 | 874 | } |
875 | ||
84486d53 MCC |
876 | /**************************************************************************** |
877 | I2C Command | |
878 | ****************************************************************************/ | |
c7c0b34c | 879 | |
5325b427 HV |
880 | static int tvp5150_s_routing(struct v4l2_subdev *sd, |
881 | u32 input, u32 output, u32 config) | |
6b8fe025 HV |
882 | { |
883 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 884 | |
5325b427 HV |
885 | decoder->input = input; |
886 | decoder->output = output; | |
6b8fe025 HV |
887 | tvp5150_selmux(sd); |
888 | return 0; | |
889 | } | |
6ac48b45 | 890 | |
d37dad49 HV |
891 | static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt) |
892 | { | |
893 | /* this is for capturing 36 raw vbi lines | |
894 | if there's a way to cut off the beginning 2 vbi lines | |
895 | with the tvp5150 then the vbi line count could be lowered | |
896 | to 17 lines/field again, although I couldn't find a register | |
897 | which could do that cropping */ | |
898 | if (fmt->sample_format == V4L2_PIX_FMT_GREY) | |
899 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
900 | if (fmt->count[0] == 18 && fmt->count[1] == 18) { | |
901 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
902 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
903 | } | |
904 | return 0; | |
905 | } | |
906 | ||
907 | static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) | |
6b8fe025 | 908 | { |
6b8fe025 HV |
909 | int i; |
910 | ||
6b8fe025 HV |
911 | if (svbi->service_set != 0) { |
912 | for (i = 0; i <= 23; i++) { | |
913 | svbi->service_lines[1][i] = 0; | |
914 | svbi->service_lines[0][i] = | |
915 | tvp5150_set_vbi(sd, vbi_ram_default, | |
916 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 917 | } |
6b8fe025 HV |
918 | /* Enables FIFO */ |
919 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
920 | } else { | |
921 | /* Disables FIFO*/ | |
922 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 923 | |
6b8fe025 HV |
924 | /* Disable Full Field */ |
925 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 926 | |
6b8fe025 HV |
927 | /* Disable Line modes */ |
928 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
929 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 930 | } |
6b8fe025 HV |
931 | return 0; |
932 | } | |
12db5607 | 933 | |
d37dad49 HV |
934 | static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) |
935 | { | |
936 | int i, mask = 0; | |
937 | ||
6b8fe025 | 938 | memset(svbi, 0, sizeof(*svbi)); |
12db5607 | 939 | |
6b8fe025 HV |
940 | for (i = 0; i <= 23; i++) { |
941 | svbi->service_lines[0][i] = | |
942 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
943 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 944 | } |
6b8fe025 HV |
945 | svbi->service_set = mask; |
946 | return 0; | |
947 | } | |
948 | ||
bc974305 | 949 | static int tvp5150_g_chip_ident(struct v4l2_subdev *sd, |
aecde8b5 | 950 | struct v4l2_dbg_chip_ident *chip) |
bc974305 MCC |
951 | { |
952 | int rev; | |
953 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
954 | ||
955 | rev = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER) << 8 | | |
956 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER); | |
957 | ||
958 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP5150, | |
959 | rev); | |
960 | } | |
961 | ||
962 | ||
21dcd8cc | 963 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 964 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 HV |
965 | { |
966 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
21dcd8cc | 967 | |
aecde8b5 | 968 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
969 | return -EINVAL; |
970 | if (!capable(CAP_SYS_ADMIN)) | |
971 | return -EPERM; | |
972 | reg->val = tvp5150_read(sd, reg->reg & 0xff); | |
aecde8b5 | 973 | reg->size = 1; |
6b8fe025 HV |
974 | return 0; |
975 | } | |
84486d53 | 976 | |
aecde8b5 | 977 | static int tvp5150_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 HV |
978 | { |
979 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
84486d53 | 980 | |
aecde8b5 | 981 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
982 | return -EINVAL; |
983 | if (!capable(CAP_SYS_ADMIN)) | |
984 | return -EPERM; | |
985 | tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); | |
986 | return 0; | |
987 | } | |
988 | #endif | |
a6c2ba28 | 989 | |
6b8fe025 HV |
990 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
991 | { | |
992 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 993 | |
6b8fe025 HV |
994 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
995 | return 0; | |
996 | } | |
a6c2ba28 | 997 | |
6b8fe025 HV |
998 | static int tvp5150_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc) |
999 | { | |
1000 | int i; | |
a6c2ba28 | 1001 | |
bccfa449 | 1002 | v4l2_dbg(1, debug, sd, "queryctrl called\n"); |
6b8fe025 HV |
1003 | |
1004 | for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++) | |
1005 | if (qc->id && qc->id == tvp5150_qctrl[i].id) { | |
1006 | memcpy(qc, &(tvp5150_qctrl[i]), | |
1007 | sizeof(*qc)); | |
1008 | return 0; | |
a6c2ba28 | 1009 | } |
1010 | ||
6b8fe025 HV |
1011 | return -EINVAL; |
1012 | } | |
84486d53 | 1013 | |
6b8fe025 HV |
1014 | /* ----------------------------------------------------------------------- */ |
1015 | ||
1016 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { | |
1017 | .log_status = tvp5150_log_status, | |
1018 | .g_ctrl = tvp5150_g_ctrl, | |
1019 | .s_ctrl = tvp5150_s_ctrl, | |
1020 | .queryctrl = tvp5150_queryctrl, | |
f41737ec | 1021 | .s_std = tvp5150_s_std, |
6b8fe025 | 1022 | .reset = tvp5150_reset, |
bc974305 | 1023 | .g_chip_ident = tvp5150_g_chip_ident, |
6b8fe025 HV |
1024 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1025 | .g_register = tvp5150_g_register, | |
1026 | .s_register = tvp5150_s_register, | |
1027 | #endif | |
1028 | }; | |
1029 | ||
1030 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
6b8fe025 HV |
1031 | .g_tuner = tvp5150_g_tuner, |
1032 | }; | |
1033 | ||
1034 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
1035 | .s_routing = tvp5150_s_routing, | |
32cd527f HV |
1036 | }; |
1037 | ||
1038 | static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { | |
6b8fe025 | 1039 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, |
d37dad49 HV |
1040 | .g_sliced_fmt = tvp5150_g_sliced_fmt, |
1041 | .s_sliced_fmt = tvp5150_s_sliced_fmt, | |
1042 | .s_raw_fmt = tvp5150_s_raw_fmt, | |
6b8fe025 HV |
1043 | }; |
1044 | ||
1045 | static const struct v4l2_subdev_ops tvp5150_ops = { | |
1046 | .core = &tvp5150_core_ops, | |
1047 | .tuner = &tvp5150_tuner_ops, | |
1048 | .video = &tvp5150_video_ops, | |
32cd527f | 1049 | .vbi = &tvp5150_vbi_ops, |
6b8fe025 HV |
1050 | }; |
1051 | ||
1052 | ||
cd4665c5 MCC |
1053 | /**************************************************************************** |
1054 | I2C Client & Driver | |
1055 | ****************************************************************************/ | |
cd4665c5 | 1056 | |
6b8fe025 HV |
1057 | static int tvp5150_probe(struct i2c_client *c, |
1058 | const struct i2c_device_id *id) | |
cd4665c5 | 1059 | { |
cd4665c5 | 1060 | struct tvp5150 *core; |
6b8fe025 | 1061 | struct v4l2_subdev *sd; |
cd4665c5 MCC |
1062 | |
1063 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1064 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1065 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1066 | return -EIO; |
cd4665c5 | 1067 | |
7408187d | 1068 | core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL); |
5fa1247a | 1069 | if (!core) { |
cd4665c5 MCC |
1070 | return -ENOMEM; |
1071 | } | |
6b8fe025 HV |
1072 | sd = &core->sd; |
1073 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); | |
1074 | v4l_info(c, "chip found @ 0x%02x (%s)\n", | |
1075 | c->addr << 1, c->adapter->name); | |
cd4665c5 | 1076 | |
3ad96835 | 1077 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
5325b427 | 1078 | core->input = TVP5150_COMPOSITE1; |
4c86f973 | 1079 | core->enable = 1; |
032c2028 MCC |
1080 | core->bright = 128; |
1081 | core->contrast = 128; | |
1082 | core->hue = 0; | |
1083 | core->sat = 128; | |
4c86f973 | 1084 | |
f1e5ee45 | 1085 | if (debug > 1) |
6b8fe025 | 1086 | tvp5150_log_status(sd); |
cd4665c5 MCC |
1087 | return 0; |
1088 | } | |
1089 | ||
6b8fe025 | 1090 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1091 | { |
6b8fe025 | 1092 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
cd4665c5 | 1093 | |
6b8fe025 | 1094 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1095 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1096 | c->addr << 1); | |
1097 | ||
6b8fe025 HV |
1098 | v4l2_device_unregister_subdev(sd); |
1099 | kfree(to_tvp5150(sd)); | |
cd4665c5 MCC |
1100 | return 0; |
1101 | } | |
1102 | ||
1103 | /* ----------------------------------------------------------------------- */ | |
1104 | ||
6b8fe025 HV |
1105 | static const struct i2c_device_id tvp5150_id[] = { |
1106 | { "tvp5150", 0 }, | |
1107 | { } | |
1108 | }; | |
1109 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1110 | |
c771145b HV |
1111 | static struct i2c_driver tvp5150_driver = { |
1112 | .driver = { | |
1113 | .owner = THIS_MODULE, | |
1114 | .name = "tvp5150", | |
1115 | }, | |
1116 | .probe = tvp5150_probe, | |
1117 | .remove = tvp5150_remove, | |
1118 | .id_table = tvp5150_id, | |
cd4665c5 | 1119 | }; |
c771145b HV |
1120 | |
1121 | static __init int init_tvp5150(void) | |
1122 | { | |
1123 | return i2c_add_driver(&tvp5150_driver); | |
1124 | } | |
1125 | ||
1126 | static __exit void exit_tvp5150(void) | |
1127 | { | |
1128 | i2c_del_driver(&tvp5150_driver); | |
1129 | } | |
1130 | ||
1131 | module_init(init_tvp5150); | |
1132 | module_exit(exit_tvp5150); |