Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
33b687cf | 9 | #include <linux/videodev2.h> |
cd4665c5 | 10 | #include <linux/delay.h> |
84486d53 | 11 | #include <linux/video_decoder.h> |
e1bc80ad | 12 | #include <media/v4l2-common.h> |
c7c0b34c | 13 | #include <media/tvp5150.h> |
cd4665c5 MCC |
14 | |
15 | #include "tvp5150_reg.h" | |
16 | ||
6ac48b45 | 17 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
18 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
19 | MODULE_LICENSE("GPL"); | |
20 | ||
6ac48b45 | 21 | /* standard i2c insmod options */ |
cd4665c5 | 22 | static unsigned short normal_i2c[] = { |
84486d53 MCC |
23 | 0xb8 >> 1, |
24 | 0xba >> 1, | |
cd4665c5 MCC |
25 | I2C_CLIENT_END |
26 | }; | |
27 | ||
28 | I2C_CLIENT_INSMOD; | |
29 | ||
ff699e6b | 30 | static int debug; |
cd4665c5 MCC |
31 | module_param(debug, int, 0); |
32 | MODULE_PARM_DESC(debug, "Debug level (0-1)"); | |
33 | ||
3ad96835 MCC |
34 | #define tvp5150_err(fmt, arg...) do { \ |
35 | printk(KERN_ERR "%s %d-%04x: " fmt, c->driver->driver.name, \ | |
36 | i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0) | |
e1bc80ad | 37 | #define tvp5150_info(fmt, arg...) do { \ |
cab462f7 | 38 | printk(KERN_INFO "%s %d-%04x: " fmt, c->driver->driver.name, \ |
e1bc80ad MCC |
39 | i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0) |
40 | #define tvp5150_dbg(num, fmt, arg...) \ | |
cd4665c5 MCC |
41 | do { \ |
42 | if (debug >= num) \ | |
cab462f7 MCC |
43 | printk(KERN_DEBUG "%s debug %d-%04x: " fmt,\ |
44 | c->driver->driver.name, \ | |
45 | i2c_adapter_id(c->adapter), \ | |
46 | c->addr , ## arg); } while (0) | |
cd4665c5 | 47 | |
a6c2ba28 | 48 | /* supported controls */ |
49 | static struct v4l2_queryctrl tvp5150_qctrl[] = { | |
50 | { | |
c0477ad9 MCC |
51 | .id = V4L2_CID_BRIGHTNESS, |
52 | .type = V4L2_CTRL_TYPE_INTEGER, | |
53 | .name = "Brightness", | |
54 | .minimum = 0, | |
55 | .maximum = 255, | |
56 | .step = 1, | |
75bc8019 | 57 | .default_value = 128, |
c0477ad9 MCC |
58 | .flags = 0, |
59 | }, { | |
60 | .id = V4L2_CID_CONTRAST, | |
61 | .type = V4L2_CTRL_TYPE_INTEGER, | |
62 | .name = "Contrast", | |
63 | .minimum = 0, | |
64 | .maximum = 255, | |
65 | .step = 0x1, | |
75bc8019 | 66 | .default_value = 128, |
c0477ad9 MCC |
67 | .flags = 0, |
68 | }, { | |
a6c2ba28 | 69 | .id = V4L2_CID_SATURATION, |
70 | .type = V4L2_CTRL_TYPE_INTEGER, | |
71 | .name = "Saturation", | |
72 | .minimum = 0, | |
73 | .maximum = 255, | |
74 | .step = 0x1, | |
75bc8019 | 75 | .default_value = 128, |
a6c2ba28 | 76 | .flags = 0, |
c0477ad9 MCC |
77 | }, { |
78 | .id = V4L2_CID_HUE, | |
79 | .type = V4L2_CTRL_TYPE_INTEGER, | |
80 | .name = "Hue", | |
81 | .minimum = -128, | |
82 | .maximum = 127, | |
83 | .step = 0x1, | |
75bc8019 | 84 | .default_value = 0, |
c0477ad9 MCC |
85 | .flags = 0, |
86 | } | |
a6c2ba28 | 87 | }; |
88 | ||
cd4665c5 MCC |
89 | struct tvp5150 { |
90 | struct i2c_client *client; | |
84486d53 | 91 | |
3ad96835 | 92 | v4l2_std_id norm; /* Current set standard */ |
c7c0b34c | 93 | struct v4l2_routing route; |
84486d53 MCC |
94 | int enable; |
95 | int bright; | |
96 | int contrast; | |
97 | int hue; | |
98 | int sat; | |
cd4665c5 MCC |
99 | }; |
100 | ||
858119e1 | 101 | static int tvp5150_read(struct i2c_client *c, unsigned char addr) |
cd4665c5 MCC |
102 | { |
103 | unsigned char buffer[1]; | |
104 | int rc; | |
cd4665c5 MCC |
105 | |
106 | buffer[0] = addr; | |
107 | if (1 != (rc = i2c_master_send(c, buffer, 1))) | |
e1bc80ad | 108 | tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc); |
cd4665c5 MCC |
109 | |
110 | msleep(10); | |
111 | ||
112 | if (1 != (rc = i2c_master_recv(c, buffer, 1))) | |
e1bc80ad MCC |
113 | tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc); |
114 | ||
115 | tvp5150_dbg(2, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]); | |
cd4665c5 MCC |
116 | |
117 | return (buffer[0]); | |
118 | } | |
119 | ||
84486d53 MCC |
120 | static inline void tvp5150_write(struct i2c_client *c, unsigned char addr, |
121 | unsigned char value) | |
cd4665c5 MCC |
122 | { |
123 | unsigned char buffer[2]; | |
124 | int rc; | |
cd4665c5 MCC |
125 | |
126 | buffer[0] = addr; | |
84486d53 | 127 | buffer[1] = value; |
e1bc80ad | 128 | tvp5150_dbg(2, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]); |
cd4665c5 | 129 | if (2 != (rc = i2c_master_send(c, buffer, 2))) |
e1bc80ad | 130 | tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 2)\n", rc); |
cd4665c5 MCC |
131 | } |
132 | ||
3ad96835 MCC |
133 | static void dump_reg_range(struct i2c_client *c, char *s, u8 init, const u8 end,int max_line) |
134 | { | |
135 | int i=0; | |
136 | ||
137 | while (init!=(u8)(end+1)) { | |
138 | if ((i%max_line) == 0) { | |
139 | if (i>0) | |
140 | printk("\n"); | |
141 | printk("tvp5150: %s reg 0x%02x = ",s,init); | |
142 | } | |
143 | printk("%02x ",tvp5150_read(c, init)); | |
144 | ||
145 | init++; | |
146 | i++; | |
147 | } | |
148 | printk("\n"); | |
149 | } | |
150 | ||
84486d53 | 151 | static void dump_reg(struct i2c_client *c) |
cd4665c5 | 152 | { |
84486d53 | 153 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
3ad96835 | 154 | tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 155 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
3ad96835 | 156 | tvp5150_read(c, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 157 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
3ad96835 | 158 | tvp5150_read(c, TVP5150_OP_MODE_CTL)); |
84486d53 | 159 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
3ad96835 MCC |
160 | tvp5150_read(c, TVP5150_MISC_CTL)); |
161 | printk("tvp5150: Autoswitch mask= 0x%02x\n", | |
162 | tvp5150_read(c, TVP5150_AUTOSW_MSK)); | |
84486d53 | 163 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
3ad96835 MCC |
164 | tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL)); |
165 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", | |
166 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1), | |
167 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2), | |
168 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 169 | printk("tvp5150: Brightness control = 0x%02x\n", |
3ad96835 | 170 | tvp5150_read(c, TVP5150_BRIGHT_CTL)); |
84486d53 | 171 | printk("tvp5150: Color saturation control = 0x%02x\n", |
3ad96835 | 172 | tvp5150_read(c, TVP5150_SATURATION_CTL)); |
84486d53 | 173 | printk("tvp5150: Hue control = 0x%02x\n", |
3ad96835 | 174 | tvp5150_read(c, TVP5150_HUE_CTL)); |
84486d53 | 175 | printk("tvp5150: Contrast control = 0x%02x\n", |
3ad96835 | 176 | tvp5150_read(c, TVP5150_CONTRAST_CTL)); |
84486d53 | 177 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
3ad96835 | 178 | tvp5150_read(c, TVP5150_DATA_RATE_SEL)); |
84486d53 | 179 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
3ad96835 MCC |
180 | tvp5150_read(c, TVP5150_CONF_SHARED_PIN)); |
181 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", | |
182 | tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB), | |
183 | tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB)); | |
184 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", | |
185 | tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB), | |
186 | tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 187 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
3ad96835 | 188 | tvp5150_read(c, TVP5150_GENLOCK)); |
84486d53 | 189 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
3ad96835 | 190 | tvp5150_read(c, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 191 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
3ad96835 | 192 | tvp5150_read(c, TVP5150_VERT_BLANKING_START)); |
84486d53 | 193 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
3ad96835 MCC |
194 | tvp5150_read(c, TVP5150_VERT_BLANKING_STOP)); |
195 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", | |
196 | tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1), | |
197 | tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 198 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
3ad96835 | 199 | tvp5150_read(c, TVP5150_INT_RESET_REG_B)); |
84486d53 | 200 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
3ad96835 | 201 | tvp5150_read(c, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 202 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
3ad96835 | 203 | tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 204 | printk("tvp5150: Video standard = 0x%02x\n", |
3ad96835 MCC |
205 | tvp5150_read(c, TVP5150_VIDEO_STD)); |
206 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", | |
207 | tvp5150_read(c, TVP5150_CB_GAIN_FACT), | |
208 | tvp5150_read(c, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 209 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
3ad96835 | 210 | tvp5150_read(c, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 211 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
3ad96835 MCC |
212 | tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR)); |
213 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", | |
214 | (tvp5150_read(c, TVP5150_REV_SELECT)&1)?3:4); | |
215 | printk("tvp5150: Device ID = %02x%02x\n", | |
216 | tvp5150_read(c, TVP5150_MSB_DEV_ID), | |
217 | tvp5150_read(c, TVP5150_LSB_DEV_ID)); | |
218 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", | |
219 | tvp5150_read(c, TVP5150_ROM_MAJOR_VER), | |
220 | tvp5150_read(c, TVP5150_ROM_MINOR_VER)); | |
221 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", | |
222 | tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB), | |
223 | tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 224 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
3ad96835 | 225 | tvp5150_read(c, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 226 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
3ad96835 MCC |
227 | tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B)); |
228 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", | |
229 | tvp5150_read(c, TVP5150_STATUS_REG_1), | |
230 | tvp5150_read(c, TVP5150_STATUS_REG_2), | |
231 | tvp5150_read(c, TVP5150_STATUS_REG_3), | |
232 | tvp5150_read(c, TVP5150_STATUS_REG_4), | |
233 | tvp5150_read(c, TVP5150_STATUS_REG_5)); | |
234 | ||
235 | dump_reg_range(c,"Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, | |
236 | TVP5150_TELETEXT_FIL1_END,8); | |
237 | dump_reg_range(c,"Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
238 | TVP5150_TELETEXT_FIL2_END,8); | |
239 | ||
84486d53 | 240 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
3ad96835 | 241 | tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 242 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
3ad96835 | 243 | tvp5150_read(c, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 244 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
3ad96835 | 245 | tvp5150_read(c, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 246 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
3ad96835 | 247 | tvp5150_read(c, TVP5150_INT_CONF)); |
84486d53 | 248 | printk("tvp5150: VDP status register = 0x%02x\n", |
3ad96835 | 249 | tvp5150_read(c, TVP5150_VDP_STATUS_REG)); |
84486d53 | 250 | printk("tvp5150: FIFO word count = 0x%02x\n", |
3ad96835 | 251 | tvp5150_read(c, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 252 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
3ad96835 | 253 | tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 254 | printk("tvp5150: FIFO reset = 0x%02x\n", |
3ad96835 | 255 | tvp5150_read(c, TVP5150_FIFO_RESET)); |
84486d53 | 256 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
3ad96835 MCC |
257 | tvp5150_read(c, TVP5150_LINE_NUMBER_INT)); |
258 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", | |
259 | tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH), | |
260 | tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 261 | printk("tvp5150: FIFO output control = 0x%02x\n", |
3ad96835 MCC |
262 | tvp5150_read(c, TVP5150_FIFO_OUT_CTRL)); |
263 | printk("tvp5150: Full field enable = 0x%02x\n", | |
264 | tvp5150_read(c, TVP5150_FULL_FIELD_ENA)); | |
84486d53 | 265 | printk("tvp5150: Full field mode register = 0x%02x\n", |
3ad96835 MCC |
266 | tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG)); |
267 | ||
268 | dump_reg_range(c,"CC data", TVP5150_CC_DATA_INI, | |
269 | TVP5150_CC_DATA_END,8); | |
270 | ||
271 | dump_reg_range(c,"WSS data", TVP5150_WSS_DATA_INI, | |
272 | TVP5150_WSS_DATA_END,8); | |
273 | ||
274 | dump_reg_range(c,"VPS data", TVP5150_VPS_DATA_INI, | |
275 | TVP5150_VPS_DATA_END,8); | |
276 | ||
277 | dump_reg_range(c,"VITC data", TVP5150_VITC_DATA_INI, | |
278 | TVP5150_VITC_DATA_END,10); | |
279 | ||
280 | dump_reg_range(c,"Line mode", TVP5150_LINE_MODE_INI, | |
281 | TVP5150_LINE_MODE_END,8); | |
cd4665c5 MCC |
282 | } |
283 | ||
284 | /**************************************************************************** | |
285 | Basic functions | |
286 | ****************************************************************************/ | |
cd4665c5 | 287 | |
c7c0b34c | 288 | static inline void tvp5150_selmux(struct i2c_client *c) |
cd4665c5 | 289 | { |
c0477ad9 | 290 | int opmode=0; |
4c86f973 | 291 | struct tvp5150 *decoder = i2c_get_clientdata(c); |
c7c0b34c | 292 | int input = 0; |
f4b8b3ae | 293 | unsigned char val; |
84486d53 | 294 | |
c7c0b34c HV |
295 | if ((decoder->route.output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
296 | input = 8; | |
4c86f973 | 297 | |
12500f07 | 298 | switch (decoder->route.input) { |
c7c0b34c HV |
299 | case TVP5150_COMPOSITE1: |
300 | input |= 2; | |
301 | /* fall through */ | |
302 | case TVP5150_COMPOSITE0: | |
c0477ad9 MCC |
303 | opmode=0x30; /* TV Mode */ |
304 | break; | |
c7c0b34c | 305 | case TVP5150_SVIDEO: |
c0477ad9 | 306 | default: |
c7c0b34c | 307 | input |= 1; |
c0477ad9 MCC |
308 | opmode=0; /* Auto Mode */ |
309 | break; | |
310 | } | |
311 | ||
12500f07 MCC |
312 | tvp5150_dbg( 1, "Selecting video route: route input=%i, output=%i " |
313 | "=> tvp5150 input=%i, opmode=%i\n", | |
314 | decoder->route.input,decoder->route.output, | |
315 | input, opmode ); | |
316 | ||
c0477ad9 | 317 | tvp5150_write(c, TVP5150_OP_MODE_CTL, opmode); |
a6c2ba28 | 318 | tvp5150_write(c, TVP5150_VD_IN_SRC_SEL_1, input); |
f4b8b3ae MCC |
319 | |
320 | /* Svideo should enable YCrCb output and disable GPCL output | |
321 | * For Composite and TV, it should be the reverse | |
322 | */ | |
323 | val = tvp5150_read(c, TVP5150_MISC_CTL); | |
324 | if (decoder->route.input == TVP5150_SVIDEO) | |
325 | val = (val & ~0x40) | 0x10; | |
326 | else | |
327 | val = (val & ~0x10) | 0x40; | |
328 | tvp5150_write(c, TVP5150_MISC_CTL, val); | |
cd4665c5 MCC |
329 | }; |
330 | ||
e1bc80ad MCC |
331 | struct i2c_reg_value { |
332 | unsigned char reg; | |
333 | unsigned char value; | |
334 | }; | |
335 | ||
336 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
337 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
338 | { /* 0x00 */ | |
339 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
340 | }, | |
341 | { /* 0x01 */ | |
342 | TVP5150_ANAL_CHL_CTL,0x15 | |
343 | }, | |
344 | { /* 0x02 */ | |
345 | TVP5150_OP_MODE_CTL,0x00 | |
346 | }, | |
347 | { /* 0x03 */ | |
348 | TVP5150_MISC_CTL,0x01 | |
349 | }, | |
350 | { /* 0x06 */ | |
351 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
352 | }, | |
353 | { /* 0x07 */ | |
354 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
355 | }, | |
356 | { /* 0x08 */ | |
357 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
358 | }, | |
359 | { /* 0x09 */ | |
360 | TVP5150_BRIGHT_CTL,0x80 | |
361 | }, | |
362 | { /* 0x0a */ | |
363 | TVP5150_SATURATION_CTL,0x80 | |
364 | }, | |
365 | { /* 0x0b */ | |
366 | TVP5150_HUE_CTL,0x00 | |
367 | }, | |
368 | { /* 0x0c */ | |
369 | TVP5150_CONTRAST_CTL,0x80 | |
370 | }, | |
371 | { /* 0x0d */ | |
372 | TVP5150_DATA_RATE_SEL,0x47 | |
373 | }, | |
374 | { /* 0x0e */ | |
375 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
376 | }, | |
377 | { /* 0x0f */ | |
378 | TVP5150_CONF_SHARED_PIN,0x08 | |
379 | }, | |
380 | { /* 0x11 */ | |
381 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
382 | }, | |
383 | { /* 0x12 */ | |
384 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
385 | }, | |
386 | { /* 0x13 */ | |
387 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
388 | }, | |
389 | { /* 0x14 */ | |
390 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
391 | }, | |
392 | { /* 0x15 */ | |
393 | TVP5150_GENLOCK,0x01 | |
394 | }, | |
395 | { /* 0x16 */ | |
396 | TVP5150_HORIZ_SYNC_START,0x80 | |
397 | }, | |
398 | { /* 0x18 */ | |
399 | TVP5150_VERT_BLANKING_START,0x00 | |
400 | }, | |
401 | { /* 0x19 */ | |
402 | TVP5150_VERT_BLANKING_STOP,0x00 | |
403 | }, | |
404 | { /* 0x1a */ | |
405 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
406 | }, | |
407 | { /* 0x1b */ | |
408 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
409 | }, | |
410 | { /* 0x1c */ | |
411 | TVP5150_INT_RESET_REG_B,0x00 | |
412 | }, | |
413 | { /* 0x1d */ | |
414 | TVP5150_INT_ENABLE_REG_B,0x00 | |
415 | }, | |
416 | { /* 0x1e */ | |
417 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
418 | }, | |
419 | { /* 0x28 */ | |
420 | TVP5150_VIDEO_STD,0x00 | |
421 | }, | |
422 | { /* 0x2e */ | |
423 | TVP5150_MACROVISION_ON_CTR,0x0f | |
424 | }, | |
425 | { /* 0x2f */ | |
426 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
427 | }, | |
428 | { /* 0xbb */ | |
429 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
430 | }, | |
431 | { /* 0xc0 */ | |
432 | TVP5150_INT_STATUS_REG_A,0x00 | |
433 | }, | |
434 | { /* 0xc1 */ | |
435 | TVP5150_INT_ENABLE_REG_A,0x00 | |
436 | }, | |
437 | { /* 0xc2 */ | |
438 | TVP5150_INT_CONF,0x04 | |
439 | }, | |
440 | { /* 0xc8 */ | |
441 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
442 | }, | |
443 | { /* 0xc9 */ | |
444 | TVP5150_FIFO_RESET,0x00 | |
445 | }, | |
446 | { /* 0xca */ | |
447 | TVP5150_LINE_NUMBER_INT,0x00 | |
448 | }, | |
449 | { /* 0xcb */ | |
450 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
451 | }, | |
452 | { /* 0xcc */ | |
453 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
454 | }, | |
455 | { /* 0xcd */ | |
456 | TVP5150_FIFO_OUT_CTRL,0x01 | |
457 | }, | |
458 | { /* 0xcf */ | |
3ad96835 | 459 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
460 | }, |
461 | { /* 0xd0 */ | |
3ad96835 | 462 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
463 | }, |
464 | { /* 0xfc */ | |
465 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
466 | }, | |
467 | { /* end of data */ | |
468 | 0xff,0xff | |
469 | } | |
470 | }; | |
471 | ||
472 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
473 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
474 | { | |
475 | TVP5150_CONF_SHARED_PIN, 2 | |
476 | },{ /* Automatic offset and AGC enabled */ | |
477 | TVP5150_ANAL_CHL_CTL, 0x15 | |
478 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
479 | TVP5150_MISC_CTL, 0x6f | |
480 | },{ /* Activates video std autodetection for all standards */ | |
481 | TVP5150_AUTOSW_MSK, 0x0 | |
482 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
483 | TVP5150_DATA_RATE_SEL, 0x47 | |
484 | },{ | |
485 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
486 | },{ | |
487 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
488 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
489 | 0x27, 0x20 | |
490 | },{ | |
491 | 0xff,0xff | |
492 | } | |
493 | }; | |
494 | ||
6ac48b45 MCC |
495 | struct tvp5150_vbi_type { |
496 | unsigned int vbi_type; | |
497 | unsigned int ini_line; | |
498 | unsigned int end_line; | |
499 | unsigned int by_field :1; | |
500 | }; | |
501 | ||
e1bc80ad MCC |
502 | struct i2c_vbi_ram_value { |
503 | u16 reg; | |
6ac48b45 MCC |
504 | struct tvp5150_vbi_type type; |
505 | unsigned char values[16]; | |
e1bc80ad MCC |
506 | }; |
507 | ||
6ac48b45 MCC |
508 | /* This struct have the values for each supported VBI Standard |
509 | * by | |
510 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
511 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
512 | * and so on. There are 16 possible locations from 0 to 15. | |
513 | */ | |
3ad96835 | 514 | |
a9cff90e | 515 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 516 | { |
9bc7400a HV |
517 | /* FIXME: Current api doesn't handle all VBI types, those not |
518 | yet supported are placed under #if 0 */ | |
519 | #if 0 | |
6ac48b45 MCC |
520 | {0x010, /* Teletext, SECAM, WST System A */ |
521 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
522 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
523 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 524 | }, |
9bc7400a | 525 | #endif |
6ac48b45 | 526 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 527 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
528 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
529 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 530 | }, |
9bc7400a | 531 | #if 0 |
6ac48b45 MCC |
532 | {0x050, /* Teletext, PAL, WST System C */ |
533 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
534 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
535 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 536 | }, |
6ac48b45 MCC |
537 | {0x070, /* Teletext, NTSC, WST System B */ |
538 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
539 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
540 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 541 | }, |
6ac48b45 MCC |
542 | {0x090, /* Tetetext, NTSC NABTS System C */ |
543 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
544 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
545 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 546 | }, |
6ac48b45 MCC |
547 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
548 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
549 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
550 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 551 | }, |
6ac48b45 MCC |
552 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
553 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
554 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
555 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 556 | }, |
9bc7400a | 557 | #endif |
6ac48b45 MCC |
558 | {0x0f0, /* Closed Caption, NTSC */ |
559 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
560 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
561 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 562 | }, |
6ac48b45 | 563 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 564 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
565 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
566 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 567 | }, |
9bc7400a | 568 | #if 0 |
6ac48b45 MCC |
569 | {0x130, /* Wide Screen Signal, NTSC C */ |
570 | {V4L2_SLICED_WSS_525,20,20,1}, | |
571 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
572 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 573 | }, |
6ac48b45 MCC |
574 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
575 | {V4l2_SLICED_VITC_625,6,22,0}, | |
576 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
577 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 578 | }, |
6ac48b45 MCC |
579 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
580 | {V4l2_SLICED_VITC_525,10,20,0}, | |
581 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
582 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 583 | }, |
9bc7400a | 584 | #endif |
6ac48b45 MCC |
585 | {0x190, /* Video Program System (VPS), PAL */ |
586 | {V4L2_SLICED_VPS,16,16,0}, | |
587 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
588 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 589 | }, |
6ac48b45 MCC |
590 | /* 0x1d0 User programmable */ |
591 | ||
592 | /* End of struct */ | |
593 | { (u16)-1 } | |
e1bc80ad | 594 | }; |
4c86f973 | 595 | |
e1bc80ad | 596 | static int tvp5150_write_inittab(struct i2c_client *c, |
6ac48b45 | 597 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
598 | { |
599 | while (regs->reg != 0xff) { | |
600 | tvp5150_write(c, regs->reg, regs->value); | |
601 | regs++; | |
602 | } | |
603 | return 0; | |
604 | } | |
84486d53 | 605 | |
e1bc80ad | 606 | static int tvp5150_vdp_init(struct i2c_client *c, |
6ac48b45 | 607 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
608 | { |
609 | unsigned int i; | |
cd4665c5 | 610 | |
e1bc80ad | 611 | /* Disable Full Field */ |
3ad96835 | 612 | tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 613 | |
e1bc80ad | 614 | /* Before programming, Line mode should be at 0xff */ |
3ad96835 | 615 | for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++) |
e1bc80ad | 616 | tvp5150_write(c, i, 0xff); |
cd4665c5 | 617 | |
e1bc80ad MCC |
618 | /* Load Ram Table */ |
619 | while (regs->reg != (u16)-1 ) { | |
620 | tvp5150_write(c, TVP5150_CONF_RAM_ADDR_HIGH,regs->reg>>8); | |
621 | tvp5150_write(c, TVP5150_CONF_RAM_ADDR_LOW,regs->reg); | |
cd4665c5 | 622 | |
e1bc80ad MCC |
623 | for (i=0;i<16;i++) |
624 | tvp5150_write(c, TVP5150_VDP_CONF_RAM_DATA,regs->values[i]); | |
84486d53 | 625 | |
e1bc80ad MCC |
626 | regs++; |
627 | } | |
628 | return 0; | |
629 | } | |
cd4665c5 | 630 | |
6ac48b45 MCC |
631 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
632 | static void tvp5150_vbi_get_cap(const struct i2c_vbi_ram_value *regs, | |
633 | struct v4l2_sliced_vbi_cap *cap) | |
634 | { | |
635 | int line; | |
636 | ||
637 | memset(cap, 0, sizeof *cap); | |
638 | ||
639 | while (regs->reg != (u16)-1 ) { | |
640 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
641 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
642 | } | |
643 | cap->service_set |= regs->type.vbi_type; | |
644 | ||
645 | regs++; | |
646 | } | |
647 | } | |
648 | ||
3ad96835 MCC |
649 | /* Set vbi processing |
650 | * type - one of tvp5150_vbi_types | |
651 | * line - line to gather data | |
652 | * fields: bit 0 field1, bit 1, field2 | |
653 | * flags (default=0xf0) is a bitmask, were set means: | |
654 | * bit 7: enable filtering null bytes on CC | |
655 | * bit 6: send data also to FIFO | |
656 | * bit 5: don't allow data with errors on FIFO | |
657 | * bit 4: enable ECC when possible | |
658 | * pix_align = pix alignment: | |
659 | * LSB = field1 | |
660 | * MSB = field2 | |
661 | */ | |
2701dacb MCC |
662 | static int tvp5150_set_vbi(struct i2c_client *c, |
663 | const struct i2c_vbi_ram_value *regs, | |
664 | unsigned int type,u8 flags, int line, | |
665 | const int fields) | |
3ad96835 MCC |
666 | { |
667 | struct tvp5150 *decoder = i2c_get_clientdata(c); | |
668 | v4l2_std_id std=decoder->norm; | |
669 | u8 reg; | |
2701dacb | 670 | int pos=0; |
3ad96835 MCC |
671 | |
672 | if (std == V4L2_STD_ALL) { | |
673 | tvp5150_err("VBI can't be configured without knowing number of lines\n"); | |
12db5607 | 674 | return 0; |
7d5b7b98 | 675 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
676 | /* Don't follow NTSC Line number convension */ |
677 | line += 3; | |
678 | } | |
679 | ||
680 | if (line<6||line>27) | |
2701dacb MCC |
681 | return 0; |
682 | ||
683 | while (regs->reg != (u16)-1 ) { | |
684 | if ((type & regs->type.vbi_type) && | |
685 | (line>=regs->type.ini_line) && | |
686 | (line<=regs->type.end_line)) { | |
687 | type=regs->type.vbi_type; | |
688 | break; | |
689 | } | |
690 | ||
691 | regs++; | |
692 | pos++; | |
693 | } | |
694 | if (regs->reg == (u16)-1) | |
695 | return 0; | |
3ad96835 | 696 | |
2701dacb | 697 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
698 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
699 | ||
700 | if (fields&1) { | |
701 | tvp5150_write(c, reg, type); | |
702 | } | |
703 | ||
704 | if (fields&2) { | |
705 | tvp5150_write(c, reg+1, type); | |
706 | } | |
707 | ||
2701dacb | 708 | return type; |
3ad96835 MCC |
709 | } |
710 | ||
12db5607 MCC |
711 | static int tvp5150_get_vbi(struct i2c_client *c, |
712 | const struct i2c_vbi_ram_value *regs, int line) | |
713 | { | |
714 | struct tvp5150 *decoder = i2c_get_clientdata(c); | |
715 | v4l2_std_id std=decoder->norm; | |
716 | u8 reg; | |
717 | int pos, type=0; | |
718 | ||
719 | if (std == V4L2_STD_ALL) { | |
720 | tvp5150_err("VBI can't be configured without knowing number of lines\n"); | |
721 | return 0; | |
7d5b7b98 | 722 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
723 | /* Don't follow NTSC Line number convension */ |
724 | line += 3; | |
725 | } | |
726 | ||
727 | if (line<6||line>27) | |
728 | return 0; | |
729 | ||
730 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; | |
731 | ||
732 | pos=tvp5150_read(c, reg)&0x0f; | |
733 | if (pos<0x0f) | |
734 | type=regs[pos].type.vbi_type; | |
735 | ||
736 | pos=tvp5150_read(c, reg+1)&0x0f; | |
737 | if (pos<0x0f) | |
738 | type|=regs[pos].type.vbi_type; | |
739 | ||
740 | return type; | |
741 | } | |
e1bc80ad MCC |
742 | static int tvp5150_set_std(struct i2c_client *c, v4l2_std_id std) |
743 | { | |
744 | struct tvp5150 *decoder = i2c_get_clientdata(c); | |
745 | int fmt=0; | |
746 | ||
747 | decoder->norm=std; | |
748 | ||
749 | /* First tests should be against specific std */ | |
750 | ||
751 | if (std == V4L2_STD_ALL) { | |
752 | fmt=0; /* Autodetect mode */ | |
753 | } else if (std & V4L2_STD_NTSC_443) { | |
754 | fmt=0xa; | |
755 | } else if (std & V4L2_STD_PAL_M) { | |
756 | fmt=0x6; | |
757 | } else if (std & (V4L2_STD_PAL_N| V4L2_STD_PAL_Nc)) { | |
758 | fmt=0x8; | |
759 | } else { | |
760 | /* Then, test against generic ones */ | |
761 | if (std & V4L2_STD_NTSC) { | |
762 | fmt=0x2; | |
763 | } else if (std & V4L2_STD_PAL) { | |
764 | fmt=0x4; | |
765 | } else if (std & V4L2_STD_SECAM) { | |
766 | fmt=0xc; | |
767 | } | |
768 | } | |
84486d53 | 769 | |
e1bc80ad MCC |
770 | tvp5150_dbg(1,"Set video std register to %d.\n",fmt); |
771 | tvp5150_write(c, TVP5150_VIDEO_STD, fmt); | |
84486d53 | 772 | |
e1bc80ad MCC |
773 | return 0; |
774 | } | |
775 | ||
776 | static inline void tvp5150_reset(struct i2c_client *c) | |
777 | { | |
e36eaa71 | 778 | u8 msb_id, lsb_id, msb_rom, lsb_rom; |
e1bc80ad MCC |
779 | struct tvp5150 *decoder = i2c_get_clientdata(c); |
780 | ||
e1bc80ad MCC |
781 | msb_id=tvp5150_read(c,TVP5150_MSB_DEV_ID); |
782 | lsb_id=tvp5150_read(c,TVP5150_LSB_DEV_ID); | |
783 | msb_rom=tvp5150_read(c,TVP5150_ROM_MAJOR_VER); | |
784 | lsb_rom=tvp5150_read(c,TVP5150_ROM_MINOR_VER); | |
785 | ||
e36eaa71 MCC |
786 | if ((msb_rom==4)&&(lsb_rom==0)) { /* Is TVP5150AM1 */ |
787 | tvp5150_info("tvp%02x%02xam1 detected.\n",msb_id, lsb_id); | |
788 | ||
789 | /* ITU-T BT.656.4 timing */ | |
790 | tvp5150_write(c,TVP5150_REV_SELECT,0); | |
e1bc80ad | 791 | } else { |
e36eaa71 MCC |
792 | if ((msb_rom==3)||(lsb_rom==0x21)) { /* Is TVP5150A */ |
793 | tvp5150_info("tvp%02x%02xa detected.\n",msb_id, lsb_id); | |
794 | } else { | |
795 | tvp5150_info("*** unknown tvp%02x%02x chip detected.\n",msb_id,lsb_id); | |
796 | tvp5150_info("*** Rom ver is %d.%d\n",msb_rom,lsb_rom); | |
797 | } | |
e1bc80ad | 798 | } |
84486d53 | 799 | |
e1bc80ad MCC |
800 | /* Initializes TVP5150 to its default values */ |
801 | tvp5150_write_inittab(c, tvp5150_init_default); | |
802 | ||
803 | /* Initializes VDP registers */ | |
804 | tvp5150_vdp_init(c, vbi_ram_default); | |
805 | ||
806 | /* Selects decoder input */ | |
c7c0b34c | 807 | tvp5150_selmux(c); |
e1bc80ad MCC |
808 | |
809 | /* Initializes TVP5150 to stream enabled values */ | |
810 | tvp5150_write_inittab(c, tvp5150_init_enable); | |
811 | ||
812 | /* Initialize image preferences */ | |
032c2028 MCC |
813 | tvp5150_write(c, TVP5150_BRIGHT_CTL, decoder->bright); |
814 | tvp5150_write(c, TVP5150_CONTRAST_CTL, decoder->contrast); | |
815 | tvp5150_write(c, TVP5150_SATURATION_CTL, decoder->contrast); | |
816 | tvp5150_write(c, TVP5150_HUE_CTL, decoder->hue); | |
e1bc80ad MCC |
817 | |
818 | tvp5150_set_std(c, decoder->norm); | |
cd4665c5 MCC |
819 | }; |
820 | ||
a6c2ba28 | 821 | static int tvp5150_get_ctrl(struct i2c_client *c, struct v4l2_control *ctrl) |
822 | { | |
823 | /* struct tvp5150 *decoder = i2c_get_clientdata(c); */ | |
824 | ||
825 | switch (ctrl->id) { | |
826 | case V4L2_CID_BRIGHTNESS: | |
827 | ctrl->value = tvp5150_read(c, TVP5150_BRIGHT_CTL); | |
828 | return 0; | |
829 | case V4L2_CID_CONTRAST: | |
830 | ctrl->value = tvp5150_read(c, TVP5150_CONTRAST_CTL); | |
831 | return 0; | |
832 | case V4L2_CID_SATURATION: | |
833 | ctrl->value = tvp5150_read(c, TVP5150_SATURATION_CTL); | |
834 | return 0; | |
835 | case V4L2_CID_HUE: | |
836 | ctrl->value = tvp5150_read(c, TVP5150_HUE_CTL); | |
837 | return 0; | |
a6c2ba28 | 838 | } |
c0477ad9 | 839 | return -EINVAL; |
a6c2ba28 | 840 | } |
841 | ||
842 | static int tvp5150_set_ctrl(struct i2c_client *c, struct v4l2_control *ctrl) | |
843 | { | |
844 | /* struct tvp5150 *decoder = i2c_get_clientdata(c); */ | |
845 | ||
846 | switch (ctrl->id) { | |
847 | case V4L2_CID_BRIGHTNESS: | |
848 | tvp5150_write(c, TVP5150_BRIGHT_CTL, ctrl->value); | |
849 | return 0; | |
850 | case V4L2_CID_CONTRAST: | |
851 | tvp5150_write(c, TVP5150_CONTRAST_CTL, ctrl->value); | |
852 | return 0; | |
853 | case V4L2_CID_SATURATION: | |
854 | tvp5150_write(c, TVP5150_SATURATION_CTL, ctrl->value); | |
855 | return 0; | |
856 | case V4L2_CID_HUE: | |
857 | tvp5150_write(c, TVP5150_HUE_CTL, ctrl->value); | |
858 | return 0; | |
a6c2ba28 | 859 | } |
c0477ad9 | 860 | return -EINVAL; |
a6c2ba28 | 861 | } |
862 | ||
84486d53 MCC |
863 | /**************************************************************************** |
864 | I2C Command | |
865 | ****************************************************************************/ | |
e1bc80ad | 866 | static int tvp5150_command(struct i2c_client *c, |
84486d53 MCC |
867 | unsigned int cmd, void *arg) |
868 | { | |
e1bc80ad | 869 | struct tvp5150 *decoder = i2c_get_clientdata(c); |
84486d53 MCC |
870 | |
871 | switch (cmd) { | |
872 | ||
873 | case 0: | |
e1bc80ad | 874 | case VIDIOC_INT_RESET: |
e1bc80ad MCC |
875 | tvp5150_reset(c); |
876 | break; | |
c7c0b34c HV |
877 | case VIDIOC_INT_G_VIDEO_ROUTING: |
878 | { | |
879 | struct v4l2_routing *route = arg; | |
880 | ||
881 | *route = decoder->route; | |
882 | break; | |
883 | } | |
884 | case VIDIOC_INT_S_VIDEO_ROUTING: | |
885 | { | |
886 | struct v4l2_routing *route = arg; | |
887 | ||
888 | decoder->route = *route; | |
889 | tvp5150_selmux(c); | |
890 | break; | |
891 | } | |
e1bc80ad MCC |
892 | case VIDIOC_S_STD: |
893 | if (decoder->norm == *(v4l2_std_id *)arg) | |
894 | break; | |
895 | return tvp5150_set_std(c, *(v4l2_std_id *)arg); | |
896 | case VIDIOC_G_STD: | |
897 | *(v4l2_std_id *)arg = decoder->norm; | |
84486d53 MCC |
898 | break; |
899 | ||
6ac48b45 MCC |
900 | case VIDIOC_G_SLICED_VBI_CAP: |
901 | { | |
902 | struct v4l2_sliced_vbi_cap *cap = arg; | |
903 | tvp5150_dbg(1, "VIDIOC_G_SLICED_VBI_CAP\n"); | |
904 | ||
905 | tvp5150_vbi_get_cap(vbi_ram_default, cap); | |
906 | break; | |
907 | } | |
2701dacb MCC |
908 | case VIDIOC_S_FMT: |
909 | { | |
910 | struct v4l2_format *fmt; | |
911 | struct v4l2_sliced_vbi_format *svbi; | |
912 | int i; | |
6ac48b45 | 913 | |
2701dacb MCC |
914 | fmt = arg; |
915 | if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) | |
916 | return -EINVAL; | |
917 | svbi = &fmt->fmt.sliced; | |
918 | if (svbi->service_set != 0) { | |
919 | for (i = 0; i <= 23; i++) { | |
920 | svbi->service_lines[1][i] = 0; | |
921 | ||
922 | svbi->service_lines[0][i]=tvp5150_set_vbi(c, | |
923 | vbi_ram_default, | |
924 | svbi->service_lines[0][i],0xf0,i,3); | |
925 | } | |
12db5607 MCC |
926 | /* Enables FIFO */ |
927 | tvp5150_write(c, TVP5150_FIFO_OUT_CTRL,1); | |
928 | } else { | |
929 | /* Disables FIFO*/ | |
930 | tvp5150_write(c, TVP5150_FIFO_OUT_CTRL,0); | |
931 | ||
932 | /* Disable Full Field */ | |
933 | tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0); | |
934 | ||
935 | /* Disable Line modes */ | |
936 | for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++) | |
937 | tvp5150_write(c, i, 0xff); | |
938 | } | |
939 | break; | |
940 | } | |
941 | case VIDIOC_G_FMT: | |
942 | { | |
943 | struct v4l2_format *fmt; | |
944 | struct v4l2_sliced_vbi_format *svbi; | |
945 | ||
946 | int i, mask=0; | |
947 | ||
948 | fmt = arg; | |
949 | if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) | |
950 | return -EINVAL; | |
951 | svbi = &fmt->fmt.sliced; | |
952 | memset(svbi, 0, sizeof(*svbi)); | |
953 | ||
954 | for (i = 0; i <= 23; i++) { | |
955 | svbi->service_lines[0][i]=tvp5150_get_vbi(c, | |
956 | vbi_ram_default,i); | |
957 | mask|=svbi->service_lines[0][i]; | |
2701dacb | 958 | } |
12db5607 | 959 | svbi->service_set=mask; |
2701dacb MCC |
960 | break; |
961 | } | |
12db5607 | 962 | |
21dcd8cc | 963 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
52ebc763 | 964 | case VIDIOC_DBG_G_REGISTER: |
52ebc763 | 965 | case VIDIOC_DBG_S_REGISTER: |
21dcd8cc MCC |
966 | { |
967 | struct v4l2_register *reg = arg; | |
968 | ||
f3d092b8 | 969 | if (!v4l2_chip_match_i2c_client(c, reg->match_type, reg->match_chip)) |
21dcd8cc MCC |
970 | return -EINVAL; |
971 | if (!capable(CAP_SYS_ADMIN)) | |
972 | return -EPERM; | |
62d50add TP |
973 | if (cmd == VIDIOC_DBG_G_REGISTER) |
974 | reg->val = tvp5150_read(c, reg->reg & 0xff); | |
975 | else | |
976 | tvp5150_write(c, reg->reg & 0xff, reg->val & 0xff); | |
21dcd8cc MCC |
977 | break; |
978 | } | |
979 | #endif | |
980 | ||
12db5607 | 981 | case VIDIOC_LOG_STATUS: |
e1bc80ad | 982 | dump_reg(c); |
84486d53 MCC |
983 | break; |
984 | ||
ab4cecf9 | 985 | case VIDIOC_G_TUNER: |
a6c2ba28 | 986 | { |
ab4cecf9 HV |
987 | struct v4l2_tuner *vt = arg; |
988 | int status = tvp5150_read(c, 0x88); | |
84486d53 | 989 | |
ab4cecf9 | 990 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
a6c2ba28 | 991 | break; |
4c86f973 | 992 | } |
a6c2ba28 | 993 | case VIDIOC_QUERYCTRL: |
994 | { | |
995 | struct v4l2_queryctrl *qc = arg; | |
c0477ad9 | 996 | int i; |
a6c2ba28 | 997 | |
e1bc80ad | 998 | tvp5150_dbg(1, "VIDIOC_QUERYCTRL called\n"); |
a6c2ba28 | 999 | |
c0477ad9 | 1000 | for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++) |
a6c2ba28 | 1001 | if (qc->id && qc->id == tvp5150_qctrl[i].id) { |
1002 | memcpy(qc, &(tvp5150_qctrl[i]), | |
1003 | sizeof(*qc)); | |
1004 | return 0; | |
1005 | } | |
1006 | ||
1007 | return -EINVAL; | |
4c86f973 | 1008 | } |
a6c2ba28 | 1009 | case VIDIOC_G_CTRL: |
1010 | { | |
1011 | struct v4l2_control *ctrl = arg; | |
e1bc80ad | 1012 | tvp5150_dbg(1, "VIDIOC_G_CTRL called\n"); |
a6c2ba28 | 1013 | |
e1bc80ad | 1014 | return tvp5150_get_ctrl(c, ctrl); |
4c86f973 | 1015 | } |
a6c2ba28 | 1016 | case VIDIOC_S_CTRL: |
1017 | { | |
1018 | struct v4l2_control *ctrl = arg; | |
1019 | u8 i, n; | |
0c71bf1c | 1020 | n = ARRAY_SIZE(tvp5150_qctrl); |
a6c2ba28 | 1021 | for (i = 0; i < n; i++) |
1022 | if (ctrl->id == tvp5150_qctrl[i].id) { | |
1023 | if (ctrl->value < | |
1024 | tvp5150_qctrl[i].minimum | |
1025 | || ctrl->value > | |
1026 | tvp5150_qctrl[i].maximum) | |
1027 | return -ERANGE; | |
e1bc80ad MCC |
1028 | tvp5150_dbg(1, |
1029 | "VIDIOC_S_CTRL: id=%d, value=%d\n", | |
a6c2ba28 | 1030 | ctrl->id, ctrl->value); |
e1bc80ad | 1031 | return tvp5150_set_ctrl(c, ctrl); |
a6c2ba28 | 1032 | } |
1033 | return -EINVAL; | |
1034 | } | |
1035 | ||
84486d53 MCC |
1036 | default: |
1037 | return -EINVAL; | |
1038 | } | |
1039 | ||
1040 | return 0; | |
1041 | } | |
cd4665c5 MCC |
1042 | |
1043 | /**************************************************************************** | |
1044 | I2C Client & Driver | |
1045 | ****************************************************************************/ | |
1046 | static struct i2c_driver driver; | |
1047 | ||
a6c2ba28 | 1048 | static struct i2c_client client_template = { |
1049 | .name = "(unset)", | |
a6c2ba28 | 1050 | .driver = &driver, |
cd4665c5 MCC |
1051 | }; |
1052 | ||
a6c2ba28 | 1053 | static int tvp5150_detect_client(struct i2c_adapter *adapter, |
1054 | int address, int kind) | |
cd4665c5 | 1055 | { |
e1bc80ad | 1056 | struct i2c_client *c; |
cd4665c5 MCC |
1057 | struct tvp5150 *core; |
1058 | int rv; | |
1059 | ||
e1bc80ad MCC |
1060 | if (debug) |
1061 | printk( KERN_INFO | |
cd4665c5 MCC |
1062 | "tvp5150.c: detecting tvp5150 client on address 0x%x\n", |
1063 | address << 1); | |
1064 | ||
1065 | client_template.adapter = adapter; | |
1066 | client_template.addr = address; | |
1067 | ||
1068 | /* Check if the adapter supports the needed features */ | |
1069 | if (!i2c_check_functionality | |
1070 | (adapter, | |
1071 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) | |
1072 | return 0; | |
1073 | ||
e1bc80ad | 1074 | c = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); |
5fa1247a | 1075 | if (!c) |
cd4665c5 | 1076 | return -ENOMEM; |
e1bc80ad | 1077 | memcpy(c, &client_template, sizeof(struct i2c_client)); |
cd4665c5 | 1078 | |
7408187d | 1079 | core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL); |
5fa1247a | 1080 | if (!core) { |
e1bc80ad | 1081 | kfree(c); |
cd4665c5 MCC |
1082 | return -ENOMEM; |
1083 | } | |
e1bc80ad | 1084 | i2c_set_clientdata(c, core); |
cd4665c5 | 1085 | |
e1bc80ad | 1086 | rv = i2c_attach_client(c); |
cd4665c5 | 1087 | |
3ad96835 | 1088 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
c7c0b34c | 1089 | core->route.input = TVP5150_COMPOSITE1; |
4c86f973 | 1090 | core->enable = 1; |
032c2028 MCC |
1091 | core->bright = 128; |
1092 | core->contrast = 128; | |
1093 | core->hue = 0; | |
1094 | core->sat = 128; | |
4c86f973 | 1095 | |
cd4665c5 | 1096 | if (rv) { |
e1bc80ad | 1097 | kfree(c); |
cd4665c5 MCC |
1098 | kfree(core); |
1099 | return rv; | |
1100 | } | |
1101 | ||
f1e5ee45 | 1102 | if (debug > 1) |
e1bc80ad | 1103 | dump_reg(c); |
cd4665c5 MCC |
1104 | return 0; |
1105 | } | |
1106 | ||
a6c2ba28 | 1107 | static int tvp5150_attach_adapter(struct i2c_adapter *adapter) |
cd4665c5 | 1108 | { |
e1bc80ad MCC |
1109 | if (debug) |
1110 | printk( KERN_INFO | |
cd4665c5 MCC |
1111 | "tvp5150.c: starting probe for adapter %s (0x%x)\n", |
1112 | adapter->name, adapter->id); | |
1113 | return i2c_probe(adapter, &addr_data, &tvp5150_detect_client); | |
1114 | } | |
1115 | ||
e1bc80ad | 1116 | static int tvp5150_detach_client(struct i2c_client *c) |
cd4665c5 | 1117 | { |
e1bc80ad | 1118 | struct tvp5150 *decoder = i2c_get_clientdata(c); |
cd4665c5 MCC |
1119 | int err; |
1120 | ||
e1bc80ad MCC |
1121 | tvp5150_dbg(1, |
1122 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", | |
1123 | c->addr << 1); | |
1124 | ||
1125 | err = i2c_detach_client(c); | |
cd4665c5 MCC |
1126 | if (err) { |
1127 | return err; | |
1128 | } | |
1129 | ||
1130 | kfree(decoder); | |
e1bc80ad | 1131 | kfree(c); |
cd4665c5 MCC |
1132 | |
1133 | return 0; | |
1134 | } | |
1135 | ||
1136 | /* ----------------------------------------------------------------------- */ | |
1137 | ||
1138 | static struct i2c_driver driver = { | |
604f28e2 | 1139 | .driver = { |
604f28e2 LR |
1140 | .name = "tvp5150", |
1141 | }, | |
cab462f7 | 1142 | .id = I2C_DRIVERID_TVP5150, |
cd4665c5 MCC |
1143 | |
1144 | .attach_adapter = tvp5150_attach_adapter, | |
1145 | .detach_client = tvp5150_detach_client, | |
84486d53 MCC |
1146 | |
1147 | .command = tvp5150_command, | |
cd4665c5 MCC |
1148 | }; |
1149 | ||
a6c2ba28 | 1150 | static int __init tvp5150_init(void) |
cd4665c5 MCC |
1151 | { |
1152 | return i2c_add_driver(&driver); | |
1153 | } | |
1154 | ||
a6c2ba28 | 1155 | static void __exit tvp5150_exit(void) |
cd4665c5 MCC |
1156 | { |
1157 | i2c_del_driver(&driver); | |
1158 | } | |
1159 | ||
1160 | module_init(tvp5150_init); | |
1161 | module_exit(tvp5150_exit); |