V4L/DVB (3712): Fix video input setting of em28xx, use _INT_S_VIDEO_ROUTING in tvp5150
[deliverable/linux.git] / drivers / media / video / tvp5150.c
CommitLineData
cd4665c5 1/*
6ac48b45 2 * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver
cd4665c5 3 *
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4 * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org)
5 * This code is placed under the terms of the GNU General Public License v2
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6 */
7
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8#include <linux/i2c.h>
9#include <linux/videodev.h>
10#include <linux/delay.h>
84486d53 11#include <linux/video_decoder.h>
e1bc80ad 12#include <media/v4l2-common.h>
c7c0b34c 13#include <media/tvp5150.h>
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14
15#include "tvp5150_reg.h"
16
6ac48b45 17MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver");
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18MODULE_AUTHOR("Mauro Carvalho Chehab");
19MODULE_LICENSE("GPL");
20
6ac48b45 21/* standard i2c insmod options */
cd4665c5 22static unsigned short normal_i2c[] = {
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23 0xb8 >> 1,
24 0xba >> 1,
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25 I2C_CLIENT_END
26};
27
28I2C_CLIENT_INSMOD;
29
30static int debug = 0;
31module_param(debug, int, 0);
32MODULE_PARM_DESC(debug, "Debug level (0-1)");
33
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34#define tvp5150_err(fmt, arg...) do { \
35 printk(KERN_ERR "%s %d-%04x: " fmt, c->driver->driver.name, \
36 i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0)
e1bc80ad 37#define tvp5150_info(fmt, arg...) do { \
cab462f7 38 printk(KERN_INFO "%s %d-%04x: " fmt, c->driver->driver.name, \
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39 i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0)
40#define tvp5150_dbg(num, fmt, arg...) \
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41 do { \
42 if (debug >= num) \
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43 printk(KERN_DEBUG "%s debug %d-%04x: " fmt,\
44 c->driver->driver.name, \
45 i2c_adapter_id(c->adapter), \
46 c->addr , ## arg); } while (0)
cd4665c5 47
a6c2ba28 48/* supported controls */
49static struct v4l2_queryctrl tvp5150_qctrl[] = {
50 {
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51 .id = V4L2_CID_BRIGHTNESS,
52 .type = V4L2_CTRL_TYPE_INTEGER,
53 .name = "Brightness",
54 .minimum = 0,
55 .maximum = 255,
56 .step = 1,
75bc8019 57 .default_value = 128,
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58 .flags = 0,
59 }, {
60 .id = V4L2_CID_CONTRAST,
61 .type = V4L2_CTRL_TYPE_INTEGER,
62 .name = "Contrast",
63 .minimum = 0,
64 .maximum = 255,
65 .step = 0x1,
75bc8019 66 .default_value = 128,
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67 .flags = 0,
68 }, {
a6c2ba28 69 .id = V4L2_CID_SATURATION,
70 .type = V4L2_CTRL_TYPE_INTEGER,
71 .name = "Saturation",
72 .minimum = 0,
73 .maximum = 255,
74 .step = 0x1,
75bc8019 75 .default_value = 128,
a6c2ba28 76 .flags = 0,
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77 }, {
78 .id = V4L2_CID_HUE,
79 .type = V4L2_CTRL_TYPE_INTEGER,
80 .name = "Hue",
81 .minimum = -128,
82 .maximum = 127,
83 .step = 0x1,
75bc8019 84 .default_value = 0,
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85 .flags = 0,
86 }
a6c2ba28 87};
88
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89struct tvp5150 {
90 struct i2c_client *client;
84486d53 91
3ad96835 92 v4l2_std_id norm; /* Current set standard */
c7c0b34c 93 struct v4l2_routing route;
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94 int enable;
95 int bright;
96 int contrast;
97 int hue;
98 int sat;
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99};
100
858119e1 101static int tvp5150_read(struct i2c_client *c, unsigned char addr)
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102{
103 unsigned char buffer[1];
104 int rc;
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105
106 buffer[0] = addr;
107 if (1 != (rc = i2c_master_send(c, buffer, 1)))
e1bc80ad 108 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc);
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109
110 msleep(10);
111
112 if (1 != (rc = i2c_master_recv(c, buffer, 1)))
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113 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc);
114
115 tvp5150_dbg(2, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]);
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116
117 return (buffer[0]);
118}
119
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120static inline void tvp5150_write(struct i2c_client *c, unsigned char addr,
121 unsigned char value)
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122{
123 unsigned char buffer[2];
124 int rc;
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125
126 buffer[0] = addr;
84486d53 127 buffer[1] = value;
e1bc80ad 128 tvp5150_dbg(2, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]);
cd4665c5 129 if (2 != (rc = i2c_master_send(c, buffer, 2)))
e1bc80ad 130 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 2)\n", rc);
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131}
132
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133static void dump_reg_range(struct i2c_client *c, char *s, u8 init, const u8 end,int max_line)
134{
135 int i=0;
136
137 while (init!=(u8)(end+1)) {
138 if ((i%max_line) == 0) {
139 if (i>0)
140 printk("\n");
141 printk("tvp5150: %s reg 0x%02x = ",s,init);
142 }
143 printk("%02x ",tvp5150_read(c, init));
144
145 init++;
146 i++;
147 }
148 printk("\n");
149}
150
84486d53 151static void dump_reg(struct i2c_client *c)
cd4665c5 152{
84486d53 153 printk("tvp5150: Video input source selection #1 = 0x%02x\n",
3ad96835 154 tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1));
84486d53 155 printk("tvp5150: Analog channel controls = 0x%02x\n",
3ad96835 156 tvp5150_read(c, TVP5150_ANAL_CHL_CTL));
84486d53 157 printk("tvp5150: Operation mode controls = 0x%02x\n",
3ad96835 158 tvp5150_read(c, TVP5150_OP_MODE_CTL));
84486d53 159 printk("tvp5150: Miscellaneous controls = 0x%02x\n",
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160 tvp5150_read(c, TVP5150_MISC_CTL));
161 printk("tvp5150: Autoswitch mask= 0x%02x\n",
162 tvp5150_read(c, TVP5150_AUTOSW_MSK));
84486d53 163 printk("tvp5150: Color killer threshold control = 0x%02x\n",
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164 tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL));
165 printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
166 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1),
167 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2),
168 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3));
84486d53 169 printk("tvp5150: Brightness control = 0x%02x\n",
3ad96835 170 tvp5150_read(c, TVP5150_BRIGHT_CTL));
84486d53 171 printk("tvp5150: Color saturation control = 0x%02x\n",
3ad96835 172 tvp5150_read(c, TVP5150_SATURATION_CTL));
84486d53 173 printk("tvp5150: Hue control = 0x%02x\n",
3ad96835 174 tvp5150_read(c, TVP5150_HUE_CTL));
84486d53 175 printk("tvp5150: Contrast control = 0x%02x\n",
3ad96835 176 tvp5150_read(c, TVP5150_CONTRAST_CTL));
84486d53 177 printk("tvp5150: Outputs and data rates select = 0x%02x\n",
3ad96835 178 tvp5150_read(c, TVP5150_DATA_RATE_SEL));
84486d53 179 printk("tvp5150: Configuration shared pins = 0x%02x\n",
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180 tvp5150_read(c, TVP5150_CONF_SHARED_PIN));
181 printk("tvp5150: Active video cropping start = 0x%02x%02x\n",
182 tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB),
183 tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB));
184 printk("tvp5150: Active video cropping stop = 0x%02x%02x\n",
185 tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB),
186 tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB));
84486d53 187 printk("tvp5150: Genlock/RTC = 0x%02x\n",
3ad96835 188 tvp5150_read(c, TVP5150_GENLOCK));
84486d53 189 printk("tvp5150: Horizontal sync start = 0x%02x\n",
3ad96835 190 tvp5150_read(c, TVP5150_HORIZ_SYNC_START));
84486d53 191 printk("tvp5150: Vertical blanking start = 0x%02x\n",
3ad96835 192 tvp5150_read(c, TVP5150_VERT_BLANKING_START));
84486d53 193 printk("tvp5150: Vertical blanking stop = 0x%02x\n",
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194 tvp5150_read(c, TVP5150_VERT_BLANKING_STOP));
195 printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
196 tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1),
197 tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2));
84486d53 198 printk("tvp5150: Interrupt reset register B = 0x%02x\n",
3ad96835 199 tvp5150_read(c, TVP5150_INT_RESET_REG_B));
84486d53 200 printk("tvp5150: Interrupt enable register B = 0x%02x\n",
3ad96835 201 tvp5150_read(c, TVP5150_INT_ENABLE_REG_B));
84486d53 202 printk("tvp5150: Interrupt configuration register B = 0x%02x\n",
3ad96835 203 tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B));
84486d53 204 printk("tvp5150: Video standard = 0x%02x\n",
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205 tvp5150_read(c, TVP5150_VIDEO_STD));
206 printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
207 tvp5150_read(c, TVP5150_CB_GAIN_FACT),
208 tvp5150_read(c, TVP5150_CR_GAIN_FACTOR));
84486d53 209 printk("tvp5150: Macrovision on counter = 0x%02x\n",
3ad96835 210 tvp5150_read(c, TVP5150_MACROVISION_ON_CTR));
84486d53 211 printk("tvp5150: Macrovision off counter = 0x%02x\n",
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212 tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR));
213 printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
214 (tvp5150_read(c, TVP5150_REV_SELECT)&1)?3:4);
215 printk("tvp5150: Device ID = %02x%02x\n",
216 tvp5150_read(c, TVP5150_MSB_DEV_ID),
217 tvp5150_read(c, TVP5150_LSB_DEV_ID));
218 printk("tvp5150: ROM version = (hex) %02x.%02x\n",
219 tvp5150_read(c, TVP5150_ROM_MAJOR_VER),
220 tvp5150_read(c, TVP5150_ROM_MINOR_VER));
221 printk("tvp5150: Vertical line count = 0x%02x%02x\n",
222 tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB),
223 tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB));
84486d53 224 printk("tvp5150: Interrupt status register B = 0x%02x\n",
3ad96835 225 tvp5150_read(c, TVP5150_INT_STATUS_REG_B));
84486d53 226 printk("tvp5150: Interrupt active register B = 0x%02x\n",
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227 tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B));
228 printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
229 tvp5150_read(c, TVP5150_STATUS_REG_1),
230 tvp5150_read(c, TVP5150_STATUS_REG_2),
231 tvp5150_read(c, TVP5150_STATUS_REG_3),
232 tvp5150_read(c, TVP5150_STATUS_REG_4),
233 tvp5150_read(c, TVP5150_STATUS_REG_5));
234
235 dump_reg_range(c,"Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
236 TVP5150_TELETEXT_FIL1_END,8);
237 dump_reg_range(c,"Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
238 TVP5150_TELETEXT_FIL2_END,8);
239
84486d53 240 printk("tvp5150: Teletext filter enable = 0x%02x\n",
3ad96835 241 tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA));
84486d53 242 printk("tvp5150: Interrupt status register A = 0x%02x\n",
3ad96835 243 tvp5150_read(c, TVP5150_INT_STATUS_REG_A));
84486d53 244 printk("tvp5150: Interrupt enable register A = 0x%02x\n",
3ad96835 245 tvp5150_read(c, TVP5150_INT_ENABLE_REG_A));
84486d53 246 printk("tvp5150: Interrupt configuration = 0x%02x\n",
3ad96835 247 tvp5150_read(c, TVP5150_INT_CONF));
84486d53 248 printk("tvp5150: VDP status register = 0x%02x\n",
3ad96835 249 tvp5150_read(c, TVP5150_VDP_STATUS_REG));
84486d53 250 printk("tvp5150: FIFO word count = 0x%02x\n",
3ad96835 251 tvp5150_read(c, TVP5150_FIFO_WORD_COUNT));
84486d53 252 printk("tvp5150: FIFO interrupt threshold = 0x%02x\n",
3ad96835 253 tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD));
84486d53 254 printk("tvp5150: FIFO reset = 0x%02x\n",
3ad96835 255 tvp5150_read(c, TVP5150_FIFO_RESET));
84486d53 256 printk("tvp5150: Line number interrupt = 0x%02x\n",
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257 tvp5150_read(c, TVP5150_LINE_NUMBER_INT));
258 printk("tvp5150: Pixel alignment register = 0x%02x%02x\n",
259 tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH),
260 tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW));
84486d53 261 printk("tvp5150: FIFO output control = 0x%02x\n",
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262 tvp5150_read(c, TVP5150_FIFO_OUT_CTRL));
263 printk("tvp5150: Full field enable = 0x%02x\n",
264 tvp5150_read(c, TVP5150_FULL_FIELD_ENA));
84486d53 265 printk("tvp5150: Full field mode register = 0x%02x\n",
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266 tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG));
267
268 dump_reg_range(c,"CC data", TVP5150_CC_DATA_INI,
269 TVP5150_CC_DATA_END,8);
270
271 dump_reg_range(c,"WSS data", TVP5150_WSS_DATA_INI,
272 TVP5150_WSS_DATA_END,8);
273
274 dump_reg_range(c,"VPS data", TVP5150_VPS_DATA_INI,
275 TVP5150_VPS_DATA_END,8);
276
277 dump_reg_range(c,"VITC data", TVP5150_VITC_DATA_INI,
278 TVP5150_VITC_DATA_END,10);
279
280 dump_reg_range(c,"Line mode", TVP5150_LINE_MODE_INI,
281 TVP5150_LINE_MODE_END,8);
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282}
283
284/****************************************************************************
285 Basic functions
286 ****************************************************************************/
cd4665c5 287
c7c0b34c 288static inline void tvp5150_selmux(struct i2c_client *c)
cd4665c5 289{
c0477ad9 290 int opmode=0;
4c86f973 291 struct tvp5150 *decoder = i2c_get_clientdata(c);
c7c0b34c 292 int input = 0;
84486d53 293
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294 if ((decoder->route.output & TVP5150_BLACK_SCREEN) || !decoder->enable)
295 input = 8;
4c86f973 296
c0477ad9 297 switch (input) {
c7c0b34c
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298 case TVP5150_COMPOSITE1:
299 input |= 2;
300 /* fall through */
301 case TVP5150_COMPOSITE0:
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302 opmode=0x30; /* TV Mode */
303 break;
c7c0b34c 304 case TVP5150_SVIDEO:
c0477ad9 305 default:
c7c0b34c 306 input |= 1;
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307 opmode=0; /* Auto Mode */
308 break;
309 }
310
311 tvp5150_write(c, TVP5150_OP_MODE_CTL, opmode);
a6c2ba28 312 tvp5150_write(c, TVP5150_VD_IN_SRC_SEL_1, input);
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313};
314
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315struct i2c_reg_value {
316 unsigned char reg;
317 unsigned char value;
318};
319
320/* Default values as sugested at TVP5150AM1 datasheet */
321static const struct i2c_reg_value tvp5150_init_default[] = {
322 { /* 0x00 */
323 TVP5150_VD_IN_SRC_SEL_1,0x00
324 },
325 { /* 0x01 */
326 TVP5150_ANAL_CHL_CTL,0x15
327 },
328 { /* 0x02 */
329 TVP5150_OP_MODE_CTL,0x00
330 },
331 { /* 0x03 */
332 TVP5150_MISC_CTL,0x01
333 },
334 { /* 0x06 */
335 TVP5150_COLOR_KIL_THSH_CTL,0x10
336 },
337 { /* 0x07 */
338 TVP5150_LUMA_PROC_CTL_1,0x60
339 },
340 { /* 0x08 */
341 TVP5150_LUMA_PROC_CTL_2,0x00
342 },
343 { /* 0x09 */
344 TVP5150_BRIGHT_CTL,0x80
345 },
346 { /* 0x0a */
347 TVP5150_SATURATION_CTL,0x80
348 },
349 { /* 0x0b */
350 TVP5150_HUE_CTL,0x00
351 },
352 { /* 0x0c */
353 TVP5150_CONTRAST_CTL,0x80
354 },
355 { /* 0x0d */
356 TVP5150_DATA_RATE_SEL,0x47
357 },
358 { /* 0x0e */
359 TVP5150_LUMA_PROC_CTL_3,0x00
360 },
361 { /* 0x0f */
362 TVP5150_CONF_SHARED_PIN,0x08
363 },
364 { /* 0x11 */
365 TVP5150_ACT_VD_CROP_ST_MSB,0x00
366 },
367 { /* 0x12 */
368 TVP5150_ACT_VD_CROP_ST_LSB,0x00
369 },
370 { /* 0x13 */
371 TVP5150_ACT_VD_CROP_STP_MSB,0x00
372 },
373 { /* 0x14 */
374 TVP5150_ACT_VD_CROP_STP_LSB,0x00
375 },
376 { /* 0x15 */
377 TVP5150_GENLOCK,0x01
378 },
379 { /* 0x16 */
380 TVP5150_HORIZ_SYNC_START,0x80
381 },
382 { /* 0x18 */
383 TVP5150_VERT_BLANKING_START,0x00
384 },
385 { /* 0x19 */
386 TVP5150_VERT_BLANKING_STOP,0x00
387 },
388 { /* 0x1a */
389 TVP5150_CHROMA_PROC_CTL_1,0x0c
390 },
391 { /* 0x1b */
392 TVP5150_CHROMA_PROC_CTL_2,0x14
393 },
394 { /* 0x1c */
395 TVP5150_INT_RESET_REG_B,0x00
396 },
397 { /* 0x1d */
398 TVP5150_INT_ENABLE_REG_B,0x00
399 },
400 { /* 0x1e */
401 TVP5150_INTT_CONFIG_REG_B,0x00
402 },
403 { /* 0x28 */
404 TVP5150_VIDEO_STD,0x00
405 },
406 { /* 0x2e */
407 TVP5150_MACROVISION_ON_CTR,0x0f
408 },
409 { /* 0x2f */
410 TVP5150_MACROVISION_OFF_CTR,0x01
411 },
412 { /* 0xbb */
413 TVP5150_TELETEXT_FIL_ENA,0x00
414 },
415 { /* 0xc0 */
416 TVP5150_INT_STATUS_REG_A,0x00
417 },
418 { /* 0xc1 */
419 TVP5150_INT_ENABLE_REG_A,0x00
420 },
421 { /* 0xc2 */
422 TVP5150_INT_CONF,0x04
423 },
424 { /* 0xc8 */
425 TVP5150_FIFO_INT_THRESHOLD,0x80
426 },
427 { /* 0xc9 */
428 TVP5150_FIFO_RESET,0x00
429 },
430 { /* 0xca */
431 TVP5150_LINE_NUMBER_INT,0x00
432 },
433 { /* 0xcb */
434 TVP5150_PIX_ALIGN_REG_LOW,0x4e
435 },
436 { /* 0xcc */
437 TVP5150_PIX_ALIGN_REG_HIGH,0x00
438 },
439 { /* 0xcd */
440 TVP5150_FIFO_OUT_CTRL,0x01
441 },
442 { /* 0xcf */
3ad96835 443 TVP5150_FULL_FIELD_ENA,0x00
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444 },
445 { /* 0xd0 */
3ad96835 446 TVP5150_LINE_MODE_INI,0x00
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447 },
448 { /* 0xfc */
449 TVP5150_FULL_FIELD_MODE_REG,0x7f
450 },
451 { /* end of data */
452 0xff,0xff
453 }
454};
455
456/* Default values as sugested at TVP5150AM1 datasheet */
457static const struct i2c_reg_value tvp5150_init_enable[] = {
458 {
459 TVP5150_CONF_SHARED_PIN, 2
460 },{ /* Automatic offset and AGC enabled */
461 TVP5150_ANAL_CHL_CTL, 0x15
462 },{ /* Activate YCrCb output 0x9 or 0xd ? */
463 TVP5150_MISC_CTL, 0x6f
464 },{ /* Activates video std autodetection for all standards */
465 TVP5150_AUTOSW_MSK, 0x0
466 },{ /* Default format: 0x47. For 4:2:2: 0x40 */
467 TVP5150_DATA_RATE_SEL, 0x47
468 },{
469 TVP5150_CHROMA_PROC_CTL_1, 0x0c
470 },{
471 TVP5150_CHROMA_PROC_CTL_2, 0x54
472 },{ /* Non documented, but initialized on WinTV USB2 */
473 0x27, 0x20
474 },{
475 0xff,0xff
476 }
477};
478
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479struct tvp5150_vbi_type {
480 unsigned int vbi_type;
481 unsigned int ini_line;
482 unsigned int end_line;
483 unsigned int by_field :1;
484};
485
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486struct i2c_vbi_ram_value {
487 u16 reg;
6ac48b45
MCC
488 struct tvp5150_vbi_type type;
489 unsigned char values[16];
e1bc80ad
MCC
490};
491
6ac48b45
MCC
492/* This struct have the values for each supported VBI Standard
493 * by
494 tvp5150_vbi_types should follow the same order as vbi_ram_default
3ad96835
MCC
495 * value 0 means rom position 0x10, value 1 means rom position 0x30
496 * and so on. There are 16 possible locations from 0 to 15.
497 */
3ad96835 498
a9cff90e 499static struct i2c_vbi_ram_value vbi_ram_default[] =
cd4665c5 500{
9bc7400a
HV
501 /* FIXME: Current api doesn't handle all VBI types, those not
502 yet supported are placed under #if 0 */
503#if 0
6ac48b45
MCC
504 {0x010, /* Teletext, SECAM, WST System A */
505 {V4L2_SLICED_TELETEXT_SECAM,6,23,1},
506 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
507 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 508 },
9bc7400a 509#endif
6ac48b45 510 {0x030, /* Teletext, PAL, WST System B */
9bc7400a 511 {V4L2_SLICED_TELETEXT_B,6,22,1},
6ac48b45
MCC
512 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
513 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 514 },
9bc7400a 515#if 0
6ac48b45
MCC
516 {0x050, /* Teletext, PAL, WST System C */
517 {V4L2_SLICED_TELETEXT_PAL_C,6,22,1},
518 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
519 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 520 },
6ac48b45
MCC
521 {0x070, /* Teletext, NTSC, WST System B */
522 {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1},
523 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
524 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 525 },
6ac48b45
MCC
526 {0x090, /* Tetetext, NTSC NABTS System C */
527 {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1},
528 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
529 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
e1bc80ad 530 },
6ac48b45
MCC
531 {0x0b0, /* Teletext, NTSC-J, NABTS System D */
532 {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1},
533 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
534 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 535 },
6ac48b45
MCC
536 {0x0d0, /* Closed Caption, PAL/SECAM */
537 {V4L2_SLICED_CAPTION_625,22,22,1},
538 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
539 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 540 },
9bc7400a 541#endif
6ac48b45
MCC
542 {0x0f0, /* Closed Caption, NTSC */
543 {V4L2_SLICED_CAPTION_525,21,21,1},
544 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
545 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 546 },
6ac48b45 547 {0x110, /* Wide Screen Signal, PAL/SECAM */
12db5607 548 {V4L2_SLICED_WSS_625,23,23,1},
6ac48b45
MCC
549 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
550 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
e1bc80ad 551 },
9bc7400a 552#if 0
6ac48b45
MCC
553 {0x130, /* Wide Screen Signal, NTSC C */
554 {V4L2_SLICED_WSS_525,20,20,1},
555 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
556 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
e1bc80ad 557 },
6ac48b45
MCC
558 {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
559 {V4l2_SLICED_VITC_625,6,22,0},
560 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
561 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 562 },
6ac48b45
MCC
563 {0x170, /* Vertical Interval Timecode (VITC), NTSC */
564 {V4l2_SLICED_VITC_525,10,20,0},
565 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
566 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 567 },
9bc7400a 568#endif
6ac48b45
MCC
569 {0x190, /* Video Program System (VPS), PAL */
570 {V4L2_SLICED_VPS,16,16,0},
571 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
572 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
3ad96835 573 },
6ac48b45
MCC
574 /* 0x1d0 User programmable */
575
576 /* End of struct */
577 { (u16)-1 }
e1bc80ad 578};
4c86f973 579
e1bc80ad 580static int tvp5150_write_inittab(struct i2c_client *c,
6ac48b45 581 const struct i2c_reg_value *regs)
e1bc80ad
MCC
582{
583 while (regs->reg != 0xff) {
584 tvp5150_write(c, regs->reg, regs->value);
585 regs++;
586 }
587 return 0;
588}
84486d53 589
e1bc80ad 590static int tvp5150_vdp_init(struct i2c_client *c,
6ac48b45 591 const struct i2c_vbi_ram_value *regs)
e1bc80ad
MCC
592{
593 unsigned int i;
cd4665c5 594
e1bc80ad 595 /* Disable Full Field */
3ad96835 596 tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0);
cd4665c5 597
e1bc80ad 598 /* Before programming, Line mode should be at 0xff */
3ad96835 599 for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++)
e1bc80ad 600 tvp5150_write(c, i, 0xff);
cd4665c5 601
e1bc80ad
MCC
602 /* Load Ram Table */
603 while (regs->reg != (u16)-1 ) {
604 tvp5150_write(c, TVP5150_CONF_RAM_ADDR_HIGH,regs->reg>>8);
605 tvp5150_write(c, TVP5150_CONF_RAM_ADDR_LOW,regs->reg);
cd4665c5 606
e1bc80ad
MCC
607 for (i=0;i<16;i++)
608 tvp5150_write(c, TVP5150_VDP_CONF_RAM_DATA,regs->values[i]);
84486d53 609
e1bc80ad
MCC
610 regs++;
611 }
612 return 0;
613}
cd4665c5 614
6ac48b45
MCC
615/* Fills VBI capabilities based on i2c_vbi_ram_value struct */
616static void tvp5150_vbi_get_cap(const struct i2c_vbi_ram_value *regs,
617 struct v4l2_sliced_vbi_cap *cap)
618{
619 int line;
620
621 memset(cap, 0, sizeof *cap);
622
623 while (regs->reg != (u16)-1 ) {
624 for (line=regs->type.ini_line;line<=regs->type.end_line;line++) {
625 cap->service_lines[0][line] |= regs->type.vbi_type;
626 }
627 cap->service_set |= regs->type.vbi_type;
628
629 regs++;
630 }
631}
632
3ad96835
MCC
633/* Set vbi processing
634 * type - one of tvp5150_vbi_types
635 * line - line to gather data
636 * fields: bit 0 field1, bit 1, field2
637 * flags (default=0xf0) is a bitmask, were set means:
638 * bit 7: enable filtering null bytes on CC
639 * bit 6: send data also to FIFO
640 * bit 5: don't allow data with errors on FIFO
641 * bit 4: enable ECC when possible
642 * pix_align = pix alignment:
643 * LSB = field1
644 * MSB = field2
645 */
2701dacb
MCC
646static int tvp5150_set_vbi(struct i2c_client *c,
647 const struct i2c_vbi_ram_value *regs,
648 unsigned int type,u8 flags, int line,
649 const int fields)
3ad96835
MCC
650{
651 struct tvp5150 *decoder = i2c_get_clientdata(c);
652 v4l2_std_id std=decoder->norm;
653 u8 reg;
2701dacb 654 int pos=0;
3ad96835
MCC
655
656 if (std == V4L2_STD_ALL) {
657 tvp5150_err("VBI can't be configured without knowing number of lines\n");
12db5607 658 return 0;
3ad96835
MCC
659 } else if (std && V4L2_STD_625_50) {
660 /* Don't follow NTSC Line number convension */
661 line += 3;
662 }
663
664 if (line<6||line>27)
2701dacb
MCC
665 return 0;
666
667 while (regs->reg != (u16)-1 ) {
668 if ((type & regs->type.vbi_type) &&
669 (line>=regs->type.ini_line) &&
670 (line<=regs->type.end_line)) {
671 type=regs->type.vbi_type;
672 break;
673 }
674
675 regs++;
676 pos++;
677 }
678 if (regs->reg == (u16)-1)
679 return 0;
3ad96835 680
2701dacb 681 type=pos | (flags & 0xf0);
3ad96835
MCC
682 reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;
683
684 if (fields&1) {
685 tvp5150_write(c, reg, type);
686 }
687
688 if (fields&2) {
689 tvp5150_write(c, reg+1, type);
690 }
691
2701dacb 692 return type;
3ad96835
MCC
693}
694
12db5607
MCC
695static int tvp5150_get_vbi(struct i2c_client *c,
696 const struct i2c_vbi_ram_value *regs, int line)
697{
698 struct tvp5150 *decoder = i2c_get_clientdata(c);
699 v4l2_std_id std=decoder->norm;
700 u8 reg;
701 int pos, type=0;
702
703 if (std == V4L2_STD_ALL) {
704 tvp5150_err("VBI can't be configured without knowing number of lines\n");
705 return 0;
706 } else if (std && V4L2_STD_625_50) {
707 /* Don't follow NTSC Line number convension */
708 line += 3;
709 }
710
711 if (line<6||line>27)
712 return 0;
713
714 reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;
715
716 pos=tvp5150_read(c, reg)&0x0f;
717 if (pos<0x0f)
718 type=regs[pos].type.vbi_type;
719
720 pos=tvp5150_read(c, reg+1)&0x0f;
721 if (pos<0x0f)
722 type|=regs[pos].type.vbi_type;
723
724 return type;
725}
e1bc80ad
MCC
726static int tvp5150_set_std(struct i2c_client *c, v4l2_std_id std)
727{
728 struct tvp5150 *decoder = i2c_get_clientdata(c);
729 int fmt=0;
730
731 decoder->norm=std;
732
733 /* First tests should be against specific std */
734
735 if (std == V4L2_STD_ALL) {
736 fmt=0; /* Autodetect mode */
737 } else if (std & V4L2_STD_NTSC_443) {
738 fmt=0xa;
739 } else if (std & V4L2_STD_PAL_M) {
740 fmt=0x6;
741 } else if (std & (V4L2_STD_PAL_N| V4L2_STD_PAL_Nc)) {
742 fmt=0x8;
743 } else {
744 /* Then, test against generic ones */
745 if (std & V4L2_STD_NTSC) {
746 fmt=0x2;
747 } else if (std & V4L2_STD_PAL) {
748 fmt=0x4;
749 } else if (std & V4L2_STD_SECAM) {
750 fmt=0xc;
751 }
752 }
84486d53 753
e1bc80ad
MCC
754 tvp5150_dbg(1,"Set video std register to %d.\n",fmt);
755 tvp5150_write(c, TVP5150_VIDEO_STD, fmt);
84486d53 756
e1bc80ad
MCC
757 return 0;
758}
759
760static inline void tvp5150_reset(struct i2c_client *c)
761{
e36eaa71 762 u8 msb_id, lsb_id, msb_rom, lsb_rom;
e1bc80ad
MCC
763 struct tvp5150 *decoder = i2c_get_clientdata(c);
764
e1bc80ad
MCC
765 msb_id=tvp5150_read(c,TVP5150_MSB_DEV_ID);
766 lsb_id=tvp5150_read(c,TVP5150_LSB_DEV_ID);
767 msb_rom=tvp5150_read(c,TVP5150_ROM_MAJOR_VER);
768 lsb_rom=tvp5150_read(c,TVP5150_ROM_MINOR_VER);
769
e36eaa71
MCC
770 if ((msb_rom==4)&&(lsb_rom==0)) { /* Is TVP5150AM1 */
771 tvp5150_info("tvp%02x%02xam1 detected.\n",msb_id, lsb_id);
772
773 /* ITU-T BT.656.4 timing */
774 tvp5150_write(c,TVP5150_REV_SELECT,0);
e1bc80ad 775 } else {
e36eaa71
MCC
776 if ((msb_rom==3)||(lsb_rom==0x21)) { /* Is TVP5150A */
777 tvp5150_info("tvp%02x%02xa detected.\n",msb_id, lsb_id);
778 } else {
779 tvp5150_info("*** unknown tvp%02x%02x chip detected.\n",msb_id,lsb_id);
780 tvp5150_info("*** Rom ver is %d.%d\n",msb_rom,lsb_rom);
781 }
e1bc80ad 782 }
84486d53 783
e1bc80ad
MCC
784 /* Initializes TVP5150 to its default values */
785 tvp5150_write_inittab(c, tvp5150_init_default);
786
787 /* Initializes VDP registers */
788 tvp5150_vdp_init(c, vbi_ram_default);
789
790 /* Selects decoder input */
c7c0b34c 791 tvp5150_selmux(c);
e1bc80ad
MCC
792
793 /* Initializes TVP5150 to stream enabled values */
794 tvp5150_write_inittab(c, tvp5150_init_enable);
795
796 /* Initialize image preferences */
4c86f973
MCC
797 tvp5150_write(c, TVP5150_BRIGHT_CTL, decoder->bright >> 8);
798 tvp5150_write(c, TVP5150_CONTRAST_CTL, decoder->contrast >> 8);
799 tvp5150_write(c, TVP5150_SATURATION_CTL, decoder->contrast >> 8);
800 tvp5150_write(c, TVP5150_HUE_CTL, (decoder->hue - 32768) >> 8);
e1bc80ad
MCC
801
802 tvp5150_set_std(c, decoder->norm);
cd4665c5
MCC
803};
804
a6c2ba28 805static int tvp5150_get_ctrl(struct i2c_client *c, struct v4l2_control *ctrl)
806{
807/* struct tvp5150 *decoder = i2c_get_clientdata(c); */
808
809 switch (ctrl->id) {
810 case V4L2_CID_BRIGHTNESS:
811 ctrl->value = tvp5150_read(c, TVP5150_BRIGHT_CTL);
812 return 0;
813 case V4L2_CID_CONTRAST:
814 ctrl->value = tvp5150_read(c, TVP5150_CONTRAST_CTL);
815 return 0;
816 case V4L2_CID_SATURATION:
817 ctrl->value = tvp5150_read(c, TVP5150_SATURATION_CTL);
818 return 0;
819 case V4L2_CID_HUE:
820 ctrl->value = tvp5150_read(c, TVP5150_HUE_CTL);
821 return 0;
a6c2ba28 822 }
c0477ad9 823 return -EINVAL;
a6c2ba28 824}
825
826static int tvp5150_set_ctrl(struct i2c_client *c, struct v4l2_control *ctrl)
827{
828/* struct tvp5150 *decoder = i2c_get_clientdata(c); */
829
830 switch (ctrl->id) {
831 case V4L2_CID_BRIGHTNESS:
832 tvp5150_write(c, TVP5150_BRIGHT_CTL, ctrl->value);
833 return 0;
834 case V4L2_CID_CONTRAST:
835 tvp5150_write(c, TVP5150_CONTRAST_CTL, ctrl->value);
836 return 0;
837 case V4L2_CID_SATURATION:
838 tvp5150_write(c, TVP5150_SATURATION_CTL, ctrl->value);
839 return 0;
840 case V4L2_CID_HUE:
841 tvp5150_write(c, TVP5150_HUE_CTL, ctrl->value);
842 return 0;
a6c2ba28 843 }
c0477ad9 844 return -EINVAL;
a6c2ba28 845}
846
84486d53
MCC
847/****************************************************************************
848 I2C Command
849 ****************************************************************************/
e1bc80ad 850static int tvp5150_command(struct i2c_client *c,
84486d53
MCC
851 unsigned int cmd, void *arg)
852{
e1bc80ad 853 struct tvp5150 *decoder = i2c_get_clientdata(c);
84486d53
MCC
854
855 switch (cmd) {
856
857 case 0:
e1bc80ad 858 case VIDIOC_INT_RESET:
e1bc80ad
MCC
859 tvp5150_reset(c);
860 break;
c7c0b34c
HV
861 case VIDIOC_INT_G_VIDEO_ROUTING:
862 {
863 struct v4l2_routing *route = arg;
864
865 *route = decoder->route;
866 break;
867 }
868 case VIDIOC_INT_S_VIDEO_ROUTING:
869 {
870 struct v4l2_routing *route = arg;
871
872 decoder->route = *route;
873 tvp5150_selmux(c);
874 break;
875 }
e1bc80ad
MCC
876 case VIDIOC_S_STD:
877 if (decoder->norm == *(v4l2_std_id *)arg)
878 break;
879 return tvp5150_set_std(c, *(v4l2_std_id *)arg);
880 case VIDIOC_G_STD:
881 *(v4l2_std_id *)arg = decoder->norm;
84486d53
MCC
882 break;
883
6ac48b45
MCC
884 case VIDIOC_G_SLICED_VBI_CAP:
885 {
886 struct v4l2_sliced_vbi_cap *cap = arg;
887 tvp5150_dbg(1, "VIDIOC_G_SLICED_VBI_CAP\n");
888
889 tvp5150_vbi_get_cap(vbi_ram_default, cap);
890 break;
891 }
2701dacb
MCC
892 case VIDIOC_S_FMT:
893 {
894 struct v4l2_format *fmt;
895 struct v4l2_sliced_vbi_format *svbi;
896 int i;
6ac48b45 897
2701dacb
MCC
898 fmt = arg;
899 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
900 return -EINVAL;
901 svbi = &fmt->fmt.sliced;
902 if (svbi->service_set != 0) {
903 for (i = 0; i <= 23; i++) {
904 svbi->service_lines[1][i] = 0;
905
906 svbi->service_lines[0][i]=tvp5150_set_vbi(c,
907 vbi_ram_default,
908 svbi->service_lines[0][i],0xf0,i,3);
909 }
12db5607
MCC
910 /* Enables FIFO */
911 tvp5150_write(c, TVP5150_FIFO_OUT_CTRL,1);
912 } else {
913 /* Disables FIFO*/
914 tvp5150_write(c, TVP5150_FIFO_OUT_CTRL,0);
915
916 /* Disable Full Field */
917 tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0);
918
919 /* Disable Line modes */
920 for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++)
921 tvp5150_write(c, i, 0xff);
922 }
923 break;
924 }
925 case VIDIOC_G_FMT:
926 {
927 struct v4l2_format *fmt;
928 struct v4l2_sliced_vbi_format *svbi;
929
930 int i, mask=0;
931
932 fmt = arg;
933 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
934 return -EINVAL;
935 svbi = &fmt->fmt.sliced;
936 memset(svbi, 0, sizeof(*svbi));
937
938 for (i = 0; i <= 23; i++) {
939 svbi->service_lines[0][i]=tvp5150_get_vbi(c,
940 vbi_ram_default,i);
941 mask|=svbi->service_lines[0][i];
2701dacb 942 }
12db5607 943 svbi->service_set=mask;
2701dacb
MCC
944 break;
945 }
12db5607 946
21dcd8cc
MCC
947#ifdef CONFIG_VIDEO_ADV_DEBUG
948 case VIDIOC_INT_G_REGISTER:
949 {
950 struct v4l2_register *reg = arg;
951
952 if (reg->i2c_id != I2C_DRIVERID_TVP5150)
953 return -EINVAL;
954 reg->val = tvp5150_read(c, reg->reg & 0xff);
955 break;
956 }
957
958 case VIDIOC_INT_S_REGISTER:
959 {
960 struct v4l2_register *reg = arg;
961
962 if (reg->i2c_id != I2C_DRIVERID_TVP5150)
963 return -EINVAL;
964 if (!capable(CAP_SYS_ADMIN))
965 return -EPERM;
966 tvp5150_write(c, reg->reg & 0xff, reg->val & 0xff);
967 break;
968 }
969#endif
970
12db5607 971 case VIDIOC_LOG_STATUS:
e1bc80ad 972 dump_reg(c);
84486d53
MCC
973 break;
974
ab4cecf9 975 case VIDIOC_G_TUNER:
a6c2ba28 976 {
ab4cecf9
HV
977 struct v4l2_tuner *vt = arg;
978 int status = tvp5150_read(c, 0x88);
84486d53 979
ab4cecf9 980 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
a6c2ba28 981 break;
4c86f973 982 }
a6c2ba28 983 case VIDIOC_QUERYCTRL:
984 {
985 struct v4l2_queryctrl *qc = arg;
c0477ad9 986 int i;
a6c2ba28 987
e1bc80ad 988 tvp5150_dbg(1, "VIDIOC_QUERYCTRL called\n");
a6c2ba28 989
c0477ad9 990 for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++)
a6c2ba28 991 if (qc->id && qc->id == tvp5150_qctrl[i].id) {
992 memcpy(qc, &(tvp5150_qctrl[i]),
993 sizeof(*qc));
994 return 0;
995 }
996
997 return -EINVAL;
4c86f973 998 }
a6c2ba28 999 case VIDIOC_G_CTRL:
1000 {
1001 struct v4l2_control *ctrl = arg;
e1bc80ad 1002 tvp5150_dbg(1, "VIDIOC_G_CTRL called\n");
a6c2ba28 1003
e1bc80ad 1004 return tvp5150_get_ctrl(c, ctrl);
4c86f973 1005 }
a6c2ba28 1006 case VIDIOC_S_CTRL:
1007 {
1008 struct v4l2_control *ctrl = arg;
1009 u8 i, n;
a6c2ba28 1010 n = sizeof(tvp5150_qctrl) / sizeof(tvp5150_qctrl[0]);
1011 for (i = 0; i < n; i++)
1012 if (ctrl->id == tvp5150_qctrl[i].id) {
1013 if (ctrl->value <
1014 tvp5150_qctrl[i].minimum
1015 || ctrl->value >
1016 tvp5150_qctrl[i].maximum)
1017 return -ERANGE;
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1018 tvp5150_dbg(1,
1019 "VIDIOC_S_CTRL: id=%d, value=%d\n",
a6c2ba28 1020 ctrl->id, ctrl->value);
e1bc80ad 1021 return tvp5150_set_ctrl(c, ctrl);
a6c2ba28 1022 }
1023 return -EINVAL;
1024 }
1025
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1026 default:
1027 return -EINVAL;
1028 }
1029
1030 return 0;
1031}
cd4665c5
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1032
1033/****************************************************************************
1034 I2C Client & Driver
1035 ****************************************************************************/
1036static struct i2c_driver driver;
1037
a6c2ba28 1038static struct i2c_client client_template = {
1039 .name = "(unset)",
a6c2ba28 1040 .driver = &driver,
cd4665c5
MCC
1041};
1042
a6c2ba28 1043static int tvp5150_detect_client(struct i2c_adapter *adapter,
1044 int address, int kind)
cd4665c5 1045{
e1bc80ad 1046 struct i2c_client *c;
cd4665c5
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1047 struct tvp5150 *core;
1048 int rv;
1049
e1bc80ad
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1050 if (debug)
1051 printk( KERN_INFO
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1052 "tvp5150.c: detecting tvp5150 client on address 0x%x\n",
1053 address << 1);
1054
1055 client_template.adapter = adapter;
1056 client_template.addr = address;
1057
1058 /* Check if the adapter supports the needed features */
1059 if (!i2c_check_functionality
1060 (adapter,
1061 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1062 return 0;
1063
e1bc80ad
MCC
1064 c = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
1065 if (c == 0)
cd4665c5 1066 return -ENOMEM;
e1bc80ad 1067 memcpy(c, &client_template, sizeof(struct i2c_client));
cd4665c5 1068
7408187d 1069 core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL);
cd4665c5 1070 if (core == 0) {
e1bc80ad 1071 kfree(c);
cd4665c5
MCC
1072 return -ENOMEM;
1073 }
e1bc80ad 1074 i2c_set_clientdata(c, core);
cd4665c5 1075
e1bc80ad 1076 rv = i2c_attach_client(c);
cd4665c5 1077
3ad96835 1078 core->norm = V4L2_STD_ALL; /* Default is autodetect */
c7c0b34c 1079 core->route.input = TVP5150_COMPOSITE1;
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MCC
1080 core->enable = 1;
1081 core->bright = 32768;
1082 core->contrast = 32768;
1083 core->hue = 32768;
1084 core->sat = 32768;
1085
cd4665c5 1086 if (rv) {
e1bc80ad 1087 kfree(c);
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MCC
1088 kfree(core);
1089 return rv;
1090 }
1091
f1e5ee45 1092 if (debug > 1)
e1bc80ad 1093 dump_reg(c);
cd4665c5
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1094 return 0;
1095}
1096
a6c2ba28 1097static int tvp5150_attach_adapter(struct i2c_adapter *adapter)
cd4665c5 1098{
e1bc80ad
MCC
1099 if (debug)
1100 printk( KERN_INFO
cd4665c5
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1101 "tvp5150.c: starting probe for adapter %s (0x%x)\n",
1102 adapter->name, adapter->id);
1103 return i2c_probe(adapter, &addr_data, &tvp5150_detect_client);
1104}
1105
e1bc80ad 1106static int tvp5150_detach_client(struct i2c_client *c)
cd4665c5 1107{
e1bc80ad 1108 struct tvp5150 *decoder = i2c_get_clientdata(c);
cd4665c5
MCC
1109 int err;
1110
e1bc80ad
MCC
1111 tvp5150_dbg(1,
1112 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1113 c->addr << 1);
1114
1115 err = i2c_detach_client(c);
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1116 if (err) {
1117 return err;
1118 }
1119
1120 kfree(decoder);
e1bc80ad 1121 kfree(c);
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1122
1123 return 0;
1124}
1125
1126/* ----------------------------------------------------------------------- */
1127
1128static struct i2c_driver driver = {
604f28e2 1129 .driver = {
604f28e2
LR
1130 .name = "tvp5150",
1131 },
cab462f7 1132 .id = I2C_DRIVERID_TVP5150,
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1133
1134 .attach_adapter = tvp5150_attach_adapter,
1135 .detach_client = tvp5150_detach_client,
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1136
1137 .command = tvp5150_command,
cd4665c5
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1138};
1139
a6c2ba28 1140static int __init tvp5150_init(void)
cd4665c5
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1141{
1142 return i2c_add_driver(&driver);
1143}
1144
a6c2ba28 1145static void __exit tvp5150_exit(void)
cd4665c5
MCC
1146{
1147 i2c_del_driver(&driver);
1148}
1149
1150module_init(tvp5150_init);
1151module_exit(tvp5150_exit);
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