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1da177e4 LT |
1 | /* |
2 | * zr36057.h - zr36057 register offsets | |
3 | * | |
4 | * Copyright (C) 1998 Dave Perks <dperks@ibm.net> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #ifndef _ZR36057_H_ | |
22 | #define _ZR36057_H_ | |
23 | ||
24 | ||
25 | /* Zoran ZR36057 registers */ | |
26 | ||
27 | #define ZR36057_VFEHCR 0x000 /* Video Front End, Horizontal Configuration Register */ | |
28 | #define ZR36057_VFEHCR_HSPol (1<<30) | |
29 | #define ZR36057_VFEHCR_HStart 10 | |
30 | #define ZR36057_VFEHCR_HEnd 0 | |
31 | #define ZR36057_VFEHCR_Hmask 0x3ff | |
32 | ||
33 | #define ZR36057_VFEVCR 0x004 /* Video Front End, Vertical Configuration Register */ | |
34 | #define ZR36057_VFEVCR_VSPol (1<<30) | |
35 | #define ZR36057_VFEVCR_VStart 10 | |
36 | #define ZR36057_VFEVCR_VEnd 0 | |
37 | #define ZR36057_VFEVCR_Vmask 0x3ff | |
38 | ||
39 | #define ZR36057_VFESPFR 0x008 /* Video Front End, Scaler and Pixel Format Register */ | |
40 | #define ZR36057_VFESPFR_ExtFl (1<<26) | |
41 | #define ZR36057_VFESPFR_TopField (1<<25) | |
42 | #define ZR36057_VFESPFR_VCLKPol (1<<24) | |
43 | #define ZR36057_VFESPFR_HFilter 21 | |
44 | #define ZR36057_VFESPFR_HorDcm 14 | |
45 | #define ZR36057_VFESPFR_VerDcm 8 | |
46 | #define ZR36057_VFESPFR_DispMode 6 | |
47 | #define ZR36057_VFESPFR_YUV422 (0<<3) | |
48 | #define ZR36057_VFESPFR_RGB888 (1<<3) | |
49 | #define ZR36057_VFESPFR_RGB565 (2<<3) | |
50 | #define ZR36057_VFESPFR_RGB555 (3<<3) | |
51 | #define ZR36057_VFESPFR_ErrDif (1<<2) | |
52 | #define ZR36057_VFESPFR_Pack24 (1<<1) | |
53 | #define ZR36057_VFESPFR_LittleEndian (1<<0) | |
54 | ||
55 | #define ZR36057_VDTR 0x00c /* Video Display "Top" Register */ | |
56 | ||
57 | #define ZR36057_VDBR 0x010 /* Video Display "Bottom" Register */ | |
58 | ||
59 | #define ZR36057_VSSFGR 0x014 /* Video Stride, Status, and Frame Grab Register */ | |
60 | #define ZR36057_VSSFGR_DispStride 16 | |
61 | #define ZR36057_VSSFGR_VidOvf (1<<8) | |
62 | #define ZR36057_VSSFGR_SnapShot (1<<1) | |
63 | #define ZR36057_VSSFGR_FrameGrab (1<<0) | |
64 | ||
65 | #define ZR36057_VDCR 0x018 /* Video Display Configuration Register */ | |
66 | #define ZR36057_VDCR_VidEn (1<<31) | |
67 | #define ZR36057_VDCR_MinPix 24 | |
68 | #define ZR36057_VDCR_Triton (1<<24) | |
69 | #define ZR36057_VDCR_VidWinHt 12 | |
70 | #define ZR36057_VDCR_VidWinWid 0 | |
71 | ||
72 | #define ZR36057_MMTR 0x01c /* Masking Map "Top" Register */ | |
73 | ||
74 | #define ZR36057_MMBR 0x020 /* Masking Map "Bottom" Register */ | |
75 | ||
76 | #define ZR36057_OCR 0x024 /* Overlay Control Register */ | |
77 | #define ZR36057_OCR_OvlEnable (1 << 15) | |
78 | #define ZR36057_OCR_MaskStride 0 | |
79 | ||
80 | #define ZR36057_SPGPPCR 0x028 /* System, PCI, and General Purpose Pins Control Register */ | |
81 | #define ZR36057_SPGPPCR_SoftReset (1<<24) | |
82 | ||
83 | #define ZR36057_GPPGCR1 0x02c /* General Purpose Pins and GuestBus Control Register (1) */ | |
84 | ||
85 | #define ZR36057_MCSAR 0x030 /* MPEG Code Source Address Register */ | |
86 | ||
87 | #define ZR36057_MCTCR 0x034 /* MPEG Code Transfer Control Register */ | |
88 | #define ZR36057_MCTCR_CodTime (1 << 30) | |
89 | #define ZR36057_MCTCR_CEmpty (1 << 29) | |
90 | #define ZR36057_MCTCR_CFlush (1 << 28) | |
91 | #define ZR36057_MCTCR_CodGuestID 20 | |
92 | #define ZR36057_MCTCR_CodGuestReg 16 | |
93 | ||
94 | #define ZR36057_MCMPR 0x038 /* MPEG Code Memory Pointer Register */ | |
95 | ||
96 | #define ZR36057_ISR 0x03c /* Interrupt Status Register */ | |
97 | #define ZR36057_ISR_GIRQ1 (1<<30) | |
98 | #define ZR36057_ISR_GIRQ0 (1<<29) | |
99 | #define ZR36057_ISR_CodRepIRQ (1<<28) | |
100 | #define ZR36057_ISR_JPEGRepIRQ (1<<27) | |
101 | ||
102 | #define ZR36057_ICR 0x040 /* Interrupt Control Register */ | |
103 | #define ZR36057_ICR_GIRQ1 (1<<30) | |
104 | #define ZR36057_ICR_GIRQ0 (1<<29) | |
105 | #define ZR36057_ICR_CodRepIRQ (1<<28) | |
106 | #define ZR36057_ICR_JPEGRepIRQ (1<<27) | |
107 | #define ZR36057_ICR_IntPinEn (1<<24) | |
108 | ||
109 | #define ZR36057_I2CBR 0x044 /* I2C Bus Register */ | |
110 | #define ZR36057_I2CBR_SDA (1<<1) | |
111 | #define ZR36057_I2CBR_SCL (1<<0) | |
112 | ||
113 | #define ZR36057_JMC 0x100 /* JPEG Mode and Control */ | |
114 | #define ZR36057_JMC_JPG (1 << 31) | |
115 | #define ZR36057_JMC_JPGExpMode (0 << 29) | |
116 | #define ZR36057_JMC_JPGCmpMode (1 << 29) | |
117 | #define ZR36057_JMC_MJPGExpMode (2 << 29) | |
118 | #define ZR36057_JMC_MJPGCmpMode (3 << 29) | |
119 | #define ZR36057_JMC_RTBUSY_FB (1 << 6) | |
120 | #define ZR36057_JMC_Go_en (1 << 5) | |
121 | #define ZR36057_JMC_SyncMstr (1 << 4) | |
122 | #define ZR36057_JMC_Fld_per_buff (1 << 3) | |
123 | #define ZR36057_JMC_VFIFO_FB (1 << 2) | |
124 | #define ZR36057_JMC_CFIFO_FB (1 << 1) | |
125 | #define ZR36057_JMC_Stll_LitEndian (1 << 0) | |
126 | ||
127 | #define ZR36057_JPC 0x104 /* JPEG Process Control */ | |
128 | #define ZR36057_JPC_P_Reset (1 << 7) | |
129 | #define ZR36057_JPC_CodTrnsEn (1 << 5) | |
130 | #define ZR36057_JPC_Active (1 << 0) | |
131 | ||
132 | #define ZR36057_VSP 0x108 /* Vertical Sync Parameters */ | |
133 | #define ZR36057_VSP_VsyncSize 16 | |
134 | #define ZR36057_VSP_FrmTot 0 | |
135 | ||
136 | #define ZR36057_HSP 0x10c /* Horizontal Sync Parameters */ | |
137 | #define ZR36057_HSP_HsyncStart 16 | |
138 | #define ZR36057_HSP_LineTot 0 | |
139 | ||
140 | #define ZR36057_FHAP 0x110 /* Field Horizontal Active Portion */ | |
141 | #define ZR36057_FHAP_NAX 16 | |
142 | #define ZR36057_FHAP_PAX 0 | |
143 | ||
144 | #define ZR36057_FVAP 0x114 /* Field Vertical Active Portion */ | |
145 | #define ZR36057_FVAP_NAY 16 | |
146 | #define ZR36057_FVAP_PAY 0 | |
147 | ||
148 | #define ZR36057_FPP 0x118 /* Field Process Parameters */ | |
149 | #define ZR36057_FPP_Odd_Even (1 << 0) | |
150 | ||
151 | #define ZR36057_JCBA 0x11c /* JPEG Code Base Address */ | |
152 | ||
153 | #define ZR36057_JCFT 0x120 /* JPEG Code FIFO Threshold */ | |
154 | ||
155 | #define ZR36057_JCGI 0x124 /* JPEG Codec Guest ID */ | |
156 | #define ZR36057_JCGI_JPEGuestID 4 | |
157 | #define ZR36057_JCGI_JPEGuestReg 0 | |
158 | ||
159 | #define ZR36057_GCR2 0x12c /* GuestBus Control Register (2) */ | |
160 | ||
161 | #define ZR36057_POR 0x200 /* Post Office Register */ | |
162 | #define ZR36057_POR_POPen (1<<25) | |
163 | #define ZR36057_POR_POTime (1<<24) | |
164 | #define ZR36057_POR_PODir (1<<23) | |
165 | ||
166 | #define ZR36057_STR 0x300 /* "Still" Transfer Register */ | |
167 | ||
168 | #endif |