[deliverable/linux.git] / drivers / memory / Kconfig

#
# Memory devices
#

menuconfig MEMORY
	bool "Memory Controller drivers"

if MEMORY

config ARM_PL172_MPMC
	tristate "ARM PL172 MPMC driver"
	depends on ARM_AMBA && OF
	help
	  This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
	  If you have an embedded system with an AMBA bus and a PL172
	  controller, say Y or M here.

config ATMEL_SDRAMC
	bool "Atmel (Multi-port DDR-)SDRAM Controller"
	default y
	depends on ARCH_AT91 && OF
	help
	  This driver is for Atmel SDRAM Controller or Atmel Multi-port
	  DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
	  Starting with the at91sam9g45, this controller supports SDR, DDR and
	  LP-DDR memories.

config ATMEL_EBI
	bool "Atmel EBI driver"
	default y
	depends on ARCH_AT91 && OF
	select MFD_SYSCON
	help
	  Driver for Atmel EBI controller.
	  Used to configure the EBI (external bus interface) when the device-
	  tree is used. This bus supports NANDs, external ethernet controller,
	  SRAMs, ATA devices, etc.

config TI_AEMIF
	tristate "Texas Instruments AEMIF driver"
	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
	help
	  This driver is for the AEMIF module available in Texas Instruments
	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
	  is intended to provide a glue-less interface to a variety of
	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	  of 256M bytes of any of these memories can be accessed at a given
	  time via four chip selects with 64M byte access per chip select.

config TI_EMIF
	tristate "Texas Instruments EMIF driver"
	depends on ARCH_OMAP2PLUS
	select DDR
	help
	  This driver is for the EMIF module available in Texas Instruments
	  SoCs. EMIF is an SDRAM controller that, based on its revision,
	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	  This driver takes care of only LPDDR2 memories presently. The
	  functions of the driver includes re-configuring AC timing
	  parameters and other settings during frequency, voltage and
	  temperature changes

config OMAP_GPMC
	bool
	select GPIOLIB
	help
	  This driver is for the General Purpose Memory Controller (GPMC)
	  present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
	  interfacing to a variety of asynchronous as well as synchronous
	  memory drives like NOR, NAND, OneNAND, SRAM.

config OMAP_GPMC_DEBUG
	bool "Enable GPMC debug output and skip reset of GPMC during init"
	depends on OMAP_GPMC
	help
	  Enables verbose debugging mostly to decode the bootloader provided
	  timings. To preserve the bootloader provided timings, the reset
	  of GPMC is skipped during init. Enable this during development to
	  configure devices connected to the GPMC bus.

	  NOTE: In addition to matching the register setup with the bootloader
	  you also need to match the GPMC FCLK frequency used by the
	  bootloader or else the GPMC timings won't be identical with the
	  bootloader timings.

config MVEBU_DEVBUS
	bool "Marvell EBU Device Bus Controller"
	default y
	depends on PLAT_ORION && OF
	help
	  This driver is for the Device Bus controller available in some
	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	  Armada 370 and Armada XP. This controller allows to handle flash
	  devices such as NOR, NAND, SRAM, and FPGA.

config TEGRA20_MC
	bool "Tegra20 Memory Controller(MC) driver"
	default y
	depends on ARCH_TEGRA_2x_SOC
	help
	  This driver is for the Memory Controller(MC) module available
	  in Tegra20 SoCs, mainly for a address translation fault
	  analysis, especially for IOMMU/GART(Graphics Address
	  Relocation Table) module.

config FSL_CORENET_CF
	tristate "Freescale CoreNet Error Reporting"
	depends on FSL_SOC_BOOKE
	help
	  Say Y for reporting of errors from the Freescale CoreNet
	  Coherency Fabric.  Errors reported include accesses to
	  physical addresses that mapped by no local access window
	  (LAW) or an invalid LAW, as well as bad cache state that
	  represents a coherency violation.

config FSL_IFC
	bool
	depends on FSL_SOC || ARCH_LAYERSCAPE

config JZ4780_NEMC
	bool "Ingenic JZ4780 SoC NEMC driver"
	default y
	depends on MACH_JZ4780
	help
	  This driver is for the NAND/External Memory Controller (NEMC) in
	  the Ingenic JZ4780. This controller is used to handle external
	  memory devices such as NAND and SRAM.

config MTK_SMI
	bool
	depends on ARCH_MEDIATEK || COMPILE_TEST
	help
	  This driver is for the Memory Controller module in MediaTek SoCs,
	  mainly help enable/disable iommu and control the power domain and
	  clocks for each local arbiter.

source "drivers/memory/samsung/Kconfig"
source "drivers/memory/tegra/Kconfig"

endif
Commit	Line	Data
7ec94453 A	1	#
	2	# Memory devices
	3	#
	4
	5	menuconfig MEMORY
	6	bool "Memory Controller drivers"
	7
	8	if MEMORY
	9
17c50b70 JE	10	config ARM_PL172_MPMC
	11	tristate "ARM PL172 MPMC driver"
	12	depends on ARM_AMBA && OF
	13	help
	14	This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
	15	If you have an embedded system with an AMBA bus and a PL172
	16	controller, say Y or M here.
	17
e81b6abe AB	18	config ATMEL_SDRAMC
	19	bool "Atmel (Multi-port DDR-)SDRAM Controller"
	20	default y
	21	depends on ARCH_AT91 && OF
	22	help
	23	This driver is for Atmel SDRAM Controller or Atmel Multi-port
	24	DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
	25	Starting with the at91sam9g45, this controller supports SDR, DDR and
	26	LP-DDR memories.
	27
6a4ec4cd BB	28	config ATMEL_EBI
	29	bool "Atmel EBI driver"
	30	default y
	31	depends on ARCH_AT91 && OF
	32	select MFD_SYSCON
	33	help
	34	Driver for Atmel EBI controller.
	35	Used to configure the EBI (external bus interface) when the device-
	36	tree is used. This bus supports NANDs, external ethernet controller,
	37	SRAMs, ATA devices, etc.
	38
5a7c8154 IK	39	config TI_AEMIF
	40	tristate "Texas Instruments AEMIF driver"
	41	depends on (ARCH_DAVINCI \|\| ARCH_KEYSTONE) && OF
	42	help
	43	This driver is for the AEMIF module available in Texas Instruments
	44	SoCs. AEMIF stands for Asynchronous External Memory Interface and
	45	is intended to provide a glue-less interface to a variety of
	46	asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	47	of 256M bytes of any of these memories can be accessed at a given
	48	time via four chip selects with 64M byte access per chip select.
	49
7ec94453 A	50	config TI_EMIF
7ec94453 A	51	tristate "Texas Instruments EMIF driver"
18e9a971	52	depends on ARCH_OMAP2PLUS
7ec94453 A	53	select DDR
	54	help
	55	This driver is for the EMIF module available in Texas Instruments
	56	SoCs. EMIF is an SDRAM controller that, based on its revision,
	57	supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	58	This driver takes care of only LPDDR2 memories presently. The
	59	functions of the driver includes re-configuring AC timing
	60	parameters and other settings during frequency, voltage and
	61	temperature changes
	62
18640193 TL	63	config OMAP_GPMC
18640193 TL	64	bool
d2d00862	65	select GPIOLIB
18640193 TL	66	help
	67	This driver is for the General Purpose Memory Controller (GPMC)
	68	present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
	69	interfacing to a variety of asynchronous as well as synchronous
	70	memory drives like NOR, NAND, OneNAND, SRAM.
	71
63aa945b	72	config OMAP_GPMC_DEBUG
be59b619	73	bool "Enable GPMC debug output and skip reset of GPMC during init"
63aa945b TL	74	depends on OMAP_GPMC
	75	help
	76	Enables verbose debugging mostly to decode the bootloader provided
be59b619 TL	77	timings. To preserve the bootloader provided timings, the reset
	78	of GPMC is skipped during init. Enable this during development to
	79	configure devices connected to the GPMC bus.
	80
	81	NOTE: In addition to matching the register setup with the bootloader
	82	you also need to match the GPMC FCLK frequency used by the
	83	bootloader or else the GPMC timings won't be identical with the
	84	bootloader timings.
63aa945b	85
3edad321 EG	86	config MVEBU_DEVBUS
	87	bool "Marvell EBU Device Bus Controller"
	88	default y
	89	depends on PLAT_ORION && OF
	90	help
	91	This driver is for the Device Bus controller available in some
	92	Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	93	Armada 370 and Armada XP. This controller allows to handle flash
	94	devices such as NOR, NAND, SRAM, and FPGA.
	95
c542fb79	96	config TEGRA20_MC
f0e33f98 HD	97	bool "Tegra20 Memory Controller(MC) driver"
f0e33f98 HD	98	default y
c542fb79	99	depends on ARCH_TEGRA_2x_SOC
f0e33f98 HD	100	help
	101	This driver is for the Memory Controller(MC) module available
	102	in Tegra20 SoCs, mainly for a address translation fault
	103	analysis, especially for IOMMU/GART(Graphics Address
	104	Relocation Table) module.
c542fb79	105
54afbec0 SW	106	config FSL_CORENET_CF
	107	tristate "Freescale CoreNet Error Reporting"
	108	depends on FSL_SOC_BOOKE
	109	help
	110	Say Y for reporting of errors from the Freescale CoreNet
	111	Coherency Fabric. Errors reported include accesses to
	112	physical addresses that mapped by no local access window
	113	(LAW) or an invalid LAW, as well as bad cache state that
	114	represents a coherency violation.
	115
42d87b18 PG	116	config FSL_IFC
42d87b18 PG	117	bool
8ea126bc	118	depends on FSL_SOC \|\| ARCH_LAYERSCAPE
42d87b18	119
911a8882 AS	120	config JZ4780_NEMC
	121	bool "Ingenic JZ4780 SoC NEMC driver"
	122	default y
	123	depends on MACH_JZ4780
	124	help
	125	This driver is for the NAND/External Memory Controller (NEMC) in
	126	the Ingenic JZ4780. This controller is used to handle external
	127	memory devices such as NAND and SRAM.
	128
cc8bbe1a YW	129	config MTK_SMI
	130	bool
	131	depends on ARCH_MEDIATEK \|\| COMPILE_TEST
	132	help
	133	This driver is for the Memory Controller module in MediaTek SoCs,
	134	mainly help enable/disable iommu and control the power domain and
	135	clocks for each local arbiter.
	136
a8aabb91	137	source "drivers/memory/samsung/Kconfig"
89184651 TR	138	source "drivers/memory/tegra/Kconfig"
89184651 TR	139
7ec94453	140	endif