Commit | Line | Data |
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62579266 RV |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License v2 | |
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | |
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> | |
adceed62 | 7 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
62579266 RV |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/mfd/core.h> | |
47c16975 | 19 | #include <linux/mfd/abx500.h> |
ee66e653 | 20 | #include <linux/mfd/abx500/ab8500.h> |
549931f9 | 21 | #include <linux/regulator/ab8500.h> |
62579266 RV |
22 | |
23 | /* | |
24 | * Interrupt register offsets | |
25 | * Bank : 0x0E | |
26 | */ | |
47c16975 MW |
27 | #define AB8500_IT_SOURCE1_REG 0x00 |
28 | #define AB8500_IT_SOURCE2_REG 0x01 | |
29 | #define AB8500_IT_SOURCE3_REG 0x02 | |
30 | #define AB8500_IT_SOURCE4_REG 0x03 | |
31 | #define AB8500_IT_SOURCE5_REG 0x04 | |
32 | #define AB8500_IT_SOURCE6_REG 0x05 | |
33 | #define AB8500_IT_SOURCE7_REG 0x06 | |
34 | #define AB8500_IT_SOURCE8_REG 0x07 | |
35 | #define AB8500_IT_SOURCE19_REG 0x12 | |
36 | #define AB8500_IT_SOURCE20_REG 0x13 | |
37 | #define AB8500_IT_SOURCE21_REG 0x14 | |
38 | #define AB8500_IT_SOURCE22_REG 0x15 | |
39 | #define AB8500_IT_SOURCE23_REG 0x16 | |
40 | #define AB8500_IT_SOURCE24_REG 0x17 | |
62579266 RV |
41 | |
42 | /* | |
43 | * latch registers | |
44 | */ | |
47c16975 MW |
45 | #define AB8500_IT_LATCH1_REG 0x20 |
46 | #define AB8500_IT_LATCH2_REG 0x21 | |
47 | #define AB8500_IT_LATCH3_REG 0x22 | |
48 | #define AB8500_IT_LATCH4_REG 0x23 | |
49 | #define AB8500_IT_LATCH5_REG 0x24 | |
50 | #define AB8500_IT_LATCH6_REG 0x25 | |
51 | #define AB8500_IT_LATCH7_REG 0x26 | |
52 | #define AB8500_IT_LATCH8_REG 0x27 | |
53 | #define AB8500_IT_LATCH9_REG 0x28 | |
54 | #define AB8500_IT_LATCH10_REG 0x29 | |
92d50a41 | 55 | #define AB8500_IT_LATCH12_REG 0x2B |
47c16975 MW |
56 | #define AB8500_IT_LATCH19_REG 0x32 |
57 | #define AB8500_IT_LATCH20_REG 0x33 | |
58 | #define AB8500_IT_LATCH21_REG 0x34 | |
59 | #define AB8500_IT_LATCH22_REG 0x35 | |
60 | #define AB8500_IT_LATCH23_REG 0x36 | |
61 | #define AB8500_IT_LATCH24_REG 0x37 | |
62579266 RV |
62 | |
63 | /* | |
64 | * mask registers | |
65 | */ | |
66 | ||
47c16975 MW |
67 | #define AB8500_IT_MASK1_REG 0x40 |
68 | #define AB8500_IT_MASK2_REG 0x41 | |
69 | #define AB8500_IT_MASK3_REG 0x42 | |
70 | #define AB8500_IT_MASK4_REG 0x43 | |
71 | #define AB8500_IT_MASK5_REG 0x44 | |
72 | #define AB8500_IT_MASK6_REG 0x45 | |
73 | #define AB8500_IT_MASK7_REG 0x46 | |
74 | #define AB8500_IT_MASK8_REG 0x47 | |
75 | #define AB8500_IT_MASK9_REG 0x48 | |
76 | #define AB8500_IT_MASK10_REG 0x49 | |
77 | #define AB8500_IT_MASK11_REG 0x4A | |
78 | #define AB8500_IT_MASK12_REG 0x4B | |
79 | #define AB8500_IT_MASK13_REG 0x4C | |
80 | #define AB8500_IT_MASK14_REG 0x4D | |
81 | #define AB8500_IT_MASK15_REG 0x4E | |
82 | #define AB8500_IT_MASK16_REG 0x4F | |
83 | #define AB8500_IT_MASK17_REG 0x50 | |
84 | #define AB8500_IT_MASK18_REG 0x51 | |
85 | #define AB8500_IT_MASK19_REG 0x52 | |
86 | #define AB8500_IT_MASK20_REG 0x53 | |
87 | #define AB8500_IT_MASK21_REG 0x54 | |
88 | #define AB8500_IT_MASK22_REG 0x55 | |
89 | #define AB8500_IT_MASK23_REG 0x56 | |
90 | #define AB8500_IT_MASK24_REG 0x57 | |
91 | ||
92 | #define AB8500_REV_REG 0x80 | |
e5c238c3 | 93 | #define AB8500_SWITCH_OFF_STATUS 0x00 |
62579266 | 94 | |
b4a31037 AL |
95 | #define AB8500_TURN_ON_STATUS 0x00 |
96 | ||
62579266 RV |
97 | /* |
98 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt | |
99 | * numbers are indexed into this array with (num / 8). | |
100 | * | |
101 | * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at | |
102 | * offset 0. | |
103 | */ | |
104 | static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { | |
92d50a41 | 105 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, |
62579266 RV |
106 | }; |
107 | ||
47c16975 MW |
108 | static int ab8500_get_chip_id(struct device *dev) |
109 | { | |
6bce7bf1 MW |
110 | struct ab8500 *ab8500; |
111 | ||
112 | if (!dev) | |
113 | return -EINVAL; | |
114 | ab8500 = dev_get_drvdata(dev->parent); | |
115 | return ab8500 ? (int)ab8500->chip_id : -EINVAL; | |
47c16975 MW |
116 | } |
117 | ||
118 | static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
119 | u8 reg, u8 data) | |
62579266 RV |
120 | { |
121 | int ret; | |
47c16975 MW |
122 | /* |
123 | * Put the u8 bank and u8 register together into a an u16. | |
124 | * The bank on higher 8 bits and register in lower 8 bits. | |
125 | * */ | |
126 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 RV |
127 | |
128 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); | |
129 | ||
47c16975 MW |
130 | ret = mutex_lock_interruptible(&ab8500->lock); |
131 | if (ret) | |
132 | return ret; | |
133 | ||
62579266 RV |
134 | ret = ab8500->write(ab8500, addr, data); |
135 | if (ret < 0) | |
136 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
137 | addr, ret); | |
47c16975 | 138 | mutex_unlock(&ab8500->lock); |
62579266 RV |
139 | |
140 | return ret; | |
141 | } | |
142 | ||
47c16975 MW |
143 | static int ab8500_set_register(struct device *dev, u8 bank, |
144 | u8 reg, u8 value) | |
62579266 | 145 | { |
47c16975 | 146 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 147 | |
47c16975 | 148 | return set_register_interruptible(ab8500, bank, reg, value); |
62579266 | 149 | } |
62579266 | 150 | |
47c16975 MW |
151 | static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, |
152 | u8 reg, u8 *value) | |
62579266 RV |
153 | { |
154 | int ret; | |
47c16975 MW |
155 | /* put the u8 bank and u8 reg together into a an u16. |
156 | * bank on higher 8 bits and reg in lower */ | |
157 | u16 addr = ((u16)bank) << 8 | reg; | |
158 | ||
159 | ret = mutex_lock_interruptible(&ab8500->lock); | |
160 | if (ret) | |
161 | return ret; | |
62579266 RV |
162 | |
163 | ret = ab8500->read(ab8500, addr); | |
164 | if (ret < 0) | |
165 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
166 | addr, ret); | |
47c16975 MW |
167 | else |
168 | *value = ret; | |
62579266 | 169 | |
47c16975 | 170 | mutex_unlock(&ab8500->lock); |
62579266 RV |
171 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); |
172 | ||
173 | return ret; | |
174 | } | |
175 | ||
47c16975 MW |
176 | static int ab8500_get_register(struct device *dev, u8 bank, |
177 | u8 reg, u8 *value) | |
62579266 | 178 | { |
47c16975 | 179 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 180 | |
47c16975 | 181 | return get_register_interruptible(ab8500, bank, reg, value); |
62579266 | 182 | } |
47c16975 MW |
183 | |
184 | static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
185 | u8 reg, u8 bitmask, u8 bitvalues) | |
62579266 RV |
186 | { |
187 | int ret; | |
47c16975 MW |
188 | u8 data; |
189 | /* put the u8 bank and u8 reg together into a an u16. | |
190 | * bank on higher 8 bits and reg in lower */ | |
191 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 | 192 | |
47c16975 MW |
193 | ret = mutex_lock_interruptible(&ab8500->lock); |
194 | if (ret) | |
195 | return ret; | |
62579266 | 196 | |
47c16975 MW |
197 | ret = ab8500->read(ab8500, addr); |
198 | if (ret < 0) { | |
199 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
200 | addr, ret); | |
62579266 | 201 | goto out; |
47c16975 | 202 | } |
62579266 | 203 | |
47c16975 MW |
204 | data = (u8)ret; |
205 | data = (~bitmask & data) | (bitmask & bitvalues); | |
62579266 | 206 | |
47c16975 MW |
207 | ret = ab8500->write(ab8500, addr, data); |
208 | if (ret < 0) | |
209 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
210 | addr, ret); | |
62579266 | 211 | |
47c16975 | 212 | dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); |
62579266 RV |
213 | out: |
214 | mutex_unlock(&ab8500->lock); | |
215 | return ret; | |
216 | } | |
47c16975 MW |
217 | |
218 | static int ab8500_mask_and_set_register(struct device *dev, | |
219 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) | |
220 | { | |
221 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | |
222 | ||
223 | return mask_and_set_register_interruptible(ab8500, bank, reg, | |
224 | bitmask, bitvalues); | |
225 | ||
226 | } | |
227 | ||
228 | static struct abx500_ops ab8500_ops = { | |
229 | .get_chip_id = ab8500_get_chip_id, | |
230 | .get_register = ab8500_get_register, | |
231 | .set_register = ab8500_set_register, | |
232 | .get_register_page = NULL, | |
233 | .set_register_page = NULL, | |
234 | .mask_and_set_register = ab8500_mask_and_set_register, | |
235 | .event_registers_startup_state_get = NULL, | |
236 | .startup_irq_enabled = NULL, | |
237 | }; | |
62579266 | 238 | |
9505a0a0 | 239 | static void ab8500_irq_lock(struct irq_data *data) |
62579266 | 240 | { |
9505a0a0 | 241 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
242 | |
243 | mutex_lock(&ab8500->irq_lock); | |
244 | } | |
245 | ||
9505a0a0 | 246 | static void ab8500_irq_sync_unlock(struct irq_data *data) |
62579266 | 247 | { |
9505a0a0 | 248 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
249 | int i; |
250 | ||
251 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { | |
252 | u8 old = ab8500->oldmask[i]; | |
253 | u8 new = ab8500->mask[i]; | |
254 | int reg; | |
255 | ||
256 | if (new == old) | |
257 | continue; | |
258 | ||
863dde5b LW |
259 | /* Interrupt register 12 doesn't exist prior to version 2.0 */ |
260 | if (ab8500_irq_regoffset[i] == 11 && | |
261 | ab8500->chip_id < AB8500_CUT2P0) | |
92d50a41 MW |
262 | continue; |
263 | ||
62579266 RV |
264 | ab8500->oldmask[i] = new; |
265 | ||
266 | reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; | |
47c16975 | 267 | set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); |
62579266 RV |
268 | } |
269 | ||
270 | mutex_unlock(&ab8500->irq_lock); | |
271 | } | |
272 | ||
9505a0a0 | 273 | static void ab8500_irq_mask(struct irq_data *data) |
62579266 | 274 | { |
9505a0a0 MB |
275 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
276 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
277 | int index = offset / 8; |
278 | int mask = 1 << (offset % 8); | |
279 | ||
280 | ab8500->mask[index] |= mask; | |
281 | } | |
282 | ||
9505a0a0 | 283 | static void ab8500_irq_unmask(struct irq_data *data) |
62579266 | 284 | { |
9505a0a0 MB |
285 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
286 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
287 | int index = offset / 8; |
288 | int mask = 1 << (offset % 8); | |
289 | ||
290 | ab8500->mask[index] &= ~mask; | |
291 | } | |
292 | ||
293 | static struct irq_chip ab8500_irq_chip = { | |
294 | .name = "ab8500", | |
9505a0a0 MB |
295 | .irq_bus_lock = ab8500_irq_lock, |
296 | .irq_bus_sync_unlock = ab8500_irq_sync_unlock, | |
297 | .irq_mask = ab8500_irq_mask, | |
e6f9306e | 298 | .irq_disable = ab8500_irq_mask, |
9505a0a0 | 299 | .irq_unmask = ab8500_irq_unmask, |
62579266 RV |
300 | }; |
301 | ||
302 | static irqreturn_t ab8500_irq(int irq, void *dev) | |
303 | { | |
304 | struct ab8500 *ab8500 = dev; | |
305 | int i; | |
306 | ||
307 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
308 | ||
309 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { | |
310 | int regoffset = ab8500_irq_regoffset[i]; | |
311 | int status; | |
47c16975 | 312 | u8 value; |
62579266 | 313 | |
863dde5b LW |
314 | /* Interrupt register 12 doesn't exist prior to version 2.0 */ |
315 | if (regoffset == 11 && ab8500->chip_id < AB8500_CUT2P0) | |
92d50a41 MW |
316 | continue; |
317 | ||
47c16975 MW |
318 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, |
319 | AB8500_IT_LATCH1_REG + regoffset, &value); | |
320 | if (status < 0 || value == 0) | |
62579266 RV |
321 | continue; |
322 | ||
323 | do { | |
88aec4f7 | 324 | int bit = __ffs(value); |
62579266 RV |
325 | int line = i * 8 + bit; |
326 | ||
327 | handle_nested_irq(ab8500->irq_base + line); | |
47c16975 MW |
328 | value &= ~(1 << bit); |
329 | } while (value); | |
62579266 RV |
330 | } |
331 | ||
332 | return IRQ_HANDLED; | |
333 | } | |
334 | ||
335 | static int ab8500_irq_init(struct ab8500 *ab8500) | |
336 | { | |
337 | int base = ab8500->irq_base; | |
338 | int irq; | |
339 | ||
340 | for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { | |
d5bb1221 TG |
341 | irq_set_chip_data(irq, ab8500); |
342 | irq_set_chip_and_handler(irq, &ab8500_irq_chip, | |
62579266 | 343 | handle_simple_irq); |
d5bb1221 | 344 | irq_set_nested_thread(irq, 1); |
62579266 RV |
345 | #ifdef CONFIG_ARM |
346 | set_irq_flags(irq, IRQF_VALID); | |
347 | #else | |
d5bb1221 | 348 | irq_set_noprobe(irq); |
62579266 RV |
349 | #endif |
350 | } | |
351 | ||
352 | return 0; | |
353 | } | |
354 | ||
355 | static void ab8500_irq_remove(struct ab8500 *ab8500) | |
356 | { | |
357 | int base = ab8500->irq_base; | |
358 | int irq; | |
359 | ||
360 | for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { | |
361 | #ifdef CONFIG_ARM | |
362 | set_irq_flags(irq, 0); | |
363 | #endif | |
d5bb1221 TG |
364 | irq_set_chip_and_handler(irq, NULL, NULL); |
365 | irq_set_chip_data(irq, NULL); | |
62579266 RV |
366 | } |
367 | } | |
368 | ||
5cef8df5 | 369 | static struct resource __devinitdata ab8500_gpio_resources[] = { |
0cb3fcd7 BB |
370 | { |
371 | .name = "GPIO_INT6", | |
372 | .start = AB8500_INT_GPIO6R, | |
373 | .end = AB8500_INT_GPIO41F, | |
374 | .flags = IORESOURCE_IRQ, | |
375 | } | |
376 | }; | |
377 | ||
5cef8df5 | 378 | static struct resource __devinitdata ab8500_gpadc_resources[] = { |
62579266 RV |
379 | { |
380 | .name = "HW_CONV_END", | |
381 | .start = AB8500_INT_GP_HW_ADC_CONV_END, | |
382 | .end = AB8500_INT_GP_HW_ADC_CONV_END, | |
383 | .flags = IORESOURCE_IRQ, | |
384 | }, | |
385 | { | |
386 | .name = "SW_CONV_END", | |
387 | .start = AB8500_INT_GP_SW_ADC_CONV_END, | |
388 | .end = AB8500_INT_GP_SW_ADC_CONV_END, | |
389 | .flags = IORESOURCE_IRQ, | |
390 | }, | |
391 | }; | |
392 | ||
5cef8df5 | 393 | static struct resource __devinitdata ab8500_rtc_resources[] = { |
62579266 RV |
394 | { |
395 | .name = "60S", | |
396 | .start = AB8500_INT_RTC_60S, | |
397 | .end = AB8500_INT_RTC_60S, | |
398 | .flags = IORESOURCE_IRQ, | |
399 | }, | |
400 | { | |
401 | .name = "ALARM", | |
402 | .start = AB8500_INT_RTC_ALARM, | |
403 | .end = AB8500_INT_RTC_ALARM, | |
404 | .flags = IORESOURCE_IRQ, | |
405 | }, | |
406 | }; | |
407 | ||
5cef8df5 | 408 | static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { |
77686517 SI |
409 | { |
410 | .name = "ONKEY_DBF", | |
411 | .start = AB8500_INT_PON_KEY1DB_F, | |
412 | .end = AB8500_INT_PON_KEY1DB_F, | |
413 | .flags = IORESOURCE_IRQ, | |
414 | }, | |
415 | { | |
416 | .name = "ONKEY_DBR", | |
417 | .start = AB8500_INT_PON_KEY1DB_R, | |
418 | .end = AB8500_INT_PON_KEY1DB_R, | |
419 | .flags = IORESOURCE_IRQ, | |
420 | }, | |
421 | }; | |
422 | ||
6af75ecd | 423 | static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { |
e098aded | 424 | { |
6af75ecd LW |
425 | .name = "ACC_DETECT_1DB_F", |
426 | .start = AB8500_INT_ACC_DETECT_1DB_F, | |
427 | .end = AB8500_INT_ACC_DETECT_1DB_F, | |
428 | .flags = IORESOURCE_IRQ, | |
e098aded MW |
429 | }, |
430 | { | |
6af75ecd LW |
431 | .name = "ACC_DETECT_1DB_R", |
432 | .start = AB8500_INT_ACC_DETECT_1DB_R, | |
433 | .end = AB8500_INT_ACC_DETECT_1DB_R, | |
434 | .flags = IORESOURCE_IRQ, | |
435 | }, | |
436 | { | |
437 | .name = "ACC_DETECT_21DB_F", | |
438 | .start = AB8500_INT_ACC_DETECT_21DB_F, | |
439 | .end = AB8500_INT_ACC_DETECT_21DB_F, | |
440 | .flags = IORESOURCE_IRQ, | |
441 | }, | |
442 | { | |
443 | .name = "ACC_DETECT_21DB_R", | |
444 | .start = AB8500_INT_ACC_DETECT_21DB_R, | |
445 | .end = AB8500_INT_ACC_DETECT_21DB_R, | |
446 | .flags = IORESOURCE_IRQ, | |
447 | }, | |
448 | { | |
449 | .name = "ACC_DETECT_22DB_F", | |
450 | .start = AB8500_INT_ACC_DETECT_22DB_F, | |
451 | .end = AB8500_INT_ACC_DETECT_22DB_F, | |
452 | .flags = IORESOURCE_IRQ, | |
e098aded | 453 | }, |
6af75ecd LW |
454 | { |
455 | .name = "ACC_DETECT_22DB_R", | |
456 | .start = AB8500_INT_ACC_DETECT_22DB_R, | |
457 | .end = AB8500_INT_ACC_DETECT_22DB_R, | |
458 | .flags = IORESOURCE_IRQ, | |
459 | }, | |
460 | }; | |
461 | ||
462 | static struct resource __devinitdata ab8500_charger_resources[] = { | |
e098aded MW |
463 | { |
464 | .name = "MAIN_CH_UNPLUG_DET", | |
465 | .start = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
466 | .end = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
467 | .flags = IORESOURCE_IRQ, | |
468 | }, | |
469 | { | |
470 | .name = "MAIN_CHARGE_PLUG_DET", | |
471 | .start = AB8500_INT_MAIN_CH_PLUG_DET, | |
472 | .end = AB8500_INT_MAIN_CH_PLUG_DET, | |
473 | .flags = IORESOURCE_IRQ, | |
474 | }, | |
e098aded MW |
475 | { |
476 | .name = "VBUS_DET_R", | |
477 | .start = AB8500_INT_VBUS_DET_R, | |
478 | .end = AB8500_INT_VBUS_DET_R, | |
479 | .flags = IORESOURCE_IRQ, | |
480 | }, | |
481 | { | |
6af75ecd LW |
482 | .name = "VBUS_DET_F", |
483 | .start = AB8500_INT_VBUS_DET_F, | |
484 | .end = AB8500_INT_VBUS_DET_F, | |
e098aded MW |
485 | .flags = IORESOURCE_IRQ, |
486 | }, | |
487 | { | |
6af75ecd LW |
488 | .name = "USB_LINK_STATUS", |
489 | .start = AB8500_INT_USB_LINK_STATUS, | |
490 | .end = AB8500_INT_USB_LINK_STATUS, | |
491 | .flags = IORESOURCE_IRQ, | |
492 | }, | |
493 | { | |
494 | .name = "USB_CHARGE_DET_DONE", | |
495 | .start = AB8500_INT_USB_CHG_DET_DONE, | |
496 | .end = AB8500_INT_USB_CHG_DET_DONE, | |
e098aded MW |
497 | .flags = IORESOURCE_IRQ, |
498 | }, | |
499 | { | |
500 | .name = "VBUS_OVV", | |
501 | .start = AB8500_INT_VBUS_OVV, | |
502 | .end = AB8500_INT_VBUS_OVV, | |
503 | .flags = IORESOURCE_IRQ, | |
504 | }, | |
505 | { | |
6af75ecd LW |
506 | .name = "USB_CH_TH_PROT_R", |
507 | .start = AB8500_INT_USB_CH_TH_PROT_R, | |
508 | .end = AB8500_INT_USB_CH_TH_PROT_R, | |
e098aded MW |
509 | .flags = IORESOURCE_IRQ, |
510 | }, | |
511 | { | |
6af75ecd LW |
512 | .name = "USB_CH_TH_PROT_F", |
513 | .start = AB8500_INT_USB_CH_TH_PROT_F, | |
514 | .end = AB8500_INT_USB_CH_TH_PROT_F, | |
e098aded MW |
515 | .flags = IORESOURCE_IRQ, |
516 | }, | |
517 | { | |
6af75ecd LW |
518 | .name = "MAIN_EXT_CH_NOT_OK", |
519 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
520 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
521 | .flags = IORESOURCE_IRQ, | |
522 | }, | |
523 | { | |
524 | .name = "MAIN_CH_TH_PROT_R", | |
525 | .start = AB8500_INT_MAIN_CH_TH_PROT_R, | |
526 | .end = AB8500_INT_MAIN_CH_TH_PROT_R, | |
527 | .flags = IORESOURCE_IRQ, | |
528 | }, | |
529 | { | |
530 | .name = "MAIN_CH_TH_PROT_F", | |
531 | .start = AB8500_INT_MAIN_CH_TH_PROT_F, | |
532 | .end = AB8500_INT_MAIN_CH_TH_PROT_F, | |
533 | .flags = IORESOURCE_IRQ, | |
534 | }, | |
535 | { | |
536 | .name = "USB_CHARGER_NOT_OKR", | |
537 | .start = AB8500_INT_USB_CHARGER_NOT_OK, | |
538 | .end = AB8500_INT_USB_CHARGER_NOT_OK, | |
539 | .flags = IORESOURCE_IRQ, | |
540 | }, | |
541 | { | |
542 | .name = "USB_CHARGER_NOT_OKF", | |
543 | .start = AB8500_INT_USB_CHARGER_NOT_OKF, | |
544 | .end = AB8500_INT_USB_CHARGER_NOT_OKF, | |
545 | .flags = IORESOURCE_IRQ, | |
546 | }, | |
547 | { | |
548 | .name = "CH_WD_EXP", | |
549 | .start = AB8500_INT_CH_WD_EXP, | |
550 | .end = AB8500_INT_CH_WD_EXP, | |
551 | .flags = IORESOURCE_IRQ, | |
552 | }, | |
553 | }; | |
554 | ||
555 | static struct resource __devinitdata ab8500_btemp_resources[] = { | |
556 | { | |
557 | .name = "BAT_CTRL_INDB", | |
558 | .start = AB8500_INT_BAT_CTRL_INDB, | |
559 | .end = AB8500_INT_BAT_CTRL_INDB, | |
e098aded MW |
560 | .flags = IORESOURCE_IRQ, |
561 | }, | |
562 | { | |
563 | .name = "BTEMP_LOW", | |
564 | .start = AB8500_INT_BTEMP_LOW, | |
565 | .end = AB8500_INT_BTEMP_LOW, | |
566 | .flags = IORESOURCE_IRQ, | |
567 | }, | |
568 | { | |
569 | .name = "BTEMP_HIGH", | |
570 | .start = AB8500_INT_BTEMP_HIGH, | |
571 | .end = AB8500_INT_BTEMP_HIGH, | |
572 | .flags = IORESOURCE_IRQ, | |
573 | }, | |
574 | { | |
6af75ecd LW |
575 | .name = "BTEMP_LOW_MEDIUM", |
576 | .start = AB8500_INT_BTEMP_LOW_MEDIUM, | |
577 | .end = AB8500_INT_BTEMP_LOW_MEDIUM, | |
e098aded MW |
578 | .flags = IORESOURCE_IRQ, |
579 | }, | |
580 | { | |
6af75ecd LW |
581 | .name = "BTEMP_MEDIUM_HIGH", |
582 | .start = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
583 | .end = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
e098aded MW |
584 | .flags = IORESOURCE_IRQ, |
585 | }, | |
6af75ecd LW |
586 | }; |
587 | ||
588 | static struct resource __devinitdata ab8500_fg_resources[] = { | |
e098aded | 589 | { |
6af75ecd LW |
590 | .name = "NCONV_ACCU", |
591 | .start = AB8500_INT_CCN_CONV_ACC, | |
592 | .end = AB8500_INT_CCN_CONV_ACC, | |
e098aded MW |
593 | .flags = IORESOURCE_IRQ, |
594 | }, | |
595 | { | |
6af75ecd LW |
596 | .name = "BATT_OVV", |
597 | .start = AB8500_INT_BATT_OVV, | |
598 | .end = AB8500_INT_BATT_OVV, | |
e098aded MW |
599 | .flags = IORESOURCE_IRQ, |
600 | }, | |
601 | { | |
6af75ecd LW |
602 | .name = "LOW_BAT_F", |
603 | .start = AB8500_INT_LOW_BAT_F, | |
604 | .end = AB8500_INT_LOW_BAT_F, | |
605 | .flags = IORESOURCE_IRQ, | |
606 | }, | |
607 | { | |
608 | .name = "LOW_BAT_R", | |
609 | .start = AB8500_INT_LOW_BAT_R, | |
610 | .end = AB8500_INT_LOW_BAT_R, | |
611 | .flags = IORESOURCE_IRQ, | |
612 | }, | |
613 | { | |
614 | .name = "CC_INT_CALIB", | |
615 | .start = AB8500_INT_CC_INT_CALIB, | |
616 | .end = AB8500_INT_CC_INT_CALIB, | |
e098aded MW |
617 | .flags = IORESOURCE_IRQ, |
618 | }, | |
619 | }; | |
620 | ||
6af75ecd LW |
621 | static struct resource __devinitdata ab8500_chargalg_resources[] = {}; |
622 | ||
df720647 | 623 | #ifdef CONFIG_DEBUG_FS |
5cef8df5 | 624 | static struct resource __devinitdata ab8500_debug_resources[] = { |
e098aded MW |
625 | { |
626 | .name = "IRQ_FIRST", | |
627 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
628 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
629 | .flags = IORESOURCE_IRQ, | |
630 | }, | |
631 | { | |
632 | .name = "IRQ_LAST", | |
633 | .start = AB8500_INT_USB_CHARGER_NOT_OKF, | |
634 | .end = AB8500_INT_USB_CHARGER_NOT_OKF, | |
635 | .flags = IORESOURCE_IRQ, | |
636 | }, | |
637 | }; | |
df720647 | 638 | #endif |
e098aded | 639 | |
5cef8df5 | 640 | static struct resource __devinitdata ab8500_usb_resources[] = { |
e098aded MW |
641 | { |
642 | .name = "ID_WAKEUP_R", | |
643 | .start = AB8500_INT_ID_WAKEUP_R, | |
644 | .end = AB8500_INT_ID_WAKEUP_R, | |
645 | .flags = IORESOURCE_IRQ, | |
646 | }, | |
647 | { | |
648 | .name = "ID_WAKEUP_F", | |
649 | .start = AB8500_INT_ID_WAKEUP_F, | |
650 | .end = AB8500_INT_ID_WAKEUP_F, | |
651 | .flags = IORESOURCE_IRQ, | |
652 | }, | |
653 | { | |
654 | .name = "VBUS_DET_F", | |
655 | .start = AB8500_INT_VBUS_DET_F, | |
656 | .end = AB8500_INT_VBUS_DET_F, | |
657 | .flags = IORESOURCE_IRQ, | |
658 | }, | |
659 | { | |
660 | .name = "VBUS_DET_R", | |
661 | .start = AB8500_INT_VBUS_DET_R, | |
662 | .end = AB8500_INT_VBUS_DET_R, | |
663 | .flags = IORESOURCE_IRQ, | |
664 | }, | |
92d50a41 MW |
665 | { |
666 | .name = "USB_LINK_STATUS", | |
667 | .start = AB8500_INT_USB_LINK_STATUS, | |
668 | .end = AB8500_INT_USB_LINK_STATUS, | |
669 | .flags = IORESOURCE_IRQ, | |
670 | }, | |
6af75ecd LW |
671 | { |
672 | .name = "USB_ADP_PROBE_PLUG", | |
673 | .start = AB8500_INT_ADP_PROBE_PLUG, | |
674 | .end = AB8500_INT_ADP_PROBE_PLUG, | |
675 | .flags = IORESOURCE_IRQ, | |
676 | }, | |
677 | { | |
678 | .name = "USB_ADP_PROBE_UNPLUG", | |
679 | .start = AB8500_INT_ADP_PROBE_UNPLUG, | |
680 | .end = AB8500_INT_ADP_PROBE_UNPLUG, | |
681 | .flags = IORESOURCE_IRQ, | |
682 | }, | |
e098aded MW |
683 | }; |
684 | ||
5cef8df5 | 685 | static struct resource __devinitdata ab8500_temp_resources[] = { |
e098aded MW |
686 | { |
687 | .name = "AB8500_TEMP_WARM", | |
688 | .start = AB8500_INT_TEMP_WARM, | |
689 | .end = AB8500_INT_TEMP_WARM, | |
690 | .flags = IORESOURCE_IRQ, | |
691 | }, | |
692 | }; | |
693 | ||
5cef8df5 | 694 | static struct mfd_cell __devinitdata ab8500_devs[] = { |
5814fc35 MW |
695 | #ifdef CONFIG_DEBUG_FS |
696 | { | |
697 | .name = "ab8500-debug", | |
e098aded MW |
698 | .num_resources = ARRAY_SIZE(ab8500_debug_resources), |
699 | .resources = ab8500_debug_resources, | |
5814fc35 MW |
700 | }, |
701 | #endif | |
e098aded MW |
702 | { |
703 | .name = "ab8500-sysctrl", | |
704 | }, | |
705 | { | |
706 | .name = "ab8500-regulator", | |
707 | }, | |
0cb3fcd7 BB |
708 | { |
709 | .name = "ab8500-gpio", | |
710 | .num_resources = ARRAY_SIZE(ab8500_gpio_resources), | |
711 | .resources = ab8500_gpio_resources, | |
712 | }, | |
62579266 RV |
713 | { |
714 | .name = "ab8500-gpadc", | |
715 | .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), | |
716 | .resources = ab8500_gpadc_resources, | |
717 | }, | |
718 | { | |
719 | .name = "ab8500-rtc", | |
720 | .num_resources = ARRAY_SIZE(ab8500_rtc_resources), | |
721 | .resources = ab8500_rtc_resources, | |
722 | }, | |
e098aded | 723 | { |
6af75ecd LW |
724 | .name = "ab8500-charger", |
725 | .num_resources = ARRAY_SIZE(ab8500_charger_resources), | |
726 | .resources = ab8500_charger_resources, | |
727 | }, | |
728 | { | |
729 | .name = "ab8500-btemp", | |
730 | .num_resources = ARRAY_SIZE(ab8500_btemp_resources), | |
731 | .resources = ab8500_btemp_resources, | |
732 | }, | |
733 | { | |
734 | .name = "ab8500-fg", | |
735 | .num_resources = ARRAY_SIZE(ab8500_fg_resources), | |
736 | .resources = ab8500_fg_resources, | |
737 | }, | |
738 | { | |
739 | .name = "ab8500-chargalg", | |
740 | .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), | |
741 | .resources = ab8500_chargalg_resources, | |
742 | }, | |
743 | { | |
744 | .name = "ab8500-acc-det", | |
745 | .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), | |
746 | .resources = ab8500_av_acc_detect_resources, | |
747 | }, | |
748 | { | |
749 | .name = "ab8500-codec", | |
e098aded | 750 | }, |
e098aded MW |
751 | { |
752 | .name = "ab8500-usb", | |
753 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), | |
754 | .resources = ab8500_usb_resources, | |
755 | }, | |
756 | { | |
757 | .name = "ab8500-poweron-key", | |
758 | .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), | |
759 | .resources = ab8500_poweronkey_db_resources, | |
760 | }, | |
f0f05b1c AM |
761 | { |
762 | .name = "ab8500-pwm", | |
763 | .id = 1, | |
764 | }, | |
765 | { | |
766 | .name = "ab8500-pwm", | |
767 | .id = 2, | |
768 | }, | |
769 | { | |
770 | .name = "ab8500-pwm", | |
771 | .id = 3, | |
772 | }, | |
e098aded | 773 | { .name = "ab8500-leds", }, |
77686517 | 774 | { |
e098aded MW |
775 | .name = "ab8500-denc", |
776 | }, | |
777 | { | |
778 | .name = "ab8500-temp", | |
779 | .num_resources = ARRAY_SIZE(ab8500_temp_resources), | |
780 | .resources = ab8500_temp_resources, | |
77686517 | 781 | }, |
62579266 RV |
782 | }; |
783 | ||
cca69b67 MW |
784 | static ssize_t show_chip_id(struct device *dev, |
785 | struct device_attribute *attr, char *buf) | |
786 | { | |
787 | struct ab8500 *ab8500; | |
788 | ||
789 | ab8500 = dev_get_drvdata(dev); | |
790 | return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); | |
791 | } | |
792 | ||
e5c238c3 MW |
793 | /* |
794 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
795 | * 0x01 Swoff bit programming | |
796 | * 0x02 Thermal protection activation | |
797 | * 0x04 Vbat lower then BattOk falling threshold | |
798 | * 0x08 Watchdog expired | |
799 | * 0x10 Non presence of 32kHz clock | |
800 | * 0x20 Battery level lower than power on reset threshold | |
801 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
802 | * 0x80 DB8500 thermal shutdown | |
803 | */ | |
804 | static ssize_t show_switch_off_status(struct device *dev, | |
805 | struct device_attribute *attr, char *buf) | |
806 | { | |
807 | int ret; | |
808 | u8 value; | |
809 | struct ab8500 *ab8500; | |
810 | ||
811 | ab8500 = dev_get_drvdata(dev); | |
812 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
813 | AB8500_SWITCH_OFF_STATUS, &value); | |
814 | if (ret < 0) | |
815 | return ret; | |
816 | return sprintf(buf, "%#x\n", value); | |
817 | } | |
818 | ||
b4a31037 AL |
819 | /* |
820 | * ab8500 has turned on due to (TURN_ON_STATUS): | |
821 | * 0x01 PORnVbat | |
822 | * 0x02 PonKey1dbF | |
823 | * 0x04 PonKey2dbF | |
824 | * 0x08 RTCAlarm | |
825 | * 0x10 MainChDet | |
826 | * 0x20 VbusDet | |
827 | * 0x40 UsbIDDetect | |
828 | * 0x80 Reserved | |
829 | */ | |
830 | static ssize_t show_turn_on_status(struct device *dev, | |
831 | struct device_attribute *attr, char *buf) | |
832 | { | |
833 | int ret; | |
834 | u8 value; | |
835 | struct ab8500 *ab8500; | |
836 | ||
837 | ab8500 = dev_get_drvdata(dev); | |
838 | ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, | |
839 | AB8500_TURN_ON_STATUS, &value); | |
840 | if (ret < 0) | |
841 | return ret; | |
842 | return sprintf(buf, "%#x\n", value); | |
843 | } | |
844 | ||
cca69b67 | 845 | static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); |
e5c238c3 | 846 | static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); |
b4a31037 | 847 | static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); |
cca69b67 MW |
848 | |
849 | static struct attribute *ab8500_sysfs_entries[] = { | |
850 | &dev_attr_chip_id.attr, | |
e5c238c3 | 851 | &dev_attr_switch_off_status.attr, |
b4a31037 | 852 | &dev_attr_turn_on_status.attr, |
cca69b67 MW |
853 | NULL, |
854 | }; | |
855 | ||
856 | static struct attribute_group ab8500_attr_group = { | |
857 | .attrs = ab8500_sysfs_entries, | |
858 | }; | |
859 | ||
62579266 RV |
860 | int __devinit ab8500_init(struct ab8500 *ab8500) |
861 | { | |
862 | struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); | |
863 | int ret; | |
864 | int i; | |
47c16975 | 865 | u8 value; |
62579266 RV |
866 | |
867 | if (plat) | |
868 | ab8500->irq_base = plat->irq_base; | |
869 | ||
870 | mutex_init(&ab8500->lock); | |
871 | mutex_init(&ab8500->irq_lock); | |
872 | ||
47c16975 MW |
873 | ret = get_register_interruptible(ab8500, AB8500_MISC, |
874 | AB8500_REV_REG, &value); | |
62579266 RV |
875 | if (ret < 0) |
876 | return ret; | |
877 | ||
863dde5b | 878 | switch (value) { |
863dde5b LW |
879 | case AB8500_CUT1P0: |
880 | case AB8500_CUT1P1: | |
881 | case AB8500_CUT2P0: | |
882 | case AB8500_CUT3P0: | |
0e9049ec | 883 | case AB8500_CUT3P3: |
47c16975 | 884 | dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); |
863dde5b LW |
885 | break; |
886 | default: | |
47c16975 | 887 | dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); |
62579266 RV |
888 | return -EINVAL; |
889 | } | |
47c16975 | 890 | ab8500->chip_id = value; |
62579266 | 891 | |
e5c238c3 MW |
892 | /* |
893 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
894 | * 0x01 Swoff bit programming | |
895 | * 0x02 Thermal protection activation | |
896 | * 0x04 Vbat lower then BattOk falling threshold | |
897 | * 0x08 Watchdog expired | |
898 | * 0x10 Non presence of 32kHz clock | |
899 | * 0x20 Battery level lower than power on reset threshold | |
900 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
901 | * 0x80 DB8500 thermal shutdown | |
902 | */ | |
903 | ||
904 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
905 | AB8500_SWITCH_OFF_STATUS, &value); | |
906 | if (ret < 0) | |
907 | return ret; | |
908 | dev_info(ab8500->dev, "switch off status: %#x", value); | |
909 | ||
62579266 RV |
910 | if (plat && plat->init) |
911 | plat->init(ab8500); | |
912 | ||
913 | /* Clear and mask all interrupts */ | |
92d50a41 | 914 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { |
863dde5b LW |
915 | /* Interrupt register 12 doesn't exist prior to version 2.0 */ |
916 | if (ab8500_irq_regoffset[i] == 11 && | |
917 | ab8500->chip_id < AB8500_CUT2P0) | |
92d50a41 | 918 | continue; |
62579266 | 919 | |
47c16975 | 920 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
92d50a41 MW |
921 | AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i], |
922 | &value); | |
47c16975 | 923 | set_register_interruptible(ab8500, AB8500_INTERRUPT, |
92d50a41 | 924 | AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff); |
62579266 RV |
925 | } |
926 | ||
47c16975 MW |
927 | ret = abx500_register_ops(ab8500->dev, &ab8500_ops); |
928 | if (ret) | |
929 | return ret; | |
930 | ||
62579266 RV |
931 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) |
932 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; | |
933 | ||
934 | if (ab8500->irq_base) { | |
935 | ret = ab8500_irq_init(ab8500); | |
936 | if (ret) | |
937 | return ret; | |
938 | ||
939 | ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, | |
4f079985 MW |
940 | IRQF_ONESHOT | IRQF_NO_SUSPEND, |
941 | "ab8500", ab8500); | |
62579266 RV |
942 | if (ret) |
943 | goto out_removeirq; | |
944 | } | |
945 | ||
549931f9 | 946 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, |
62579266 RV |
947 | ARRAY_SIZE(ab8500_devs), NULL, |
948 | ab8500->irq_base); | |
949 | if (ret) | |
950 | goto out_freeirq; | |
951 | ||
cca69b67 MW |
952 | ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group); |
953 | if (ret) | |
954 | dev_err(ab8500->dev, "error creating sysfs entries\n"); | |
955 | ||
62579266 RV |
956 | return ret; |
957 | ||
958 | out_freeirq: | |
a60e8df6 | 959 | if (ab8500->irq_base) |
62579266 RV |
960 | free_irq(ab8500->irq, ab8500); |
961 | out_removeirq: | |
a60e8df6 | 962 | if (ab8500->irq_base) |
62579266 | 963 | ab8500_irq_remove(ab8500); |
a60e8df6 | 964 | |
62579266 RV |
965 | return ret; |
966 | } | |
967 | ||
968 | int __devexit ab8500_exit(struct ab8500 *ab8500) | |
969 | { | |
cca69b67 | 970 | sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); |
62579266 RV |
971 | mfd_remove_devices(ab8500->dev); |
972 | if (ab8500->irq_base) { | |
973 | free_irq(ab8500->irq, ab8500); | |
974 | ab8500_irq_remove(ab8500); | |
975 | } | |
976 | ||
977 | return 0; | |
978 | } | |
979 | ||
adceed62 | 980 | MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); |
62579266 RV |
981 | MODULE_DESCRIPTION("AB8500 MFD core"); |
982 | MODULE_LICENSE("GPL v2"); |