Commit | Line | Data |
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62579266 RV |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License v2 | |
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | |
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> | |
adceed62 | 7 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
62579266 RV |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/mfd/core.h> | |
47c16975 | 19 | #include <linux/mfd/abx500.h> |
ee66e653 | 20 | #include <linux/mfd/abx500/ab8500.h> |
d28f1db8 | 21 | #include <linux/mfd/dbx500-prcmu.h> |
549931f9 | 22 | #include <linux/regulator/ab8500.h> |
6bc4a568 LJ |
23 | #include <linux/of.h> |
24 | #include <linux/of_device.h> | |
62579266 RV |
25 | |
26 | /* | |
27 | * Interrupt register offsets | |
28 | * Bank : 0x0E | |
29 | */ | |
47c16975 MW |
30 | #define AB8500_IT_SOURCE1_REG 0x00 |
31 | #define AB8500_IT_SOURCE2_REG 0x01 | |
32 | #define AB8500_IT_SOURCE3_REG 0x02 | |
33 | #define AB8500_IT_SOURCE4_REG 0x03 | |
34 | #define AB8500_IT_SOURCE5_REG 0x04 | |
35 | #define AB8500_IT_SOURCE6_REG 0x05 | |
36 | #define AB8500_IT_SOURCE7_REG 0x06 | |
37 | #define AB8500_IT_SOURCE8_REG 0x07 | |
d6255529 | 38 | #define AB9540_IT_SOURCE13_REG 0x0C |
47c16975 MW |
39 | #define AB8500_IT_SOURCE19_REG 0x12 |
40 | #define AB8500_IT_SOURCE20_REG 0x13 | |
41 | #define AB8500_IT_SOURCE21_REG 0x14 | |
42 | #define AB8500_IT_SOURCE22_REG 0x15 | |
43 | #define AB8500_IT_SOURCE23_REG 0x16 | |
44 | #define AB8500_IT_SOURCE24_REG 0x17 | |
62579266 RV |
45 | |
46 | /* | |
47 | * latch registers | |
48 | */ | |
47c16975 MW |
49 | #define AB8500_IT_LATCH1_REG 0x20 |
50 | #define AB8500_IT_LATCH2_REG 0x21 | |
51 | #define AB8500_IT_LATCH3_REG 0x22 | |
52 | #define AB8500_IT_LATCH4_REG 0x23 | |
53 | #define AB8500_IT_LATCH5_REG 0x24 | |
54 | #define AB8500_IT_LATCH6_REG 0x25 | |
55 | #define AB8500_IT_LATCH7_REG 0x26 | |
56 | #define AB8500_IT_LATCH8_REG 0x27 | |
57 | #define AB8500_IT_LATCH9_REG 0x28 | |
58 | #define AB8500_IT_LATCH10_REG 0x29 | |
92d50a41 | 59 | #define AB8500_IT_LATCH12_REG 0x2B |
d6255529 | 60 | #define AB9540_IT_LATCH13_REG 0x2C |
47c16975 MW |
61 | #define AB8500_IT_LATCH19_REG 0x32 |
62 | #define AB8500_IT_LATCH20_REG 0x33 | |
63 | #define AB8500_IT_LATCH21_REG 0x34 | |
64 | #define AB8500_IT_LATCH22_REG 0x35 | |
65 | #define AB8500_IT_LATCH23_REG 0x36 | |
66 | #define AB8500_IT_LATCH24_REG 0x37 | |
62579266 RV |
67 | |
68 | /* | |
69 | * mask registers | |
70 | */ | |
71 | ||
47c16975 MW |
72 | #define AB8500_IT_MASK1_REG 0x40 |
73 | #define AB8500_IT_MASK2_REG 0x41 | |
74 | #define AB8500_IT_MASK3_REG 0x42 | |
75 | #define AB8500_IT_MASK4_REG 0x43 | |
76 | #define AB8500_IT_MASK5_REG 0x44 | |
77 | #define AB8500_IT_MASK6_REG 0x45 | |
78 | #define AB8500_IT_MASK7_REG 0x46 | |
79 | #define AB8500_IT_MASK8_REG 0x47 | |
80 | #define AB8500_IT_MASK9_REG 0x48 | |
81 | #define AB8500_IT_MASK10_REG 0x49 | |
82 | #define AB8500_IT_MASK11_REG 0x4A | |
83 | #define AB8500_IT_MASK12_REG 0x4B | |
84 | #define AB8500_IT_MASK13_REG 0x4C | |
85 | #define AB8500_IT_MASK14_REG 0x4D | |
86 | #define AB8500_IT_MASK15_REG 0x4E | |
87 | #define AB8500_IT_MASK16_REG 0x4F | |
88 | #define AB8500_IT_MASK17_REG 0x50 | |
89 | #define AB8500_IT_MASK18_REG 0x51 | |
90 | #define AB8500_IT_MASK19_REG 0x52 | |
91 | #define AB8500_IT_MASK20_REG 0x53 | |
92 | #define AB8500_IT_MASK21_REG 0x54 | |
93 | #define AB8500_IT_MASK22_REG 0x55 | |
94 | #define AB8500_IT_MASK23_REG 0x56 | |
95 | #define AB8500_IT_MASK24_REG 0x57 | |
96 | ||
7ccfe9b1 MJ |
97 | /* |
98 | * latch hierarchy registers | |
99 | */ | |
100 | #define AB8500_IT_LATCHHIER1_REG 0x60 | |
101 | #define AB8500_IT_LATCHHIER2_REG 0x61 | |
102 | #define AB8500_IT_LATCHHIER3_REG 0x62 | |
103 | ||
104 | #define AB8500_IT_LATCHHIER_NUM 3 | |
105 | ||
47c16975 | 106 | #define AB8500_REV_REG 0x80 |
0f620837 | 107 | #define AB8500_IC_NAME_REG 0x82 |
e5c238c3 | 108 | #define AB8500_SWITCH_OFF_STATUS 0x00 |
62579266 | 109 | |
b4a31037 AL |
110 | #define AB8500_TURN_ON_STATUS 0x00 |
111 | ||
6ef9418c RA |
112 | static bool no_bm; /* No battery management */ |
113 | module_param(no_bm, bool, S_IRUGO); | |
114 | ||
d6255529 LW |
115 | #define AB9540_MODEM_CTRL2_REG 0x23 |
116 | #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) | |
117 | ||
62579266 RV |
118 | /* |
119 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt | |
2ced445e LW |
120 | * numbers are indexed into this array with (num / 8). The interupts are |
121 | * defined in linux/mfd/ab8500.h | |
62579266 RV |
122 | * |
123 | * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at | |
124 | * offset 0. | |
125 | */ | |
2ced445e | 126 | /* AB8500 support */ |
62579266 | 127 | static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { |
92d50a41 | 128 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, |
62579266 RV |
129 | }; |
130 | ||
d6255529 LW |
131 | /* AB9540 support */ |
132 | static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { | |
133 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, | |
134 | }; | |
135 | ||
0f620837 LW |
136 | static const char ab8500_version_str[][7] = { |
137 | [AB8500_VERSION_AB8500] = "AB8500", | |
138 | [AB8500_VERSION_AB8505] = "AB8505", | |
139 | [AB8500_VERSION_AB9540] = "AB9540", | |
140 | [AB8500_VERSION_AB8540] = "AB8540", | |
141 | }; | |
142 | ||
d28f1db8 LJ |
143 | static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data) |
144 | { | |
145 | int ret; | |
146 | ||
147 | ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); | |
148 | if (ret < 0) | |
149 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
150 | return ret; | |
151 | } | |
152 | ||
153 | static int ab8500_i2c_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, | |
154 | u8 data) | |
155 | { | |
156 | int ret; | |
157 | ||
158 | ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, | |
159 | &mask, 1); | |
160 | if (ret < 0) | |
161 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
162 | return ret; | |
163 | } | |
164 | ||
165 | static int ab8500_i2c_read(struct ab8500 *ab8500, u16 addr) | |
166 | { | |
167 | int ret; | |
168 | u8 data; | |
169 | ||
170 | ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); | |
171 | if (ret < 0) { | |
172 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
173 | return ret; | |
174 | } | |
175 | return (int)data; | |
176 | } | |
177 | ||
47c16975 MW |
178 | static int ab8500_get_chip_id(struct device *dev) |
179 | { | |
6bce7bf1 MW |
180 | struct ab8500 *ab8500; |
181 | ||
182 | if (!dev) | |
183 | return -EINVAL; | |
184 | ab8500 = dev_get_drvdata(dev->parent); | |
185 | return ab8500 ? (int)ab8500->chip_id : -EINVAL; | |
47c16975 MW |
186 | } |
187 | ||
188 | static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
189 | u8 reg, u8 data) | |
62579266 RV |
190 | { |
191 | int ret; | |
47c16975 MW |
192 | /* |
193 | * Put the u8 bank and u8 register together into a an u16. | |
194 | * The bank on higher 8 bits and register in lower 8 bits. | |
195 | * */ | |
196 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 RV |
197 | |
198 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); | |
199 | ||
392cbd1e | 200 | mutex_lock(&ab8500->lock); |
47c16975 | 201 | |
62579266 RV |
202 | ret = ab8500->write(ab8500, addr, data); |
203 | if (ret < 0) | |
204 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
205 | addr, ret); | |
47c16975 | 206 | mutex_unlock(&ab8500->lock); |
62579266 RV |
207 | |
208 | return ret; | |
209 | } | |
210 | ||
47c16975 MW |
211 | static int ab8500_set_register(struct device *dev, u8 bank, |
212 | u8 reg, u8 value) | |
62579266 | 213 | { |
112a80d2 | 214 | int ret; |
47c16975 | 215 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 216 | |
112a80d2 JA |
217 | atomic_inc(&ab8500->transfer_ongoing); |
218 | ret = set_register_interruptible(ab8500, bank, reg, value); | |
219 | atomic_dec(&ab8500->transfer_ongoing); | |
220 | return ret; | |
62579266 | 221 | } |
62579266 | 222 | |
47c16975 MW |
223 | static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, |
224 | u8 reg, u8 *value) | |
62579266 RV |
225 | { |
226 | int ret; | |
47c16975 MW |
227 | /* put the u8 bank and u8 reg together into a an u16. |
228 | * bank on higher 8 bits and reg in lower */ | |
229 | u16 addr = ((u16)bank) << 8 | reg; | |
230 | ||
392cbd1e | 231 | mutex_lock(&ab8500->lock); |
62579266 RV |
232 | |
233 | ret = ab8500->read(ab8500, addr); | |
234 | if (ret < 0) | |
235 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
236 | addr, ret); | |
47c16975 MW |
237 | else |
238 | *value = ret; | |
62579266 | 239 | |
47c16975 | 240 | mutex_unlock(&ab8500->lock); |
62579266 RV |
241 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); |
242 | ||
243 | return ret; | |
244 | } | |
245 | ||
47c16975 MW |
246 | static int ab8500_get_register(struct device *dev, u8 bank, |
247 | u8 reg, u8 *value) | |
62579266 | 248 | { |
112a80d2 | 249 | int ret; |
47c16975 | 250 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 251 | |
112a80d2 JA |
252 | atomic_inc(&ab8500->transfer_ongoing); |
253 | ret = get_register_interruptible(ab8500, bank, reg, value); | |
254 | atomic_dec(&ab8500->transfer_ongoing); | |
255 | return ret; | |
62579266 | 256 | } |
47c16975 MW |
257 | |
258 | static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
259 | u8 reg, u8 bitmask, u8 bitvalues) | |
62579266 RV |
260 | { |
261 | int ret; | |
47c16975 MW |
262 | /* put the u8 bank and u8 reg together into a an u16. |
263 | * bank on higher 8 bits and reg in lower */ | |
264 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 | 265 | |
392cbd1e | 266 | mutex_lock(&ab8500->lock); |
62579266 | 267 | |
bc628fd1 MN |
268 | if (ab8500->write_masked == NULL) { |
269 | u8 data; | |
62579266 | 270 | |
bc628fd1 MN |
271 | ret = ab8500->read(ab8500, addr); |
272 | if (ret < 0) { | |
273 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
274 | addr, ret); | |
275 | goto out; | |
276 | } | |
62579266 | 277 | |
bc628fd1 MN |
278 | data = (u8)ret; |
279 | data = (~bitmask & data) | (bitmask & bitvalues); | |
280 | ||
281 | ret = ab8500->write(ab8500, addr, data); | |
282 | if (ret < 0) | |
283 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
284 | addr, ret); | |
62579266 | 285 | |
bc628fd1 MN |
286 | dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, |
287 | data); | |
288 | goto out; | |
289 | } | |
290 | ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); | |
291 | if (ret < 0) | |
292 | dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, | |
293 | ret); | |
62579266 RV |
294 | out: |
295 | mutex_unlock(&ab8500->lock); | |
296 | return ret; | |
297 | } | |
47c16975 MW |
298 | |
299 | static int ab8500_mask_and_set_register(struct device *dev, | |
300 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) | |
301 | { | |
112a80d2 | 302 | int ret; |
47c16975 MW |
303 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
304 | ||
112a80d2 JA |
305 | atomic_inc(&ab8500->transfer_ongoing); |
306 | ret= mask_and_set_register_interruptible(ab8500, bank, reg, | |
307 | bitmask, bitvalues); | |
308 | atomic_dec(&ab8500->transfer_ongoing); | |
309 | return ret; | |
47c16975 MW |
310 | } |
311 | ||
312 | static struct abx500_ops ab8500_ops = { | |
313 | .get_chip_id = ab8500_get_chip_id, | |
314 | .get_register = ab8500_get_register, | |
315 | .set_register = ab8500_set_register, | |
316 | .get_register_page = NULL, | |
317 | .set_register_page = NULL, | |
318 | .mask_and_set_register = ab8500_mask_and_set_register, | |
319 | .event_registers_startup_state_get = NULL, | |
320 | .startup_irq_enabled = NULL, | |
321 | }; | |
62579266 | 322 | |
9505a0a0 | 323 | static void ab8500_irq_lock(struct irq_data *data) |
62579266 | 324 | { |
9505a0a0 | 325 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
326 | |
327 | mutex_lock(&ab8500->irq_lock); | |
112a80d2 | 328 | atomic_inc(&ab8500->transfer_ongoing); |
62579266 RV |
329 | } |
330 | ||
9505a0a0 | 331 | static void ab8500_irq_sync_unlock(struct irq_data *data) |
62579266 | 332 | { |
9505a0a0 | 333 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
334 | int i; |
335 | ||
2ced445e | 336 | for (i = 0; i < ab8500->mask_size; i++) { |
62579266 RV |
337 | u8 old = ab8500->oldmask[i]; |
338 | u8 new = ab8500->mask[i]; | |
339 | int reg; | |
340 | ||
341 | if (new == old) | |
342 | continue; | |
343 | ||
0f620837 LW |
344 | /* |
345 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
346 | * 2.0 | |
347 | */ | |
348 | if (ab8500->irq_reg_offset[i] == 11 && | |
349 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 MW |
350 | continue; |
351 | ||
62579266 RV |
352 | ab8500->oldmask[i] = new; |
353 | ||
2ced445e | 354 | reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; |
47c16975 | 355 | set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); |
62579266 | 356 | } |
112a80d2 | 357 | atomic_dec(&ab8500->transfer_ongoing); |
62579266 RV |
358 | mutex_unlock(&ab8500->irq_lock); |
359 | } | |
360 | ||
9505a0a0 | 361 | static void ab8500_irq_mask(struct irq_data *data) |
62579266 | 362 | { |
9505a0a0 MB |
363 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
364 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
365 | int index = offset / 8; |
366 | int mask = 1 << (offset % 8); | |
367 | ||
368 | ab8500->mask[index] |= mask; | |
369 | } | |
370 | ||
9505a0a0 | 371 | static void ab8500_irq_unmask(struct irq_data *data) |
62579266 | 372 | { |
9505a0a0 MB |
373 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
374 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
375 | int index = offset / 8; |
376 | int mask = 1 << (offset % 8); | |
377 | ||
378 | ab8500->mask[index] &= ~mask; | |
379 | } | |
380 | ||
381 | static struct irq_chip ab8500_irq_chip = { | |
382 | .name = "ab8500", | |
9505a0a0 MB |
383 | .irq_bus_lock = ab8500_irq_lock, |
384 | .irq_bus_sync_unlock = ab8500_irq_sync_unlock, | |
385 | .irq_mask = ab8500_irq_mask, | |
e6f9306e | 386 | .irq_disable = ab8500_irq_mask, |
9505a0a0 | 387 | .irq_unmask = ab8500_irq_unmask, |
62579266 RV |
388 | }; |
389 | ||
7ccfe9b1 MJ |
390 | static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, |
391 | int latch_offset, u8 latch_val) | |
392 | { | |
393 | int int_bit = __ffs(latch_val); | |
394 | int line, i; | |
395 | ||
396 | do { | |
397 | int_bit = __ffs(latch_val); | |
398 | ||
399 | for (i = 0; i < ab8500->mask_size; i++) | |
400 | if (ab8500->irq_reg_offset[i] == latch_offset) | |
401 | break; | |
402 | ||
403 | if (i >= ab8500->mask_size) { | |
404 | dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", | |
405 | latch_offset); | |
406 | return -ENXIO; | |
407 | } | |
408 | ||
409 | line = (i << 3) + int_bit; | |
410 | latch_val &= ~(1 << int_bit); | |
411 | ||
412 | handle_nested_irq(ab8500->irq_base + line); | |
413 | } while (latch_val); | |
414 | ||
415 | return 0; | |
416 | } | |
417 | ||
418 | static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, | |
419 | int hier_offset, u8 hier_val) | |
420 | { | |
421 | int latch_bit, status; | |
422 | u8 latch_offset, latch_val; | |
423 | ||
424 | do { | |
425 | latch_bit = __ffs(hier_val); | |
426 | latch_offset = (hier_offset << 3) + latch_bit; | |
427 | ||
428 | /* Fix inconsistent ITFromLatch25 bit mapping... */ | |
429 | if (unlikely(latch_offset == 17)) | |
430 | latch_offset = 24; | |
431 | ||
432 | status = get_register_interruptible(ab8500, | |
433 | AB8500_INTERRUPT, | |
434 | AB8500_IT_LATCH1_REG + latch_offset, | |
435 | &latch_val); | |
436 | if (status < 0 || latch_val == 0) | |
437 | goto discard; | |
438 | ||
439 | status = ab8500_handle_hierarchical_line(ab8500, | |
440 | latch_offset, latch_val); | |
441 | if (status < 0) | |
442 | return status; | |
443 | discard: | |
444 | hier_val &= ~(1 << latch_bit); | |
445 | } while (hier_val); | |
446 | ||
447 | return 0; | |
448 | } | |
449 | ||
450 | static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) | |
451 | { | |
452 | struct ab8500 *ab8500 = dev; | |
453 | u8 i; | |
454 | ||
455 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
456 | ||
457 | /* Hierarchical interrupt version */ | |
458 | for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) { | |
459 | int status; | |
460 | u8 hier_val; | |
461 | ||
462 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, | |
463 | AB8500_IT_LATCHHIER1_REG + i, &hier_val); | |
464 | if (status < 0 || hier_val == 0) | |
465 | continue; | |
466 | ||
467 | status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); | |
468 | if (status < 0) | |
469 | break; | |
470 | } | |
471 | return IRQ_HANDLED; | |
472 | } | |
473 | ||
62579266 RV |
474 | static irqreturn_t ab8500_irq(int irq, void *dev) |
475 | { | |
476 | struct ab8500 *ab8500 = dev; | |
477 | int i; | |
478 | ||
479 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
480 | ||
112a80d2 JA |
481 | atomic_inc(&ab8500->transfer_ongoing); |
482 | ||
2ced445e LW |
483 | for (i = 0; i < ab8500->mask_size; i++) { |
484 | int regoffset = ab8500->irq_reg_offset[i]; | |
62579266 | 485 | int status; |
47c16975 | 486 | u8 value; |
62579266 | 487 | |
0f620837 LW |
488 | /* |
489 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
490 | * 2.0 | |
491 | */ | |
492 | if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 MW |
493 | continue; |
494 | ||
47c16975 MW |
495 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, |
496 | AB8500_IT_LATCH1_REG + regoffset, &value); | |
497 | if (status < 0 || value == 0) | |
62579266 RV |
498 | continue; |
499 | ||
500 | do { | |
88aec4f7 | 501 | int bit = __ffs(value); |
62579266 RV |
502 | int line = i * 8 + bit; |
503 | ||
504 | handle_nested_irq(ab8500->irq_base + line); | |
47c16975 | 505 | value &= ~(1 << bit); |
112a80d2 | 506 | |
47c16975 | 507 | } while (value); |
62579266 | 508 | } |
112a80d2 | 509 | atomic_dec(&ab8500->transfer_ongoing); |
62579266 RV |
510 | return IRQ_HANDLED; |
511 | } | |
512 | ||
513 | static int ab8500_irq_init(struct ab8500 *ab8500) | |
514 | { | |
515 | int base = ab8500->irq_base; | |
516 | int irq; | |
2ced445e | 517 | int num_irqs; |
62579266 | 518 | |
d6255529 LW |
519 | if (is_ab9540(ab8500)) |
520 | num_irqs = AB9540_NR_IRQS; | |
a982362c BJ |
521 | else if (is_ab8505(ab8500)) |
522 | num_irqs = AB8505_NR_IRQS; | |
d6255529 LW |
523 | else |
524 | num_irqs = AB8500_NR_IRQS; | |
2ced445e LW |
525 | |
526 | for (irq = base; irq < base + num_irqs; irq++) { | |
d5bb1221 TG |
527 | irq_set_chip_data(irq, ab8500); |
528 | irq_set_chip_and_handler(irq, &ab8500_irq_chip, | |
62579266 | 529 | handle_simple_irq); |
d5bb1221 | 530 | irq_set_nested_thread(irq, 1); |
62579266 RV |
531 | #ifdef CONFIG_ARM |
532 | set_irq_flags(irq, IRQF_VALID); | |
533 | #else | |
d5bb1221 | 534 | irq_set_noprobe(irq); |
62579266 RV |
535 | #endif |
536 | } | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
541 | static void ab8500_irq_remove(struct ab8500 *ab8500) | |
542 | { | |
543 | int base = ab8500->irq_base; | |
544 | int irq; | |
2ced445e LW |
545 | int num_irqs; |
546 | ||
d6255529 LW |
547 | if (is_ab9540(ab8500)) |
548 | num_irqs = AB9540_NR_IRQS; | |
a982362c BJ |
549 | else if (is_ab8505(ab8500)) |
550 | num_irqs = AB8505_NR_IRQS; | |
d6255529 LW |
551 | else |
552 | num_irqs = AB8500_NR_IRQS; | |
62579266 | 553 | |
2ced445e | 554 | for (irq = base; irq < base + num_irqs; irq++) { |
62579266 RV |
555 | #ifdef CONFIG_ARM |
556 | set_irq_flags(irq, 0); | |
557 | #endif | |
d5bb1221 TG |
558 | irq_set_chip_and_handler(irq, NULL, NULL); |
559 | irq_set_chip_data(irq, NULL); | |
62579266 RV |
560 | } |
561 | } | |
562 | ||
112a80d2 JA |
563 | int ab8500_suspend(struct ab8500 *ab8500) |
564 | { | |
565 | if (atomic_read(&ab8500->transfer_ongoing)) | |
566 | return -EINVAL; | |
567 | else | |
568 | return 0; | |
569 | } | |
570 | ||
d6255529 | 571 | /* AB8500 GPIO Resources */ |
5cef8df5 | 572 | static struct resource __devinitdata ab8500_gpio_resources[] = { |
0cb3fcd7 BB |
573 | { |
574 | .name = "GPIO_INT6", | |
575 | .start = AB8500_INT_GPIO6R, | |
576 | .end = AB8500_INT_GPIO41F, | |
577 | .flags = IORESOURCE_IRQ, | |
578 | } | |
579 | }; | |
580 | ||
d6255529 LW |
581 | /* AB9540 GPIO Resources */ |
582 | static struct resource __devinitdata ab9540_gpio_resources[] = { | |
583 | { | |
584 | .name = "GPIO_INT6", | |
585 | .start = AB8500_INT_GPIO6R, | |
586 | .end = AB8500_INT_GPIO41F, | |
587 | .flags = IORESOURCE_IRQ, | |
588 | }, | |
589 | { | |
590 | .name = "GPIO_INT14", | |
591 | .start = AB9540_INT_GPIO50R, | |
592 | .end = AB9540_INT_GPIO54R, | |
593 | .flags = IORESOURCE_IRQ, | |
594 | }, | |
595 | { | |
596 | .name = "GPIO_INT15", | |
597 | .start = AB9540_INT_GPIO50F, | |
598 | .end = AB9540_INT_GPIO54F, | |
599 | .flags = IORESOURCE_IRQ, | |
600 | } | |
601 | }; | |
602 | ||
5cef8df5 | 603 | static struct resource __devinitdata ab8500_gpadc_resources[] = { |
62579266 RV |
604 | { |
605 | .name = "HW_CONV_END", | |
606 | .start = AB8500_INT_GP_HW_ADC_CONV_END, | |
607 | .end = AB8500_INT_GP_HW_ADC_CONV_END, | |
608 | .flags = IORESOURCE_IRQ, | |
609 | }, | |
610 | { | |
611 | .name = "SW_CONV_END", | |
612 | .start = AB8500_INT_GP_SW_ADC_CONV_END, | |
613 | .end = AB8500_INT_GP_SW_ADC_CONV_END, | |
614 | .flags = IORESOURCE_IRQ, | |
615 | }, | |
616 | }; | |
617 | ||
5cef8df5 | 618 | static struct resource __devinitdata ab8500_rtc_resources[] = { |
62579266 RV |
619 | { |
620 | .name = "60S", | |
621 | .start = AB8500_INT_RTC_60S, | |
622 | .end = AB8500_INT_RTC_60S, | |
623 | .flags = IORESOURCE_IRQ, | |
624 | }, | |
625 | { | |
626 | .name = "ALARM", | |
627 | .start = AB8500_INT_RTC_ALARM, | |
628 | .end = AB8500_INT_RTC_ALARM, | |
629 | .flags = IORESOURCE_IRQ, | |
630 | }, | |
631 | }; | |
632 | ||
5cef8df5 | 633 | static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { |
77686517 SI |
634 | { |
635 | .name = "ONKEY_DBF", | |
636 | .start = AB8500_INT_PON_KEY1DB_F, | |
637 | .end = AB8500_INT_PON_KEY1DB_F, | |
638 | .flags = IORESOURCE_IRQ, | |
639 | }, | |
640 | { | |
641 | .name = "ONKEY_DBR", | |
642 | .start = AB8500_INT_PON_KEY1DB_R, | |
643 | .end = AB8500_INT_PON_KEY1DB_R, | |
644 | .flags = IORESOURCE_IRQ, | |
645 | }, | |
646 | }; | |
647 | ||
6af75ecd | 648 | static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { |
e098aded | 649 | { |
6af75ecd LW |
650 | .name = "ACC_DETECT_1DB_F", |
651 | .start = AB8500_INT_ACC_DETECT_1DB_F, | |
652 | .end = AB8500_INT_ACC_DETECT_1DB_F, | |
653 | .flags = IORESOURCE_IRQ, | |
e098aded MW |
654 | }, |
655 | { | |
6af75ecd LW |
656 | .name = "ACC_DETECT_1DB_R", |
657 | .start = AB8500_INT_ACC_DETECT_1DB_R, | |
658 | .end = AB8500_INT_ACC_DETECT_1DB_R, | |
659 | .flags = IORESOURCE_IRQ, | |
660 | }, | |
661 | { | |
662 | .name = "ACC_DETECT_21DB_F", | |
663 | .start = AB8500_INT_ACC_DETECT_21DB_F, | |
664 | .end = AB8500_INT_ACC_DETECT_21DB_F, | |
665 | .flags = IORESOURCE_IRQ, | |
666 | }, | |
667 | { | |
668 | .name = "ACC_DETECT_21DB_R", | |
669 | .start = AB8500_INT_ACC_DETECT_21DB_R, | |
670 | .end = AB8500_INT_ACC_DETECT_21DB_R, | |
671 | .flags = IORESOURCE_IRQ, | |
672 | }, | |
673 | { | |
674 | .name = "ACC_DETECT_22DB_F", | |
675 | .start = AB8500_INT_ACC_DETECT_22DB_F, | |
676 | .end = AB8500_INT_ACC_DETECT_22DB_F, | |
677 | .flags = IORESOURCE_IRQ, | |
e098aded | 678 | }, |
6af75ecd LW |
679 | { |
680 | .name = "ACC_DETECT_22DB_R", | |
681 | .start = AB8500_INT_ACC_DETECT_22DB_R, | |
682 | .end = AB8500_INT_ACC_DETECT_22DB_R, | |
683 | .flags = IORESOURCE_IRQ, | |
684 | }, | |
685 | }; | |
686 | ||
687 | static struct resource __devinitdata ab8500_charger_resources[] = { | |
e098aded MW |
688 | { |
689 | .name = "MAIN_CH_UNPLUG_DET", | |
690 | .start = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
691 | .end = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
692 | .flags = IORESOURCE_IRQ, | |
693 | }, | |
694 | { | |
695 | .name = "MAIN_CHARGE_PLUG_DET", | |
696 | .start = AB8500_INT_MAIN_CH_PLUG_DET, | |
697 | .end = AB8500_INT_MAIN_CH_PLUG_DET, | |
698 | .flags = IORESOURCE_IRQ, | |
699 | }, | |
e098aded MW |
700 | { |
701 | .name = "VBUS_DET_R", | |
702 | .start = AB8500_INT_VBUS_DET_R, | |
703 | .end = AB8500_INT_VBUS_DET_R, | |
704 | .flags = IORESOURCE_IRQ, | |
705 | }, | |
706 | { | |
6af75ecd LW |
707 | .name = "VBUS_DET_F", |
708 | .start = AB8500_INT_VBUS_DET_F, | |
709 | .end = AB8500_INT_VBUS_DET_F, | |
e098aded MW |
710 | .flags = IORESOURCE_IRQ, |
711 | }, | |
712 | { | |
6af75ecd LW |
713 | .name = "USB_LINK_STATUS", |
714 | .start = AB8500_INT_USB_LINK_STATUS, | |
715 | .end = AB8500_INT_USB_LINK_STATUS, | |
716 | .flags = IORESOURCE_IRQ, | |
717 | }, | |
e098aded MW |
718 | { |
719 | .name = "VBUS_OVV", | |
720 | .start = AB8500_INT_VBUS_OVV, | |
721 | .end = AB8500_INT_VBUS_OVV, | |
722 | .flags = IORESOURCE_IRQ, | |
723 | }, | |
724 | { | |
6af75ecd LW |
725 | .name = "USB_CH_TH_PROT_R", |
726 | .start = AB8500_INT_USB_CH_TH_PROT_R, | |
727 | .end = AB8500_INT_USB_CH_TH_PROT_R, | |
e098aded MW |
728 | .flags = IORESOURCE_IRQ, |
729 | }, | |
730 | { | |
6af75ecd LW |
731 | .name = "USB_CH_TH_PROT_F", |
732 | .start = AB8500_INT_USB_CH_TH_PROT_F, | |
733 | .end = AB8500_INT_USB_CH_TH_PROT_F, | |
e098aded MW |
734 | .flags = IORESOURCE_IRQ, |
735 | }, | |
736 | { | |
6af75ecd LW |
737 | .name = "MAIN_EXT_CH_NOT_OK", |
738 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
739 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
740 | .flags = IORESOURCE_IRQ, | |
741 | }, | |
742 | { | |
743 | .name = "MAIN_CH_TH_PROT_R", | |
744 | .start = AB8500_INT_MAIN_CH_TH_PROT_R, | |
745 | .end = AB8500_INT_MAIN_CH_TH_PROT_R, | |
746 | .flags = IORESOURCE_IRQ, | |
747 | }, | |
748 | { | |
749 | .name = "MAIN_CH_TH_PROT_F", | |
750 | .start = AB8500_INT_MAIN_CH_TH_PROT_F, | |
751 | .end = AB8500_INT_MAIN_CH_TH_PROT_F, | |
752 | .flags = IORESOURCE_IRQ, | |
753 | }, | |
754 | { | |
755 | .name = "USB_CHARGER_NOT_OKR", | |
a982362c BJ |
756 | .start = AB8500_INT_USB_CHARGER_NOT_OKR, |
757 | .end = AB8500_INT_USB_CHARGER_NOT_OKR, | |
6af75ecd LW |
758 | .flags = IORESOURCE_IRQ, |
759 | }, | |
760 | { | |
761 | .name = "CH_WD_EXP", | |
762 | .start = AB8500_INT_CH_WD_EXP, | |
763 | .end = AB8500_INT_CH_WD_EXP, | |
764 | .flags = IORESOURCE_IRQ, | |
765 | }, | |
766 | }; | |
767 | ||
768 | static struct resource __devinitdata ab8500_btemp_resources[] = { | |
769 | { | |
770 | .name = "BAT_CTRL_INDB", | |
771 | .start = AB8500_INT_BAT_CTRL_INDB, | |
772 | .end = AB8500_INT_BAT_CTRL_INDB, | |
e098aded MW |
773 | .flags = IORESOURCE_IRQ, |
774 | }, | |
775 | { | |
776 | .name = "BTEMP_LOW", | |
777 | .start = AB8500_INT_BTEMP_LOW, | |
778 | .end = AB8500_INT_BTEMP_LOW, | |
779 | .flags = IORESOURCE_IRQ, | |
780 | }, | |
781 | { | |
782 | .name = "BTEMP_HIGH", | |
783 | .start = AB8500_INT_BTEMP_HIGH, | |
784 | .end = AB8500_INT_BTEMP_HIGH, | |
785 | .flags = IORESOURCE_IRQ, | |
786 | }, | |
787 | { | |
6af75ecd LW |
788 | .name = "BTEMP_LOW_MEDIUM", |
789 | .start = AB8500_INT_BTEMP_LOW_MEDIUM, | |
790 | .end = AB8500_INT_BTEMP_LOW_MEDIUM, | |
e098aded MW |
791 | .flags = IORESOURCE_IRQ, |
792 | }, | |
793 | { | |
6af75ecd LW |
794 | .name = "BTEMP_MEDIUM_HIGH", |
795 | .start = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
796 | .end = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
e098aded MW |
797 | .flags = IORESOURCE_IRQ, |
798 | }, | |
6af75ecd LW |
799 | }; |
800 | ||
801 | static struct resource __devinitdata ab8500_fg_resources[] = { | |
e098aded | 802 | { |
6af75ecd LW |
803 | .name = "NCONV_ACCU", |
804 | .start = AB8500_INT_CCN_CONV_ACC, | |
805 | .end = AB8500_INT_CCN_CONV_ACC, | |
e098aded MW |
806 | .flags = IORESOURCE_IRQ, |
807 | }, | |
808 | { | |
6af75ecd LW |
809 | .name = "BATT_OVV", |
810 | .start = AB8500_INT_BATT_OVV, | |
811 | .end = AB8500_INT_BATT_OVV, | |
e098aded MW |
812 | .flags = IORESOURCE_IRQ, |
813 | }, | |
814 | { | |
6af75ecd LW |
815 | .name = "LOW_BAT_F", |
816 | .start = AB8500_INT_LOW_BAT_F, | |
817 | .end = AB8500_INT_LOW_BAT_F, | |
818 | .flags = IORESOURCE_IRQ, | |
819 | }, | |
820 | { | |
821 | .name = "LOW_BAT_R", | |
822 | .start = AB8500_INT_LOW_BAT_R, | |
823 | .end = AB8500_INT_LOW_BAT_R, | |
824 | .flags = IORESOURCE_IRQ, | |
825 | }, | |
826 | { | |
827 | .name = "CC_INT_CALIB", | |
828 | .start = AB8500_INT_CC_INT_CALIB, | |
829 | .end = AB8500_INT_CC_INT_CALIB, | |
e098aded MW |
830 | .flags = IORESOURCE_IRQ, |
831 | }, | |
a982362c BJ |
832 | { |
833 | .name = "CCEOC", | |
834 | .start = AB8500_INT_CCEOC, | |
835 | .end = AB8500_INT_CCEOC, | |
836 | .flags = IORESOURCE_IRQ, | |
837 | }, | |
e098aded MW |
838 | }; |
839 | ||
6af75ecd LW |
840 | static struct resource __devinitdata ab8500_chargalg_resources[] = {}; |
841 | ||
df720647 | 842 | #ifdef CONFIG_DEBUG_FS |
5cef8df5 | 843 | static struct resource __devinitdata ab8500_debug_resources[] = { |
e098aded MW |
844 | { |
845 | .name = "IRQ_FIRST", | |
846 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
847 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
848 | .flags = IORESOURCE_IRQ, | |
849 | }, | |
850 | { | |
851 | .name = "IRQ_LAST", | |
a982362c BJ |
852 | .start = AB8500_INT_XTAL32K_KO, |
853 | .end = AB8500_INT_XTAL32K_KO, | |
e098aded MW |
854 | .flags = IORESOURCE_IRQ, |
855 | }, | |
856 | }; | |
df720647 | 857 | #endif |
e098aded | 858 | |
5cef8df5 | 859 | static struct resource __devinitdata ab8500_usb_resources[] = { |
e098aded MW |
860 | { |
861 | .name = "ID_WAKEUP_R", | |
862 | .start = AB8500_INT_ID_WAKEUP_R, | |
863 | .end = AB8500_INT_ID_WAKEUP_R, | |
864 | .flags = IORESOURCE_IRQ, | |
865 | }, | |
866 | { | |
867 | .name = "ID_WAKEUP_F", | |
868 | .start = AB8500_INT_ID_WAKEUP_F, | |
869 | .end = AB8500_INT_ID_WAKEUP_F, | |
870 | .flags = IORESOURCE_IRQ, | |
871 | }, | |
872 | { | |
873 | .name = "VBUS_DET_F", | |
874 | .start = AB8500_INT_VBUS_DET_F, | |
875 | .end = AB8500_INT_VBUS_DET_F, | |
876 | .flags = IORESOURCE_IRQ, | |
877 | }, | |
878 | { | |
879 | .name = "VBUS_DET_R", | |
880 | .start = AB8500_INT_VBUS_DET_R, | |
881 | .end = AB8500_INT_VBUS_DET_R, | |
882 | .flags = IORESOURCE_IRQ, | |
883 | }, | |
92d50a41 MW |
884 | { |
885 | .name = "USB_LINK_STATUS", | |
886 | .start = AB8500_INT_USB_LINK_STATUS, | |
887 | .end = AB8500_INT_USB_LINK_STATUS, | |
888 | .flags = IORESOURCE_IRQ, | |
889 | }, | |
6af75ecd LW |
890 | { |
891 | .name = "USB_ADP_PROBE_PLUG", | |
892 | .start = AB8500_INT_ADP_PROBE_PLUG, | |
893 | .end = AB8500_INT_ADP_PROBE_PLUG, | |
894 | .flags = IORESOURCE_IRQ, | |
895 | }, | |
896 | { | |
897 | .name = "USB_ADP_PROBE_UNPLUG", | |
898 | .start = AB8500_INT_ADP_PROBE_UNPLUG, | |
899 | .end = AB8500_INT_ADP_PROBE_UNPLUG, | |
900 | .flags = IORESOURCE_IRQ, | |
901 | }, | |
e098aded MW |
902 | }; |
903 | ||
44f72e53 VS |
904 | static struct resource __devinitdata ab8505_iddet_resources[] = { |
905 | { | |
906 | .name = "KeyDeglitch", | |
907 | .start = AB8505_INT_KEYDEGLITCH, | |
908 | .end = AB8505_INT_KEYDEGLITCH, | |
909 | .flags = IORESOURCE_IRQ, | |
910 | }, | |
911 | { | |
912 | .name = "KP", | |
913 | .start = AB8505_INT_KP, | |
914 | .end = AB8505_INT_KP, | |
915 | .flags = IORESOURCE_IRQ, | |
916 | }, | |
917 | { | |
918 | .name = "IKP", | |
919 | .start = AB8505_INT_IKP, | |
920 | .end = AB8505_INT_IKP, | |
921 | .flags = IORESOURCE_IRQ, | |
922 | }, | |
923 | { | |
924 | .name = "IKR", | |
925 | .start = AB8505_INT_IKR, | |
926 | .end = AB8505_INT_IKR, | |
927 | .flags = IORESOURCE_IRQ, | |
928 | }, | |
929 | { | |
930 | .name = "KeyStuck", | |
931 | .start = AB8505_INT_KEYSTUCK, | |
932 | .end = AB8505_INT_KEYSTUCK, | |
933 | .flags = IORESOURCE_IRQ, | |
934 | }, | |
935 | }; | |
936 | ||
5cef8df5 | 937 | static struct resource __devinitdata ab8500_temp_resources[] = { |
e098aded MW |
938 | { |
939 | .name = "AB8500_TEMP_WARM", | |
940 | .start = AB8500_INT_TEMP_WARM, | |
941 | .end = AB8500_INT_TEMP_WARM, | |
942 | .flags = IORESOURCE_IRQ, | |
943 | }, | |
944 | }; | |
945 | ||
d6255529 | 946 | static struct mfd_cell __devinitdata abx500_common_devs[] = { |
5814fc35 MW |
947 | #ifdef CONFIG_DEBUG_FS |
948 | { | |
949 | .name = "ab8500-debug", | |
e098aded MW |
950 | .num_resources = ARRAY_SIZE(ab8500_debug_resources), |
951 | .resources = ab8500_debug_resources, | |
5814fc35 MW |
952 | }, |
953 | #endif | |
e098aded MW |
954 | { |
955 | .name = "ab8500-sysctrl", | |
956 | }, | |
957 | { | |
958 | .name = "ab8500-regulator", | |
959 | }, | |
62579266 RV |
960 | { |
961 | .name = "ab8500-gpadc", | |
962 | .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), | |
963 | .resources = ab8500_gpadc_resources, | |
964 | }, | |
965 | { | |
966 | .name = "ab8500-rtc", | |
967 | .num_resources = ARRAY_SIZE(ab8500_rtc_resources), | |
968 | .resources = ab8500_rtc_resources, | |
969 | }, | |
6af75ecd LW |
970 | { |
971 | .name = "ab8500-acc-det", | |
972 | .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), | |
973 | .resources = ab8500_av_acc_detect_resources, | |
974 | }, | |
e098aded MW |
975 | { |
976 | .name = "ab8500-poweron-key", | |
977 | .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), | |
978 | .resources = ab8500_poweronkey_db_resources, | |
979 | }, | |
f0f05b1c AM |
980 | { |
981 | .name = "ab8500-pwm", | |
982 | .id = 1, | |
983 | }, | |
984 | { | |
985 | .name = "ab8500-pwm", | |
986 | .id = 2, | |
987 | }, | |
988 | { | |
989 | .name = "ab8500-pwm", | |
990 | .id = 3, | |
991 | }, | |
e098aded | 992 | { .name = "ab8500-leds", }, |
77686517 | 993 | { |
e098aded MW |
994 | .name = "ab8500-denc", |
995 | }, | |
996 | { | |
997 | .name = "ab8500-temp", | |
998 | .num_resources = ARRAY_SIZE(ab8500_temp_resources), | |
999 | .resources = ab8500_temp_resources, | |
77686517 | 1000 | }, |
62579266 RV |
1001 | }; |
1002 | ||
6ef9418c RA |
1003 | static struct mfd_cell __devinitdata ab8500_bm_devs[] = { |
1004 | { | |
1005 | .name = "ab8500-charger", | |
1006 | .num_resources = ARRAY_SIZE(ab8500_charger_resources), | |
1007 | .resources = ab8500_charger_resources, | |
1008 | }, | |
1009 | { | |
1010 | .name = "ab8500-btemp", | |
1011 | .num_resources = ARRAY_SIZE(ab8500_btemp_resources), | |
1012 | .resources = ab8500_btemp_resources, | |
1013 | }, | |
1014 | { | |
1015 | .name = "ab8500-fg", | |
1016 | .num_resources = ARRAY_SIZE(ab8500_fg_resources), | |
1017 | .resources = ab8500_fg_resources, | |
1018 | }, | |
1019 | { | |
1020 | .name = "ab8500-chargalg", | |
1021 | .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), | |
1022 | .resources = ab8500_chargalg_resources, | |
1023 | }, | |
1024 | }; | |
1025 | ||
d6255529 LW |
1026 | static struct mfd_cell __devinitdata ab8500_devs[] = { |
1027 | { | |
1028 | .name = "ab8500-gpio", | |
1029 | .num_resources = ARRAY_SIZE(ab8500_gpio_resources), | |
1030 | .resources = ab8500_gpio_resources, | |
1031 | }, | |
1032 | { | |
1033 | .name = "ab8500-usb", | |
1034 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), | |
1035 | .resources = ab8500_usb_resources, | |
1036 | }, | |
44f72e53 VS |
1037 | { |
1038 | .name = "ab8500-codec", | |
1039 | }, | |
d6255529 LW |
1040 | }; |
1041 | ||
1042 | static struct mfd_cell __devinitdata ab9540_devs[] = { | |
1043 | { | |
1044 | .name = "ab8500-gpio", | |
1045 | .num_resources = ARRAY_SIZE(ab9540_gpio_resources), | |
1046 | .resources = ab9540_gpio_resources, | |
1047 | }, | |
1048 | { | |
1049 | .name = "ab9540-usb", | |
1050 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), | |
1051 | .resources = ab8500_usb_resources, | |
1052 | }, | |
44f72e53 VS |
1053 | { |
1054 | .name = "ab9540-codec", | |
1055 | }, | |
1056 | }; | |
1057 | ||
1058 | /* Device list common to ab9540 and ab8505 */ | |
1059 | static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = { | |
1060 | { | |
1061 | .name = "ab-iddet", | |
1062 | .num_resources = ARRAY_SIZE(ab8505_iddet_resources), | |
1063 | .resources = ab8505_iddet_resources, | |
1064 | }, | |
d6255529 LW |
1065 | }; |
1066 | ||
cca69b67 MW |
1067 | static ssize_t show_chip_id(struct device *dev, |
1068 | struct device_attribute *attr, char *buf) | |
1069 | { | |
1070 | struct ab8500 *ab8500; | |
1071 | ||
1072 | ab8500 = dev_get_drvdata(dev); | |
1073 | return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); | |
1074 | } | |
1075 | ||
e5c238c3 MW |
1076 | /* |
1077 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
1078 | * 0x01 Swoff bit programming | |
1079 | * 0x02 Thermal protection activation | |
1080 | * 0x04 Vbat lower then BattOk falling threshold | |
1081 | * 0x08 Watchdog expired | |
1082 | * 0x10 Non presence of 32kHz clock | |
1083 | * 0x20 Battery level lower than power on reset threshold | |
1084 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
1085 | * 0x80 DB8500 thermal shutdown | |
1086 | */ | |
1087 | static ssize_t show_switch_off_status(struct device *dev, | |
1088 | struct device_attribute *attr, char *buf) | |
1089 | { | |
1090 | int ret; | |
1091 | u8 value; | |
1092 | struct ab8500 *ab8500; | |
1093 | ||
1094 | ab8500 = dev_get_drvdata(dev); | |
1095 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
1096 | AB8500_SWITCH_OFF_STATUS, &value); | |
1097 | if (ret < 0) | |
1098 | return ret; | |
1099 | return sprintf(buf, "%#x\n", value); | |
1100 | } | |
1101 | ||
b4a31037 AL |
1102 | /* |
1103 | * ab8500 has turned on due to (TURN_ON_STATUS): | |
1104 | * 0x01 PORnVbat | |
1105 | * 0x02 PonKey1dbF | |
1106 | * 0x04 PonKey2dbF | |
1107 | * 0x08 RTCAlarm | |
1108 | * 0x10 MainChDet | |
1109 | * 0x20 VbusDet | |
1110 | * 0x40 UsbIDDetect | |
1111 | * 0x80 Reserved | |
1112 | */ | |
1113 | static ssize_t show_turn_on_status(struct device *dev, | |
1114 | struct device_attribute *attr, char *buf) | |
1115 | { | |
1116 | int ret; | |
1117 | u8 value; | |
1118 | struct ab8500 *ab8500; | |
1119 | ||
1120 | ab8500 = dev_get_drvdata(dev); | |
1121 | ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, | |
1122 | AB8500_TURN_ON_STATUS, &value); | |
1123 | if (ret < 0) | |
1124 | return ret; | |
1125 | return sprintf(buf, "%#x\n", value); | |
1126 | } | |
1127 | ||
d6255529 LW |
1128 | static ssize_t show_ab9540_dbbrstn(struct device *dev, |
1129 | struct device_attribute *attr, char *buf) | |
1130 | { | |
1131 | struct ab8500 *ab8500; | |
1132 | int ret; | |
1133 | u8 value; | |
1134 | ||
1135 | ab8500 = dev_get_drvdata(dev); | |
1136 | ||
1137 | ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, | |
1138 | AB9540_MODEM_CTRL2_REG, &value); | |
1139 | if (ret < 0) | |
1140 | return ret; | |
1141 | ||
1142 | return sprintf(buf, "%d\n", | |
1143 | (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); | |
1144 | } | |
1145 | ||
1146 | static ssize_t store_ab9540_dbbrstn(struct device *dev, | |
1147 | struct device_attribute *attr, const char *buf, size_t count) | |
1148 | { | |
1149 | struct ab8500 *ab8500; | |
1150 | int ret = count; | |
1151 | int err; | |
1152 | u8 bitvalues; | |
1153 | ||
1154 | ab8500 = dev_get_drvdata(dev); | |
1155 | ||
1156 | if (count > 0) { | |
1157 | switch (buf[0]) { | |
1158 | case '0': | |
1159 | bitvalues = 0; | |
1160 | break; | |
1161 | case '1': | |
1162 | bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; | |
1163 | break; | |
1164 | default: | |
1165 | goto exit; | |
1166 | } | |
1167 | ||
1168 | err = mask_and_set_register_interruptible(ab8500, | |
1169 | AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, | |
1170 | AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); | |
1171 | if (err) | |
1172 | dev_info(ab8500->dev, | |
1173 | "Failed to set DBBRSTN %c, err %#x\n", | |
1174 | buf[0], err); | |
1175 | } | |
1176 | ||
1177 | exit: | |
1178 | return ret; | |
1179 | } | |
1180 | ||
cca69b67 | 1181 | static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); |
e5c238c3 | 1182 | static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); |
b4a31037 | 1183 | static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); |
d6255529 LW |
1184 | static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, |
1185 | show_ab9540_dbbrstn, store_ab9540_dbbrstn); | |
cca69b67 MW |
1186 | |
1187 | static struct attribute *ab8500_sysfs_entries[] = { | |
1188 | &dev_attr_chip_id.attr, | |
e5c238c3 | 1189 | &dev_attr_switch_off_status.attr, |
b4a31037 | 1190 | &dev_attr_turn_on_status.attr, |
cca69b67 MW |
1191 | NULL, |
1192 | }; | |
1193 | ||
d6255529 LW |
1194 | static struct attribute *ab9540_sysfs_entries[] = { |
1195 | &dev_attr_chip_id.attr, | |
1196 | &dev_attr_switch_off_status.attr, | |
1197 | &dev_attr_turn_on_status.attr, | |
1198 | &dev_attr_dbbrstn.attr, | |
1199 | NULL, | |
1200 | }; | |
1201 | ||
cca69b67 MW |
1202 | static struct attribute_group ab8500_attr_group = { |
1203 | .attrs = ab8500_sysfs_entries, | |
1204 | }; | |
1205 | ||
d6255529 LW |
1206 | static struct attribute_group ab9540_attr_group = { |
1207 | .attrs = ab9540_sysfs_entries, | |
1208 | }; | |
1209 | ||
6bc4a568 LJ |
1210 | static const struct of_device_id ab8500_match[] = { |
1211 | { | |
1212 | .compatible = "stericsson,ab8500", | |
1213 | .data = (void *)AB8500_VERSION_AB8500, | |
1214 | }, | |
1215 | {}, | |
1216 | }; | |
1217 | ||
d28f1db8 | 1218 | static int __devinit ab8500_probe(struct platform_device *pdev) |
62579266 | 1219 | { |
d28f1db8 LJ |
1220 | struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); |
1221 | const struct platform_device_id *platid = platform_get_device_id(pdev); | |
6bc4a568 LJ |
1222 | enum ab8500_version version = AB8500_VERSION_UNDEFINED; |
1223 | struct device_node *np = pdev->dev.of_node; | |
d28f1db8 LJ |
1224 | struct ab8500 *ab8500; |
1225 | struct resource *resource; | |
62579266 RV |
1226 | int ret; |
1227 | int i; | |
47c16975 | 1228 | u8 value; |
62579266 | 1229 | |
d28f1db8 LJ |
1230 | ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL); |
1231 | if (!ab8500) | |
1232 | return -ENOMEM; | |
1233 | ||
62579266 RV |
1234 | if (plat) |
1235 | ab8500->irq_base = plat->irq_base; | |
6bc4a568 LJ |
1236 | else if (np) |
1237 | ret = of_property_read_u32(np, "stericsson,irq-base", &ab8500->irq_base); | |
1238 | ||
1239 | if (!ab8500->irq_base) { | |
1240 | dev_info(&pdev->dev, "couldn't find irq-base\n"); | |
1241 | ret = -EINVAL; | |
1242 | goto out_free_ab8500; | |
1243 | } | |
62579266 | 1244 | |
d28f1db8 LJ |
1245 | ab8500->dev = &pdev->dev; |
1246 | ||
1247 | resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1248 | if (!resource) { | |
1249 | ret = -ENODEV; | |
1250 | goto out_free_ab8500; | |
1251 | } | |
1252 | ||
1253 | ab8500->irq = resource->start; | |
1254 | ||
1255 | ab8500->read = ab8500_i2c_read; | |
1256 | ab8500->write = ab8500_i2c_write; | |
1257 | ab8500->write_masked = ab8500_i2c_write_masked; | |
1258 | ||
62579266 RV |
1259 | mutex_init(&ab8500->lock); |
1260 | mutex_init(&ab8500->irq_lock); | |
112a80d2 | 1261 | atomic_set(&ab8500->transfer_ongoing, 0); |
62579266 | 1262 | |
d28f1db8 LJ |
1263 | platform_set_drvdata(pdev, ab8500); |
1264 | ||
6bc4a568 LJ |
1265 | if (platid) |
1266 | version = platid->driver_data; | |
1267 | else if (np) | |
1268 | version = (unsigned int) | |
1269 | of_match_device(ab8500_match, &pdev->dev)->data; | |
1270 | ||
0f620837 LW |
1271 | if (version != AB8500_VERSION_UNDEFINED) |
1272 | ab8500->version = version; | |
1273 | else { | |
1274 | ret = get_register_interruptible(ab8500, AB8500_MISC, | |
1275 | AB8500_IC_NAME_REG, &value); | |
1276 | if (ret < 0) | |
d28f1db8 | 1277 | goto out_free_ab8500; |
0f620837 LW |
1278 | |
1279 | ab8500->version = value; | |
1280 | } | |
1281 | ||
47c16975 MW |
1282 | ret = get_register_interruptible(ab8500, AB8500_MISC, |
1283 | AB8500_REV_REG, &value); | |
62579266 | 1284 | if (ret < 0) |
d28f1db8 | 1285 | goto out_free_ab8500; |
62579266 | 1286 | |
47c16975 | 1287 | ab8500->chip_id = value; |
62579266 | 1288 | |
0f620837 LW |
1289 | dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", |
1290 | ab8500_version_str[ab8500->version], | |
1291 | ab8500->chip_id >> 4, | |
1292 | ab8500->chip_id & 0x0F); | |
1293 | ||
d6255529 | 1294 | /* Configure AB8500 or AB9540 IRQ */ |
a982362c | 1295 | if (is_ab9540(ab8500) || is_ab8505(ab8500)) { |
d6255529 LW |
1296 | ab8500->mask_size = AB9540_NUM_IRQ_REGS; |
1297 | ab8500->irq_reg_offset = ab9540_irq_regoffset; | |
1298 | } else { | |
1299 | ab8500->mask_size = AB8500_NUM_IRQ_REGS; | |
1300 | ab8500->irq_reg_offset = ab8500_irq_regoffset; | |
1301 | } | |
2ced445e LW |
1302 | ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL); |
1303 | if (!ab8500->mask) | |
1304 | return -ENOMEM; | |
1305 | ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL); | |
1306 | if (!ab8500->oldmask) { | |
1307 | ret = -ENOMEM; | |
1308 | goto out_freemask; | |
1309 | } | |
e5c238c3 MW |
1310 | /* |
1311 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
1312 | * 0x01 Swoff bit programming | |
1313 | * 0x02 Thermal protection activation | |
1314 | * 0x04 Vbat lower then BattOk falling threshold | |
1315 | * 0x08 Watchdog expired | |
1316 | * 0x10 Non presence of 32kHz clock | |
1317 | * 0x20 Battery level lower than power on reset threshold | |
1318 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
1319 | * 0x80 DB8500 thermal shutdown | |
1320 | */ | |
1321 | ||
1322 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
1323 | AB8500_SWITCH_OFF_STATUS, &value); | |
1324 | if (ret < 0) | |
1325 | return ret; | |
1326 | dev_info(ab8500->dev, "switch off status: %#x", value); | |
1327 | ||
62579266 RV |
1328 | if (plat && plat->init) |
1329 | plat->init(ab8500); | |
1330 | ||
1331 | /* Clear and mask all interrupts */ | |
2ced445e | 1332 | for (i = 0; i < ab8500->mask_size; i++) { |
0f620837 LW |
1333 | /* |
1334 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
1335 | * 2.0 | |
1336 | */ | |
1337 | if (ab8500->irq_reg_offset[i] == 11 && | |
1338 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 | 1339 | continue; |
62579266 | 1340 | |
47c16975 | 1341 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1342 | AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], |
92d50a41 | 1343 | &value); |
47c16975 | 1344 | set_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1345 | AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); |
62579266 RV |
1346 | } |
1347 | ||
47c16975 MW |
1348 | ret = abx500_register_ops(ab8500->dev, &ab8500_ops); |
1349 | if (ret) | |
2ced445e | 1350 | goto out_freeoldmask; |
47c16975 | 1351 | |
2ced445e | 1352 | for (i = 0; i < ab8500->mask_size; i++) |
62579266 RV |
1353 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; |
1354 | ||
1355 | if (ab8500->irq_base) { | |
1356 | ret = ab8500_irq_init(ab8500); | |
1357 | if (ret) | |
2ced445e | 1358 | goto out_freeoldmask; |
62579266 | 1359 | |
7ccfe9b1 MJ |
1360 | /* Activate this feature only in ab9540 */ |
1361 | /* till tests are done on ab8500 1p2 or later*/ | |
1362 | if (is_ab9540(ab8500)) | |
1363 | ret = request_threaded_irq(ab8500->irq, NULL, | |
1364 | ab8500_hierarchical_irq, | |
1365 | IRQF_ONESHOT | IRQF_NO_SUSPEND, | |
1366 | "ab8500", ab8500); | |
1367 | else | |
1368 | ret = request_threaded_irq(ab8500->irq, NULL, | |
1369 | ab8500_irq, | |
1370 | IRQF_ONESHOT | IRQF_NO_SUSPEND, | |
1371 | "ab8500", ab8500); | |
62579266 RV |
1372 | if (ret) |
1373 | goto out_removeirq; | |
1374 | } | |
1375 | ||
6bc4a568 LJ |
1376 | if (!np) { |
1377 | ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, | |
1378 | ARRAY_SIZE(abx500_common_devs), NULL, | |
1379 | ab8500->irq_base); | |
d6255529 | 1380 | |
6bc4a568 LJ |
1381 | if (ret) |
1382 | goto out_freeirq; | |
44f72e53 | 1383 | |
6bc4a568 LJ |
1384 | if (is_ab9540(ab8500)) |
1385 | ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, | |
1386 | ARRAY_SIZE(ab9540_devs), NULL, | |
1387 | ab8500->irq_base); | |
1388 | else | |
1389 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, | |
1390 | ARRAY_SIZE(ab8500_devs), NULL, | |
1391 | ab8500->irq_base); | |
1392 | if (ret) | |
1393 | goto out_freeirq; | |
44f72e53 | 1394 | |
6bc4a568 LJ |
1395 | if (is_ab9540(ab8500) || is_ab8505(ab8500)) |
1396 | ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, | |
1397 | ARRAY_SIZE(ab9540_ab8505_devs), NULL, | |
1398 | ab8500->irq_base); | |
1399 | if (ret) | |
1400 | goto out_freeirq; | |
1401 | } | |
62579266 | 1402 | |
6ef9418c RA |
1403 | if (!no_bm) { |
1404 | /* Add battery management devices */ | |
1405 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, | |
1406 | ARRAY_SIZE(ab8500_bm_devs), NULL, | |
1407 | ab8500->irq_base); | |
1408 | if (ret) | |
1409 | dev_err(ab8500->dev, "error adding bm devices\n"); | |
1410 | } | |
1411 | ||
d6255529 LW |
1412 | if (is_ab9540(ab8500)) |
1413 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1414 | &ab9540_attr_group); | |
1415 | else | |
1416 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1417 | &ab8500_attr_group); | |
cca69b67 MW |
1418 | if (ret) |
1419 | dev_err(ab8500->dev, "error creating sysfs entries\n"); | |
d6255529 LW |
1420 | else |
1421 | return ret; | |
62579266 RV |
1422 | |
1423 | out_freeirq: | |
6d95b7fd | 1424 | if (ab8500->irq_base) |
62579266 RV |
1425 | free_irq(ab8500->irq, ab8500); |
1426 | out_removeirq: | |
6d95b7fd | 1427 | if (ab8500->irq_base) |
62579266 | 1428 | ab8500_irq_remove(ab8500); |
2ced445e LW |
1429 | out_freeoldmask: |
1430 | kfree(ab8500->oldmask); | |
1431 | out_freemask: | |
1432 | kfree(ab8500->mask); | |
d28f1db8 LJ |
1433 | out_free_ab8500: |
1434 | kfree(ab8500); | |
6d95b7fd | 1435 | |
62579266 RV |
1436 | return ret; |
1437 | } | |
1438 | ||
d28f1db8 | 1439 | static int __devexit ab8500_remove(struct platform_device *pdev) |
62579266 | 1440 | { |
d28f1db8 LJ |
1441 | struct ab8500 *ab8500 = platform_get_drvdata(pdev); |
1442 | ||
d6255529 LW |
1443 | if (is_ab9540(ab8500)) |
1444 | sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); | |
1445 | else | |
1446 | sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); | |
62579266 RV |
1447 | mfd_remove_devices(ab8500->dev); |
1448 | if (ab8500->irq_base) { | |
1449 | free_irq(ab8500->irq, ab8500); | |
1450 | ab8500_irq_remove(ab8500); | |
1451 | } | |
2ced445e LW |
1452 | kfree(ab8500->oldmask); |
1453 | kfree(ab8500->mask); | |
d28f1db8 | 1454 | kfree(ab8500); |
62579266 RV |
1455 | |
1456 | return 0; | |
1457 | } | |
1458 | ||
d28f1db8 LJ |
1459 | static const struct platform_device_id ab8500_id[] = { |
1460 | { "ab8500-core", AB8500_VERSION_AB8500 }, | |
1461 | { "ab8505-i2c", AB8500_VERSION_AB8505 }, | |
1462 | { "ab9540-i2c", AB8500_VERSION_AB9540 }, | |
1463 | { "ab8540-i2c", AB8500_VERSION_AB8540 }, | |
1464 | { } | |
1465 | }; | |
1466 | ||
1467 | static struct platform_driver ab8500_core_driver = { | |
1468 | .driver = { | |
1469 | .name = "ab8500-core", | |
1470 | .owner = THIS_MODULE, | |
6bc4a568 | 1471 | .of_match_table = ab8500_match, |
d28f1db8 LJ |
1472 | }, |
1473 | .probe = ab8500_probe, | |
1474 | .remove = __devexit_p(ab8500_remove), | |
1475 | .id_table = ab8500_id, | |
1476 | }; | |
1477 | ||
1478 | static int __init ab8500_core_init(void) | |
1479 | { | |
1480 | return platform_driver_register(&ab8500_core_driver); | |
1481 | } | |
1482 | ||
1483 | static void __exit ab8500_core_exit(void) | |
1484 | { | |
1485 | platform_driver_unregister(&ab8500_core_driver); | |
1486 | } | |
1487 | arch_initcall(ab8500_core_init); | |
1488 | module_exit(ab8500_core_exit); | |
1489 | ||
adceed62 | 1490 | MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); |
62579266 RV |
1491 | MODULE_DESCRIPTION("AB8500 MFD core"); |
1492 | MODULE_LICENSE("GPL v2"); |