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mfd: ab8500: ensure new AB8500 pinctrl driver is probed correctly
[deliverable/linux.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
00441b5e 22#include <linux/mfd/abx500/ab8500-bm.h>
d28f1db8 23#include <linux/mfd/dbx500-prcmu.h>
549931f9 24#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 25#include <linux/of.h>
26#include <linux/of_device.h>
62579266
RV		 27
28/*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
47c16975
MW		 32#define AB8500_IT_SOURCE1_REG 0x00
33#define AB8500_IT_SOURCE2_REG 0x01
34#define AB8500_IT_SOURCE3_REG 0x02
35#define AB8500_IT_SOURCE4_REG 0x03
36#define AB8500_IT_SOURCE5_REG 0x04
37#define AB8500_IT_SOURCE6_REG 0x05
38#define AB8500_IT_SOURCE7_REG 0x06
39#define AB8500_IT_SOURCE8_REG 0x07
d6255529 40#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 41#define AB8500_IT_SOURCE19_REG 0x12
42#define AB8500_IT_SOURCE20_REG 0x13
43#define AB8500_IT_SOURCE21_REG 0x14
44#define AB8500_IT_SOURCE22_REG 0x15
45#define AB8500_IT_SOURCE23_REG 0x16
46#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 47
48/*
49 * latch registers
50 */
47c16975
MW		 51#define AB8500_IT_LATCH1_REG 0x20
52#define AB8500_IT_LATCH2_REG 0x21
53#define AB8500_IT_LATCH3_REG 0x22
54#define AB8500_IT_LATCH4_REG 0x23
55#define AB8500_IT_LATCH5_REG 0x24
56#define AB8500_IT_LATCH6_REG 0x25
57#define AB8500_IT_LATCH7_REG 0x26
58#define AB8500_IT_LATCH8_REG 0x27
59#define AB8500_IT_LATCH9_REG 0x28
60#define AB8500_IT_LATCH10_REG 0x29
92d50a41 61#define AB8500_IT_LATCH12_REG 0x2B
d6255529 62#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 63#define AB8500_IT_LATCH19_REG 0x32
64#define AB8500_IT_LATCH20_REG 0x33
65#define AB8500_IT_LATCH21_REG 0x34
66#define AB8500_IT_LATCH22_REG 0x35
67#define AB8500_IT_LATCH23_REG 0x36
68#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 69
70/*
71 * mask registers
72 */
73
47c16975
MW		 74#define AB8500_IT_MASK1_REG 0x40
75#define AB8500_IT_MASK2_REG 0x41
76#define AB8500_IT_MASK3_REG 0x42
77#define AB8500_IT_MASK4_REG 0x43
78#define AB8500_IT_MASK5_REG 0x44
79#define AB8500_IT_MASK6_REG 0x45
80#define AB8500_IT_MASK7_REG 0x46
81#define AB8500_IT_MASK8_REG 0x47
82#define AB8500_IT_MASK9_REG 0x48
83#define AB8500_IT_MASK10_REG 0x49
84#define AB8500_IT_MASK11_REG 0x4A
85#define AB8500_IT_MASK12_REG 0x4B
86#define AB8500_IT_MASK13_REG 0x4C
87#define AB8500_IT_MASK14_REG 0x4D
88#define AB8500_IT_MASK15_REG 0x4E
89#define AB8500_IT_MASK16_REG 0x4F
90#define AB8500_IT_MASK17_REG 0x50
91#define AB8500_IT_MASK18_REG 0x51
92#define AB8500_IT_MASK19_REG 0x52
93#define AB8500_IT_MASK20_REG 0x53
94#define AB8500_IT_MASK21_REG 0x54
95#define AB8500_IT_MASK22_REG 0x55
96#define AB8500_IT_MASK23_REG 0x56
97#define AB8500_IT_MASK24_REG 0x57
98
7ccfe9b1
MJ		 99/*
100 * latch hierarchy registers
101 */
102#define AB8500_IT_LATCHHIER1_REG 0x60
103#define AB8500_IT_LATCHHIER2_REG 0x61
104#define AB8500_IT_LATCHHIER3_REG 0x62
105
106#define AB8500_IT_LATCHHIER_NUM 3
107
47c16975 108#define AB8500_REV_REG 0x80
0f620837 109#define AB8500_IC_NAME_REG 0x82
e5c238c3 110#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 111
b4a31037
AL		 112#define AB8500_TURN_ON_STATUS 0x00
113
6ef9418c
RA		 114static bool no_bm; /* No battery management */
115module_param(no_bm, bool, S_IRUGO);
116
d6255529
LW		 117#define AB9540_MODEM_CTRL2_REG 0x23
118#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
119
62579266
RV		 120/*
121 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 122 * numbers are indexed into this array with (num / 8). The interupts are
123 * defined in linux/mfd/ab8500.h
62579266
RV		 124 *
125 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
126 * offset 0.
127 */
2ced445e 128/* AB8500 support */
62579266 129static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 130 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 131};
132
d6255529
LW		 133/* AB9540 support */
134static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
135 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24,
136};
137
0f620837
LW		 138static const char ab8500_version_str[][7] = {
139 [AB8500_VERSION_AB8500] = "AB8500",
140 [AB8500_VERSION_AB8505] = "AB8505",
141 [AB8500_VERSION_AB9540] = "AB9540",
142 [AB8500_VERSION_AB8540] = "AB8540",
143};
144
822672a7 145static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 146{
147 int ret;
148
149 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
150 if (ret < 0)
151 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
152 return ret;
153}
154
822672a7 155static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 156 u8 data)
157{
158 int ret;
159
160 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
161 &mask, 1);
162 if (ret < 0)
163 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
164 return ret;
165}
166
822672a7 167static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 168{
169 int ret;
170 u8 data;
171
172 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
173 if (ret < 0) {
174 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
175 return ret;
176 }
177 return (int)data;
178}
179
47c16975
MW		 180static int ab8500_get_chip_id(struct device *dev)
181{
6bce7bf1
MW		 182 struct ab8500 *ab8500;
183
184 if (!dev)
185 return -EINVAL;
186 ab8500 = dev_get_drvdata(dev->parent);
187 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 188}
189
190static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
191 u8 reg, u8 data)
62579266
RV		 192{
193 int ret;
47c16975
MW		 194 /*
195 * Put the u8 bank and u8 register together into a an u16.
196 * The bank on higher 8 bits and register in lower 8 bits.
197 * */
198 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 199
200 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
201
392cbd1e 202 mutex_lock(&ab8500->lock);
47c16975 203
62579266
RV		 204 ret = ab8500->write(ab8500, addr, data);
205 if (ret < 0)
206 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
207 addr, ret);
47c16975 208 mutex_unlock(&ab8500->lock);
62579266
RV		 209
210 return ret;
211}
212
47c16975
MW		 213static int ab8500_set_register(struct device *dev, u8 bank,
214 u8 reg, u8 value)
62579266 215{
112a80d2 216 int ret;
47c16975 217 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 218
112a80d2
JA		 219 atomic_inc(&ab8500->transfer_ongoing);
220 ret = set_register_interruptible(ab8500, bank, reg, value);
221 atomic_dec(&ab8500->transfer_ongoing);
222 return ret;
62579266 223}
62579266 224
47c16975
MW		 225static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
226 u8 reg, u8 *value)
62579266
RV		 227{
228 int ret;
47c16975
MW		 229 /* put the u8 bank and u8 reg together into a an u16.
230 * bank on higher 8 bits and reg in lower */
231 u16 addr = ((u16)bank) << 8 | reg;
232
392cbd1e 233 mutex_lock(&ab8500->lock);
62579266
RV		 234
235 ret = ab8500->read(ab8500, addr);
236 if (ret < 0)
237 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
238 addr, ret);
47c16975
MW		 239 else
240 *value = ret;
62579266 241
47c16975 242 mutex_unlock(&ab8500->lock);
62579266
RV		 243 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
244
245 return ret;
246}
247
47c16975
MW		 248static int ab8500_get_register(struct device *dev, u8 bank,
249 u8 reg, u8 *value)
62579266 250{
112a80d2 251 int ret;
47c16975 252 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 253
112a80d2
JA		 254 atomic_inc(&ab8500->transfer_ongoing);
255 ret = get_register_interruptible(ab8500, bank, reg, value);
256 atomic_dec(&ab8500->transfer_ongoing);
257 return ret;
62579266 258}
47c16975
MW		 259
260static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
261 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 262{
263 int ret;
47c16975
MW		 264 /* put the u8 bank and u8 reg together into a an u16.
265 * bank on higher 8 bits and reg in lower */
266 u16 addr = ((u16)bank) << 8 | reg;
62579266 267
392cbd1e 268 mutex_lock(&ab8500->lock);
62579266 269
bc628fd1
MN		 270 if (ab8500->write_masked == NULL) {
271 u8 data;
62579266 272
bc628fd1
MN		 273 ret = ab8500->read(ab8500, addr);
274 if (ret < 0) {
275 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
276 addr, ret);
277 goto out;
278 }
62579266 279
bc628fd1
MN		 280 data = (u8)ret;
281 data = (~bitmask & data) | (bitmask & bitvalues);
282
283 ret = ab8500->write(ab8500, addr, data);
284 if (ret < 0)
285 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
286 addr, ret);
62579266 287
bc628fd1
MN		 288 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
289 data);
290 goto out;
291 }
292 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
293 if (ret < 0)
294 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
295 ret);
62579266
RV		 296out:
297 mutex_unlock(&ab8500->lock);
298 return ret;
299}
47c16975
MW		 300
301static int ab8500_mask_and_set_register(struct device *dev,
302 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
303{
112a80d2 304 int ret;
47c16975
MW		 305 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
306
112a80d2
JA		 307 atomic_inc(&ab8500->transfer_ongoing);
308 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
309 bitmask, bitvalues);
310 atomic_dec(&ab8500->transfer_ongoing);
311 return ret;
47c16975
MW		 312}
313
314static struct abx500_ops ab8500_ops = {
315 .get_chip_id = ab8500_get_chip_id,
316 .get_register = ab8500_get_register,
317 .set_register = ab8500_set_register,
318 .get_register_page = NULL,
319 .set_register_page = NULL,
320 .mask_and_set_register = ab8500_mask_and_set_register,
321 .event_registers_startup_state_get = NULL,
322 .startup_irq_enabled = NULL,
323};
62579266 324
9505a0a0 325static void ab8500_irq_lock(struct irq_data *data)
62579266 326{
9505a0a0 327 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 328
329 mutex_lock(&ab8500->irq_lock);
112a80d2 330 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 331}
332
9505a0a0 333static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 334{
9505a0a0 335 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 336 int i;
337
2ced445e 338 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 339 u8 old = ab8500->oldmask[i];
340 u8 new = ab8500->mask[i];
341 int reg;
342
343 if (new == old)
344 continue;
345
0f620837
LW		 346 /*
347 * Interrupt register 12 doesn't exist prior to AB8500 version
348 * 2.0
349 */
350 if (ab8500->irq_reg_offset[i] == 11 &&
351 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 352 continue;
353
62579266
RV		 354 ab8500->oldmask[i] = new;
355
2ced445e 356 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 357 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 358 }
112a80d2 359 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 360 mutex_unlock(&ab8500->irq_lock);
361}
362
9505a0a0 363static void ab8500_irq_mask(struct irq_data *data)
62579266 364{
9505a0a0 365 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 366 int offset = data->hwirq;
62579266
RV		 367 int index = offset / 8;
368 int mask = 1 << (offset % 8);
369
370 ab8500->mask[index] |= mask;
9c677b9b
LJ		 371
372 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
373 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
374 ab8500->mask[index + 2] |= mask;
375 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
376 ab8500->mask[index + 1] |= mask;
377 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 378 /* Here the falling IRQ is one bit lower */
379 ab8500->mask[index] |= (mask << 1);
62579266
RV		 380}
381
9505a0a0 382static void ab8500_irq_unmask(struct irq_data *data)
62579266 383{
9505a0a0 384 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 385 unsigned int type = irqd_get_trigger_type(data);
06e589ef 386 int offset = data->hwirq;
62579266
RV		 387 int index = offset / 8;
388 int mask = 1 << (offset % 8);
389
9c677b9b
LJ		 390 if (type & IRQ_TYPE_EDGE_RISING)
391 ab8500->mask[index] &= ~mask;
392
393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
394 if (type & IRQ_TYPE_EDGE_FALLING) {
395 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
396 ab8500->mask[index + 2] &= ~mask;
397 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
398 ab8500->mask[index + 1] &= ~mask;
399 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 400 /* Here the falling IRQ is one bit lower */
401 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ		 402 else
403 ab8500->mask[index] &= ~mask;
e2ddf46a 404 } else {
9c677b9b
LJ		 405 /* Satisfies the case where type is not set. */
406 ab8500->mask[index] &= ~mask;
e2ddf46a 407 }
62579266
RV		 408}
409
40f6e5a2
LJ		 410static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
411{
412 return 0;
413}
414
62579266
RV		 415static struct irq_chip ab8500_irq_chip = {
416 .name = "ab8500",
9505a0a0
MB		 417 .irq_bus_lock = ab8500_irq_lock,
418 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
419 .irq_mask = ab8500_irq_mask,
e6f9306e 420 .irq_disable = ab8500_irq_mask,
9505a0a0 421 .irq_unmask = ab8500_irq_unmask,
40f6e5a2 422 .irq_set_type = ab8500_irq_set_type,
62579266
RV		 423};
424
7ccfe9b1
MJ		 425static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
426 int latch_offset, u8 latch_val)
427{
428 int int_bit = __ffs(latch_val);
429 int line, i;
430
431 do {
432 int_bit = __ffs(latch_val);
433
434 for (i = 0; i < ab8500->mask_size; i++)
435 if (ab8500->irq_reg_offset[i] == latch_offset)
436 break;
437
438 if (i >= ab8500->mask_size) {
439 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
440 latch_offset);
441 return -ENXIO;
442 }
443
444 line = (i << 3) + int_bit;
445 latch_val &= ~(1 << int_bit);
446
e2ddf46a
LW		 447 /*
448 * This handles the falling edge hwirqs from the GPIO
449 * lines. Route them back to the line registered for the
450 * rising IRQ, as this is merely a flag for the same IRQ
451 * in linux terms.
452 */
453 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
454 line -= 16;
455 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
456 line -= 8;
457 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
458 line += 1;
459
7ccfe9b1
MJ		 460 handle_nested_irq(ab8500->irq_base + line);
461 } while (latch_val);
462
463 return 0;
464}
465
466static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
467 int hier_offset, u8 hier_val)
468{
469 int latch_bit, status;
470 u8 latch_offset, latch_val;
471
472 do {
473 latch_bit = __ffs(hier_val);
474 latch_offset = (hier_offset << 3) + latch_bit;
475
476 /* Fix inconsistent ITFromLatch25 bit mapping... */
477 if (unlikely(latch_offset == 17))
478 latch_offset = 24;
479
480 status = get_register_interruptible(ab8500,
481 AB8500_INTERRUPT,
482 AB8500_IT_LATCH1_REG + latch_offset,
483 &latch_val);
484 if (status < 0 || latch_val == 0)
485 goto discard;
486
487 status = ab8500_handle_hierarchical_line(ab8500,
488 latch_offset, latch_val);
489 if (status < 0)
490 return status;
491discard:
492 hier_val &= ~(1 << latch_bit);
493 } while (hier_val);
494
495 return 0;
496}
497
498static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
499{
500 struct ab8500 *ab8500 = dev;
501 u8 i;
502
503 dev_vdbg(ab8500->dev, "interrupt\n");
504
505 /* Hierarchical interrupt version */
506 for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) {
507 int status;
508 u8 hier_val;
509
510 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
511 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
512 if (status < 0 || hier_val == 0)
513 continue;
514
515 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
516 if (status < 0)
517 break;
518 }
519 return IRQ_HANDLED;
520}
521
80633f05
LJ		 522/**
523 * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
524 *
525 * @ab8500: ab8500_irq controller to operate on.
526 * @irq: index of the interrupt requested in the chip IRQs
527 *
528 * Useful for drivers to request their own IRQs.
529 */
530static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq)
531{
532 if (!ab8500)
533 return -EINVAL;
534
535 return irq_create_mapping(ab8500->domain, irq);
536}
537
62579266
RV		 538static irqreturn_t ab8500_irq(int irq, void *dev)
539{
540 struct ab8500 *ab8500 = dev;
541 int i;
542
543 dev_vdbg(ab8500->dev, "interrupt\n");
544
112a80d2
JA		 545 atomic_inc(&ab8500->transfer_ongoing);
546
2ced445e
LW		 547 for (i = 0; i < ab8500->mask_size; i++) {
548 int regoffset = ab8500->irq_reg_offset[i];
62579266 549 int status;
47c16975 550 u8 value;
62579266 551
0f620837
LW		 552 /*
553 * Interrupt register 12 doesn't exist prior to AB8500 version
554 * 2.0
555 */
556 if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 557 continue;
558
47c16975
MW		 559 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
560 AB8500_IT_LATCH1_REG + regoffset, &value);
561 if (status < 0 || value == 0)
62579266
RV		 562 continue;
563
564 do {
88aec4f7 565 int bit = __ffs(value);
62579266 566 int line = i * 8 + bit;
0a37fc56 567 int virq = ab8500_irq_get_virq(ab8500, line);
62579266 568
0a37fc56 569 handle_nested_irq(virq);
47c16975 570 value &= ~(1 << bit);
112a80d2 571
47c16975 572 } while (value);
62579266 573 }
112a80d2 574 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 575 return IRQ_HANDLED;
576}
577
06e589ef
LJ		 578static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
579 irq_hw_number_t hwirq)
580{
581 struct ab8500 *ab8500 = d->host_data;
582
583 if (!ab8500)
584 return -EINVAL;
585
586 irq_set_chip_data(virq, ab8500);
587 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
588 handle_simple_irq);
589 irq_set_nested_thread(virq, 1);
62579266 590#ifdef CONFIG_ARM
06e589ef 591 set_irq_flags(virq, IRQF_VALID);
62579266 592#else
06e589ef 593 irq_set_noprobe(virq);
62579266 594#endif
62579266
RV		 595
596 return 0;
597}
598
06e589ef
LJ		 599static struct irq_domain_ops ab8500_irq_ops = {
600 .map = ab8500_irq_map,
601 .xlate = irq_domain_xlate_twocell,
602};
603
604static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 605{
2ced445e
LW		 606 int num_irqs;
607
d6255529
LW		 608 if (is_ab9540(ab8500))
609 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 610 else if (is_ab8505(ab8500))
611 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 612 else
613 num_irqs = AB8500_NR_IRQS;
62579266 614
f1d11f39
LW		 615 /* If ->irq_base is zero this will give a linear mapping */
616 ab8500->domain = irq_domain_add_simple(NULL,
617 num_irqs, ab8500->irq_base,
618 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 619
620 if (!ab8500->domain) {
621 dev_err(ab8500->dev, "Failed to create irqdomain\n");
622 return -ENOSYS;
623 }
624
625 return 0;
62579266
RV		 626}
627
112a80d2
JA		 628int ab8500_suspend(struct ab8500 *ab8500)
629{
630 if (atomic_read(&ab8500->transfer_ongoing))
631 return -EINVAL;
632 else
633 return 0;
634}
635
a9e9ce4c 636static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 637 {
638 .name = "HW_CONV_END",
639 .start = AB8500_INT_GP_HW_ADC_CONV_END,
640 .end = AB8500_INT_GP_HW_ADC_CONV_END,
641 .flags = IORESOURCE_IRQ,
642 },
643 {
644 .name = "SW_CONV_END",
645 .start = AB8500_INT_GP_SW_ADC_CONV_END,
646 .end = AB8500_INT_GP_SW_ADC_CONV_END,
647 .flags = IORESOURCE_IRQ,
648 },
649};
650
a9e9ce4c 651static struct resource ab8500_rtc_resources[] = {
62579266
RV		 652 {
653 .name = "60S",
654 .start = AB8500_INT_RTC_60S,
655 .end = AB8500_INT_RTC_60S,
656 .flags = IORESOURCE_IRQ,
657 },
658 {
659 .name = "ALARM",
660 .start = AB8500_INT_RTC_ALARM,
661 .end = AB8500_INT_RTC_ALARM,
662 .flags = IORESOURCE_IRQ,
663 },
664};
665
a9e9ce4c 666static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 667 {
668 .name = "ONKEY_DBF",
669 .start = AB8500_INT_PON_KEY1DB_F,
670 .end = AB8500_INT_PON_KEY1DB_F,
671 .flags = IORESOURCE_IRQ,
672 },
673 {
674 .name = "ONKEY_DBR",
675 .start = AB8500_INT_PON_KEY1DB_R,
676 .end = AB8500_INT_PON_KEY1DB_R,
677 .flags = IORESOURCE_IRQ,
678 },
679};
680
a9e9ce4c 681static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 682 {
6af75ecd
LW		 683 .name = "ACC_DETECT_1DB_F",
684 .start = AB8500_INT_ACC_DETECT_1DB_F,
685 .end = AB8500_INT_ACC_DETECT_1DB_F,
686 .flags = IORESOURCE_IRQ,
e098aded
MW		 687 },
688 {
6af75ecd
LW		 689 .name = "ACC_DETECT_1DB_R",
690 .start = AB8500_INT_ACC_DETECT_1DB_R,
691 .end = AB8500_INT_ACC_DETECT_1DB_R,
692 .flags = IORESOURCE_IRQ,
693 },
694 {
695 .name = "ACC_DETECT_21DB_F",
696 .start = AB8500_INT_ACC_DETECT_21DB_F,
697 .end = AB8500_INT_ACC_DETECT_21DB_F,
698 .flags = IORESOURCE_IRQ,
699 },
700 {
701 .name = "ACC_DETECT_21DB_R",
702 .start = AB8500_INT_ACC_DETECT_21DB_R,
703 .end = AB8500_INT_ACC_DETECT_21DB_R,
704 .flags = IORESOURCE_IRQ,
705 },
706 {
707 .name = "ACC_DETECT_22DB_F",
708 .start = AB8500_INT_ACC_DETECT_22DB_F,
709 .end = AB8500_INT_ACC_DETECT_22DB_F,
710 .flags = IORESOURCE_IRQ,
e098aded 711 },
6af75ecd
LW		 712 {
713 .name = "ACC_DETECT_22DB_R",
714 .start = AB8500_INT_ACC_DETECT_22DB_R,
715 .end = AB8500_INT_ACC_DETECT_22DB_R,
716 .flags = IORESOURCE_IRQ,
717 },
718};
719
a9e9ce4c 720static struct resource ab8500_charger_resources[] = {
e098aded
MW		 721 {
722 .name = "MAIN_CH_UNPLUG_DET",
723 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
724 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
725 .flags = IORESOURCE_IRQ,
726 },
727 {
728 .name = "MAIN_CHARGE_PLUG_DET",
729 .start = AB8500_INT_MAIN_CH_PLUG_DET,
730 .end = AB8500_INT_MAIN_CH_PLUG_DET,
731 .flags = IORESOURCE_IRQ,
732 },
e098aded
MW		 733 {
734 .name = "VBUS_DET_R",
735 .start = AB8500_INT_VBUS_DET_R,
736 .end = AB8500_INT_VBUS_DET_R,
737 .flags = IORESOURCE_IRQ,
738 },
739 {
6af75ecd
LW		 740 .name = "VBUS_DET_F",
741 .start = AB8500_INT_VBUS_DET_F,
742 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 743 .flags = IORESOURCE_IRQ,
744 },
745 {
6af75ecd
LW		 746 .name = "USB_LINK_STATUS",
747 .start = AB8500_INT_USB_LINK_STATUS,
748 .end = AB8500_INT_USB_LINK_STATUS,
749 .flags = IORESOURCE_IRQ,
750 },
e098aded
MW		 751 {
752 .name = "VBUS_OVV",
753 .start = AB8500_INT_VBUS_OVV,
754 .end = AB8500_INT_VBUS_OVV,
755 .flags = IORESOURCE_IRQ,
756 },
757 {
6af75ecd
LW		 758 .name = "USB_CH_TH_PROT_R",
759 .start = AB8500_INT_USB_CH_TH_PROT_R,
760 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 761 .flags = IORESOURCE_IRQ,
762 },
763 {
6af75ecd
LW		 764 .name = "USB_CH_TH_PROT_F",
765 .start = AB8500_INT_USB_CH_TH_PROT_F,
766 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 767 .flags = IORESOURCE_IRQ,
768 },
769 {
6af75ecd
LW		 770 .name = "MAIN_EXT_CH_NOT_OK",
771 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
772 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
773 .flags = IORESOURCE_IRQ,
774 },
775 {
776 .name = "MAIN_CH_TH_PROT_R",
777 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
778 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
779 .flags = IORESOURCE_IRQ,
780 },
781 {
782 .name = "MAIN_CH_TH_PROT_F",
783 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
784 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
785 .flags = IORESOURCE_IRQ,
786 },
787 {
788 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 789 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
790 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 791 .flags = IORESOURCE_IRQ,
792 },
793 {
794 .name = "CH_WD_EXP",
795 .start = AB8500_INT_CH_WD_EXP,
796 .end = AB8500_INT_CH_WD_EXP,
797 .flags = IORESOURCE_IRQ,
798 },
799};
800
a9e9ce4c 801static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 802 {
803 .name = "BAT_CTRL_INDB",
804 .start = AB8500_INT_BAT_CTRL_INDB,
805 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 806 .flags = IORESOURCE_IRQ,
807 },
808 {
809 .name = "BTEMP_LOW",
810 .start = AB8500_INT_BTEMP_LOW,
811 .end = AB8500_INT_BTEMP_LOW,
812 .flags = IORESOURCE_IRQ,
813 },
814 {
815 .name = "BTEMP_HIGH",
816 .start = AB8500_INT_BTEMP_HIGH,
817 .end = AB8500_INT_BTEMP_HIGH,
818 .flags = IORESOURCE_IRQ,
819 },
820 {
6af75ecd
LW		 821 .name = "BTEMP_LOW_MEDIUM",
822 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
823 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 824 .flags = IORESOURCE_IRQ,
825 },
826 {
6af75ecd
LW		 827 .name = "BTEMP_MEDIUM_HIGH",
828 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
829 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 830 .flags = IORESOURCE_IRQ,
831 },
6af75ecd
LW		 832};
833
a9e9ce4c 834static struct resource ab8500_fg_resources[] = {
e098aded 835 {
6af75ecd
LW		 836 .name = "NCONV_ACCU",
837 .start = AB8500_INT_CCN_CONV_ACC,
838 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 839 .flags = IORESOURCE_IRQ,
840 },
841 {
6af75ecd
LW		 842 .name = "BATT_OVV",
843 .start = AB8500_INT_BATT_OVV,
844 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 845 .flags = IORESOURCE_IRQ,
846 },
847 {
6af75ecd
LW		 848 .name = "LOW_BAT_F",
849 .start = AB8500_INT_LOW_BAT_F,
850 .end = AB8500_INT_LOW_BAT_F,
851 .flags = IORESOURCE_IRQ,
852 },
853 {
854 .name = "LOW_BAT_R",
855 .start = AB8500_INT_LOW_BAT_R,
856 .end = AB8500_INT_LOW_BAT_R,
857 .flags = IORESOURCE_IRQ,
858 },
859 {
860 .name = "CC_INT_CALIB",
861 .start = AB8500_INT_CC_INT_CALIB,
862 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 863 .flags = IORESOURCE_IRQ,
864 },
a982362c
BJ		 865 {
866 .name = "CCEOC",
867 .start = AB8500_INT_CCEOC,
868 .end = AB8500_INT_CCEOC,
869 .flags = IORESOURCE_IRQ,
870 },
e098aded
MW		 871};
872
a9e9ce4c 873static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 874
df720647 875#ifdef CONFIG_DEBUG_FS
a9e9ce4c 876static struct resource ab8500_debug_resources[] = {
e098aded
MW		 877 {
878 .name = "IRQ_FIRST",
879 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
880 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
881 .flags = IORESOURCE_IRQ,
882 },
883 {
884 .name = "IRQ_LAST",
a982362c
BJ		 885 .start = AB8500_INT_XTAL32K_KO,
886 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 887 .flags = IORESOURCE_IRQ,
888 },
889};
df720647 890#endif
e098aded 891
a9e9ce4c 892static struct resource ab8500_usb_resources[] = {
e098aded
MW		 893 {
894 .name = "ID_WAKEUP_R",
895 .start = AB8500_INT_ID_WAKEUP_R,
896 .end = AB8500_INT_ID_WAKEUP_R,
897 .flags = IORESOURCE_IRQ,
898 },
899 {
900 .name = "ID_WAKEUP_F",
901 .start = AB8500_INT_ID_WAKEUP_F,
902 .end = AB8500_INT_ID_WAKEUP_F,
903 .flags = IORESOURCE_IRQ,
904 },
905 {
906 .name = "VBUS_DET_F",
907 .start = AB8500_INT_VBUS_DET_F,
908 .end = AB8500_INT_VBUS_DET_F,
909 .flags = IORESOURCE_IRQ,
910 },
911 {
912 .name = "VBUS_DET_R",
913 .start = AB8500_INT_VBUS_DET_R,
914 .end = AB8500_INT_VBUS_DET_R,
915 .flags = IORESOURCE_IRQ,
916 },
92d50a41
MW		 917 {
918 .name = "USB_LINK_STATUS",
919 .start = AB8500_INT_USB_LINK_STATUS,
920 .end = AB8500_INT_USB_LINK_STATUS,
921 .flags = IORESOURCE_IRQ,
922 },
6af75ecd
LW		 923 {
924 .name = "USB_ADP_PROBE_PLUG",
925 .start = AB8500_INT_ADP_PROBE_PLUG,
926 .end = AB8500_INT_ADP_PROBE_PLUG,
927 .flags = IORESOURCE_IRQ,
928 },
929 {
930 .name = "USB_ADP_PROBE_UNPLUG",
931 .start = AB8500_INT_ADP_PROBE_UNPLUG,
932 .end = AB8500_INT_ADP_PROBE_UNPLUG,
933 .flags = IORESOURCE_IRQ,
934 },
e098aded
MW		 935};
936
a9e9ce4c 937static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 938 {
939 .name = "KeyDeglitch",
940 .start = AB8505_INT_KEYDEGLITCH,
941 .end = AB8505_INT_KEYDEGLITCH,
942 .flags = IORESOURCE_IRQ,
943 },
944 {
945 .name = "KP",
946 .start = AB8505_INT_KP,
947 .end = AB8505_INT_KP,
948 .flags = IORESOURCE_IRQ,
949 },
950 {
951 .name = "IKP",
952 .start = AB8505_INT_IKP,
953 .end = AB8505_INT_IKP,
954 .flags = IORESOURCE_IRQ,
955 },
956 {
957 .name = "IKR",
958 .start = AB8505_INT_IKR,
959 .end = AB8505_INT_IKR,
960 .flags = IORESOURCE_IRQ,
961 },
962 {
963 .name = "KeyStuck",
964 .start = AB8505_INT_KEYSTUCK,
965 .end = AB8505_INT_KEYSTUCK,
966 .flags = IORESOURCE_IRQ,
967 },
968};
969
a9e9ce4c 970static struct resource ab8500_temp_resources[] = {
e098aded
MW		 971 {
972 .name = "AB8500_TEMP_WARM",
973 .start = AB8500_INT_TEMP_WARM,
974 .end = AB8500_INT_TEMP_WARM,
975 .flags = IORESOURCE_IRQ,
976 },
977};
978
a9e9ce4c 979static struct mfd_cell abx500_common_devs[] = {
5814fc35
MW		 980#ifdef CONFIG_DEBUG_FS
981 {
982 .name = "ab8500-debug",
bad76991 983 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 984 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
985 .resources = ab8500_debug_resources,
5814fc35
MW		 986 },
987#endif
e098aded
MW		 988 {
989 .name = "ab8500-sysctrl",
bad76991 990 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 991 },
992 {
993 .name = "ab8500-regulator",
bad76991 994 .of_compatible = "stericsson,ab8500-regulator",
e098aded 995 },
916a871c
UH		 996 {
997 .name = "abx500-clk",
998 .of_compatible = "stericsson,abx500-clk",
999 },
62579266
RV		 1000 {
1001 .name = "ab8500-gpadc",
bad76991 1002 .of_compatible = "stericsson,ab8500-gpadc",
62579266
RV		 1003 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1004 .resources = ab8500_gpadc_resources,
1005 },
1006 {
1007 .name = "ab8500-rtc",
bad76991 1008 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 1009 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1010 .resources = ab8500_rtc_resources,
1011 },
6af75ecd
LW		 1012 {
1013 .name = "ab8500-acc-det",
bad76991 1014 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 1015 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1016 .resources = ab8500_av_acc_detect_resources,
1017 },
e098aded
MW		 1018 {
1019 .name = "ab8500-poweron-key",
bad76991 1020 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 1021 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1022 .resources = ab8500_poweronkey_db_resources,
1023 },
f0f05b1c
AM		 1024 {
1025 .name = "ab8500-pwm",
bad76991 1026 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1027 .id = 1,
1028 },
1029 {
1030 .name = "ab8500-pwm",
bad76991 1031 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1032 .id = 2,
1033 },
1034 {
1035 .name = "ab8500-pwm",
bad76991 1036 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1037 .id = 3,
1038 },
bad76991
LJ		 1039 {
1040 .name = "ab8500-leds",
1041 .of_compatible = "stericsson,ab8500-leds",
1042 },
77686517 1043 {
e098aded 1044 .name = "ab8500-denc",
bad76991 1045 .of_compatible = "stericsson,ab8500-denc",
e098aded
MW		 1046 },
1047 {
1048 .name = "ab8500-temp",
bad76991 1049 .of_compatible = "stericsson,ab8500-temp",
e098aded
MW		 1050 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1051 .resources = ab8500_temp_resources,
77686517 1052 },
62579266
RV		 1053};
1054
a9e9ce4c 1055static struct mfd_cell ab8500_bm_devs[] = {
6ef9418c
RA		 1056 {
1057 .name = "ab8500-charger",
4aef72db 1058 .of_compatible = "stericsson,ab8500-charger",
6ef9418c
RA		 1059 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1060 .resources = ab8500_charger_resources,
4aef72db
R		 1061#ifndef CONFIG_OF
1062 .platform_data = &ab8500_bm_data,
1063 .pdata_size = sizeof(ab8500_bm_data),
1064#endif
6ef9418c
RA		 1065 },
1066 {
1067 .name = "ab8500-btemp",
bd9e8ab2 1068 .of_compatible = "stericsson,ab8500-btemp",
6ef9418c
RA		 1069 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1070 .resources = ab8500_btemp_resources,
bd9e8ab2
R		 1071#ifndef CONFIG_OF
1072 .platform_data = &ab8500_bm_data,
1073 .pdata_size = sizeof(ab8500_bm_data),
1074#endif
6ef9418c
RA		 1075 },
1076 {
1077 .name = "ab8500-fg",
e0f1abeb 1078 .of_compatible = "stericsson,ab8500-fg",
6ef9418c
RA		 1079 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1080 .resources = ab8500_fg_resources,
e0f1abeb
R		 1081#ifndef CONFIG_OF
1082 .platform_data = &ab8500_bm_data,
1083 .pdata_size = sizeof(ab8500_bm_data),
1084#endif
6ef9418c
RA		 1085 },
1086 {
1087 .name = "ab8500-chargalg",
a12810ab 1088 .of_compatible = "stericsson,ab8500-chargalg",
6ef9418c
RA		 1089 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1090 .resources = ab8500_chargalg_resources,
a12810ab
R		 1091#ifndef CONFIG_OF
1092 .platform_data = &ab8500_bm_data,
1093 .pdata_size = sizeof(ab8500_bm_data),
1094#endif
6ef9418c
RA		 1095 },
1096};
1097
a9e9ce4c 1098static struct mfd_cell ab8500_devs[] = {
d6255529 1099 {
7d56a46e 1100 .name = "pinctrl-ab8500",
bad76991 1101 .of_compatible = "stericsson,ab8500-gpio",
d6255529
LW		 1102 },
1103 {
1104 .name = "ab8500-usb",
bad76991 1105 .of_compatible = "stericsson,ab8500-usb",
d6255529
LW		 1106 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1107 .resources = ab8500_usb_resources,
1108 },
44f72e53
VS		 1109 {
1110 .name = "ab8500-codec",
81a21cdd 1111 .of_compatible = "stericsson,ab8500-codec",
44f72e53 1112 },
d6255529
LW		 1113};
1114
a9e9ce4c 1115static struct mfd_cell ab9540_devs[] = {
d6255529
LW		 1116 {
1117 .name = "ab8500-gpio",
d6255529
LW		 1118 },
1119 {
1120 .name = "ab9540-usb",
1121 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1122 .resources = ab8500_usb_resources,
1123 },
44f72e53
VS		 1124 {
1125 .name = "ab9540-codec",
1126 },
1127};
1128
1129/* Device list common to ab9540 and ab8505 */
a9e9ce4c 1130static struct mfd_cell ab9540_ab8505_devs[] = {
44f72e53
VS		 1131 {
1132 .name = "ab-iddet",
1133 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1134 .resources = ab8505_iddet_resources,
1135 },
d6255529
LW		 1136};
1137
cca69b67
MW		 1138static ssize_t show_chip_id(struct device *dev,
1139 struct device_attribute *attr, char *buf)
1140{
1141 struct ab8500 *ab8500;
1142
1143 ab8500 = dev_get_drvdata(dev);
1144 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1145}
1146
e5c238c3
MW		 1147/*
1148 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1149 * 0x01 Swoff bit programming
1150 * 0x02 Thermal protection activation
1151 * 0x04 Vbat lower then BattOk falling threshold
1152 * 0x08 Watchdog expired
1153 * 0x10 Non presence of 32kHz clock
1154 * 0x20 Battery level lower than power on reset threshold
1155 * 0x40 Power on key 1 pressed longer than 10 seconds
1156 * 0x80 DB8500 thermal shutdown
1157 */
1158static ssize_t show_switch_off_status(struct device *dev,
1159 struct device_attribute *attr, char *buf)
1160{
1161 int ret;
1162 u8 value;
1163 struct ab8500 *ab8500;
1164
1165 ab8500 = dev_get_drvdata(dev);
1166 ret = get_register_interruptible(ab8500, AB8500_RTC,
1167 AB8500_SWITCH_OFF_STATUS, &value);
1168 if (ret < 0)
1169 return ret;
1170 return sprintf(buf, "%#x\n", value);
1171}
1172
b4a31037
AL		 1173/*
1174 * ab8500 has turned on due to (TURN_ON_STATUS):
1175 * 0x01 PORnVbat
1176 * 0x02 PonKey1dbF
1177 * 0x04 PonKey2dbF
1178 * 0x08 RTCAlarm
1179 * 0x10 MainChDet
1180 * 0x20 VbusDet
1181 * 0x40 UsbIDDetect
1182 * 0x80 Reserved
1183 */
1184static ssize_t show_turn_on_status(struct device *dev,
1185 struct device_attribute *attr, char *buf)
1186{
1187 int ret;
1188 u8 value;
1189 struct ab8500 *ab8500;
1190
1191 ab8500 = dev_get_drvdata(dev);
1192 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1193 AB8500_TURN_ON_STATUS, &value);
1194 if (ret < 0)
1195 return ret;
1196 return sprintf(buf, "%#x\n", value);
1197}
1198
d6255529
LW		 1199static ssize_t show_ab9540_dbbrstn(struct device *dev,
1200 struct device_attribute *attr, char *buf)
1201{
1202 struct ab8500 *ab8500;
1203 int ret;
1204 u8 value;
1205
1206 ab8500 = dev_get_drvdata(dev);
1207
1208 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1209 AB9540_MODEM_CTRL2_REG, &value);
1210 if (ret < 0)
1211 return ret;
1212
1213 return sprintf(buf, "%d\n",
1214 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1215}
1216
1217static ssize_t store_ab9540_dbbrstn(struct device *dev,
1218 struct device_attribute *attr, const char *buf, size_t count)
1219{
1220 struct ab8500 *ab8500;
1221 int ret = count;
1222 int err;
1223 u8 bitvalues;
1224
1225 ab8500 = dev_get_drvdata(dev);
1226
1227 if (count > 0) {
1228 switch (buf[0]) {
1229 case '0':
1230 bitvalues = 0;
1231 break;
1232 case '1':
1233 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1234 break;
1235 default:
1236 goto exit;
1237 }
1238
1239 err = mask_and_set_register_interruptible(ab8500,
1240 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1241 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1242 if (err)
1243 dev_info(ab8500->dev,
1244 "Failed to set DBBRSTN %c, err %#x\n",
1245 buf[0], err);
1246 }
1247
1248exit:
1249 return ret;
1250}
1251
cca69b67 1252static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1253static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1254static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
d6255529
LW		 1255static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1256 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1257
1258static struct attribute *ab8500_sysfs_entries[] = {
1259 &dev_attr_chip_id.attr,
e5c238c3 1260 &dev_attr_switch_off_status.attr,
b4a31037 1261 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1262 NULL,
1263};
1264
d6255529
LW		 1265static struct attribute *ab9540_sysfs_entries[] = {
1266 &dev_attr_chip_id.attr,
1267 &dev_attr_switch_off_status.attr,
1268 &dev_attr_turn_on_status.attr,
1269 &dev_attr_dbbrstn.attr,
1270 NULL,
1271};
1272
cca69b67
MW		 1273static struct attribute_group ab8500_attr_group = {
1274 .attrs = ab8500_sysfs_entries,
1275};
1276
d6255529
LW		 1277static struct attribute_group ab9540_attr_group = {
1278 .attrs = ab9540_sysfs_entries,
1279};
1280
f791be49 1281static int ab8500_probe(struct platform_device *pdev)
62579266 1282{
b04c530c
JA		 1283 static char *switch_off_status[] = {
1284 "Swoff bit programming",
1285 "Thermal protection activation",
1286 "Vbat lower then BattOk falling threshold",
1287 "Watchdog expired",
1288 "Non presence of 32kHz clock",
1289 "Battery level lower than power on reset threshold",
1290 "Power on key 1 pressed longer than 10 seconds",
1291 "DB8500 thermal shutdown"};
d28f1db8
LJ		 1292 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1293 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1294 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1295 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1296 struct ab8500 *ab8500;
1297 struct resource *resource;
62579266
RV		 1298 int ret;
1299 int i;
47c16975 1300 u8 value;
62579266 1301
8c4203cb 1302 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1303 if (!ab8500)
1304 return -ENOMEM;
1305
62579266
RV		 1306 if (plat)
1307 ab8500->irq_base = plat->irq_base;
1308
d28f1db8
LJ		 1309 ab8500->dev = &pdev->dev;
1310
1311 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1312 if (!resource)
1313 return -ENODEV;
d28f1db8
LJ		 1314
1315 ab8500->irq = resource->start;
1316
822672a7
LJ		 1317 ab8500->read = ab8500_prcmu_read;
1318 ab8500->write = ab8500_prcmu_write;
1319 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1320
62579266
RV		 1321 mutex_init(&ab8500->lock);
1322 mutex_init(&ab8500->irq_lock);
112a80d2 1323 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1324
d28f1db8
LJ		 1325 platform_set_drvdata(pdev, ab8500);
1326
6bc4a568
LJ		 1327 if (platid)
1328 version = platid->driver_data;
6bc4a568 1329
0f620837
LW		 1330 if (version != AB8500_VERSION_UNDEFINED)
1331 ab8500->version = version;
1332 else {
1333 ret = get_register_interruptible(ab8500, AB8500_MISC,
1334 AB8500_IC_NAME_REG, &value);
1335 if (ret < 0)
8c4203cb 1336 return ret;
0f620837
LW		 1337
1338 ab8500->version = value;
1339 }
1340
47c16975
MW		 1341 ret = get_register_interruptible(ab8500, AB8500_MISC,
1342 AB8500_REV_REG, &value);
62579266 1343 if (ret < 0)
8c4203cb 1344 return ret;
62579266 1345
47c16975 1346 ab8500->chip_id = value;
62579266 1347
0f620837
LW		 1348 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1349 ab8500_version_str[ab8500->version],
1350 ab8500->chip_id >> 4,
1351 ab8500->chip_id & 0x0F);
1352
d6255529 1353 /* Configure AB8500 or AB9540 IRQ */
a982362c 1354 if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1355 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1356 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1357 } else {
1358 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1359 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1360 }
8c4203cb 1361 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1362 if (!ab8500->mask)
1363 return -ENOMEM;
8c4203cb
LJ		 1364 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1365 if (!ab8500->oldmask)
1366 return -ENOMEM;
1367
e5c238c3
MW		 1368 /*
1369 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1370 * 0x01 Swoff bit programming
1371 * 0x02 Thermal protection activation
1372 * 0x04 Vbat lower then BattOk falling threshold
1373 * 0x08 Watchdog expired
1374 * 0x10 Non presence of 32kHz clock
1375 * 0x20 Battery level lower than power on reset threshold
1376 * 0x40 Power on key 1 pressed longer than 10 seconds
1377 * 0x80 DB8500 thermal shutdown
1378 */
1379
1380 ret = get_register_interruptible(ab8500, AB8500_RTC,
1381 AB8500_SWITCH_OFF_STATUS, &value);
1382 if (ret < 0)
1383 return ret;
b04c530c
JA		 1384 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1385
1386 if (value) {
1387 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1388 if (value & 1)
1389 printk(KERN_CONT " \"%s\"",
1390 switch_off_status[i]);
1391 value = value >> 1;
1392
1393 }
1394 printk(KERN_CONT "\n");
1395 } else {
1396 printk(KERN_CONT " None\n");
1397 }
e5c238c3 1398
62579266
RV		 1399 if (plat && plat->init)
1400 plat->init(ab8500);
1401
1402 /* Clear and mask all interrupts */
2ced445e 1403 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1404 /*
1405 * Interrupt register 12 doesn't exist prior to AB8500 version
1406 * 2.0
1407 */
1408 if (ab8500->irq_reg_offset[i] == 11 &&
1409 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1410 continue;
62579266 1411
47c16975 1412 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1413 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1414 &value);
47c16975 1415 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1416 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1417 }
1418
47c16975
MW		 1419 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1420 if (ret)
8c4203cb 1421 return ret;
47c16975 1422
2ced445e 1423 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1424 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1425
06e589ef
LJ		 1426 ret = ab8500_irq_init(ab8500, np);
1427 if (ret)
8c4203cb 1428 return ret;
62579266 1429
06e589ef
LJ		 1430 /* Activate this feature only in ab9540 */
1431 /* till tests are done on ab8500 1p2 or later*/
1432 if (is_ab9540(ab8500)) {
8c4203cb
LJ		 1433 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1434 ab8500_hierarchical_irq,
1435 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1436 "ab8500", ab8500);
06e589ef
LJ		 1437 }
1438 else {
8c4203cb
LJ		 1439 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1440 ab8500_irq,
1441 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1442 "ab8500", ab8500);
62579266 1443 if (ret)
8c4203cb 1444 return ret;
62579266
RV		 1445 }
1446
bad76991
LJ		 1447 ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
1448 ARRAY_SIZE(abx500_common_devs), NULL,
55692af5 1449 ab8500->irq_base, ab8500->domain);
bad76991 1450 if (ret)
8c4203cb 1451 return ret;
d6255529 1452
bad76991
LJ		 1453 if (is_ab9540(ab8500))
1454 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1455 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1456 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1457 else
1458 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1459 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1460 ab8500->irq_base, ab8500->domain);
bad76991 1461 if (ret)
8c4203cb 1462 return ret;
44f72e53 1463
bad76991
LJ		 1464 if (is_ab9540(ab8500) || is_ab8505(ab8500))
1465 ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
1466 ARRAY_SIZE(ab9540_ab8505_devs), NULL,
55692af5 1467 ab8500->irq_base, ab8500->domain);
bad76991 1468 if (ret)
8c4203cb 1469 return ret;
62579266 1470
6ef9418c
RA		 1471 if (!no_bm) {
1472 /* Add battery management devices */
1473 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1474 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1475 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1476 if (ret)
1477 dev_err(ab8500->dev, "error adding bm devices\n");
1478 }
1479
d6255529
LW		 1480 if (is_ab9540(ab8500))
1481 ret = sysfs_create_group(&ab8500->dev->kobj,
1482 &ab9540_attr_group);
1483 else
1484 ret = sysfs_create_group(&ab8500->dev->kobj,
1485 &ab8500_attr_group);
cca69b67
MW		 1486 if (ret)
1487 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1488
1489 return ret;
62579266
RV		 1490}
1491
4740f73f 1492static int ab8500_remove(struct platform_device *pdev)
62579266 1493{
d28f1db8
LJ		 1494 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1495
d6255529
LW		 1496 if (is_ab9540(ab8500))
1497 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1498 else
1499 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1500
62579266 1501 mfd_remove_devices(ab8500->dev);
62579266
RV		 1502
1503 return 0;
1504}
1505
d28f1db8
LJ		 1506static const struct platform_device_id ab8500_id[] = {
1507 { "ab8500-core", AB8500_VERSION_AB8500 },
1508 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1509 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1510 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1511 { }
1512};
1513
1514static struct platform_driver ab8500_core_driver = {
1515 .driver = {
1516 .name = "ab8500-core",
1517 .owner = THIS_MODULE,
1518 },
1519 .probe = ab8500_probe,
84449216 1520 .remove = ab8500_remove,
d28f1db8
LJ		 1521 .id_table = ab8500_id,
1522};
1523
1524static int __init ab8500_core_init(void)
1525{
1526 return platform_driver_register(&ab8500_core_driver);
1527}
1528
1529static void __exit ab8500_core_exit(void)
1530{
1531 platform_driver_unregister(&ab8500_core_driver);
1532}
ba7cbc3e 1533core_initcall(ab8500_core_init);
d28f1db8
LJ		 1534module_exit(ab8500_core_exit);
1535
adceed62 1536MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1537MODULE_DESCRIPTION("AB8500 MFD core");
1538MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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