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62579266 RV |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License v2 | |
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | |
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> | |
adceed62 | 7 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
62579266 RV |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/mfd/core.h> | |
47c16975 | 19 | #include <linux/mfd/abx500.h> |
62579266 | 20 | #include <linux/mfd/ab8500.h> |
549931f9 | 21 | #include <linux/regulator/ab8500.h> |
62579266 RV |
22 | |
23 | /* | |
24 | * Interrupt register offsets | |
25 | * Bank : 0x0E | |
26 | */ | |
47c16975 MW |
27 | #define AB8500_IT_SOURCE1_REG 0x00 |
28 | #define AB8500_IT_SOURCE2_REG 0x01 | |
29 | #define AB8500_IT_SOURCE3_REG 0x02 | |
30 | #define AB8500_IT_SOURCE4_REG 0x03 | |
31 | #define AB8500_IT_SOURCE5_REG 0x04 | |
32 | #define AB8500_IT_SOURCE6_REG 0x05 | |
33 | #define AB8500_IT_SOURCE7_REG 0x06 | |
34 | #define AB8500_IT_SOURCE8_REG 0x07 | |
35 | #define AB8500_IT_SOURCE19_REG 0x12 | |
36 | #define AB8500_IT_SOURCE20_REG 0x13 | |
37 | #define AB8500_IT_SOURCE21_REG 0x14 | |
38 | #define AB8500_IT_SOURCE22_REG 0x15 | |
39 | #define AB8500_IT_SOURCE23_REG 0x16 | |
40 | #define AB8500_IT_SOURCE24_REG 0x17 | |
62579266 RV |
41 | |
42 | /* | |
43 | * latch registers | |
44 | */ | |
47c16975 MW |
45 | #define AB8500_IT_LATCH1_REG 0x20 |
46 | #define AB8500_IT_LATCH2_REG 0x21 | |
47 | #define AB8500_IT_LATCH3_REG 0x22 | |
48 | #define AB8500_IT_LATCH4_REG 0x23 | |
49 | #define AB8500_IT_LATCH5_REG 0x24 | |
50 | #define AB8500_IT_LATCH6_REG 0x25 | |
51 | #define AB8500_IT_LATCH7_REG 0x26 | |
52 | #define AB8500_IT_LATCH8_REG 0x27 | |
53 | #define AB8500_IT_LATCH9_REG 0x28 | |
54 | #define AB8500_IT_LATCH10_REG 0x29 | |
92d50a41 | 55 | #define AB8500_IT_LATCH12_REG 0x2B |
47c16975 MW |
56 | #define AB8500_IT_LATCH19_REG 0x32 |
57 | #define AB8500_IT_LATCH20_REG 0x33 | |
58 | #define AB8500_IT_LATCH21_REG 0x34 | |
59 | #define AB8500_IT_LATCH22_REG 0x35 | |
60 | #define AB8500_IT_LATCH23_REG 0x36 | |
61 | #define AB8500_IT_LATCH24_REG 0x37 | |
62579266 RV |
62 | |
63 | /* | |
64 | * mask registers | |
65 | */ | |
66 | ||
47c16975 MW |
67 | #define AB8500_IT_MASK1_REG 0x40 |
68 | #define AB8500_IT_MASK2_REG 0x41 | |
69 | #define AB8500_IT_MASK3_REG 0x42 | |
70 | #define AB8500_IT_MASK4_REG 0x43 | |
71 | #define AB8500_IT_MASK5_REG 0x44 | |
72 | #define AB8500_IT_MASK6_REG 0x45 | |
73 | #define AB8500_IT_MASK7_REG 0x46 | |
74 | #define AB8500_IT_MASK8_REG 0x47 | |
75 | #define AB8500_IT_MASK9_REG 0x48 | |
76 | #define AB8500_IT_MASK10_REG 0x49 | |
77 | #define AB8500_IT_MASK11_REG 0x4A | |
78 | #define AB8500_IT_MASK12_REG 0x4B | |
79 | #define AB8500_IT_MASK13_REG 0x4C | |
80 | #define AB8500_IT_MASK14_REG 0x4D | |
81 | #define AB8500_IT_MASK15_REG 0x4E | |
82 | #define AB8500_IT_MASK16_REG 0x4F | |
83 | #define AB8500_IT_MASK17_REG 0x50 | |
84 | #define AB8500_IT_MASK18_REG 0x51 | |
85 | #define AB8500_IT_MASK19_REG 0x52 | |
86 | #define AB8500_IT_MASK20_REG 0x53 | |
87 | #define AB8500_IT_MASK21_REG 0x54 | |
88 | #define AB8500_IT_MASK22_REG 0x55 | |
89 | #define AB8500_IT_MASK23_REG 0x56 | |
90 | #define AB8500_IT_MASK24_REG 0x57 | |
91 | ||
92 | #define AB8500_REV_REG 0x80 | |
e5c238c3 | 93 | #define AB8500_SWITCH_OFF_STATUS 0x00 |
62579266 RV |
94 | |
95 | /* | |
96 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt | |
97 | * numbers are indexed into this array with (num / 8). | |
98 | * | |
99 | * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at | |
100 | * offset 0. | |
101 | */ | |
102 | static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { | |
92d50a41 | 103 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, |
62579266 RV |
104 | }; |
105 | ||
47c16975 MW |
106 | static int ab8500_get_chip_id(struct device *dev) |
107 | { | |
6bce7bf1 MW |
108 | struct ab8500 *ab8500; |
109 | ||
110 | if (!dev) | |
111 | return -EINVAL; | |
112 | ab8500 = dev_get_drvdata(dev->parent); | |
113 | return ab8500 ? (int)ab8500->chip_id : -EINVAL; | |
47c16975 MW |
114 | } |
115 | ||
116 | static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
117 | u8 reg, u8 data) | |
62579266 RV |
118 | { |
119 | int ret; | |
47c16975 MW |
120 | /* |
121 | * Put the u8 bank and u8 register together into a an u16. | |
122 | * The bank on higher 8 bits and register in lower 8 bits. | |
123 | * */ | |
124 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 RV |
125 | |
126 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); | |
127 | ||
47c16975 MW |
128 | ret = mutex_lock_interruptible(&ab8500->lock); |
129 | if (ret) | |
130 | return ret; | |
131 | ||
62579266 RV |
132 | ret = ab8500->write(ab8500, addr, data); |
133 | if (ret < 0) | |
134 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
135 | addr, ret); | |
47c16975 | 136 | mutex_unlock(&ab8500->lock); |
62579266 RV |
137 | |
138 | return ret; | |
139 | } | |
140 | ||
47c16975 MW |
141 | static int ab8500_set_register(struct device *dev, u8 bank, |
142 | u8 reg, u8 value) | |
62579266 | 143 | { |
47c16975 | 144 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 145 | |
47c16975 | 146 | return set_register_interruptible(ab8500, bank, reg, value); |
62579266 | 147 | } |
62579266 | 148 | |
47c16975 MW |
149 | static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, |
150 | u8 reg, u8 *value) | |
62579266 RV |
151 | { |
152 | int ret; | |
47c16975 MW |
153 | /* put the u8 bank and u8 reg together into a an u16. |
154 | * bank on higher 8 bits and reg in lower */ | |
155 | u16 addr = ((u16)bank) << 8 | reg; | |
156 | ||
157 | ret = mutex_lock_interruptible(&ab8500->lock); | |
158 | if (ret) | |
159 | return ret; | |
62579266 RV |
160 | |
161 | ret = ab8500->read(ab8500, addr); | |
162 | if (ret < 0) | |
163 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
164 | addr, ret); | |
47c16975 MW |
165 | else |
166 | *value = ret; | |
62579266 | 167 | |
47c16975 | 168 | mutex_unlock(&ab8500->lock); |
62579266 RV |
169 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); |
170 | ||
171 | return ret; | |
172 | } | |
173 | ||
47c16975 MW |
174 | static int ab8500_get_register(struct device *dev, u8 bank, |
175 | u8 reg, u8 *value) | |
62579266 | 176 | { |
47c16975 | 177 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 178 | |
47c16975 | 179 | return get_register_interruptible(ab8500, bank, reg, value); |
62579266 | 180 | } |
47c16975 MW |
181 | |
182 | static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
183 | u8 reg, u8 bitmask, u8 bitvalues) | |
62579266 RV |
184 | { |
185 | int ret; | |
47c16975 MW |
186 | u8 data; |
187 | /* put the u8 bank and u8 reg together into a an u16. | |
188 | * bank on higher 8 bits and reg in lower */ | |
189 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 | 190 | |
47c16975 MW |
191 | ret = mutex_lock_interruptible(&ab8500->lock); |
192 | if (ret) | |
193 | return ret; | |
62579266 | 194 | |
47c16975 MW |
195 | ret = ab8500->read(ab8500, addr); |
196 | if (ret < 0) { | |
197 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
198 | addr, ret); | |
62579266 | 199 | goto out; |
47c16975 | 200 | } |
62579266 | 201 | |
47c16975 MW |
202 | data = (u8)ret; |
203 | data = (~bitmask & data) | (bitmask & bitvalues); | |
62579266 | 204 | |
47c16975 MW |
205 | ret = ab8500->write(ab8500, addr, data); |
206 | if (ret < 0) | |
207 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
208 | addr, ret); | |
62579266 | 209 | |
47c16975 | 210 | dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); |
62579266 RV |
211 | out: |
212 | mutex_unlock(&ab8500->lock); | |
213 | return ret; | |
214 | } | |
47c16975 MW |
215 | |
216 | static int ab8500_mask_and_set_register(struct device *dev, | |
217 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) | |
218 | { | |
219 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | |
220 | ||
221 | return mask_and_set_register_interruptible(ab8500, bank, reg, | |
222 | bitmask, bitvalues); | |
223 | ||
224 | } | |
225 | ||
226 | static struct abx500_ops ab8500_ops = { | |
227 | .get_chip_id = ab8500_get_chip_id, | |
228 | .get_register = ab8500_get_register, | |
229 | .set_register = ab8500_set_register, | |
230 | .get_register_page = NULL, | |
231 | .set_register_page = NULL, | |
232 | .mask_and_set_register = ab8500_mask_and_set_register, | |
233 | .event_registers_startup_state_get = NULL, | |
234 | .startup_irq_enabled = NULL, | |
235 | }; | |
62579266 | 236 | |
9505a0a0 | 237 | static void ab8500_irq_lock(struct irq_data *data) |
62579266 | 238 | { |
9505a0a0 | 239 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
240 | |
241 | mutex_lock(&ab8500->irq_lock); | |
242 | } | |
243 | ||
9505a0a0 | 244 | static void ab8500_irq_sync_unlock(struct irq_data *data) |
62579266 | 245 | { |
9505a0a0 | 246 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
247 | int i; |
248 | ||
249 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { | |
250 | u8 old = ab8500->oldmask[i]; | |
251 | u8 new = ab8500->mask[i]; | |
252 | int reg; | |
253 | ||
254 | if (new == old) | |
255 | continue; | |
256 | ||
863dde5b LW |
257 | /* Interrupt register 12 doesn't exist prior to version 2.0 */ |
258 | if (ab8500_irq_regoffset[i] == 11 && | |
259 | ab8500->chip_id < AB8500_CUT2P0) | |
92d50a41 MW |
260 | continue; |
261 | ||
62579266 RV |
262 | ab8500->oldmask[i] = new; |
263 | ||
264 | reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; | |
47c16975 | 265 | set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); |
62579266 RV |
266 | } |
267 | ||
268 | mutex_unlock(&ab8500->irq_lock); | |
269 | } | |
270 | ||
9505a0a0 | 271 | static void ab8500_irq_mask(struct irq_data *data) |
62579266 | 272 | { |
9505a0a0 MB |
273 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
274 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
275 | int index = offset / 8; |
276 | int mask = 1 << (offset % 8); | |
277 | ||
278 | ab8500->mask[index] |= mask; | |
279 | } | |
280 | ||
9505a0a0 | 281 | static void ab8500_irq_unmask(struct irq_data *data) |
62579266 | 282 | { |
9505a0a0 MB |
283 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
284 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
285 | int index = offset / 8; |
286 | int mask = 1 << (offset % 8); | |
287 | ||
288 | ab8500->mask[index] &= ~mask; | |
289 | } | |
290 | ||
291 | static struct irq_chip ab8500_irq_chip = { | |
292 | .name = "ab8500", | |
9505a0a0 MB |
293 | .irq_bus_lock = ab8500_irq_lock, |
294 | .irq_bus_sync_unlock = ab8500_irq_sync_unlock, | |
295 | .irq_mask = ab8500_irq_mask, | |
e6f9306e | 296 | .irq_disable = ab8500_irq_mask, |
9505a0a0 | 297 | .irq_unmask = ab8500_irq_unmask, |
62579266 RV |
298 | }; |
299 | ||
300 | static irqreturn_t ab8500_irq(int irq, void *dev) | |
301 | { | |
302 | struct ab8500 *ab8500 = dev; | |
303 | int i; | |
304 | ||
305 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
306 | ||
307 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { | |
308 | int regoffset = ab8500_irq_regoffset[i]; | |
309 | int status; | |
47c16975 | 310 | u8 value; |
62579266 | 311 | |
863dde5b LW |
312 | /* Interrupt register 12 doesn't exist prior to version 2.0 */ |
313 | if (regoffset == 11 && ab8500->chip_id < AB8500_CUT2P0) | |
92d50a41 MW |
314 | continue; |
315 | ||
47c16975 MW |
316 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, |
317 | AB8500_IT_LATCH1_REG + regoffset, &value); | |
318 | if (status < 0 || value == 0) | |
62579266 RV |
319 | continue; |
320 | ||
321 | do { | |
88aec4f7 | 322 | int bit = __ffs(value); |
62579266 RV |
323 | int line = i * 8 + bit; |
324 | ||
325 | handle_nested_irq(ab8500->irq_base + line); | |
47c16975 MW |
326 | value &= ~(1 << bit); |
327 | } while (value); | |
62579266 RV |
328 | } |
329 | ||
330 | return IRQ_HANDLED; | |
331 | } | |
332 | ||
333 | static int ab8500_irq_init(struct ab8500 *ab8500) | |
334 | { | |
335 | int base = ab8500->irq_base; | |
336 | int irq; | |
337 | ||
338 | for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { | |
d5bb1221 TG |
339 | irq_set_chip_data(irq, ab8500); |
340 | irq_set_chip_and_handler(irq, &ab8500_irq_chip, | |
62579266 | 341 | handle_simple_irq); |
d5bb1221 | 342 | irq_set_nested_thread(irq, 1); |
62579266 RV |
343 | #ifdef CONFIG_ARM |
344 | set_irq_flags(irq, IRQF_VALID); | |
345 | #else | |
d5bb1221 | 346 | irq_set_noprobe(irq); |
62579266 RV |
347 | #endif |
348 | } | |
349 | ||
350 | return 0; | |
351 | } | |
352 | ||
353 | static void ab8500_irq_remove(struct ab8500 *ab8500) | |
354 | { | |
355 | int base = ab8500->irq_base; | |
356 | int irq; | |
357 | ||
358 | for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { | |
359 | #ifdef CONFIG_ARM | |
360 | set_irq_flags(irq, 0); | |
361 | #endif | |
d5bb1221 TG |
362 | irq_set_chip_and_handler(irq, NULL, NULL); |
363 | irq_set_chip_data(irq, NULL); | |
62579266 RV |
364 | } |
365 | } | |
366 | ||
5cef8df5 | 367 | static struct resource __devinitdata ab8500_gpio_resources[] = { |
0cb3fcd7 BB |
368 | { |
369 | .name = "GPIO_INT6", | |
370 | .start = AB8500_INT_GPIO6R, | |
371 | .end = AB8500_INT_GPIO41F, | |
372 | .flags = IORESOURCE_IRQ, | |
373 | } | |
374 | }; | |
375 | ||
5cef8df5 | 376 | static struct resource __devinitdata ab8500_gpadc_resources[] = { |
62579266 RV |
377 | { |
378 | .name = "HW_CONV_END", | |
379 | .start = AB8500_INT_GP_HW_ADC_CONV_END, | |
380 | .end = AB8500_INT_GP_HW_ADC_CONV_END, | |
381 | .flags = IORESOURCE_IRQ, | |
382 | }, | |
383 | { | |
384 | .name = "SW_CONV_END", | |
385 | .start = AB8500_INT_GP_SW_ADC_CONV_END, | |
386 | .end = AB8500_INT_GP_SW_ADC_CONV_END, | |
387 | .flags = IORESOURCE_IRQ, | |
388 | }, | |
389 | }; | |
390 | ||
5cef8df5 | 391 | static struct resource __devinitdata ab8500_rtc_resources[] = { |
62579266 RV |
392 | { |
393 | .name = "60S", | |
394 | .start = AB8500_INT_RTC_60S, | |
395 | .end = AB8500_INT_RTC_60S, | |
396 | .flags = IORESOURCE_IRQ, | |
397 | }, | |
398 | { | |
399 | .name = "ALARM", | |
400 | .start = AB8500_INT_RTC_ALARM, | |
401 | .end = AB8500_INT_RTC_ALARM, | |
402 | .flags = IORESOURCE_IRQ, | |
403 | }, | |
404 | }; | |
405 | ||
5cef8df5 | 406 | static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { |
77686517 SI |
407 | { |
408 | .name = "ONKEY_DBF", | |
409 | .start = AB8500_INT_PON_KEY1DB_F, | |
410 | .end = AB8500_INT_PON_KEY1DB_F, | |
411 | .flags = IORESOURCE_IRQ, | |
412 | }, | |
413 | { | |
414 | .name = "ONKEY_DBR", | |
415 | .start = AB8500_INT_PON_KEY1DB_R, | |
416 | .end = AB8500_INT_PON_KEY1DB_R, | |
417 | .flags = IORESOURCE_IRQ, | |
418 | }, | |
419 | }; | |
420 | ||
6af75ecd | 421 | static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { |
e098aded | 422 | { |
6af75ecd LW |
423 | .name = "ACC_DETECT_1DB_F", |
424 | .start = AB8500_INT_ACC_DETECT_1DB_F, | |
425 | .end = AB8500_INT_ACC_DETECT_1DB_F, | |
426 | .flags = IORESOURCE_IRQ, | |
e098aded MW |
427 | }, |
428 | { | |
6af75ecd LW |
429 | .name = "ACC_DETECT_1DB_R", |
430 | .start = AB8500_INT_ACC_DETECT_1DB_R, | |
431 | .end = AB8500_INT_ACC_DETECT_1DB_R, | |
432 | .flags = IORESOURCE_IRQ, | |
433 | }, | |
434 | { | |
435 | .name = "ACC_DETECT_21DB_F", | |
436 | .start = AB8500_INT_ACC_DETECT_21DB_F, | |
437 | .end = AB8500_INT_ACC_DETECT_21DB_F, | |
438 | .flags = IORESOURCE_IRQ, | |
439 | }, | |
440 | { | |
441 | .name = "ACC_DETECT_21DB_R", | |
442 | .start = AB8500_INT_ACC_DETECT_21DB_R, | |
443 | .end = AB8500_INT_ACC_DETECT_21DB_R, | |
444 | .flags = IORESOURCE_IRQ, | |
445 | }, | |
446 | { | |
447 | .name = "ACC_DETECT_22DB_F", | |
448 | .start = AB8500_INT_ACC_DETECT_22DB_F, | |
449 | .end = AB8500_INT_ACC_DETECT_22DB_F, | |
450 | .flags = IORESOURCE_IRQ, | |
e098aded | 451 | }, |
6af75ecd LW |
452 | { |
453 | .name = "ACC_DETECT_22DB_R", | |
454 | .start = AB8500_INT_ACC_DETECT_22DB_R, | |
455 | .end = AB8500_INT_ACC_DETECT_22DB_R, | |
456 | .flags = IORESOURCE_IRQ, | |
457 | }, | |
458 | }; | |
459 | ||
460 | static struct resource __devinitdata ab8500_charger_resources[] = { | |
e098aded MW |
461 | { |
462 | .name = "MAIN_CH_UNPLUG_DET", | |
463 | .start = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
464 | .end = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
465 | .flags = IORESOURCE_IRQ, | |
466 | }, | |
467 | { | |
468 | .name = "MAIN_CHARGE_PLUG_DET", | |
469 | .start = AB8500_INT_MAIN_CH_PLUG_DET, | |
470 | .end = AB8500_INT_MAIN_CH_PLUG_DET, | |
471 | .flags = IORESOURCE_IRQ, | |
472 | }, | |
e098aded MW |
473 | { |
474 | .name = "VBUS_DET_R", | |
475 | .start = AB8500_INT_VBUS_DET_R, | |
476 | .end = AB8500_INT_VBUS_DET_R, | |
477 | .flags = IORESOURCE_IRQ, | |
478 | }, | |
479 | { | |
6af75ecd LW |
480 | .name = "VBUS_DET_F", |
481 | .start = AB8500_INT_VBUS_DET_F, | |
482 | .end = AB8500_INT_VBUS_DET_F, | |
e098aded MW |
483 | .flags = IORESOURCE_IRQ, |
484 | }, | |
485 | { | |
6af75ecd LW |
486 | .name = "USB_LINK_STATUS", |
487 | .start = AB8500_INT_USB_LINK_STATUS, | |
488 | .end = AB8500_INT_USB_LINK_STATUS, | |
489 | .flags = IORESOURCE_IRQ, | |
490 | }, | |
491 | { | |
492 | .name = "USB_CHARGE_DET_DONE", | |
493 | .start = AB8500_INT_USB_CHG_DET_DONE, | |
494 | .end = AB8500_INT_USB_CHG_DET_DONE, | |
e098aded MW |
495 | .flags = IORESOURCE_IRQ, |
496 | }, | |
497 | { | |
498 | .name = "VBUS_OVV", | |
499 | .start = AB8500_INT_VBUS_OVV, | |
500 | .end = AB8500_INT_VBUS_OVV, | |
501 | .flags = IORESOURCE_IRQ, | |
502 | }, | |
503 | { | |
6af75ecd LW |
504 | .name = "USB_CH_TH_PROT_R", |
505 | .start = AB8500_INT_USB_CH_TH_PROT_R, | |
506 | .end = AB8500_INT_USB_CH_TH_PROT_R, | |
e098aded MW |
507 | .flags = IORESOURCE_IRQ, |
508 | }, | |
509 | { | |
6af75ecd LW |
510 | .name = "USB_CH_TH_PROT_F", |
511 | .start = AB8500_INT_USB_CH_TH_PROT_F, | |
512 | .end = AB8500_INT_USB_CH_TH_PROT_F, | |
e098aded MW |
513 | .flags = IORESOURCE_IRQ, |
514 | }, | |
515 | { | |
6af75ecd LW |
516 | .name = "MAIN_EXT_CH_NOT_OK", |
517 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
518 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
519 | .flags = IORESOURCE_IRQ, | |
520 | }, | |
521 | { | |
522 | .name = "MAIN_CH_TH_PROT_R", | |
523 | .start = AB8500_INT_MAIN_CH_TH_PROT_R, | |
524 | .end = AB8500_INT_MAIN_CH_TH_PROT_R, | |
525 | .flags = IORESOURCE_IRQ, | |
526 | }, | |
527 | { | |
528 | .name = "MAIN_CH_TH_PROT_F", | |
529 | .start = AB8500_INT_MAIN_CH_TH_PROT_F, | |
530 | .end = AB8500_INT_MAIN_CH_TH_PROT_F, | |
531 | .flags = IORESOURCE_IRQ, | |
532 | }, | |
533 | { | |
534 | .name = "USB_CHARGER_NOT_OKR", | |
535 | .start = AB8500_INT_USB_CHARGER_NOT_OK, | |
536 | .end = AB8500_INT_USB_CHARGER_NOT_OK, | |
537 | .flags = IORESOURCE_IRQ, | |
538 | }, | |
539 | { | |
540 | .name = "USB_CHARGER_NOT_OKF", | |
541 | .start = AB8500_INT_USB_CHARGER_NOT_OKF, | |
542 | .end = AB8500_INT_USB_CHARGER_NOT_OKF, | |
543 | .flags = IORESOURCE_IRQ, | |
544 | }, | |
545 | { | |
546 | .name = "CH_WD_EXP", | |
547 | .start = AB8500_INT_CH_WD_EXP, | |
548 | .end = AB8500_INT_CH_WD_EXP, | |
549 | .flags = IORESOURCE_IRQ, | |
550 | }, | |
551 | }; | |
552 | ||
553 | static struct resource __devinitdata ab8500_btemp_resources[] = { | |
554 | { | |
555 | .name = "BAT_CTRL_INDB", | |
556 | .start = AB8500_INT_BAT_CTRL_INDB, | |
557 | .end = AB8500_INT_BAT_CTRL_INDB, | |
e098aded MW |
558 | .flags = IORESOURCE_IRQ, |
559 | }, | |
560 | { | |
561 | .name = "BTEMP_LOW", | |
562 | .start = AB8500_INT_BTEMP_LOW, | |
563 | .end = AB8500_INT_BTEMP_LOW, | |
564 | .flags = IORESOURCE_IRQ, | |
565 | }, | |
566 | { | |
567 | .name = "BTEMP_HIGH", | |
568 | .start = AB8500_INT_BTEMP_HIGH, | |
569 | .end = AB8500_INT_BTEMP_HIGH, | |
570 | .flags = IORESOURCE_IRQ, | |
571 | }, | |
572 | { | |
6af75ecd LW |
573 | .name = "BTEMP_LOW_MEDIUM", |
574 | .start = AB8500_INT_BTEMP_LOW_MEDIUM, | |
575 | .end = AB8500_INT_BTEMP_LOW_MEDIUM, | |
e098aded MW |
576 | .flags = IORESOURCE_IRQ, |
577 | }, | |
578 | { | |
6af75ecd LW |
579 | .name = "BTEMP_MEDIUM_HIGH", |
580 | .start = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
581 | .end = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
e098aded MW |
582 | .flags = IORESOURCE_IRQ, |
583 | }, | |
6af75ecd LW |
584 | }; |
585 | ||
586 | static struct resource __devinitdata ab8500_fg_resources[] = { | |
e098aded | 587 | { |
6af75ecd LW |
588 | .name = "NCONV_ACCU", |
589 | .start = AB8500_INT_CCN_CONV_ACC, | |
590 | .end = AB8500_INT_CCN_CONV_ACC, | |
e098aded MW |
591 | .flags = IORESOURCE_IRQ, |
592 | }, | |
593 | { | |
6af75ecd LW |
594 | .name = "BATT_OVV", |
595 | .start = AB8500_INT_BATT_OVV, | |
596 | .end = AB8500_INT_BATT_OVV, | |
e098aded MW |
597 | .flags = IORESOURCE_IRQ, |
598 | }, | |
599 | { | |
6af75ecd LW |
600 | .name = "LOW_BAT_F", |
601 | .start = AB8500_INT_LOW_BAT_F, | |
602 | .end = AB8500_INT_LOW_BAT_F, | |
603 | .flags = IORESOURCE_IRQ, | |
604 | }, | |
605 | { | |
606 | .name = "LOW_BAT_R", | |
607 | .start = AB8500_INT_LOW_BAT_R, | |
608 | .end = AB8500_INT_LOW_BAT_R, | |
609 | .flags = IORESOURCE_IRQ, | |
610 | }, | |
611 | { | |
612 | .name = "CC_INT_CALIB", | |
613 | .start = AB8500_INT_CC_INT_CALIB, | |
614 | .end = AB8500_INT_CC_INT_CALIB, | |
e098aded MW |
615 | .flags = IORESOURCE_IRQ, |
616 | }, | |
617 | }; | |
618 | ||
6af75ecd LW |
619 | static struct resource __devinitdata ab8500_chargalg_resources[] = {}; |
620 | ||
5cef8df5 | 621 | static struct resource __devinitdata ab8500_debug_resources[] = { |
e098aded MW |
622 | { |
623 | .name = "IRQ_FIRST", | |
624 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
625 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
626 | .flags = IORESOURCE_IRQ, | |
627 | }, | |
628 | { | |
629 | .name = "IRQ_LAST", | |
630 | .start = AB8500_INT_USB_CHARGER_NOT_OKF, | |
631 | .end = AB8500_INT_USB_CHARGER_NOT_OKF, | |
632 | .flags = IORESOURCE_IRQ, | |
633 | }, | |
634 | }; | |
635 | ||
5cef8df5 | 636 | static struct resource __devinitdata ab8500_usb_resources[] = { |
e098aded MW |
637 | { |
638 | .name = "ID_WAKEUP_R", | |
639 | .start = AB8500_INT_ID_WAKEUP_R, | |
640 | .end = AB8500_INT_ID_WAKEUP_R, | |
641 | .flags = IORESOURCE_IRQ, | |
642 | }, | |
643 | { | |
644 | .name = "ID_WAKEUP_F", | |
645 | .start = AB8500_INT_ID_WAKEUP_F, | |
646 | .end = AB8500_INT_ID_WAKEUP_F, | |
647 | .flags = IORESOURCE_IRQ, | |
648 | }, | |
649 | { | |
650 | .name = "VBUS_DET_F", | |
651 | .start = AB8500_INT_VBUS_DET_F, | |
652 | .end = AB8500_INT_VBUS_DET_F, | |
653 | .flags = IORESOURCE_IRQ, | |
654 | }, | |
655 | { | |
656 | .name = "VBUS_DET_R", | |
657 | .start = AB8500_INT_VBUS_DET_R, | |
658 | .end = AB8500_INT_VBUS_DET_R, | |
659 | .flags = IORESOURCE_IRQ, | |
660 | }, | |
92d50a41 MW |
661 | { |
662 | .name = "USB_LINK_STATUS", | |
663 | .start = AB8500_INT_USB_LINK_STATUS, | |
664 | .end = AB8500_INT_USB_LINK_STATUS, | |
665 | .flags = IORESOURCE_IRQ, | |
666 | }, | |
6af75ecd LW |
667 | { |
668 | .name = "USB_ADP_PROBE_PLUG", | |
669 | .start = AB8500_INT_ADP_PROBE_PLUG, | |
670 | .end = AB8500_INT_ADP_PROBE_PLUG, | |
671 | .flags = IORESOURCE_IRQ, | |
672 | }, | |
673 | { | |
674 | .name = "USB_ADP_PROBE_UNPLUG", | |
675 | .start = AB8500_INT_ADP_PROBE_UNPLUG, | |
676 | .end = AB8500_INT_ADP_PROBE_UNPLUG, | |
677 | .flags = IORESOURCE_IRQ, | |
678 | }, | |
e098aded MW |
679 | }; |
680 | ||
5cef8df5 | 681 | static struct resource __devinitdata ab8500_temp_resources[] = { |
e098aded MW |
682 | { |
683 | .name = "AB8500_TEMP_WARM", | |
684 | .start = AB8500_INT_TEMP_WARM, | |
685 | .end = AB8500_INT_TEMP_WARM, | |
686 | .flags = IORESOURCE_IRQ, | |
687 | }, | |
688 | }; | |
689 | ||
5cef8df5 | 690 | static struct mfd_cell __devinitdata ab8500_devs[] = { |
5814fc35 MW |
691 | #ifdef CONFIG_DEBUG_FS |
692 | { | |
693 | .name = "ab8500-debug", | |
e098aded MW |
694 | .num_resources = ARRAY_SIZE(ab8500_debug_resources), |
695 | .resources = ab8500_debug_resources, | |
5814fc35 MW |
696 | }, |
697 | #endif | |
e098aded MW |
698 | { |
699 | .name = "ab8500-sysctrl", | |
700 | }, | |
701 | { | |
702 | .name = "ab8500-regulator", | |
703 | }, | |
0cb3fcd7 BB |
704 | { |
705 | .name = "ab8500-gpio", | |
706 | .num_resources = ARRAY_SIZE(ab8500_gpio_resources), | |
707 | .resources = ab8500_gpio_resources, | |
708 | }, | |
62579266 RV |
709 | { |
710 | .name = "ab8500-gpadc", | |
711 | .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), | |
712 | .resources = ab8500_gpadc_resources, | |
713 | }, | |
714 | { | |
715 | .name = "ab8500-rtc", | |
716 | .num_resources = ARRAY_SIZE(ab8500_rtc_resources), | |
717 | .resources = ab8500_rtc_resources, | |
718 | }, | |
e098aded | 719 | { |
6af75ecd LW |
720 | .name = "ab8500-charger", |
721 | .num_resources = ARRAY_SIZE(ab8500_charger_resources), | |
722 | .resources = ab8500_charger_resources, | |
723 | }, | |
724 | { | |
725 | .name = "ab8500-btemp", | |
726 | .num_resources = ARRAY_SIZE(ab8500_btemp_resources), | |
727 | .resources = ab8500_btemp_resources, | |
728 | }, | |
729 | { | |
730 | .name = "ab8500-fg", | |
731 | .num_resources = ARRAY_SIZE(ab8500_fg_resources), | |
732 | .resources = ab8500_fg_resources, | |
733 | }, | |
734 | { | |
735 | .name = "ab8500-chargalg", | |
736 | .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), | |
737 | .resources = ab8500_chargalg_resources, | |
738 | }, | |
739 | { | |
740 | .name = "ab8500-acc-det", | |
741 | .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), | |
742 | .resources = ab8500_av_acc_detect_resources, | |
743 | }, | |
744 | { | |
745 | .name = "ab8500-codec", | |
e098aded | 746 | }, |
e098aded MW |
747 | { |
748 | .name = "ab8500-usb", | |
749 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), | |
750 | .resources = ab8500_usb_resources, | |
751 | }, | |
752 | { | |
753 | .name = "ab8500-poweron-key", | |
754 | .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), | |
755 | .resources = ab8500_poweronkey_db_resources, | |
756 | }, | |
f0f05b1c AM |
757 | { |
758 | .name = "ab8500-pwm", | |
759 | .id = 1, | |
760 | }, | |
761 | { | |
762 | .name = "ab8500-pwm", | |
763 | .id = 2, | |
764 | }, | |
765 | { | |
766 | .name = "ab8500-pwm", | |
767 | .id = 3, | |
768 | }, | |
e098aded | 769 | { .name = "ab8500-leds", }, |
77686517 | 770 | { |
e098aded MW |
771 | .name = "ab8500-denc", |
772 | }, | |
773 | { | |
774 | .name = "ab8500-temp", | |
775 | .num_resources = ARRAY_SIZE(ab8500_temp_resources), | |
776 | .resources = ab8500_temp_resources, | |
77686517 | 777 | }, |
62579266 RV |
778 | }; |
779 | ||
cca69b67 MW |
780 | static ssize_t show_chip_id(struct device *dev, |
781 | struct device_attribute *attr, char *buf) | |
782 | { | |
783 | struct ab8500 *ab8500; | |
784 | ||
785 | ab8500 = dev_get_drvdata(dev); | |
786 | return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); | |
787 | } | |
788 | ||
e5c238c3 MW |
789 | /* |
790 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
791 | * 0x01 Swoff bit programming | |
792 | * 0x02 Thermal protection activation | |
793 | * 0x04 Vbat lower then BattOk falling threshold | |
794 | * 0x08 Watchdog expired | |
795 | * 0x10 Non presence of 32kHz clock | |
796 | * 0x20 Battery level lower than power on reset threshold | |
797 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
798 | * 0x80 DB8500 thermal shutdown | |
799 | */ | |
800 | static ssize_t show_switch_off_status(struct device *dev, | |
801 | struct device_attribute *attr, char *buf) | |
802 | { | |
803 | int ret; | |
804 | u8 value; | |
805 | struct ab8500 *ab8500; | |
806 | ||
807 | ab8500 = dev_get_drvdata(dev); | |
808 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
809 | AB8500_SWITCH_OFF_STATUS, &value); | |
810 | if (ret < 0) | |
811 | return ret; | |
812 | return sprintf(buf, "%#x\n", value); | |
813 | } | |
814 | ||
cca69b67 | 815 | static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); |
e5c238c3 | 816 | static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); |
cca69b67 MW |
817 | |
818 | static struct attribute *ab8500_sysfs_entries[] = { | |
819 | &dev_attr_chip_id.attr, | |
e5c238c3 | 820 | &dev_attr_switch_off_status.attr, |
cca69b67 MW |
821 | NULL, |
822 | }; | |
823 | ||
824 | static struct attribute_group ab8500_attr_group = { | |
825 | .attrs = ab8500_sysfs_entries, | |
826 | }; | |
827 | ||
62579266 RV |
828 | int __devinit ab8500_init(struct ab8500 *ab8500) |
829 | { | |
830 | struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); | |
831 | int ret; | |
832 | int i; | |
47c16975 | 833 | u8 value; |
62579266 RV |
834 | |
835 | if (plat) | |
836 | ab8500->irq_base = plat->irq_base; | |
837 | ||
838 | mutex_init(&ab8500->lock); | |
839 | mutex_init(&ab8500->irq_lock); | |
840 | ||
47c16975 MW |
841 | ret = get_register_interruptible(ab8500, AB8500_MISC, |
842 | AB8500_REV_REG, &value); | |
62579266 RV |
843 | if (ret < 0) |
844 | return ret; | |
845 | ||
863dde5b | 846 | switch (value) { |
863dde5b LW |
847 | case AB8500_CUT1P0: |
848 | case AB8500_CUT1P1: | |
849 | case AB8500_CUT2P0: | |
850 | case AB8500_CUT3P0: | |
0e9049ec | 851 | case AB8500_CUT3P3: |
47c16975 | 852 | dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); |
863dde5b LW |
853 | break; |
854 | default: | |
47c16975 | 855 | dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); |
62579266 RV |
856 | return -EINVAL; |
857 | } | |
47c16975 | 858 | ab8500->chip_id = value; |
62579266 | 859 | |
e5c238c3 MW |
860 | /* |
861 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
862 | * 0x01 Swoff bit programming | |
863 | * 0x02 Thermal protection activation | |
864 | * 0x04 Vbat lower then BattOk falling threshold | |
865 | * 0x08 Watchdog expired | |
866 | * 0x10 Non presence of 32kHz clock | |
867 | * 0x20 Battery level lower than power on reset threshold | |
868 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
869 | * 0x80 DB8500 thermal shutdown | |
870 | */ | |
871 | ||
872 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
873 | AB8500_SWITCH_OFF_STATUS, &value); | |
874 | if (ret < 0) | |
875 | return ret; | |
876 | dev_info(ab8500->dev, "switch off status: %#x", value); | |
877 | ||
62579266 RV |
878 | if (plat && plat->init) |
879 | plat->init(ab8500); | |
880 | ||
881 | /* Clear and mask all interrupts */ | |
92d50a41 | 882 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { |
863dde5b LW |
883 | /* Interrupt register 12 doesn't exist prior to version 2.0 */ |
884 | if (ab8500_irq_regoffset[i] == 11 && | |
885 | ab8500->chip_id < AB8500_CUT2P0) | |
92d50a41 | 886 | continue; |
62579266 | 887 | |
47c16975 | 888 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
92d50a41 MW |
889 | AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i], |
890 | &value); | |
47c16975 | 891 | set_register_interruptible(ab8500, AB8500_INTERRUPT, |
92d50a41 | 892 | AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff); |
62579266 RV |
893 | } |
894 | ||
47c16975 MW |
895 | ret = abx500_register_ops(ab8500->dev, &ab8500_ops); |
896 | if (ret) | |
897 | return ret; | |
898 | ||
62579266 RV |
899 | for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) |
900 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; | |
901 | ||
902 | if (ab8500->irq_base) { | |
903 | ret = ab8500_irq_init(ab8500); | |
904 | if (ret) | |
905 | return ret; | |
906 | ||
907 | ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, | |
4f079985 MW |
908 | IRQF_ONESHOT | IRQF_NO_SUSPEND, |
909 | "ab8500", ab8500); | |
62579266 RV |
910 | if (ret) |
911 | goto out_removeirq; | |
912 | } | |
913 | ||
549931f9 | 914 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, |
62579266 RV |
915 | ARRAY_SIZE(ab8500_devs), NULL, |
916 | ab8500->irq_base); | |
917 | if (ret) | |
918 | goto out_freeirq; | |
919 | ||
cca69b67 MW |
920 | ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group); |
921 | if (ret) | |
922 | dev_err(ab8500->dev, "error creating sysfs entries\n"); | |
923 | ||
62579266 RV |
924 | return ret; |
925 | ||
926 | out_freeirq: | |
927 | if (ab8500->irq_base) { | |
928 | free_irq(ab8500->irq, ab8500); | |
929 | out_removeirq: | |
930 | ab8500_irq_remove(ab8500); | |
931 | } | |
932 | return ret; | |
933 | } | |
934 | ||
935 | int __devexit ab8500_exit(struct ab8500 *ab8500) | |
936 | { | |
cca69b67 | 937 | sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); |
62579266 RV |
938 | mfd_remove_devices(ab8500->dev); |
939 | if (ab8500->irq_base) { | |
940 | free_irq(ab8500->irq, ab8500); | |
941 | ab8500_irq_remove(ab8500); | |
942 | } | |
943 | ||
944 | return 0; | |
945 | } | |
946 | ||
adceed62 | 947 | MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); |
62579266 RV |
948 | MODULE_DESCRIPTION("AB8500 MFD core"); |
949 | MODULE_LICENSE("GPL v2"); |